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Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.c')
-rw-r--r--os/hal/ports/STM32/STM32F7xx/hal_lld.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
index 29472a465..5393e508a 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
@@ -134,7 +134,7 @@ void hal_lld_init(void) {
/* The SRAM2 bank can optionally made a non cache-able area for use by
DMA engines.*/
mpuConfigureRegion(MPU_REGION_7,
- 0x2004C000U,
+ SRAM2_BASE,
MPU_RASR_ATTR_AP_RW_RW |
MPU_RASR_ATTR_NON_CACHEABLE |
MPU_RASR_SIZE_16K |