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Diffstat (limited to 'os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c')
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
index 62624b50d..1c4cafd81 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
@@ -252,6 +252,7 @@ static void usart_stop(UARTDriver *uartp) {
* @param[in] uartp pointer to the @p UARTDriver object
*/
static void usart_start(UARTDriver *uartp) {
+ uint32_t fck;
uint32_t cr1;
const uint32_t tmo = uartp->config->timeout;
USART_TypeDef *u = uartp->usart;
@@ -260,7 +261,14 @@ static void usart_start(UARTDriver *uartp) {
usart_stop(uartp);
/* Baud rate setting.*/
- u->BRR = (uint32_t)(uartp->clock / uartp->config->speed);
+ fck = (uint32_t)(uartp->clock / uartp->config->speed);
+
+ /* Correcting USARTDIV when oversampling by 8 instead of 16.
+ Fraction is still 4 bits wide, but only lower 3 bits used.
+ Mantissa is doubled, but Fraction is left the same.*/
+ if (uartp->config->cr1 & USART_CR1_OVER8)
+ fck = ((fck & ~7) * 2) | (fck & 7);
+ u->BRR = fck;
/* Resetting eventual pending status flags.*/
u->ICR = 0xFFFFFFFFU;