diff options
Diffstat (limited to 'os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h')
| -rw-r--r-- | os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h | 128 |
1 files changed, 125 insertions, 3 deletions
diff --git a/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h index 7642dd71c..fd0ac2cd1 100644 --- a/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h +++ b/os/hal/ports/STM32/LLD/OCTOSPIv1/hal_wspi_lld.h @@ -39,6 +39,46 @@ #define WSPI_DEFAULT_CFG_MASKS TRUE
/** @} */
+/**
+ * @name DCR1 register options
+ * @{
+ */
+#define STM32_DCR1_CK_MODE (1U << 0U)
+#define STM32_DCR1_FRCK_MODE (1U << 1U)
+#define STM32_DCR1_CSHT_MASK (7U << 8U)
+#define STM32_DCR1_CSHT(n) ((n) << 8U)
+#define STM32_DCR1_DEVSIZE_MASK (31U << 16U)
+#define STM32_DCR1_DEVSIZE(n) ((n) << 16U)
+#define STM32_DCR1_MTYP_MASK (7U << 16U)
+#define STM32_DCR1_MTYP(n) ((n) << 24U)
+/** @} */
+
+/**
+ * @name DCR2 register options
+ * @{
+ */
+#define STM32_DCR2_PRESCALER_MASK (255U << 0U)
+#define STM32_DCR2_PRESCALER(n) ((n) << 0U)
+#define STM32_DCR2_WRAPSIZE_MASK (7U << 16U)
+#define STM32_DCR2_WRAPSIZE(n) ((n) << 16U)
+
+/**
+ * @name DCR3 register options
+ * @{
+ */
+#define STM32_DCR3_MAXTRAN_MASK (255U << 0U)
+#define STM32_DCR3_MAXTRAN(n) ((n) << 0U)
+#define STM32_DCR3_CSBOUND_MASK (7U << 16U)
+#define STM32_DCR3_CSBOUND(n) ((n) << 16U)
+
+/**
+ * @name DCR4 register options
+ * @{
+ */
+#define STM32_DCR4_REFRESH_MASK (255U << 0U)
+#define STM32_DCR4_REFRESH(n) ((n) << 0U)
+/** @} */
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -57,6 +97,15 @@ #endif
/**
+ * @brief WSPID2 driver enable switch.
+ * @details If set to @p TRUE the support for OCTOSPI2 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(STM32_WSPI_USE_OCTOSPI2) || defined(__DOXYGEN__)
+#define STM32_WSPI_USE_OCTOSPI2 FALSE
+#endif
+
+/**
* @brief OCTOSPI1 prescaler setting.
* @note This is the prescaler divider value 1..256. The maximum frequency
* varies depending on the STM32 model and operating conditions,
@@ -67,6 +116,16 @@ #endif
/**
+ * @brief OCTOSPI2 prescaler setting.
+ * @note This is the prescaler divider value 1..256. The maximum frequency
+ * varies depending on the STM32 model and operating conditions,
+ * find the details in the data sheet.
+ */
+#if !defined(STM32_WSPI_OCTOSPI2_PRESCALER_VALUE) || defined(__DOXYGEN__)
+#define STM32_WSPI_OCTOSPI2_PRESCALER_VALUE 1
+#endif
+
+/**
* @brief OCTOSPI1 interrupt priority level setting.
*/
#if !defined(STM32_WSPI_OCTOSPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
@@ -74,6 +133,13 @@ #endif
/**
+ * @brief OCTOSPI2 interrupt priority level setting.
+ */
+#if !defined(STM32_WSPI_OCTOSPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_WSPI_OCTOSPI2_IRQ_PRIORITY 10
+#endif
+
+/**
* @brief OCTOSPI1 DMA priority (0..3|lowest..highest).
*/
#if !defined(STM32_WSPI_OCTOSPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
@@ -81,6 +147,13 @@ #endif
/**
+ * @brief OCTOSPI2 DMA priority (0..3|lowest..highest).
+ */
+#if !defined(STM32_WSPI_OCTOSPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_WSPI_OCTOSPI2_DMA_PRIORITY 1
+#endif
+
+/**
* @brief OCTOSPI1 DMA interrupt priority level setting.
*/
#if !defined(STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__)
@@ -88,6 +161,13 @@ #endif
/**
+ * @brief OCTOSPI2 DMA interrupt priority level setting.
+ */
+#if !defined(STM32_WSPI_OCTOSPI2_DMA_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_WSPI_OCTOSPI2_DMA_IRQ_PRIORITY 10
+#endif
+
+/**
* @brief OCTOSPI DMA error hook.
*/
#if !defined(STM32_WSPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
@@ -103,11 +183,19 @@ #define STM32_HAS_OCTOSPI1 FALSE
#endif
+#if !defined(STM32_HAS_OCTOSPI2)
+#define STM32_HAS_OCTOSPI2 FALSE
+#endif
+
#if STM32_WSPI_USE_OCTOSPI1 && !STM32_HAS_OCTOSPI1
#error "OCTOSPI1 not present in the selected device"
#endif
-#if !STM32_WSPI_USE_OCTOSPI1
+#if STM32_WSPI_USE_OCTOSPI2 && !STM32_HAS_OCTOSPI2
+#error "OCTOSPI2 not present in the selected device"
+#endif
+
+#if !STM32_WSPI_USE_OCTOSPI1 && !STM32_WSPI_USE_OCTOSPI2
#error "WSPI driver activated but no OCTOSPI peripheral assigned"
#endif
@@ -123,28 +211,52 @@ #error "Invalid IRQ priority assigned to OCTOSPI1"
#endif
+#if STM32_WSPI_USE_OCTOSPI2 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to OCTOSPI2"
+#endif
+
#if STM32_WSPI_USE_OCTOSPI1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to OCTOSPI1 DMA"
#endif
-/* Check on the presence of the DMA chennels settings in mcuconf.h.*/
+#if STM32_WSPI_USE_OCTOSPI2 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI2_DMA_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to OCTOSPI2 DMA"
+#endif
+
+/* Check on the presence of the DMA channels settings in mcuconf.h.*/
#if STM32_WSPI_USE_OCTOSPI1 && !defined(STM32_WSPI_OCTOSPI1_DMA_CHANNEL)
#error "OCTOSPI1 DMA channel not defined"
#endif
+#if STM32_WSPI_USE_OCTOSPI2 && !defined(STM32_WSPI_OCTOSPI2_DMA_CHANNEL)
+#error "OCTOSPI2 DMA channel not defined"
+#endif
+
/* Check on the validity of the assigned DMA channels.*/
#if STM32_WSPI_USE_OCTOSPI1 && \
- !STM32_DMA_IS_VALID_CHANNEL(STM32_OCTOSPI1_DMA_MSK)
+ !STM32_DMA_IS_VALID_CHANNEL(STM32_WSPI_OCTOSPI1_DMA_CHANNEL)
#error "invalid DMA stream associated to OCTOSPI1"
#endif
+#if STM32_WSPI_USE_OCTOSPI2 && \
+ !STM32_DMA_IS_VALID_CHANNEL(STM32_WSPI_OCTOSPI2_DMA_CHANNEL)
+#error "invalid DMA stream associated to OCTOSPI2"
+#endif
+
/* Check on DMA channels priority.*/
#if STM32_WSPI_USE_OCTOSPI1 && \
!STM32_DMA_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI1_DMA_PRIORITY)
#error "Invalid DMA priority assigned to OCTOSPI1"
#endif
+#if STM32_WSPI_USE_OCTOSPI2 && \
+ !STM32_DMA_IS_VALID_PRIORITY(STM32_WSPI_OCTOSPI2_DMA_PRIORITY)
+#error "Invalid DMA priority assigned to OCTOSPI2"
+#endif
+
#if !defined(STM32_DMA_REQUIRED)
#define STM32_DMA_REQUIRED
#endif
@@ -168,12 +280,18 @@ struct hal_wspi_config { uint32_t dcr1;
/**
* @brief DCR2 register initialization data.
+ * @note Prescaler field is internally ORed to this field, leave it
+ * to zero.
*/
uint32_t dcr2;
/**
* @brief DCR3 register initialization data.
*/
uint32_t dcr3;
+ /**
+ * @brief DCR4 register initialization data.
+ */
+ uint32_t dcr4;
};
/**
@@ -230,6 +348,10 @@ struct hal_wspi_driver { extern WSPIDriver WSPID1;
#endif
+#if (STM32_WSPI_USE_OCTOSPI2 == TRUE) && !defined(__DOXYGEN__)
+extern WSPIDriver WSPID2;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
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