diff options
Diffstat (limited to 'os/hal/ports/STM32/LLD/ADCv3')
-rw-r--r-- | os/hal/ports/STM32/LLD/ADCv3/adc_lld.c | 62 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/ADCv3/adc_lld.h | 40 |
2 files changed, 86 insertions, 16 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv3/adc_lld.c b/os/hal/ports/STM32/LLD/ADCv3/adc_lld.c index a4a690300..ad5d7b220 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv3/adc_lld.c @@ -30,6 +30,18 @@ /* Driver local definitions. */
/*===========================================================================*/
+#define ADC1_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_ADC_ADC1_DMA_STREAM, STM32_ADC1_DMA_CHN)
+
+#define ADC2_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_ADC_ADC2_DMA_STREAM, STM32_ADC2_DMA_CHN)
+
+#define ADC3_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_ADC_ADC3_DMA_STREAM, STM32_ADC3_DMA_CHN)
+
+#define ADC4_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_ADC_ADC4_DMA_STREAM, STM32_ADC4_DMA_CHN)
+
#if STM32_ADC_DUAL_MODE
#if STM32_ADC_COMPACT_SAMPLES
/* Compact type dual mode.*/
@@ -421,12 +433,18 @@ void adc_lld_init(void) { #if STM32_ADC_USE_ADC1
/* Driver initialization.*/
adcObjectInit(&ADCD1);
- ADCD1.adcm = ADC1;
-#if STM32_ADC_DUAL_MODE
- ADCD1.adcs = ADC2;
+#if defined(ADC1_2_COMMON)
ADCD1.adcc = ADC1_2_COMMON;
+#elif defined(ADC123_COMMON)
+ ADCD1.adcc = ADC123_COMMON;
+#else
+ ADCD1.adcc = ADC1_COMMON;
#endif
- ADCD1.dmastp = STM32_DMA1_STREAM1;
+ ADCD1.adcm = ADC1;
+#if STM32_ADC_DUAL_MODE
+ ADCD1.adcs = ADC2;
+#endif
+ ADCD1.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC1_DMA_STREAM);
ADCD1.dmamode = ADC_DMA_SIZE |
STM32_DMA_CR_PL(STM32_ADC_ADC1_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M |
@@ -437,12 +455,18 @@ void adc_lld_init(void) { #if STM32_ADC_USE_ADC3
/* Driver initialization.*/
adcObjectInit(&ADCD3);
- ADCD3.adcm = ADC3;
-#if STM32_ADC_DUAL_MODE
- ADCD3.adcs = ADC4;
+#if defined(ADC3_4_COMMON)
ADCD3.adcc = ADC3_4_COMMON;
+#elif defined(ADC123_COMMON)
+ ADCD1.adcc = ADC123_COMMON;
+#else
+ ADCD3.adcc = ADC3_COMMON;
+#endif
+ ADCD3.adcm = ADC3;
+#if STM32_ADC_DUAL_MODE
+ ADCD3.adcs = ADC4;
#endif
- ADCD3.dmastp = STM32_DMA2_STREAM5;
+ ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM);
ADCD3.dmamode = ADC_DMA_SIZE |
STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) |
STM32_DMA_CR_DIR_P2M |
@@ -468,13 +492,13 @@ void adc_lld_init(void) { #if defined(STM32F3XX)
#if STM32_ADC_USE_ADC1 || STM32_ADC_USE_ADC2
rccEnableADC12(FALSE);
-// osalSysPolledDelayX(12);
+ rccResetADC12();
ADC1_2_COMMON->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC12(FALSE);
#endif
#if STM32_ADC_USE_ADC3 || STM32_ADC_USE_ADC4
rccEnableADC34(FALSE);
-// osalSysPolledDelayX(12);
+ rccResetADC34();
ADC3_4_COMMON->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC34(FALSE);
#endif
@@ -482,7 +506,7 @@ void adc_lld_init(void) { #if defined(STM32L4XX)
rccEnableADC123(FALSE);
-// osalSysPolledDelayX(12);
+ rccResetADC123();
ADC123_COMMON->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC123(FALSE);
#endif
@@ -517,6 +541,9 @@ void adc_lld_start(ADCDriver *adcp) { #if defined(STM32F3XX)
rccEnableADC12(FALSE);
#endif
+#if defined(STM32L4XX)
+ rccEnableADC123(FALSE);
+#endif
}
#endif /* STM32_ADC_USE_ADC1 */
@@ -533,6 +560,9 @@ void adc_lld_start(ADCDriver *adcp) { #if defined(STM32F3XX)
rccEnableADC12(FALSE);
#endif
+#if defined(STM32L4XX)
+ rccEnableADC123(FALSE);
+#endif
}
#endif /* STM32_ADC_USE_ADC2 */
@@ -549,6 +579,9 @@ void adc_lld_start(ADCDriver *adcp) { #if defined(STM32F3XX)
rccEnableADC34(FALSE);
#endif
+#if defined(STM32L4XX)
+ rccEnableADC123(FALSE);
+#endif
}
#endif /* STM32_ADC_USE_ADC3 */
@@ -565,12 +598,11 @@ void adc_lld_start(ADCDriver *adcp) { #if defined(STM32F3XX)
rccEnableADC34(FALSE);
#endif
- }
-#endif /* STM32_ADC_USE_ADC4 */
-
#if defined(STM32L4XX)
- rccEnableADC123(FALSE);
+ rccEnableADC123(FALSE);
#endif
+ }
+#endif /* STM32_ADC_USE_ADC4 */
/* Setting DMA peripheral-side pointer.*/
#if STM32_ADC_DUAL_MODE
diff --git a/os/hal/ports/STM32/LLD/ADCv3/adc_lld.h b/os/hal/ports/STM32/LLD/ADCv3/adc_lld.h index 3c39560d4..ffb83dedb 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv3/adc_lld.h @@ -482,6 +482,44 @@ #error "Invalid DMA priority assigned to ADC4"
#endif
+/* Check on the presence of the DMA streams settings in mcuconf.h.*/
+#if STM32_ADC_USE_ADC1 && !defined(STM32_ADC_ADC1_DMA_STREAM)
+#error "ADC1 DMA stream not defined"
+#endif
+
+#if STM32_ADC_USE_ADC2 && !defined(STM32_ADC_ADC2_DMA_STREAM)
+#error "ADC2 DMA stream not defined"
+#endif
+
+#if STM32_ADC_USE_ADC3 && !defined(STM32_ADC_ADC3_DMA_STREAM)
+#error "ADC3 DMA stream not defined"
+#endif
+
+#if STM32_ADC_USE_ADC4 && !defined(STM32_ADC_ADC4_DMA_STREAM)
+#error "ADC4 DMA stream not defined"
+#endif
+
+/* Check on the validity of the assigned DMA channels.*/
+#if STM32_ADC_USE_ADC1 && \
+ !STM32_DMA_IS_VALID_ID(STM32_ADC_ADC1_DMA_STREAM, STM32_ADC1_DMA_MSK)
+#error "invalid DMA stream associated to ADC1"
+#endif
+
+#if STM32_ADC_USE_ADC2 && \
+ !STM32_DMA_IS_VALID_ID(STM32_ADC_ADC2_DMA_STREAM, STM32_ADC2_DMA_MSK)
+#error "invalid DMA stream associated to ADC2"
+#endif
+
+#if STM32_ADC_USE_ADC3 && \
+ !STM32_DMA_IS_VALID_ID(STM32_ADC_ADC3_DMA_STREAM, STM32_ADC3_DMA_MSK)
+#error "invalid DMA stream associated to ADC3"
+#endif
+
+#if STM32_ADC_USE_ADC4 && \
+ !STM32_DMA_IS_VALID_ID(STM32_ADC_ADC4_DMA_STREAM, STM32_ADC4_DMA_MSK)
+#error "invalid DMA stream associated to ADC4"
+#endif
+
/* ADC clock source checks.*/
#if defined(STM32F3XX)
#if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
@@ -721,11 +759,11 @@ struct ADCDriver { * @brief Pointer to the slave ADCx registers block.
*/
ADC_TypeDef *adcs;
+#endif /* STM32_ADC_DUAL_MODE */
/**
* @brief Pointer to the common ADCx_y registers block.
*/
ADC_Common_TypeDef *adcc;
-#endif /* STM32_ADC_DUAL_MODE */
/**
* @brief Pointer to associated DMA channel.
*/
|