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Diffstat (limited to 'os/hal/platforms/STM32L1xx')
-rw-r--r--os/hal/platforms/STM32L1xx/hal_lld.h6
-rw-r--r--os/hal/platforms/STM32L1xx/platform.mk1
2 files changed, 3 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h
index ca69ac784..97cfde0b7 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.h
+++ b/os/hal/platforms/STM32L1xx/hal_lld.h
@@ -367,7 +367,7 @@
/**
* @brief Maximum HSECLK at current voltage setting.
*/
-#define STM32_HSECLK_MAX 32000000
+#define STM32_HSECLK_MAX 32000000#if
/**
* @brief Maximum SYSCLK at current voltage setting.
@@ -430,7 +430,7 @@
#if (STM32_HSECLK < 1000000) || (STM32_HSECLK > STM32_HSECLK_MAX)
#error "STM32_HSECLK outside acceptable range (1MHz...STM32_HSECLK_MAX)"
#endif
-#else /* !#if STM32_HSE_ENABLED */
+#else /* !STM32_HSE_ENABLED */
#if (STM32_SW == STM32_SW_HSE) || \
((STM32_SW == STM32_SW_PLL) && \
(STM32_PLLSRC == STM32_PLLSRC_HSE)) || \
@@ -440,7 +440,7 @@
(STM_RTC_SOURCE == STM32_RTCSEL_HSEDIV)
#error "required HSE clock is not enabled"
#endif
-#endif /* !#if STM32_HSE_ENABLED */
+#endif /* !STM32_HSE_ENABLED */
/* LSI related checks.*/
#if STM32_LSI_ENABLED
diff --git a/os/hal/platforms/STM32L1xx/platform.mk b/os/hal/platforms/STM32L1xx/platform.mk
index 6d1bb61c4..348722671 100644
--- a/os/hal/platforms/STM32L1xx/platform.mk
+++ b/os/hal/platforms/STM32L1xx/platform.mk
@@ -5,7 +5,6 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32L1xx/hal_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
- ${CHIBIOS}/os/hal/platforms/STM32/DMAv1/adc_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/DMAv1/spi_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/DMAv1/uart_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/DMAv1/stm32_dma.c \