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-rw-r--r--os/hal/platforms/SPC560BCxx/hal_lld.c3
-rw-r--r--os/hal/platforms/SPC560BCxx/spc560bc_registry.h1
2 files changed, 4 insertions, 0 deletions
diff --git a/os/hal/platforms/SPC560BCxx/hal_lld.c b/os/hal/platforms/SPC560BCxx/hal_lld.c
index b7e157dc5..0be4cfb57 100644
--- a/os/hal/platforms/SPC560BCxx/hal_lld.c
+++ b/os/hal/platforms/SPC560BCxx/hal_lld.c
@@ -176,6 +176,9 @@ void spc_clock_init(void) {
CFLASH.PFCR1.B.BK1_APC = 2;
CFLASH.PFCR1.B.BK1_RWSC = 2;
+ /* Initialization of e200z0 special registers.*/
+ port_mtspr(1013, 0x00000001); /* BPEN=1. */
+
#endif /* !SPC5_NO_INIT */
}
diff --git a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
index 6fe68be87..92158b107 100644
--- a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
+++ b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
@@ -81,6 +81,7 @@
#define SPC5_SIU_NUM_PORTS 8
#define SPC5_SIU_NUM_PCRS 123
#define SPC5_SIU_NUM_PADSELS 32
+#define SPC5_SIU_SYSTEM_PINS 32,33,121,122
/** @} */
#endif /* _SPC560BC_REGISTRY_H_ */