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-rw-r--r--os/hal/platforms/MSP430/hal_lld.c7
-rw-r--r--os/hal/platforms/MSP430/hal_lld.h4
-rw-r--r--os/hal/platforms/MSP430/pal_lld.c26
-rw-r--r--os/hal/platforms/MSP430/pal_lld.h58
-rw-r--r--os/hal/platforms/MSP430/serial_lld.c10
5 files changed, 64 insertions, 41 deletions
diff --git a/os/hal/platforms/MSP430/hal_lld.c b/os/hal/platforms/MSP430/hal_lld.c
index 1acb4d474..0e8ac71dc 100644
--- a/os/hal/platforms/MSP430/hal_lld.c
+++ b/os/hal/platforms/MSP430/hal_lld.c
@@ -56,9 +56,10 @@
*/
void hal_lld_init(void) {
- /*
- * Clock sources setup.
- */
+ /* RTC initially stopped.*/
+ WDTCTL = 0x5A80;
+
+ /* Clock sources setup.*/
DCOCTL = VAL_DCOCTL;
BCSCTL1 = VAL_BCSCTL1;
#if MSP430_USE_CLOCK == MSP430_CLOCK_SOURCE_XT2CLK
diff --git a/os/hal/platforms/MSP430/hal_lld.h b/os/hal/platforms/MSP430/hal_lld.h
index 85944038f..ea04b45ff 100644
--- a/os/hal/platforms/MSP430/hal_lld.h
+++ b/os/hal/platforms/MSP430/hal_lld.h
@@ -29,7 +29,7 @@
#ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
-#include "msp430x16x.h"
+#include "msp430.h"
/*===========================================================================*/
/* Driver constants. */
@@ -43,7 +43,7 @@
/**
* @brief Platform name.
*/
-#define PLATFORM_NAME "MSP430x16x"
+#define PLATFORM_NAME "MSP430"
#define MSP430_CLOCK_SOURCE_XT2CLK 0 /**< @brief XT2CLK clock selector. */
#define MSP430_CLOCK_SOURCE_DCOCLK 1 /**< @brief DCOCLK clock selector. */
diff --git a/os/hal/platforms/MSP430/pal_lld.c b/os/hal/platforms/MSP430/pal_lld.c
index 6728d1ac5..562b0efb7 100644
--- a/os/hal/platforms/MSP430/pal_lld.c
+++ b/os/hal/platforms/MSP430/pal_lld.c
@@ -63,41 +63,41 @@
void _pal_lld_init(const PALConfig *config) {
#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
- IOPORT1->iop_full.ie.reg_p = 0;
- IOPORT1->iop_full.ifg.reg_p = 0;
- IOPORT1->iop_full.sel.reg_p = 0;
+ IOPORT1->iop_full.ie = 0;
+ IOPORT1->iop_full.ifg = 0;
+ IOPORT1->iop_full.sel = 0;
IOPORT1->iop_common.out = config->P1Data.out;
IOPORT1->iop_common.dir = config->P1Data.dir;
#endif
#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
- IOPORT2->iop_full.ie.reg_p = 0;
- IOPORT2->iop_full.ifg.reg_p = 0;
- IOPORT2->iop_full.sel.reg_p = 0;
+ IOPORT2->iop_full.ie = 0;
+ IOPORT2->iop_full.ifg = 0;
+ IOPORT2->iop_full.sel = 0;
IOPORT2->iop_common.out = config->P2Data.out;
IOPORT2->iop_common.dir = config->P2Data.dir;
#endif
#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
- IOPORT3->iop_simple.sel.reg_p = 0;
+ IOPORT3->iop_simple.sel = 0;
IOPORT3->iop_common.out = config->P3Data.out;
IOPORT3->iop_common.dir = config->P3Data.dir;
#endif
#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
- IOPORT4->iop_simple.sel.reg_p = 0;
+ IOPORT4->iop_simple.sel = 0;
IOPORT4->iop_common.out = config->P4Data.out;
IOPORT4->iop_common.dir = config->P4Data.dir;
#endif
#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
- IOPORT5->iop_simple.sel.reg_p = 0;
+ IOPORT5->iop_simple.sel = 0;
IOPORT5->iop_common.out = config->P5Data.out;
IOPORT5->iop_common.dir = config->P5Data.dir;
#endif
#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
- IOPORT6->iop_simple.sel.reg_p = 0;
+ IOPORT6->iop_simple.sel = 0;
IOPORT6->iop_common.out = config->P6Data.out;
IOPORT6->iop_common.dir = config->P6Data.dir;
#endif
@@ -126,12 +126,12 @@ void _pal_lld_setgroupmode(ioportid_t port,
switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT:
- port->iop_common.dir.reg_p &= ~mask;
+ port->iop_common.dir &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
- port->iop_common.out.reg_p |= mask;
+ port->iop_common.out |= mask;
case PAL_MODE_OUTPUT_PUSHPULL:
- port->iop_common.dir.reg_p |= mask;
+ port->iop_common.dir |= mask;
break;
}
}
diff --git a/os/hal/platforms/MSP430/pal_lld.h b/os/hal/platforms/MSP430/pal_lld.h
index 8c035c3f6..a2909a0e7 100644
--- a/os/hal/platforms/MSP430/pal_lld.h
+++ b/os/hal/platforms/MSP430/pal_lld.h
@@ -45,14 +45,40 @@
/*===========================================================================*/
/**
+ * @brief Simple MSP430 I/O port.
+ */
+struct msp430_port_simple_t {
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
+ volatile uint8_t sel;
+};
+
+/**
+ * @brief Full MSP430 I/O port.
+ */
+struct msp430_port_full_t {
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
+ volatile uint8_t ifg;
+ volatile uint8_t ies;
+ volatile uint8_t ie;
+ volatile uint8_t sel;
+#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__)
+ volatile uint8_t ren;
+#endif
+};
+
+/**
* @brief Simplified MSP430 I/O port representation.
* @details This structure represents the common part of all the MSP430 I/O
* ports.
*/
struct msp430_port_common {
- ioregister_t in;
- ioregister_t out;
- ioregister_t dir;
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
};
/**
@@ -60,16 +86,16 @@ struct msp430_port_common {
*/
typedef union {
struct msp430_port_common iop_common;
- struct port_simple_t iop_simple;
- struct port_full_t iop_full;
+ struct msp430_port_simple_t iop_simple;
+ struct msp430_port_full_t iop_full;
} msp430_ioport_t;
/**
* @brief Setup registers common to all the MSP430 ports.
*/
typedef struct {
- ioregister_t out;
- ioregister_t dir;
+ volatile uint8_t out;
+ volatile uint8_t dir;
} msp430_dio_setup_t;
/**
@@ -158,7 +184,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT1__) || \
defined(__MSP430_HAS_PORT1_R__) || \
defined(__DOXYGEN__)
-#define IOPORT1 ((ioportid_t)0x0020)
+#define IOPORT1 ((ioportid_t)P1IN_)
#endif
/**
@@ -168,7 +194,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT2__) || \
defined(__MSP430_HAS_PORT2_R__) || \
defined(__DOXYGEN__)
-#define IOPORT2 ((ioportid_t)0x0028)
+#define IOPORT2 ((ioportid_t)P2IN_)
#endif
/**
@@ -178,7 +204,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT3__) || \
defined(__MSP430_HAS_PORT3_R__) || \
defined(__DOXYGEN__)
-#define IOPORT3 ((ioportid_t)0x0018)
+#define IOPORT3 ((ioportid_t)P3IN_)
#endif
/**
@@ -188,7 +214,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT4__) || \
defined(__MSP430_HAS_PORT4_R__) || \
defined(__DOXYGEN__)
-#define IOPORT4 ((ioportid_t)0x001c)
+#define IOPORT4 ((ioportid_t)P4IN_)
#endif
/**
@@ -198,7 +224,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT5__) || \
defined(__MSP430_HAS_PORT5_R__) || \
defined(__DOXYGEN__)
-#define IOPORT5 ((ioportid_t)0x0030)
+#define IOPORT5 ((ioportid_t)P5IN_)
#endif
/**
@@ -208,7 +234,7 @@ typedef msp430_ioport_t *ioportid_t;
#if defined(__MSP430_HAS_PORT6__) || \
defined(__MSP430_HAS_PORT6_R__) || \
defined(__DOXYGEN__)
-#define IOPORT6 ((ioportid_t)0x0034)
+#define IOPORT6 ((ioportid_t)P6IN_)
#endif
/*===========================================================================*/
@@ -236,7 +262,7 @@ typedef msp430_ioport_t *ioportid_t;
*
* @notapi
*/
-#define pal_lld_readport(port) ((port)->iop_common.in.reg_p)
+#define pal_lld_readport(port) ((port)->iop_common.in)
/**
* @brief Reads the output latch.
@@ -248,7 +274,7 @@ typedef msp430_ioport_t *ioportid_t;
*
* @notapi
*/
-#define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p)
+#define pal_lld_readlatch(port) ((port)->iop_common.out)
/**
* @brief Writes a bits mask on a I/O port.
@@ -260,7 +286,7 @@ typedef msp430_ioport_t *ioportid_t;
*
* @notapi
*/
-#define pal_lld_writeport(port, bits) ((port)->iop_common.out.reg_p = (bits))
+#define pal_lld_writeport(port, bits) ((port)->iop_common.out = (bits))
/**
* @brief Pads group mode setup.
diff --git a/os/hal/platforms/MSP430/serial_lld.c b/os/hal/platforms/MSP430/serial_lld.c
index a2cec716c..5420fc201 100644
--- a/os/hal/platforms/MSP430/serial_lld.c
+++ b/os/hal/platforms/MSP430/serial_lld.c
@@ -26,7 +26,7 @@
* @{
*/
-#include <signal.h>
+//#include <signal.h>
#include "ch.h"
#include "hal.h"
@@ -177,7 +177,7 @@ static void usart1_deinit(void) {
*
* @isr
*/
-CH_IRQ_HANDLER(USART0TX_VECTOR) {
+CH_IRQ_HANDLER(USART0TX) {
msg_t b;
CH_IRQ_PROLOGUE();
@@ -198,7 +198,7 @@ CH_IRQ_HANDLER(USART0TX_VECTOR) {
*
* @isr
*/
-CH_IRQ_HANDLER(USART0RX_VECTOR) {
+CH_IRQ_HANDLER(USART0RX) {
uint8_t urctl;
CH_IRQ_PROLOGUE();
@@ -268,14 +268,10 @@ void sd_lld_init(void) {
#if USE_MSP430_USART0
sdObjectInit(&SD1, NULL, notify1);
- /* I/O pins for USART0.*/
- P3SEL |= BV(4) + BV(5);
#endif
#if USE_MSP430_USART1
sdObjectInit(&SD2, NULL, notify2);
- /* I/O pins for USART1.*/
- P3SEL |= BV(6) + BV(7);
#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 09:08:36 +0000