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-rw-r--r--demos/ARM7-LPC214x-GCC/Makefile4
-rw-r--r--demos/ARM7-LPC214x-GCC/chconf.h2
-rw-r--r--demos/ARM7-LPC214x-GCC/chcore.c2
-rw-r--r--demos/ARM7-LPC214x-GCC/chcore.h4
-rw-r--r--demos/ARM7-LPC214x-GCC/chcore2.s30
5 files changed, 19 insertions, 23 deletions
diff --git a/demos/ARM7-LPC214x-GCC/Makefile b/demos/ARM7-LPC214x-GCC/Makefile
index 755c134e5..0c0ad93e9 100644
--- a/demos/ARM7-LPC214x-GCC/Makefile
+++ b/demos/ARM7-LPC214x-GCC/Makefile
@@ -93,9 +93,9 @@ AOPT =
TOPT = -mthumb -D THUMB
# Common options here
-# NOTE: -ffixed-f7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in chconf.h.
+# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in chconf.h.
OPT = -O2 -ggdb -fomit-frame-pointer -fno-strict-aliasing
-#OPT += -ffixed-f7
+#OPT += -ffixed-r7
# Define warning options here
WARN = -Wall -Wstrict-prototypes
diff --git a/demos/ARM7-LPC214x-GCC/chconf.h b/demos/ARM7-LPC214x-GCC/chconf.h
index ba9957e49..51aac3a64 100644
--- a/demos/ARM7-LPC214x-GCC/chconf.h
+++ b/demos/ARM7-LPC214x-GCC/chconf.h
@@ -160,7 +160,7 @@
* @note the debug support is port-dependent, it may be not present on some
* targets. In that case stub functions will be included.
*/
-#define CH_USE_DEBUG
+//#define CH_USE_DEBUG
#endif /* _CHCONF_H_ */
diff --git a/demos/ARM7-LPC214x-GCC/chcore.c b/demos/ARM7-LPC214x-GCC/chcore.c
index 128fb97aa..2f60c9d53 100644
--- a/demos/ARM7-LPC214x-GCC/chcore.c
+++ b/demos/ARM7-LPC214x-GCC/chcore.c
@@ -214,6 +214,6 @@ void NonVectoredIrq(void) {
void Timer0Irq(void) {
T0IR = 1; /* Clear interrupt on match MR0. */
- VICVectAddr = 0;
chSchTimerHandlerI();
+ VICVectAddr = 0;
}
diff --git a/demos/ARM7-LPC214x-GCC/chcore.h b/demos/ARM7-LPC214x-GCC/chcore.h
index 5a42cdf89..9a1401f1c 100644
--- a/demos/ARM7-LPC214x-GCC/chcore.h
+++ b/demos/ARM7-LPC214x-GCC/chcore.h
@@ -37,7 +37,7 @@ struct stackregs {
regarm r4;
regarm r5;
regarm r6;
-#ifndef MK_CURRP_REGISTER_CACHE
+#ifndef CH_CURRP_REGISTER_CACHE
regarm r7;
#endif
regarm r8;
@@ -51,7 +51,7 @@ typedef struct {
struct stackregs *r13;
} Context;
-#ifdef MK_CURRP_REGISTER_CACHE
+#ifdef CH_CURRP_REGISTER_CACHE
#define SETUP_CONTEXT(workspace, wsize, pf, arg) \
{ \
tp->p_ctx.r13 = (struct stackregs *)((BYTE8 *)workspace + \
diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s
index f734eebba..1eb301fbe 100644
--- a/demos/ARM7-LPC214x-GCC/chcore2.s
+++ b/demos/ARM7-LPC214x-GCC/chcore2.s
@@ -47,10 +47,6 @@ threadstart:
SwiHandler:
b SwiHandler
-.globl DefIrqHandler
-DefIrqHandler:
- b DefIrqHandler
-
.globl FiqHandler
FiqHandler:
b FiqHandler
@@ -109,7 +105,7 @@ chSysSwitchI:
* | R10 | |
* | R9 | |
* | R8 | | Internal context: mk_SwitchI() frame
- * | (R7) | | (optional, see MK_CURRP_REGISTER_CACHE)
+ * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
* | R6 | |
* | R5 | |
* SP-> | R4 | -+
@@ -119,9 +115,9 @@ chSysSwitchI:
IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr}
- mrs r0, SPSR // Workaround for ARM7TDMI+VIC
- tst r0, #I_BIT // spurious interrupts.
- ldmnefd sp!, {r0-r3, r12, pc}
+// mrs r0, SPSR // Workaround for ARM7TDMI+VIC
+// tst r0, #I_BIT // spurious interrupts.
+// ldmnefd sp!, {r0-r3, r12, pc}
bl NonVectoredIrq
b IrqCommon
@@ -129,9 +125,9 @@ IrqHandler:
T0IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr}
- mrs r0, SPSR // Workaround for ARM7TDMI+VIC
- tst r0, #I_BIT // spurious interrupts.
- ldmnefd sp!, {r0-r3, r12, pc}^
+// mrs r0, SPSR // Workaround for ARM7TDMI+VIC
+// tst r0, #I_BIT // spurious interrupts.
+// ldmnefd sp!, {r0-r3, r12, pc}^
bl Timer0Irq
b IrqCommon
@@ -139,9 +135,9 @@ T0IrqHandler:
UART0IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr}
- mrs r0, SPSR // Workaround for ARM7TDMI+VIC
- tst r0, #I_BIT // spurious interrupts.
- ldmnefd sp!, {r0-r3, r12, pc}^
+// mrs r0, SPSR // Workaround for ARM7TDMI+VIC
+// tst r0, #I_BIT // spurious interrupts.
+// ldmnefd sp!, {r0-r3, r12, pc}^
bl UART0Irq
b IrqCommon
@@ -149,9 +145,9 @@ UART0IrqHandler:
UART1IrqHandler:
sub lr, lr, #4
stmfd sp!, {r0-r3, r12, lr}
- mrs r0, SPSR // Workaround for ARM7TDMI+VIC
- tst r0, #I_BIT // spurious interrupts.
- ldmnefd sp!, {r0-r3, r12, pc}^
+// mrs r0, SPSR // Workaround for ARM7TDMI+VIC
+// tst r0, #I_BIT // spurious interrupts.
+// ldmnefd sp!, {r0-r3, r12, pc}^
bl UART1Irq
b IrqCommon