diff options
Diffstat (limited to 'demos')
-rw-r--r-- | demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h | 7 | ||||
-rw-r--r-- | demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h | 7 | ||||
-rw-r--r-- | demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h | 7 |
3 files changed, 21 insertions, 0 deletions
diff --git a/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h b/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h index cb3943ee9..2a12bcb50 100644 --- a/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h +++ b/demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h @@ -63,6 +63,13 @@ #define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
+#define STM32_PLLSAIN_VALUE 192
+#define STM32_PLLSAIM_VALUE 4
+#define STM32_PLLSAIP_VALUE 4
+#define STM32_PLLSAIQ_VALUE 4
+#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
+#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
+#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h index f0212d64a..9d0fd8d6b 100644 --- a/demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h @@ -63,6 +63,13 @@ #define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
+#define STM32_PLLSAIN_VALUE 192
+#define STM32_PLLSAIM_VALUE 4
+#define STM32_PLLSAIP_VALUE 4
+#define STM32_PLLSAIQ_VALUE 4
+#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
+#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
+#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h index bec6a9243..797541457 100644 --- a/demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h +++ b/demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h @@ -61,6 +61,13 @@ #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
+#define STM32_PLLSAIN_VALUE 192
+#define STM32_PLLSAIR_VALUE 4
+#define STM32_PLLSAIP_VALUE 4
+#define STM32_PLLSAIQ_VALUE 4
+#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
+#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
+#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
|