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-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h1
-rw-r--r--readme.txt2
2 files changed, 2 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index 5e8b6532a..028ac219b 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -250,7 +250,6 @@
#define STM32_HAS_TIM2 FALSE
#define STM32_HAS_TIM4 FALSE
#define STM32_HAS_TIM5 FALSE
-#define STM32_HAS_TIM7 FALSE
#define STM32_HAS_TIM8 FALSE
#define STM32_HAS_TIM9 FALSE
#define STM32_HAS_TIM10 FALSE
diff --git a/readme.txt b/readme.txt
index 58ad64157..6914ab199 100644
--- a/readme.txt
+++ b/readme.txt
@@ -153,6 +153,8 @@
- RT: Merged RT4.
- NIL: Merged NIL2.
- NIL: Added STM32F7 demo.
+- HAL: Fixed redefined TIM in STM32F030 registry (bug #809)
+ (backported to 16.1.7).
- HAL: Fixed clock init in STM32F0x port which doesn't take in account
PLL_XTPRE and PREDIV_0 are hard-wired (bug #808)
(backported to 16.1.7).