diff options
| -rw-r--r-- | os/hal/platforms/STM32F1xx/hal_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F1xx/stm32_dma.c | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F1xx/stm32_dma.h | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F2xx/stm32_dma.c | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_dma.c | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32L1xx/stm32_dma.c | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32L1xx/stm32_dma.h | 2 |
7 files changed, 3 insertions, 7 deletions
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c index d6de13b5c..6731fe1cc 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.c +++ b/os/hal/platforms/STM32F1xx/hal_lld.c @@ -52,7 +52,7 @@ static void hal_lld_backup_domain_init(void) { PWR->CR |= PWR_CR_DBP;
/* Reset BKP domain if different clock source selected.*/
- if ((RCC->BDCR & STM32_RTCSEL_MSK) != STM32_RTCSEL){
+ if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL){
/* Backup domain reset.*/
RCC->BDCR = RCC_BDCR_BDRST;
RCC->BDCR = 0;
diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.c b/os/hal/platforms/STM32F1xx/stm32_dma.c index 939ae9e93..49c6be1bc 100644 --- a/os/hal/platforms/STM32F1xx/stm32_dma.c +++ b/os/hal/platforms/STM32F1xx/stm32_dma.c @@ -446,7 +446,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp, /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp);
- dmaStreamClearInterrupt(dmastp);
dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
/* Enables the associated IRQ vector if a callback is defined.*/
diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.h b/os/hal/platforms/STM32F1xx/stm32_dma.h index 4a92ce50a..88d8c83bf 100644 --- a/os/hal/platforms/STM32F1xx/stm32_dma.h +++ b/os/hal/platforms/STM32F1xx/stm32_dma.h @@ -310,7 +310,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special
*/
#define dmaStreamDisable(dmastp) { \
- (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \
+ (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \
dmaStreamClearInterrupt(dmastp); \
}
diff --git a/os/hal/platforms/STM32F2xx/stm32_dma.c b/os/hal/platforms/STM32F2xx/stm32_dma.c index 04d8ecbe9..6e1fd8d46 100644 --- a/os/hal/platforms/STM32F2xx/stm32_dma.c +++ b/os/hal/platforms/STM32F2xx/stm32_dma.c @@ -483,7 +483,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp, /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp);
- dmaStreamClearInterrupt(dmastp);
dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE;
dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE;
diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.c b/os/hal/platforms/STM32F4xx/stm32_dma.c index 4a0ea3e8e..1308a4f4d 100644 --- a/os/hal/platforms/STM32F4xx/stm32_dma.c +++ b/os/hal/platforms/STM32F4xx/stm32_dma.c @@ -483,7 +483,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp, /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp);
- dmaStreamClearInterrupt(dmastp);
dmastp->stream->CR = STM32_DMA_CR_RESET_VALUE;
dmastp->stream->FCR = STM32_DMA_FCR_RESET_VALUE;
diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.c b/os/hal/platforms/STM32L1xx/stm32_dma.c index 851efb8b5..ec1640ba4 100644 --- a/os/hal/platforms/STM32L1xx/stm32_dma.c +++ b/os/hal/platforms/STM32L1xx/stm32_dma.c @@ -302,7 +302,6 @@ bool_t dmaStreamAllocate(const stm32_dma_stream_t *dmastp, /* Putting the stream in a safe state.*/
dmaStreamDisable(dmastp);
- dmaStreamClearInterrupt(dmastp);
dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
/* Enables the associated IRQ vector if a callback is defined.*/
diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.h b/os/hal/platforms/STM32L1xx/stm32_dma.h index a12f60fcb..597cce763 100644 --- a/os/hal/platforms/STM32L1xx/stm32_dma.h +++ b/os/hal/platforms/STM32L1xx/stm32_dma.h @@ -301,7 +301,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @special
*/
#define dmaStreamDisable(dmastp) { \
- (dmastp)->stream->CR &= ~STM32_DMA_CR_EN; \
+ (dmastp)->channel->CCR &= ~STM32_DMA_CR_EN; \
dmaStreamClearInterrupt(dmastp); \
}
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