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-rw-r--r--demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj4
-rw-r--r--docs/reports/STM32F407-168-RVCT.txt10
-rw-r--r--testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj940
-rw-r--r--testhal/STM32F4xx/IRQ_STORM/main.c1
4 files changed, 947 insertions, 8 deletions
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj b/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj
index c6aa767d3..4674821e7 100644
--- a/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj
+++ b/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj
@@ -389,12 +389,12 @@
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
- <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath>
+ <FilePath>..\..\..\boards\ST_STM32F4_DISCOVERY\board.c</FilePath>
</File>
<File>
<FileName>board.h</FileName>
<FileType>5</FileType>
- <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath>
+ <FilePath>..\..\..\boards\ST_STM32F4_DISCOVERY\board.h</FilePath>
</File>
</Files>
</Group>
diff --git a/docs/reports/STM32F407-168-RVCT.txt b/docs/reports/STM32F407-168-RVCT.txt
index cbd3796d0..025881db4 100644
--- a/docs/reports/STM32F407-168-RVCT.txt
+++ b/docs/reports/STM32F407-168-RVCT.txt
@@ -7,7 +7,7 @@ Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
*** ChibiOS/RT test suite
***
*** Kernel: 2.3.5unstable
-*** Compiled: Dec 28 2011 - 13:36:15
+*** Compiled: Dec 28 2011 - 17:21:35
*** Compiler: RVCT
*** Architecture: ARMv7-ME
*** Core Variant: Cortex-M4
@@ -101,7 +101,7 @@ Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
---- Score : 711270 msgs/S, 1422540 ctxswc/S
+--- Score : 711269 msgs/S, 1422538 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
@@ -117,11 +117,11 @@ Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 447628 threads/S
+--- Score : 448826 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 638254 threads/S
+--- Score : 640692 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
@@ -145,7 +145,7 @@ Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 1929428 lock+unlock/S
+--- Score : 1951860 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
diff --git a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj
new file mode 100644
index 000000000..f5c4d8fbf
--- /dev/null
+++ b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj
@@ -0,0 +1,940 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>Demo</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>STM32F407VG</Device>
+ <Vendor>STMicroelectronics</Vendor>
+ <Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code")</StartupFile>
+ <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
+ <DeviceId>6103</DeviceId>
+ <RegisterFile>stm32f4xx.h</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>SFD\ST\STM32F4xx\STM32F4xx.sfr</SFDFile>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>ST\STM32F4xx\</RegisterFilePath>
+ <DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\obj\</OutputDirectory>
+ <OutputName>ch</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\lst\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>8</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>STLink\ST-LINKIII-KEIL.dll</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>1</Capability>
+ <DriverSelection>4100</DriverSelection>
+ </Flash1>
+ <Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2>
+ <Flash3>"" ()</Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>1</hadIRAM2>
+ <hadIROM2>0</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>0</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>1</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x100000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x8000000</StartAddress>
+ <Size>0x100000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x20000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x20020000</StartAddress>
+ <Size>0x1</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>4</Optim>
+ <oTime>1</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define>
+ <Undefine></Undefine>
+ <IncludePath>..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <VariousControls>
+ <MiscControls>--cpreproc</MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath>..\;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx</IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
+ <umfTarg>1</umfTarg>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <noStLib>0</noStLib>
+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x08000000</TextAddressRange>
+ <DataAddressRange>0x20000000</DataAddressRange>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>board</GroupName>
+ <Files>
+ <File>
+ <FileName>board.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c</FilePath>
+ </File>
+ <File>
+ <FileName>board.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>port</GroupName>
+ <Files>
+ <File>
+ <FileName>cstartup.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath>
+ </File>
+ <File>
+ <FileName>chcoreasm_v7m.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath>
+ </File>
+ <File>
+ <FileName>chcore.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath>
+ </File>
+ <File>
+ <FileName>chcore_v7m.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath>
+ </File>
+ <File>
+ <FileName>chcore.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chcore.h</FilePath>
+ </File>
+ <File>
+ <FileName>chcore_v7m.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h</FilePath>
+ </File>
+ <File>
+ <FileName>chtypes.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\chtypes.h</FilePath>
+ </File>
+ <File>
+ <FileName>cmparams.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\cmparams.h</FilePath>
+ </File>
+ <File>
+ <FileName>vectors.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\vectors.s</FilePath>
+ </File>
+ <File>
+ <FileName>nvic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\ports\common\ARMCMx\nvic.c</FilePath>
+ </File>
+ <File>
+ <FileName>nvic.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\ports\common\ARMCMx\nvic.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>kernel</GroupName>
+ <Files>
+ <File>
+ <FileName>chcond.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chcond.c</FilePath>
+ </File>
+ <File>
+ <FileName>chdebug.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chdebug.c</FilePath>
+ </File>
+ <File>
+ <FileName>chdynamic.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chdynamic.c</FilePath>
+ </File>
+ <File>
+ <FileName>chevents.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chevents.c</FilePath>
+ </File>
+ <File>
+ <FileName>chheap.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chheap.c</FilePath>
+ </File>
+ <File>
+ <FileName>chlists.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chlists.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmboxes.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chmboxes.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmemcore.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chmemcore.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmempools.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chmempools.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmsg.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chmsg.c</FilePath>
+ </File>
+ <File>
+ <FileName>chmtx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\kernel\src\chmtx.c</FilePath>
+ </File>
+ <File>
+ <FileName>chqueues.c</FileName>
+ <FileType>1</FileType>
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+ <FilePath>..\..\..\..\os\kernel\include\ch.h</FilePath>
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+ <FileType>5</FileType>
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+ </Files>
+ </Group>
+ <Group>
+ <GroupName>hal</GroupName>
+ <Files>
+ <File>
+ <FileName>hal.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\..\..\..\os\hal\src\hal.c</FilePath>
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+ <GroupName>platform</GroupName>
+ <Files>
+ <File>
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+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\hal\platforms\STM32\gpt_lld.h</FilePath>
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+ <FileType>1</FileType>
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+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h</FilePath>
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+ </Files>
+ </Group>
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+ <GroupName>test</GroupName>
+ <Files>
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+ <FileType>1</FileType>
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+ <FilePath>..\..\..\..\test\testpools.c</FilePath>
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+ <FileType>1</FileType>
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+ <FileName>testthd.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\..\..\..\test\testthd.h</FilePath>
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+ </Files>
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+ <Group>
+ <GroupName>demo</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>..\main.c</FilePath>
+ </File>
+ <File>
+ <FileName>mcuconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\mcuconf.h</FilePath>
+ </File>
+ <File>
+ <FileName>chconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\chconf.h</FilePath>
+ </File>
+ <File>
+ <FileName>halconf.h</FileName>
+ <FileType>5</FileType>
+ <FilePath>..\halconf.h</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c
index 20dda712f..6a24a82ef 100644
--- a/testhal/STM32F4xx/IRQ_STORM/main.c
+++ b/testhal/STM32F4xx/IRQ_STORM/main.c
@@ -328,5 +328,4 @@ int main(void) {
while (TRUE) {
chThdSleepMilliseconds(5000);
}
- return 0;
}