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-rw-r--r--os/hal/include/pal.h34
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h46
-rw-r--r--os/rt/include/chschd.h2
-rw-r--r--os/rt/include/chvt.h8
-rw-r--r--os/rt/ports/ARM/chcore.h2
-rw-r--r--os/rt/ports/ARMCMx/chcore_v6m.h2
-rw-r--r--os/rt/ports/ARMCMx/chcore_v7m.h2
-rw-r--r--os/rt/ports/SIMIA32/chcore.h4
-rw-r--r--os/rt/ports/e200/chcore.h2
-rw-r--r--os/rt/templates/chcore.h2
10 files changed, 52 insertions, 52 deletions
diff --git a/os/hal/include/pal.h b/os/hal/include/pal.h
index d6c13ceb4..e78ed3491 100644
--- a/os/hal/include/pal.h
+++ b/os/hal/include/pal.h
@@ -44,7 +44,7 @@
* it is guaranteed to be equal to the after-reset state. It is
* usually an input state.
*/
-#define PAL_MODE_RESET 0
+#define PAL_MODE_RESET 0U
/**
* @brief Safe state for <b>unconnected</b> pads.
@@ -53,37 +53,37 @@
* @p PAL_MODE_INPUT_PULLDOWN or @p PAL_MODE_OUTPUT_PUSHPULL for
* example.
*/
-#define PAL_MODE_UNCONNECTED 1
+#define PAL_MODE_UNCONNECTED 1U
/**
* @brief Regular input high-Z pad.
*/
-#define PAL_MODE_INPUT 2
+#define PAL_MODE_INPUT 2U
/**
* @brief Input pad with weak pull up resistor.
*/
-#define PAL_MODE_INPUT_PULLUP 3
+#define PAL_MODE_INPUT_PULLUP 3U
/**
* @brief Input pad with weak pull down resistor.
*/
-#define PAL_MODE_INPUT_PULLDOWN 4
+#define PAL_MODE_INPUT_PULLDOWN 4U
/**
* @brief Analog input mode.
*/
-#define PAL_MODE_INPUT_ANALOG 5
+#define PAL_MODE_INPUT_ANALOG 5U
/**
* @brief Push-pull output pad.
*/
-#define PAL_MODE_OUTPUT_PUSHPULL 6
+#define PAL_MODE_OUTPUT_PUSHPULL 6U
/**
* @brief Open-drain output pad.
*/
-#define PAL_MODE_OUTPUT_OPENDRAIN 7
+#define PAL_MODE_OUTPUT_OPENDRAIN 7U
/** @} */
/**
@@ -93,12 +93,12 @@
/**
* @brief Logical low state.
*/
-#define PAL_LOW 0
+#define PAL_LOW 0U
/**
* @brief Logical high state.
*/
-#define PAL_HIGH 1
+#define PAL_HIGH 1U
/** @} */
/*===========================================================================*/
@@ -151,7 +151,7 @@ typedef struct {
* @return The bit mask.
*/
#if !defined(PAL_PORT_BIT) || defined(__DOXYGEN__)
-#define PAL_PORT_BIT(n) ((ioportmask_t)(1 << (n)))
+#define PAL_PORT_BIT(n) ((ioportmask_t)(1U << (n)))
#endif
/**
@@ -162,7 +162,7 @@ typedef struct {
* @return The group mask.
*/
#if !defined(PAL_GROUP_MASK) || defined(__DOXYGEN__)
-#define PAL_GROUP_MASK(width) ((ioportmask_t)(1 << (width)) - 1)
+#define PAL_GROUP_MASK(width) ((ioportmask_t)(1U << (width)) - 1U)
#endif
/**
@@ -218,7 +218,7 @@ typedef struct {
* @special
*/
#if !defined(pal_lld_readport) || defined(__DOXYGEN__)
-#define palReadPort(port) ((void)(port), 0)
+#define palReadPort(port) ((void)(port), 0U)
#else
#define palReadPort(port) pal_lld_readport(port)
#endif
@@ -237,7 +237,7 @@ typedef struct {
* @special
*/
#if !defined(pal_lld_readlatch) || defined(__DOXYGEN__)
-#define palReadLatch(port) ((void)(port), 0)
+#define palReadLatch(port) ((void)(port), 0U)
#else
#define palReadLatch(port) pal_lld_readlatch(port)
#endif
@@ -408,7 +408,7 @@ typedef struct {
* @special
*/
#if !defined(pal_lld_readpad) || defined(__DOXYGEN__)
-#define palReadPad(port, pad) ((palReadPort(port) >> (pad)) & 1)
+#define palReadPad(port, pad) ((palReadPort(port) >> (pad)) & 1U)
#else
#define palReadPad(port, pad) pal_lld_readpad(port, pad)
#endif
@@ -436,7 +436,7 @@ typedef struct {
#if !defined(pal_lld_writepad) || defined(__DOXYGEN__)
#define palWritePad(port, pad, bit) \
palWritePort(port, (palReadLatch(port) & ~PAL_PORT_BIT(pad)) | \
- (((bit) & 1) << pad))
+ (((bit) & 1U) << pad))
#else
#define palWritePad(port, pad, bit) pal_lld_writepad(port, pad, bit)
#endif
@@ -527,7 +527,7 @@ typedef struct {
*/
#if !defined(pal_lld_setpadmode) || defined(__DOXYGEN__)
#define palSetPadMode(port, pad, mode) \
- palSetGroupMode(port, PAL_PORT_BIT(pad), 0, mode)
+ palSetGroupMode(port, PAL_PORT_BIT(pad), 0U, mode)
#else
#define palSetPadMode(port, pad, mode) pal_lld_setpadmode(port, pad, mode)
#endif
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h
index 78e4cdf5c..6165530c4 100644
--- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h
+++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h
@@ -44,33 +44,33 @@
* @name STM32-specific I/O mode flags
* @{
*/
-#define PAL_STM32_MODE_MASK (3 << 0)
-#define PAL_STM32_MODE_INPUT (0 << 0)
-#define PAL_STM32_MODE_OUTPUT (1 << 0)
-#define PAL_STM32_MODE_ALTERNATE (2 << 0)
-#define PAL_STM32_MODE_ANALOG (3 << 0)
-
-#define PAL_STM32_OTYPE_MASK (1 << 2)
-#define PAL_STM32_OTYPE_PUSHPULL (0 << 2)
-#define PAL_STM32_OTYPE_OPENDRAIN (1 << 2)
-
-#define PAL_STM32_OSPEED_MASK (3 << 3)
-#define PAL_STM32_OSPEED_LOWEST (0 << 3)
+#define PAL_STM32_MODE_MASK (3U << 0U)
+#define PAL_STM32_MODE_INPUT (0U << 0U)
+#define PAL_STM32_MODE_OUTPUT (1U << 0U)
+#define PAL_STM32_MODE_ALTERNATE (2U << 0U)
+#define PAL_STM32_MODE_ANALOG (3U << 0U)
+
+#define PAL_STM32_OTYPE_MASK (1U << 2U)
+#define PAL_STM32_OTYPE_PUSHPULL (0U << 2U)
+#define PAL_STM32_OTYPE_OPENDRAIN (1U << 2U)
+
+#define PAL_STM32_OSPEED_MASK (3U << 3U)
+#define PAL_STM32_OSPEED_LOWEST (0U << 3U)
#if defined(STM32F0XX) || defined(STM32F30X) || defined(STM32F37X)
-#define PAL_STM32_OSPEED_MID (1 << 3)
+#define PAL_STM32_OSPEED_MID (1U << 3U)
#else
-#define PAL_STM32_OSPEED_MID1 (1 << 3)
-#define PAL_STM32_OSPEED_MID2 (2 << 3)
+#define PAL_STM32_OSPEED_MID1 (1U << 3U)
+#define PAL_STM32_OSPEED_MID2 (2U << 3U)
#endif
-#define PAL_STM32_OSPEED_HIGHEST (3 << 3)
+#define PAL_STM32_OSPEED_HIGHEST (3U << 3U)
-#define PAL_STM32_PUDR_MASK (3 << 5)
-#define PAL_STM32_PUDR_FLOATING (0 << 5)
-#define PAL_STM32_PUDR_PULLUP (1 << 5)
-#define PAL_STM32_PUDR_PULLDOWN (2 << 5)
+#define PAL_STM32_PUDR_MASK (3U << 5U)
+#define PAL_STM32_PUDR_FLOATING (0U << 5U)
+#define PAL_STM32_PUDR_PULLUP (1U << 5U)
+#define PAL_STM32_PUDR_PULLDOWN (2U << 5U)
-#define PAL_STM32_ALTERNATE_MASK (15 << 7)
-#define PAL_STM32_ALTERNATE(n) ((n) << 7)
+#define PAL_STM32_ALTERNATE_MASK (15U << 7U)
+#define PAL_STM32_ALTERNATE(n) ((n) << 7U)
/**
* @brief Alternate function.
@@ -441,7 +441,7 @@ typedef stm32_gpio_t * ioportid_t;
* @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR.W = ((~(bits) & (mask)) << (16 + (offset))) | \
+ ((port)->BSRR.W = ((~(bits) & (mask)) << (16U + (offset))) | \
(((bits) & (mask)) << (offset)))
/**
diff --git a/os/rt/include/chschd.h b/os/rt/include/chschd.h
index 0679cadd5..12a6762fa 100644
--- a/os/rt/include/chschd.h
+++ b/os/rt/include/chschd.h
@@ -116,7 +116,7 @@
* @api
*/
#define THD_ALIGN_STACK_SIZE(n) \
- ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
+ (((((size_t)(n)) - 1U) | (sizeof(stkalign_t) - 1U)) + 1U)
/**
* @brief Calculates the total Working Area size.
diff --git a/os/rt/include/chvt.h b/os/rt/include/chvt.h
index 0a4b3a94c..f0a8f00d6 100644
--- a/os/rt/include/chvt.h
+++ b/os/rt/include/chvt.h
@@ -118,8 +118,8 @@
* @api
*/
#define MS2ST(msec) \
- ((systime_t)(((((uint32_t)(msec)) * \
- ((uint32_t)CH_CFG_ST_FREQUENCY) - 1UL) / 1000UL) + 1UL))
+ ((systime_t)((((((uint32_t)(msec)) * \
+ ((uint32_t)CH_CFG_ST_FREQUENCY)) - 1UL) / 1000UL) + 1UL))
/**
* @brief Microseconds to system ticks.
@@ -132,8 +132,8 @@
* @api
*/
#define US2ST(usec) \
- ((systime_t)(((((uint32_t)(usec)) * \
- ((uint32_t)CH_CFG_ST_FREQUENCY) - 1UL) / 1000000UL) + 1UL))
+ ((systime_t)((((((uint32_t)(usec)) * \
+ ((uint32_t)CH_CFG_ST_FREQUENCY)) - 1UL) / 1000000UL) + 1UL))
/**
* @brief System ticks to seconds.
diff --git a/os/rt/ports/ARM/chcore.h b/os/rt/ports/ARM/chcore.h
index 980a45a8e..2d672d7ac 100644
--- a/os/rt/ports/ARM/chcore.h
+++ b/os/rt/ports/ARM/chcore.h
@@ -251,7 +251,7 @@ struct context {
*/
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
diff --git a/os/rt/ports/ARMCMx/chcore_v6m.h b/os/rt/ports/ARMCMx/chcore_v6m.h
index 7bb1b3d8f..3ded54449 100644
--- a/os/rt/ports/ARMCMx/chcore_v6m.h
+++ b/os/rt/ports/ARMCMx/chcore_v6m.h
@@ -197,7 +197,7 @@ struct port_intctx {
*/
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h
index 47a5cf9a8..80faaefc9 100644
--- a/os/rt/ports/ARMCMx/chcore_v7m.h
+++ b/os/rt/ports/ARMCMx/chcore_v7m.h
@@ -296,7 +296,7 @@ struct port_intctx {
*/
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
diff --git a/os/rt/ports/SIMIA32/chcore.h b/os/rt/ports/SIMIA32/chcore.h
index 5f7f3ff14..06d9f9329 100644
--- a/os/rt/ports/SIMIA32/chcore.h
+++ b/os/rt/ports/SIMIA32/chcore.h
@@ -191,8 +191,8 @@ struct context {
#define PORT_WA_SIZE(n) (sizeof(void *) * 4 + \
sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + \
- PORT_INT_REQUIRED_STACK)
+ ((size_t)(n)) + \
+ ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
diff --git a/os/rt/ports/e200/chcore.h b/os/rt/ports/e200/chcore.h
index 116f269f0..f1485b81a 100644
--- a/os/rt/ports/e200/chcore.h
+++ b/os/rt/ports/e200/chcore.h
@@ -300,7 +300,7 @@ struct context {
*/
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
diff --git a/os/rt/templates/chcore.h b/os/rt/templates/chcore.h
index af09b2efd..39d173608 100644
--- a/os/rt/templates/chcore.h
+++ b/os/rt/templates/chcore.h
@@ -177,7 +177,7 @@ struct context {
*/
#define PORT_WA_SIZE(n) (sizeof(struct port_intctx) + \
sizeof(struct port_extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
+ ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))
/**
* @brief IRQ prologue code.
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-11 07:21:10 +0000