diff options
-rw-r--r-- | demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj | 980 | ||||
-rw-r--r-- | docs/reports/STM32F407-168-IAR.txt | 6 | ||||
-rw-r--r-- | docs/reports/STM32F407-168-RVCT.txt | 165 | ||||
-rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.h | 10 | ||||
-rw-r--r-- | os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h | 2 | ||||
-rw-r--r-- | os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h | 4 | ||||
-rw-r--r-- | os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h | 62 | ||||
-rw-r--r-- | os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s | 338 |
8 files changed, 1556 insertions, 11 deletions
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj b/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj new file mode 100644 index 000000000..24588192f --- /dev/null +++ b/demos/ARMCM4-STM32F407-DISCOVERY/keil/ch.uvproj @@ -0,0 +1,980 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>Demo</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F407VG</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000)</FlashDriverDll> + <DeviceId>6103</DeviceId> + <RegisterFile>stm32f4xx.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\ST\STM32F4xx\STM32F4xx.sfr</SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F4xx\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F4xx\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\obj\</OutputDirectory> + <OutputName>ch</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>1</BrowseInformation> + <ListingPath>.\lst\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM4</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>0</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>8</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>STLink\ST-LINKIII-KEIL.dll</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4100</DriverSelection> + </Flash1> + <Flash2>STLink\ST-LINKIII-KEIL.dll</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>0</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>1</RvdsVP> + <hadIRAM2>1</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>0</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>1</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x20000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x20000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x20020000</StartAddress> + <Size>0x1</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>1</oTime> + <SplitLS>0</SplitLS> + <OneElfS>0</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>0</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base</Define> + <Undefine></Undefine> + <IncludePath>..\;..\..\..\os\kernel\include;..\..\..\os\ports\RVCT\ARMCMx;..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\os\hal\include;..\..\..\os\hal\platforms\STM32;..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\os\hal\platforms\STM32F4xx;..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\test</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls>--cpreproc</MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath>..\;..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx</IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>board</GroupName> + <Files> + <File> + <FileName>board.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.c</FilePath> + </File> + <File> + <FileName>board.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\boards\ST_STM32L_DISCOVERY\board.h</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>port</GroupName> + <Files> + <File> + <FileName>cstartup.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\cstartup.s</FilePath> + </File> + <File> + <FileName>chcoreasm_v7m.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s</FilePath> + </File> + <File> + <FileName>chcore.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.c</FilePath> + </File> + <File> + <FileName>chcore_v7m.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c</FilePath> + </File> + <File> + <FileName>nvic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.c</FilePath> + </File> + <File> + <FileName>chcore.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore.h</FilePath> + </File> + <File> + <FileName>chcore_v7m.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h</FilePath> + </File> + <File> + <FileName>chtypes.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\chtypes.h</FilePath> + </File> + <File> + <FileName>nvic.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\nvic.h</FilePath> + </File> + <File> + <FileName>cmparams.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\cmparams.h</FilePath> + </File> + <File> + <FileName>vectors.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\vectors.s</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>kernel</GroupName> + <Files> + <File> + <FileName>chcond.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chcond.c</FilePath> + </File> + <File> + <FileName>chdebug.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chdebug.c</FilePath> + </File> + <File> + <FileName>chdynamic.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chdynamic.c</FilePath> + </File> + <File> + <FileName>chevents.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chevents.c</FilePath> + </File> + <File> + <FileName>chheap.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chheap.c</FilePath> + </File> + <File> + <FileName>chlists.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chlists.c</FilePath> + </File> + <File> + <FileName>chmboxes.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chmboxes.c</FilePath> + </File> + <File> + <FileName>chmemcore.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chmemcore.c</FilePath> + </File> + <File> + <FileName>chmempools.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chmempools.c</FilePath> + </File> + <File> + <FileName>chmsg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chmsg.c</FilePath> + </File> + <File> + <FileName>chmtx.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chmtx.c</FilePath> + </File> + <File> + <FileName>chqueues.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chqueues.c</FilePath> + </File> + <File> + <FileName>chregistry.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chregistry.c</FilePath> + </File> + <File> + <FileName>chschd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chschd.c</FilePath> + </File> + <File> + <FileName>chsem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chsem.c</FilePath> + </File> + <File> + <FileName>chsys.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chsys.c</FilePath> + </File> + <File> + <FileName>chthreads.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chthreads.c</FilePath> + </File> + <File> + <FileName>chvt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\kernel\src\chvt.c</FilePath> + </File> + <File> + <FileName>ch.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\ch.h</FilePath> + </File> + <File> + <FileName>chbsem.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chbsem.h</FilePath> + </File> + <File> + <FileName>chcond.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chcond.h</FilePath> + </File> + <File> + <FileName>chdebug.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chdebug.h</FilePath> + </File> + <File> + <FileName>chdynamic.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chdynamic.h</FilePath> + </File> + <File> + <FileName>chevents.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chevents.h</FilePath> + </File> + <File> + <FileName>chfiles.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chfiles.h</FilePath> + </File> + <File> + <FileName>chheap.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chheap.h</FilePath> + </File> + <File> + <FileName>chinline.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chinline.h</FilePath> + </File> + <File> + <FileName>chioch.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chioch.h</FilePath> + </File> + <File> + <FileName>chlists.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chlists.h</FilePath> + </File> + <File> + <FileName>chmboxes.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chmboxes.h</FilePath> + </File> + <File> + <FileName>chmemcore.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chmemcore.h</FilePath> + </File> + <File> + <FileName>chmempools.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chmempools.h</FilePath> + </File> + <File> + <FileName>chmsg.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chmsg.h</FilePath> + </File> + <File> + <FileName>chmtx.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chmtx.h</FilePath> + </File> + <File> + <FileName>chqueues.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chqueues.h</FilePath> + </File> + <File> + <FileName>chregistry.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chregistry.h</FilePath> + </File> + <File> + <FileName>chschd.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chschd.h</FilePath> + </File> + <File> + <FileName>chsem.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chsem.h</FilePath> + </File> + <File> + <FileName>chstreams.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chstreams.h</FilePath> + </File> + <File> + <FileName>chsys.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chsys.h</FilePath> + </File> + <File> + <FileName>chthreads.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chthreads.h</FilePath> + </File> + <File> + <FileName>chvt.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\kernel\include\chvt.h</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>hal</GroupName> + <Files> + <File> + <FileName>adc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\adc.c</FilePath> + </File> + <File> + <FileName>hal.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\hal.c</FilePath> + </File> + <File> + <FileName>pal.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\pal.c</FilePath> + </File> + <File> + <FileName>pwm.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\pwm.c</FilePath> + </File> + <File> + <FileName>serial.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\serial.c</FilePath> + </File> + <File> + <FileName>spi.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\src\spi.c</FilePath> + </File> + <File> + <FileName>adc.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\adc.h</FilePath> + </File> + <File> + <FileName>hal.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\hal.h</FilePath> + </File> + <File> + <FileName>pal.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\pal.h</FilePath> + </File> + <File> + <FileName>pwm.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\pwm.h</FilePath> + </File> + <File> + <FileName>serial.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\serial.h</FilePath> + </File> + <File> + <FileName>spi.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\include\spi.h</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>platform</GroupName> + <Files> + <File> + <FileName>adc_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\adc_lld.c</FilePath> + </File> + <File> + <FileName>adc_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\adc_lld.h</FilePath> + </File> + <File> + <FileName>hal_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c</FilePath> + </File> + <File> + <FileName>hal_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h</FilePath> + </File> + <File> + <FileName>pal_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c</FilePath> + </File> + <File> + <FileName>pal_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h</FilePath> + </File> + <File> + <FileName>pwm_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.c</FilePath> + </File> + <File> + <FileName>pwm_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\pwm_lld.h</FilePath> + </File> + <File> + <FileName>serial_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.c</FilePath> + </File> + <File> + <FileName>spi_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.h</FilePath> + </File> + <File> + <FileName>spi_lld.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\spi_lld.c</FilePath> + </File> + <File> + <FileName>serial_lld.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32\serial_lld.h</FilePath> + </File> + <File> + <FileName>stm32_dma.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c</FilePath> + </File> + <File> + <FileName>stm32_dma.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h</FilePath> + </File> + <File> + <FileName>stm32_rcc.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h</FilePath> + </File> + <File> + <FileName>stm32l1xx.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>test</GroupName> + <Files> + <File> + <FileName>test.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\test.c</FilePath> + </File> + <File> + <FileName>testbmk.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testbmk.c</FilePath> + </File> + <File> + <FileName>testdyn.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testdyn.c</FilePath> + </File> + <File> + <FileName>testevt.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testevt.c</FilePath> + </File> + <File> + <FileName>testheap.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testheap.c</FilePath> + </File> + <File> + <FileName>testmbox.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testmbox.c</FilePath> + </File> + <File> + <FileName>testmsg.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testmsg.c</FilePath> + </File> + <File> + <FileName>testmtx.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testmtx.c</FilePath> + </File> + <File> + <FileName>testpools.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testpools.c</FilePath> + </File> + <File> + <FileName>testqueues.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testqueues.c</FilePath> + </File> + <File> + <FileName>testsem.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testsem.c</FilePath> + </File> + <File> + <FileName>testthd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\test\testthd.c</FilePath> + </File> + <File> + <FileName>test.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\test.h</FilePath> + </File> + <File> + <FileName>testbmk.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testbmk.h</FilePath> + </File> + <File> + <FileName>testdyn.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testdyn.h</FilePath> + </File> + <File> + <FileName>testevt.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testevt.h</FilePath> + </File> + <File> + <FileName>testheap.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testheap.h</FilePath> + </File> + <File> + <FileName>testmbox.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testmbox.h</FilePath> + </File> + <File> + <FileName>testmsg.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testmsg.h</FilePath> + </File> + <File> + <FileName>testmtx.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testmtx.h</FilePath> + </File> + <File> + <FileName>testpools.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testpools.h</FilePath> + </File> + <File> + <FileName>testqueues.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testqueues.h</FilePath> + </File> + <File> + <FileName>testsem.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testsem.h</FilePath> + </File> + <File> + <FileName>testthd.h</FileName> + <FileType>5</FileType> + <FilePath>..\..\..\test\testthd.h</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>demo</GroupName> + <Files> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\main.c</FilePath> + </File> + <File> + <FileName>mcuconf.h</FileName> + <FileType>5</FileType> + <FilePath>..\mcuconf.h</FilePath> + </File> + <File> + <FileName>chconf.h</FileName> + <FileType>5</FileType> + <FilePath>..\chconf.h</FilePath> + </File> + <File> + <FileName>halconf.h</FileName> + <FileType>5</FileType> + <FilePath>..\halconf.h</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/docs/reports/STM32F407-168-IAR.txt b/docs/reports/STM32F407-168-IAR.txt index 0011dc230..566c74038 100644 --- a/docs/reports/STM32F407-168-IAR.txt +++ b/docs/reports/STM32F407-168-IAR.txt @@ -7,10 +7,10 @@ Compiler: IAR C/C++ Compiler for ARM 6.21.4.2946 *** ChibiOS/RT test suite
***
*** Kernel: 2.3.4unstable
-*** Compiled: Nov 26 2011 - 21:41:02
+*** Compiled: Nov 26 2011 - 22:23:17
*** Compiler: IAR
-*** Architecture: ARMv7-M
-*** Core Variant: Cortex-M3
+*** Architecture: ARMv7-ME
+*** Core Variant: Cortex-M4
*** Port Info: Advanced kernel mode
*** Platform: STM32F4 High Performance & DSP
*** Test Board: ST STM32F4-Discovery
diff --git a/docs/reports/STM32F407-168-RVCT.txt b/docs/reports/STM32F407-168-RVCT.txt new file mode 100644 index 000000000..40a194098 --- /dev/null +++ b/docs/reports/STM32F407-168-RVCT.txt @@ -0,0 +1,165 @@ +***************************************************************************
+Options: -O3 -Otime --apcs=interwork
+Settings: SYSCLK=32, ACR=0x11 (1 wait state)
+Compiler: RealView C/C++ Compiler V4.1.0.791 [Evaluation].
+***************************************************************************
+
+*** ChibiOS/RT test suite
+***
+*** Kernel: 2.3.4unstable
+*** Compiled: Nov 26 2011 - 22:18:53
+*** Compiler: RVCT
+*** Architecture: ARMv7-ME
+*** Core Variant: Cortex-M4
+*** Port Info: Advanced kernel mode
+*** Platform: STM32F4 High Performance & DSP
+*** Test Board: ST STM32F4-Discovery
+
+----------------------------------------------------------------------------
+--- Test Case 1.1 (Threads, enqueuing test #1)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.2 (Threads, enqueuing test #2)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.3 (Threads, priority change)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 1.4 (Threads, delays)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.1 (Semaphores, enqueuing)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.2 (Semaphores, timeout)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.3 (Semaphores, atomic signal-wait)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 2.4 (Binary Semaphores, functionality)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.1 (Mutexes, priority enqueuing test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.2 (Mutexes, priority inheritance, simple case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.3 (Mutexes, priority inheritance, complex case)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.4 (Mutexes, priority return)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.5 (Mutexes, status)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.6 (CondVar, signal test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.7 (CondVar, broadcast test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 3.8 (CondVar, boost test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 4.1 (Messages, loop)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 5.1 (Mailboxes, queuing and timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.1 (Events, registration and dispatch)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.2 (Events, wait and broadcast)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 6.3 (Events, timeouts)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 7.1 (Heap, allocation and fragmentation test)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 8.1 (Memory Pools, queue/dequeue)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 9.3 (Dynamic APIs, registry and references)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.1 (Queues, input queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 10.2 (Queues, output queues)
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.1 (Benchmark, messages #1)
+--- Score : 711240 msgs/S, 1422480 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.2 (Benchmark, messages #2)
+--- Score : 610371 msgs/S, 1220742 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.3 (Benchmark, messages #3)
+--- Score : 610371 msgs/S, 1220742 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.4 (Benchmark, context switch)
+--- Score : 2376704 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.5 (Benchmark, threads, full cycle)
+--- Score : 448805 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.6 (Benchmark, threads, create only)
+--- Score : 640666 threads/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
+--- Score : 205448 reschedules/S, 1232688 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.8 (Benchmark, round robin context switching)
+--- Score : 1434640 ctxswc/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.9 (Benchmark, I/O Queues throughput)
+--- Score : 1724868 bytes/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.10 (Benchmark, virtual timers set/reset)
+--- Score : 2223216 timers/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.11 (Benchmark, semaphores wait/signal)
+--- Score : 3197168 wait+signal/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
+--- Score : 1929332 lock+unlock/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.13 (Benchmark, RAM footprint)
+--- System: 376 bytes
+--- Thread: 72 bytes
+--- Timer : 20 bytes
+--- Semaph: 12 bytes
+--- EventS: 4 bytes
+--- EventL: 12 bytes
+--- Mutex : 16 bytes
+--- CondV.: 8 bytes
+--- Queue : 32 bytes
+--- MailB.: 40 bytes
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+
+Final result: SUCCESS
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index a4dd1b775..0650c84f8 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -212,11 +212,11 @@ #define STM32_MCO2PRE_DIV4 (6 << 27) /**< MCO2 divided by 4. */
#define STM32_MCO2PRE_DIV5 (7 << 27) /**< MCO2 divided by 5. */
-#define STM32_MCO2SEL_MASK (3 << 30) /**< MCO2 mask. */
-#define STM32_MCO2SEL_SYSCLK (0 << 30) /**< SYSCLK clock on MCO2 pin. */
-#define STM32_MCO2SEL_PLLI2S (1 << 30) /**< PLLI2S clock on MCO2 pin. */
-#define STM32_MCO2SEL_HSE (2 << 30) /**< HSE clock on MCO2 pin. */
-#define STM32_MCO2SEL_PLL (3 << 30) /**< PLL clock on MCO2 pin. */
+#define STM32_MCO2SEL_MASK (3U << 30) /**< MCO2 mask. */
+#define STM32_MCO2SEL_SYSCLK (0U << 30) /**< SYSCLK clock on MCO2 pin. */
+#define STM32_MCO2SEL_PLLI2S (1U << 30) /**< PLLI2S clock on MCO2 pin. */
+#define STM32_MCO2SEL_HSE (2U << 30) /**< HSE clock on MCO2 pin. */
+#define STM32_MCO2SEL_PLL (3U << 30) /**< PLL clock on MCO2 pin. */
/**
* @name RCC_PLLI2SCFGR register bits definitions
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h index 338fd5363..a5c043e4a 100644 --- a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h +++ b/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h @@ -24,7 +24,7 @@ *
* @defgroup ARMCMx_STM32F4xx STM32F4xx Specific Parameters
* @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
+ * @details This file contains the Cortex-M4 specific parameters for the
* STM32F4xx platform.
* @{
*/
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h index de175091d..046711d7a 100644 --- a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h +++ b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h @@ -24,7 +24,7 @@ *
* @defgroup IAR_ARMCMx_STM32F4xx STM32F4xx Specific Parameters
* @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
+ * @details This file contains the Cortex-M4 specific parameters for the
* STM32F4xx platform.
* @{
*/
@@ -35,7 +35,7 @@ /**
* @brief Cortex core model.
*/
-#define CORTEX_MODEL CORTEX_M3
+#define CORTEX_MODEL CORTEX_M4
/**
* @brief Systick unit presence.
diff --git a/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h new file mode 100644 index 000000000..0e6c8b7b9 --- /dev/null +++ b/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h @@ -0,0 +1,62 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file RVCT/ARMCMx/STM32F4xx/cmparams.h
+ * @brief ARM Cortex-M3 parameters for the STM32F4xx.
+ *
+ * @defgroup RVCT_ARMCMx_STM32F4xx STM32F4xx Specific Parameters
+ * @ingroup RVCT_ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * STM32F4xx platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL CORTEX_M4
+
+/**
+ * @brief Systick unit presence.
+ */
+#define CORTEX_HAS_ST TRUE
+
+/**
+ * @brief Memory Protection unit presence.
+ */
+#define CORTEX_HAS_MPU TRUE
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU TRUE
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 4
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s b/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s new file mode 100644 index 000000000..1d208ad03 --- /dev/null +++ b/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s @@ -0,0 +1,338 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#if !defined(STM32F4XX)
+#define _FROM_ASM_
+#include "board.h"
+#endif
+
+ PRESERVE8
+
+ AREA RESET, DATA, READONLY
+
+ IMPORT __initial_msp
+ IMPORT Reset_Handler
+ EXPORT __Vectors
+
+__Vectors
+ DCD __initial_msp
+ DCD Reset_Handler
+ DCD NMIVector
+ DCD HardFaultVector
+ DCD MemManageVector
+ DCD BusFaultVector
+ DCD UsageFaultVector
+ DCD Vector1C
+ DCD Vector20
+ DCD Vector24
+ DCD Vector28
+ DCD SVCallVector
+ DCD DebugMonitorVector
+ DCD Vector34
+ DCD PendSVVector
+ DCD SysTickVector
+ DCD Vector40
+ DCD Vector44
+ DCD Vector48
+ DCD Vector4C
+ DCD Vector50
+ DCD Vector54
+ DCD Vector58
+ DCD Vector5C
+ DCD Vector60
+ DCD Vector64
+ DCD Vector68
+ DCD Vector6C
+ DCD Vector70
+ DCD Vector74
+ DCD Vector78
+ DCD Vector7C
+ DCD Vector80
+ DCD Vector84
+ DCD Vector88
+ DCD Vector8C
+ DCD Vector90
+ DCD Vector94
+ DCD Vector98
+ DCD Vector9C
+ DCD VectorA0
+ DCD VectorA4
+ DCD VectorA8
+ DCD VectorAC
+ DCD VectorB0
+ DCD VectorB4
+ DCD VectorB8
+ DCD VectorBC
+ DCD VectorC0
+ DCD VectorC4
+ DCD VectorC8
+ DCD VectorCC
+ DCD VectorD0
+ DCD VectorD4
+ DCD VectorD8
+ DCD VectorDC
+ DCD VectorE0
+ DCD VectorE4
+ DCD VectorE8
+ DCD VectorEC
+ DCD VectorF0
+ DCD VectorF4
+ DCD VectorF8
+ DCD VectorFC
+ DCD Vector100
+ DCD Vector104
+ DCD Vector108
+ DCD Vector10C
+ DCD Vector110
+ DCD Vector114
+ DCD Vector118
+ DCD Vector11C
+ DCD Vector120
+ DCD Vector124
+ DCD Vector128
+ DCD Vector12C
+ DCD Vector130
+ DCD Vector134
+ DCD Vector138
+ DCD Vector13C
+ DCD Vector140
+ DCD Vector144
+ DCD Vector148
+ DCD Vector14C
+ DCD Vector150
+ DCD Vector154
+ DCD Vector158
+ DCD Vector15C
+ DCD Vector160
+ DCD Vector164
+ DCD Vector168
+ DCD Vector16C
+ DCD Vector170
+ DCD Vector174
+ DCD Vector178
+ DCD Vector17C
+ DCD Vector180
+ DCD Vector184
+
+ AREA |.text|, CODE, READONLY
+ THUMB
+
+/*
+ * Default interrupt handlers.
+ */
+ EXPORT _unhandled_exception
+_unhandled_exception PROC
+ EXPORT NMIVector [WEAK]
+ EXPORT HardFaultVector [WEAK]
+ EXPORT MemManageVector [WEAK]
+ EXPORT BusFaultVector [WEAK]
+ EXPORT UsageFaultVector [WEAK]
+ EXPORT Vector1C [WEAK]
+ EXPORT Vector20 [WEAK]
+ EXPORT Vector24 [WEAK]
+ EXPORT Vector28 [WEAK]
+ EXPORT SVCallVector [WEAK]
+ EXPORT DebugMonitorVector [WEAK]
+ EXPORT Vector34 [WEAK]
+ EXPORT PendSVVector [WEAK]
+ EXPORT SysTickVector [WEAK]
+ EXPORT Vector40 [WEAK]
+ EXPORT Vector44 [WEAK]
+ EXPORT Vector48 [WEAK]
+ EXPORT Vector4C [WEAK]
+ EXPORT Vector50 [WEAK]
+ EXPORT Vector54 [WEAK]
+ EXPORT Vector58 [WEAK]
+ EXPORT Vector5C [WEAK]
+ EXPORT Vector60 [WEAK]
+ EXPORT Vector64 [WEAK]
+ EXPORT Vector68 [WEAK]
+ EXPORT Vector6C [WEAK]
+ EXPORT Vector70 [WEAK]
+ EXPORT Vector74 [WEAK]
+ EXPORT Vector78 [WEAK]
+ EXPORT Vector7C [WEAK]
+ EXPORT Vector80 [WEAK]
+ EXPORT Vector84 [WEAK]
+ EXPORT Vector88 [WEAK]
+ EXPORT Vector8C [WEAK]
+ EXPORT Vector90 [WEAK]
+ EXPORT Vector94 [WEAK]
+ EXPORT Vector98 [WEAK]
+ EXPORT Vector9C [WEAK]
+ EXPORT VectorA0 [WEAK]
+ EXPORT VectorA4 [WEAK]
+ EXPORT VectorA8 [WEAK]
+ EXPORT VectorAC [WEAK]
+ EXPORT VectorB0 [WEAK]
+ EXPORT VectorB4 [WEAK]
+ EXPORT VectorB8 [WEAK]
+ EXPORT VectorBC [WEAK]
+ EXPORT VectorC0 [WEAK]
+ EXPORT VectorC4 [WEAK]
+ EXPORT VectorC8 [WEAK]
+ EXPORT VectorCC [WEAK]
+ EXPORT VectorD0 [WEAK]
+ EXPORT VectorD4 [WEAK]
+ EXPORT VectorD8 [WEAK]
+ EXPORT VectorDC [WEAK]
+ EXPORT VectorE0 [WEAK]
+ EXPORT VectorE4 [WEAK]
+ EXPORT VectorE8 [WEAK]
+ EXPORT VectorEC [WEAK]
+ EXPORT VectorF0 [WEAK]
+ EXPORT VectorF4 [WEAK]
+ EXPORT VectorF8 [WEAK]
+ EXPORT VectorFC [WEAK]
+ EXPORT Vector100 [WEAK]
+ EXPORT Vector104 [WEAK]
+ EXPORT Vector108 [WEAK]
+ EXPORT Vector10C [WEAK]
+ EXPORT Vector110 [WEAK]
+ EXPORT Vector114 [WEAK]
+ EXPORT Vector118 [WEAK]
+ EXPORT Vector11C [WEAK]
+ EXPORT Vector120 [WEAK]
+ EXPORT Vector124 [WEAK]
+ EXPORT Vector128 [WEAK]
+ EXPORT Vector12C [WEAK]
+ EXPORT Vector130 [WEAK]
+ EXPORT Vector134 [WEAK]
+ EXPORT Vector138 [WEAK]
+ EXPORT Vector13C [WEAK]
+ EXPORT Vector140 [WEAK]
+ EXPORT Vector144 [WEAK]
+ EXPORT Vector148 [WEAK]
+ EXPORT Vector14C [WEAK]
+ EXPORT Vector150 [WEAK]
+ EXPORT Vector154 [WEAK]
+ EXPORT Vector158 [WEAK]
+ EXPORT Vector15C [WEAK]
+ EXPORT Vector160 [WEAK]
+ EXPORT Vector164 [WEAK]
+ EXPORT Vector168 [WEAK]
+ EXPORT Vector16C [WEAK]
+ EXPORT Vector170 [WEAK]
+ EXPORT Vector174 [WEAK]
+ EXPORT Vector178 [WEAK]
+ EXPORT Vector17C [WEAK]
+ EXPORT Vector180 [WEAK]
+ EXPORT Vector184 [WEAK]
+
+NMIVector
+HardFaultVector
+MemManageVector
+BusFaultVector
+UsageFaultVector
+Vector1C
+Vector20
+Vector24
+Vector28
+SVCallVector
+DebugMonitorVector
+Vector34
+PendSVVector
+SysTickVector
+Vector40
+Vector44
+Vector48
+Vector4C
+Vector50
+Vector54
+Vector58
+Vector5C
+Vector60
+Vector64
+Vector68
+Vector6C
+Vector70
+Vector74
+Vector78
+Vector7C
+Vector80
+Vector84
+Vector88
+Vector8C
+Vector90
+Vector94
+Vector98
+Vector9C
+VectorA0
+VectorA4
+VectorA8
+VectorAC
+VectorB0
+VectorB4
+VectorB8
+VectorBC
+VectorC0
+VectorC4
+VectorC8
+VectorCC
+VectorD0
+VectorD4
+VectorD8
+VectorDC
+VectorE0
+VectorE4
+VectorE8
+VectorEC
+VectorF0
+VectorF4
+VectorF8
+VectorFC
+Vector100
+Vector104
+Vector108
+Vector10C
+Vector110
+Vector114
+Vector118
+Vector11C
+Vector120
+Vector124
+Vector128
+Vector12C
+Vector130
+Vector134
+Vector138
+Vector13C
+Vector140
+Vector144
+Vector148
+Vector14C
+Vector150
+Vector154
+Vector158
+Vector15C
+Vector160
+Vector164
+Vector168
+Vector16C
+Vector170
+Vector174
+Vector178
+Vector17C
+Vector180
+Vector184
+ b _unhandled_exception
+ ENDP
+
+ END
|