diff options
| -rw-r--r-- | readme.txt | 4 | ||||
| -rw-r--r-- | release_note_16.1.0.txt | 88 | ||||
| -rw-r--r-- | release_note_3.0.0.txt | 53 |
3 files changed, 90 insertions, 55 deletions
diff --git a/readme.txt b/readme.txt index a073e4047..731afbed1 100644 --- a/readme.txt +++ b/readme.txt @@ -72,7 +72,7 @@ *** Releases and Change Log ***
*****************************************************************************
-*** 3.1.0 ***
+*** 16.1.0 ***
- RT: Added CodeWarrior compiler support to the e200 port.
- HAL: Added support for STM32F446.
- HAL: Introduced preliminary support for STM32F7xx devices.
@@ -88,7 +88,7 @@ - HAL: Added synchronous API and mutual exclusion to the UART driver.
- HAL: Added PAL driver for STM32L4xx GPIOv3 peripheral.
- HAL: Added I2S driver for STM32 SPIv2 peripheral.
-- HAL: Added demos and board files for ST's Nucleo32 boards (F031, F042, F303).
+- HAL: Added demos an- d board files for ST's Nucleo32 boards (F031, F042, F303).
- HAL: Added "lines" handling to PAL driver, lines are identifiers of both
ports and pins encoded in a single value. Added a set of macros
operating on lines.
diff --git a/release_note_16.1.0.txt b/release_note_16.1.0.txt new file mode 100644 index 000000000..fed95a915 --- /dev/null +++ b/release_note_16.1.0.txt @@ -0,0 +1,88 @@ +******************************************************************************
+*** ChibiOS 16.1.0 Release Notes. ***
+******************************************************************************
+
+ChibiOS 16.1.0 is composed of several independent but inter-operable
+sub-projects: RT, NIL, HAL.
+
+*** ChibiOS 16.1.0 highlighs ****
+
+This release has been developed with focus mainly on the HAL subsystem and
+general STM32 support. RT and NIL received minor bug fixes that have also
+been back-ported to previous stable branches.
+
+*** ChibiOS 16.1.0 general improvements ***
+
+- ChibiOS release version number redefined as <year>.<month>.<release> in order
+ to not confuse release version numbers with products version numbers.
+- Improved ARMCMx GCC rules.ld supporting multiple RAM regions. It is now
+ possible to assign stacks, data, bss, etc ot any of the defined RAM regions.
+ - Added capability to allocate initialized, zeroed and not initialized data
+ to any of the defined RAM regions.
+
+*** What's new in RT 3.1.0 ***
+
+- Added new function chVTGetTimersStateI() returning the state of the
+ timers list. This is useful to assess if it is convenient to transition
+ to lower power modes.
+- Added CodeWarrior compiler support to the e200 port.
+- Minor bugs fixed.
+
+*** What's new in HAL 4.0.0 ***
+
+- New watchdog (WDG) driver.
+- Added support for STM32L0xx, STM32L4xx, STM32F7xx, STM32F446, STM32F030xC,
+ STM32F070x6, STM32F070xB, STM32F091xC, STM32F098xx devices.
+- Improved USB driver.
+ - Modified the driver to have a separate USB_SUSPENDED state, this
+ allows the application to detect if the USB is communicating or if
+ it is disconnected or powered down.
+ - Added synchronous API.
+ - Removed queued API.
+ - Improved USB support for STM32 USBv1, OTGv1.
+ - Isochronous support for STM32 USBv1, OTGv1.
+ - STM32 USBv1/OTGv1 buffers and queues do not more require to be aligned in
+ position and size.
+- Improved Serial-USB driver.
+ - New buffers queue object.
+ - Modified thedriver to reject write/read attempts if the
+ underlying USB is not in active state. In case of disconnection the
+ SDU driver broadcasts a CHN_DISCONNECTED event.
+- Improved CAN driver.
+ - Better errors reporting for STM32 CANv1.
+- Improved UART driver.
+ - Added synchronous API.
+- Improved PAL driver.
+ - Added "lines" handling to PAL driver, lines are identifiers of both
+ ports and pins encoded in a single value. Added a set of macros
+ operating on lines.
+ - Added GPIOv3 driver for STM32L4xx.
+- I2S support added for STM32 SPIv2 peripheral.
+- Board files an demos for STM32 Nucleo32 boards.
+- Added latest CMSIS headers for all STM32 families.
+- STM32 DMA drivers have been unified and consolidated in DMAv1 and DMAv2.
+ - DMA channels selection now supported on all devices with the new mux
+ mechanism.
+- Added serial driver support for USART 3..6 on STM32F030xC devices.
+- Added support for differential mode to the STM32F3xx ADC driver.
+- STM32 GPT, ICU and PWM driver enhancements. Now it is possible to
+ suppress default ISRs by defining STM32_TIMx_SUPPRESS_ISR.
+ The application is now able to define custom handlers if required
+ or simply save space if the driver callbacks are not used.
+ Now the functions xxx_lld_serve_interrupts() have global scope, this
+ way custom ISRs can call them from outside the driver module.
+- Added TIM units use cross-check in STM32 GPT, ICU, PWM and ST drivers,
+ now use collisions are explicitly reported.
+- Added support for I2C3 and I2C4 to the STM32 I2Cv2 I2C driver.
+- Added support for SPI4...SPI6 to the STM32 SPIv2 SPI driver.
+- Added support for UART4...UART8 to the STM32 UARTv2 UART driver.
+- Added support for UART7 and UART8,LPUART1 to the STM32 UARTv2 serial
+ driver.
+- New STM32 ADCv3 driver supporting middle STM32 devices (F3, L4).
+- New STM32 ADCv2 driver supporting large STM32 devices (F2, F4, F7).
+- New STM32 ADCv1 driver supporting small STM32 devices (F0, L0).
+- Introduced support for TIM21 and TIM22 in STM32 ST driver.
+
+*** What's new in NIL 1.1.0 ***
+
+- Minor bugs fixed.
diff --git a/release_note_3.0.0.txt b/release_note_3.0.0.txt deleted file mode 100644 index 679839543..000000000 --- a/release_note_3.0.0.txt +++ /dev/null @@ -1,53 +0,0 @@ -ChibiOS 3.0 is now composed of several independent but inter-operable sub-projects: RT, NIL, HAL.
-
-ChibiOS 3.0 general highlights
-
-- New files tree organization makes the system more modular.
-- A community-contributed code area is now part of the files architecture, it will allow for easier integration of contributed code without much screening.
-- Improved startup files, scatter files and build system.
-- New licensing options.
-- Free ChibiStudio IDE support.
-
-What's new in RT 3.0
-
-- MISRA 2012 compliant.
-- Entirely static for enhanced safety.
-- System data is now encapsulated in a single "ch" global structure for enhanced safety.
-- System integrity check runtime functionality for enhanced safety.
-- Tick-less kernel mode helps implement ultra-low-power devices.
-- High Resolution Virtual Timers module allows to specify very short intervals.
-- High Resolution system time.
-- Clock-cycle accurate Time Measurement module.
-- Clock-cycle accurate polled delays.
-- Statistic module provides high resolution measurement of threads, ISRs and critical zones.
-- New recursive locks in addition to the classical critical zone primitives.
-- New recursive mode for Mutexes.
-- Enhanced suspend/resume mechanism for threads.
-- CMSIS-compliant ARM Cortex-Mx port.
-- CMSIS RTOS API available.
-- Multi-compilers architecture for ports.
-- Codebase now compatible with GCC link time optimizations.
-
-What's new in HAL 3.0
-
-- MISRA 2012 compliant.
-- HAL is now entirely licensed under Apache 2.0 license.
-- HAL has been decoupled from RT. It can now be adapted to any reasonable RTOS or even used with no RTOS at all thanks to a new abstraction layer named OSAL. OSAL implementations are provided for RT, NIL, bare metal ARM Cortex-Mx cores, bare metal Power e200z cores.
-- New driver models for ST, I2S, DAC.
-- Revamped ADC, ICU, PWM, RTC, SDC, USB drivers.
-- Greatly improved STM32 family support, all sub-families have been added.
-- Support for new families expanding (Kinetis, Tiva, SPC5xx, RL78, RX62N).
-- Streams, channels, files and block devices abstract interfaces.
-
-New addition NIL 1.0
-
-- MISRA 2012 compliant.
-- Entirely static for enhanced safety.
-- No linked lists anywhere in the code for enhanced safety.
-- System data is encapsulated in a single "nil" global structure for enhanced safety.
-- Tick-less kernel mode helps implement ultra-low-power devices.
-- Ultra compact kernel, well below 1kB in its maximum configuration.
-- Upward compatible with RT, it implements a subset of the RT API.
-- Reduced RAM usage, 20-28 bytes for task and just 4 bytes for a semaphore on 32 bits architectures, half of that on 8/16 bits architectures.
-- ARM Cortex-Mx port based on CMSIS architecture.
-- Multi-compilers architecture for ports.
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