From 8a0095ecd93309d011877f3cc8185a034d941b26 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 1 Oct 2019 19:51:04 +0200 Subject: Updated testhal for 19.1.x --- testhal/STM32/STM32F0xx/qei/mcuconf.h | 43 ++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) (limited to 'testhal/STM32/STM32F0xx/qei/mcuconf.h') diff --git a/testhal/STM32/STM32F0xx/qei/mcuconf.h b/testhal/STM32/STM32F0xx/qei/mcuconf.h index 263cfd2..ec53c73 100644 --- a/testhal/STM32/STM32F0xx/qei/mcuconf.h +++ b/testhal/STM32/STM32F0xx/qei/mcuconf.h @@ -41,6 +41,7 @@ #define STM32_PLS STM32_PLS_LEV0 #define STM32_HSI_ENABLED TRUE #define STM32_HSI14_ENABLED TRUE +#define STM32_HSI48_ENABLED FALSE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE @@ -72,22 +73,43 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 3 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) + /* * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM6 FALSE #define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +#define STM32_GPT_TIM6_IRQ_PRIORITY 2 #define STM32_GPT_TIM14_IRQ_PRIORITY 2 /* @@ -152,8 +174,11 @@ */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 +#define STM32_SERIAL_USART3_8_PRIORITY 3 /* * SPI driver system settings. @@ -181,16 +206,32 @@ */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART3_8_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_LP_IRQ_PRIORITY 3 + /* * WDG driver system settings. */ -- cgit v1.2.3