From 81c70f5ce6452f184e3cef46159ae2dc171bd51a Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Wed, 6 Jul 2016 20:12:03 +0200 Subject: Organized Tiva LLD folder. --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c | 141 ++++++++++++++++++++++++ os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 195 +++++++++++++++++++++++++++++++++ 2 files changed, 336 insertions(+) create mode 100644 os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c create mode 100644 os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c new file mode 100644 index 0000000..9f122b2 --- /dev/null +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c @@ -0,0 +1,141 @@ +/* + Copyright (C) 2014..2016 Marco Veeneman + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +/* The following macro is only defined if some driver requiring DMA services + has been enabled.*/ +#if defined(TIVA_UDMA_REQUIRED) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +udmaControlTable_t udmaControlTable; + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +static uint32_t udma_channel_mask; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if !defined(TIVA_UDMA_SW_HANDLER) +#error "TIVA_UDMA_SW_HANDLER not defined" +#endif +/** + * @brief UDMA software interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_UDMA_SW_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + /* TODO Process software transfer interrupts.*/ + + OSAL_IRQ_EPILOGUE(); +} + +#if !defined(TIVA_UDMA_ERR_HANDLER) +#error "TIVA_UDMA_ERR_HANDLER not defined" +#endif +/** + * @brief UDMA error interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_UDMA_ERR_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + /* TODO Do we need to halt the system on a DMA error?*/ + + if (UDMA->ERRCLR) { + UDMA->ERRCLR = 1; + } + + OSAL_IRQ_EPILOGUE(); +} + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Initialize UDMA. + * + * @init + */ +void udmaInit(void) +{ + udma_channel_mask = 0; + + /* Enable UDMA module.*/ + SYSCTL->RCGCDMA = 1; + while (!(SYSCTL->PRDMA & (1 << 0))) + ; + + nvicEnableVector(TIVA_UDMA_ERR_NUMBER, TIVA_UDMA_ERR_IRQ_PRIORITY); + nvicEnableVector(TIVA_UDMA_SW_NUMBER, TIVA_UDMA_SW_IRQ_PRIORITY); + + /* Enable UDMA controller.*/ + UDMA->CFG = 1; + + /* Set address of control table.*/ + UDMA->CTLBASE = (uint32_t)udmaControlTable.primary; +} + +/** + * @brief Allocates a DMA channel. + * + * @special + */ +bool udmaChannelAllocate(uint8_t dmach) +{ + /* Checks if the channel is already taken.*/ + if ((udma_channel_mask & (1 << dmach)) != 0) + return TRUE; + + /* Mark channel as used */ + udma_channel_mask |= (1 << dmach); + + return FALSE; +} + +/** + * @brief Releases a DMA channel. + * + * @special + */ +void udmaChannelRelease(uint8_t dmach) +{ + /* Marks the channel as not used.*/ + udma_channel_mask &= ~(1 << dmach); +} + +#endif diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h new file mode 100644 index 0000000..6479b08 --- /dev/null +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -0,0 +1,195 @@ +/* + Copyright (C) 2014..2016 Marco Veeneman + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef TIVA_UDMA_H_ +#define TIVA_UDMA_H_ + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name CHCTL register defines. + * @{ + */ +#define UDMA_CHCTL_DSTINC_MASK 0xC0000000 +#define UDMA_CHCTL_DSTINC_0 0xC0000000 +#define UDMA_CHCTL_DSTINC_8 0x00000000 +#define UDMA_CHCTL_DSTINC_16 0x40000000 +#define UDMA_CHCTL_DSTINC_32 0x80000000 +#define UDMA_CHCTL_DSTSIZE_MASK 0x30000000 +#define UDMA_CHCTL_DSTSIZE_8 0x00000000 +#define UDMA_CHCTL_DSTSIZE_16 0x10000000 +#define UDMA_CHCTL_DSTSIZE_32 0x20000000 +#define UDMA_CHCTL_SRCINC_MASK 0x0C000000 +#define UDMA_CHCTL_SRCINC_0 0x0C000000 +#define UDMA_CHCTL_SRCINC_8 0x00000000 +#define UDMA_CHCTL_SRCINC_16 0x04000000 +#define UDMA_CHCTL_SRCINC_32 0x08000000 +#define UDMA_CHCTL_SRCSIZE_MASK 0x03000000 +#define UDMA_CHCTL_SRCSIZE_8 0x00000000 +#define UDMA_CHCTL_SRCSIZE_16 0x01000000 +#define UDMA_CHCTL_SRCSIZE_32 0x02000000 +#define UDMA_CHCTL_ARBSIZE_MASK 0x0003C000 +#define UDMA_CHCTL_ARBSIZE_1 0x00000000 +#define UDMA_CHCTL_ARBSIZE_2 0x00004000 +#define UDMA_CHCTL_ARBSIZE_4 0x00008000 +#define UDMA_CHCTL_ARBSIZE_8 0x0000C000 +#define UDMA_CHCTL_ARBSIZE_16 0x00010000 +#define UDMA_CHCTL_ARBSIZE_32 0x00014000 +#define UDMA_CHCTL_ARBSIZE_64 0x00018000 +#define UDMA_CHCTL_ARBSIZE_128 0x0001C000 +#define UDMA_CHCTL_ARBSIZE_256 0x00020000 +#define UDMA_CHCTL_ARBSIZE_512 0x00024000 +#define UDMA_CHCTL_ARBSIZE_1024 0x00028000 +#define UDMA_CHCTL_XFERSIZE_MASK 0x00003FF0 +#define UDMA_CHCTL_XFERSIZE(n) ((n-1) << 4) +#define UDMA_CHCTL_NXTUSEBURST 0x00000008 +#define UDMA_CHCTL_XFERMODE_MASK 0x00000007 +#define UDMA_CHCTL_XFERMODE_STOP 0x00000000 +#define UDMA_CHCTL_XFERMODE_BASIC 0x00000001 +#define UDMA_CHCTL_XFERMODE_AUTO 0x00000002 +#define UDMA_CHCTL_XFERMODE_PINGPONG 0x00000003 +#define UDMA_CHCTL_XFERMODE_MSG 0x00000004 +#define UDMA_CHCTL_XFERMODE_AMSG 0x00000005 +#define UDMA_CHCTL_XFERMODE_PSG 0x00000006 +#define UDMA_CHCTL_XFERMODE_APSG 0x00000007 +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief UDMA software interrupt priority level setting. + */ +#if !defined(TIVA_UDMA_SW_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_UDMA_SW_IRQ_PRIORITY 5 +#endif + +/** + * @brief UDMA error interrupt priority level setting. + */ +#if !defined(TIVA_UDMA_ERR_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_UDMA_ERR_IRQ_PRIORITY 5 +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief A structure that defines an entry in the channel control table. + * @note These fields are used by the uDMA controller and normally it is not + * necessary for software to directly read or write fields in the + * table. + */ +typedef struct __attribute__((packed)) +{ + /** + * @brief The ending source address of the data transfer. + */ + volatile void *srcendp; + /** + * @brief The ending destination address of the data transfer. + */ + volatile void *dstendp; + /** + * @brief The channel control mode. + */ + volatile uint32_t chctl; + /** + * @brief An unused location. + */ + volatile uint32_t unused; +} tiva_udma_table_entry_t; + +typedef struct __attribute__((packed, aligned(1024))) +{ + union { + struct { + tiva_udma_table_entry_t primary[32]; + tiva_udma_table_entry_t alternate[32]; + }; + uint8_t raw[1024]; + }; +} udmaControlTable_t ; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +#define dmaChannelEnable(dmach) {\ + UDMA->ENASET = (1 << dmach);\ +} + +#define dmaChannelDisable(dmach) { \ + UDMA->ENACLR = (1 << dmach); \ +} + +#define dmaChannelPrimary(dmach) {\ + UDMA->ALTCLR = (1 << dmach); \ +} + +#define dmaChannelAlternate(dmach) { \ + UDMA->ALTSET = (1 << dmach); \ +} + +#define dmaChannelSingleBurst(dmach) { \ + UDMA->USEBURSTCLR = (1 << dmach); \ +} + +#define dmaChannelBurstOnly(dmach) { \ + UDMA->USEBURSTSET = (1 << dmach); \ +} + +#define dmaChannelPriorityHigh(dmach) { \ + UDMA->PRIOSET = (1 << dmach); \ +} + +#define dmaChannelPriorityDefault(dmach) { \ + UDMA->PRIOCLR = (1 << dmach); \ +} + +#define dmaChannelEnableRequest(dmach) {\ + UDMA->REQMASKCLR = (1 << dmach); \ +} + +#define dmaChannelDisableRequest(dmach) {\ + UDMA->REQMASKSET = (1 << dmach); \ +} + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +extern udmaControlTable_t udmaControlTable; + +#ifdef __cplusplus +extern "C" { +#endif + void udmaInit(void); + bool udmaChannelAllocate(uint8_t dmach); + void udmaChannelRelease(uint8_t dmach); +#ifdef __cplusplus +} +#endif + +#endif /* TIVA_UDMA_H_ */ -- cgit v1.2.3 From 88810040501e15001e2b7072398417a99846b7f3 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Tue, 11 Oct 2016 21:21:30 +0200 Subject: Updated spi and udma lld to use TivaWare. --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c | 12 ++++++------ os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 20 ++++++++++---------- 2 files changed, 16 insertions(+), 16 deletions(-) (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c index 9f122b2..4d212b7 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c @@ -75,8 +75,8 @@ OSAL_IRQ_HANDLER(TIVA_UDMA_ERR_HANDLER) /* TODO Do we need to halt the system on a DMA error?*/ - if (UDMA->ERRCLR) { - UDMA->ERRCLR = 1; + if (HWREG(UDMA_ERRCLR)) { + HWREG(UDMA_ERRCLR) = 1; } OSAL_IRQ_EPILOGUE(); @@ -96,18 +96,18 @@ void udmaInit(void) udma_channel_mask = 0; /* Enable UDMA module.*/ - SYSCTL->RCGCDMA = 1; - while (!(SYSCTL->PRDMA & (1 << 0))) + HWREG(SYSCTL_RCGCDMA) = 1; + while (!(HWREG(SYSCTL_PRDMA) & (1 << 0))) ; nvicEnableVector(TIVA_UDMA_ERR_NUMBER, TIVA_UDMA_ERR_IRQ_PRIORITY); nvicEnableVector(TIVA_UDMA_SW_NUMBER, TIVA_UDMA_SW_IRQ_PRIORITY); /* Enable UDMA controller.*/ - UDMA->CFG = 1; + HWREG(UDMA_CFG) = 1; /* Set address of control table.*/ - UDMA->CTLBASE = (uint32_t)udmaControlTable.primary; + HWREG(UDMA_CTLBASE) = (uint32_t)udmaControlTable.primary; } /** diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h index 6479b08..cba9090 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -137,43 +137,43 @@ typedef struct __attribute__((packed, aligned(1024))) /*===========================================================================*/ #define dmaChannelEnable(dmach) {\ - UDMA->ENASET = (1 << dmach);\ + HWREG(UDMA_ENASET) = (1 << dmach);\ } #define dmaChannelDisable(dmach) { \ - UDMA->ENACLR = (1 << dmach); \ + HWREG(UDMA_ENACLR) = (1 << dmach); \ } #define dmaChannelPrimary(dmach) {\ - UDMA->ALTCLR = (1 << dmach); \ + HWREG(UDMA_ALTCLR) = (1 << dmach); \ } #define dmaChannelAlternate(dmach) { \ - UDMA->ALTSET = (1 << dmach); \ + HWREG(UDMA_ALTSET) = (1 << dmach); \ } #define dmaChannelSingleBurst(dmach) { \ - UDMA->USEBURSTCLR = (1 << dmach); \ + HWREG(UDMA_USEBURSTCLR) = (1 << dmach); \ } #define dmaChannelBurstOnly(dmach) { \ - UDMA->USEBURSTSET = (1 << dmach); \ + HWREG(UDMA_USEBURSTSET) = (1 << dmach); \ } #define dmaChannelPriorityHigh(dmach) { \ - UDMA->PRIOSET = (1 << dmach); \ + HWREG(UDMA_PRIOSET) = (1 << dmach); \ } #define dmaChannelPriorityDefault(dmach) { \ - UDMA->PRIOCLR = (1 << dmach); \ + HWREG(UDMA_PRIOCLR) = (1 << dmach); \ } #define dmaChannelEnableRequest(dmach) {\ - UDMA->REQMASKCLR = (1 << dmach); \ + HWREG(UDMA_REQMASKCLR) = (1 << dmach); \ } #define dmaChannelDisableRequest(dmach) {\ - UDMA->REQMASKSET = (1 << dmach); \ + HWREG(UDMA_REQMASKSET) = (1 << dmach); \ } /*===========================================================================*/ -- cgit v1.2.3 From 223f46589016f2dce6a29cbd00d9020f80d2a556 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Thu, 27 Oct 2016 22:55:17 +0200 Subject: Replaced custom register bitfield macros by TivaWare bitfield macros. --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c | 2 +- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 45 +--------------------------------- 2 files changed, 2 insertions(+), 45 deletions(-) (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c index 4d212b7..bb379cb 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c @@ -104,7 +104,7 @@ void udmaInit(void) nvicEnableVector(TIVA_UDMA_SW_NUMBER, TIVA_UDMA_SW_IRQ_PRIORITY); /* Enable UDMA controller.*/ - HWREG(UDMA_CFG) = 1; + HWREG(UDMA_CFG) = UDMA_CFG_MASTEN; /* Set address of control table.*/ HWREG(UDMA_CTLBASE) = (uint32_t)udmaControlTable.primary; diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h index cba9090..0157277 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -22,52 +22,9 @@ /*===========================================================================*/ /** - * @name CHCTL register defines. - * @{ + * @brief CHCTL XFERSIZE helper. */ -#define UDMA_CHCTL_DSTINC_MASK 0xC0000000 -#define UDMA_CHCTL_DSTINC_0 0xC0000000 -#define UDMA_CHCTL_DSTINC_8 0x00000000 -#define UDMA_CHCTL_DSTINC_16 0x40000000 -#define UDMA_CHCTL_DSTINC_32 0x80000000 -#define UDMA_CHCTL_DSTSIZE_MASK 0x30000000 -#define UDMA_CHCTL_DSTSIZE_8 0x00000000 -#define UDMA_CHCTL_DSTSIZE_16 0x10000000 -#define UDMA_CHCTL_DSTSIZE_32 0x20000000 -#define UDMA_CHCTL_SRCINC_MASK 0x0C000000 -#define UDMA_CHCTL_SRCINC_0 0x0C000000 -#define UDMA_CHCTL_SRCINC_8 0x00000000 -#define UDMA_CHCTL_SRCINC_16 0x04000000 -#define UDMA_CHCTL_SRCINC_32 0x08000000 -#define UDMA_CHCTL_SRCSIZE_MASK 0x03000000 -#define UDMA_CHCTL_SRCSIZE_8 0x00000000 -#define UDMA_CHCTL_SRCSIZE_16 0x01000000 -#define UDMA_CHCTL_SRCSIZE_32 0x02000000 -#define UDMA_CHCTL_ARBSIZE_MASK 0x0003C000 -#define UDMA_CHCTL_ARBSIZE_1 0x00000000 -#define UDMA_CHCTL_ARBSIZE_2 0x00004000 -#define UDMA_CHCTL_ARBSIZE_4 0x00008000 -#define UDMA_CHCTL_ARBSIZE_8 0x0000C000 -#define UDMA_CHCTL_ARBSIZE_16 0x00010000 -#define UDMA_CHCTL_ARBSIZE_32 0x00014000 -#define UDMA_CHCTL_ARBSIZE_64 0x00018000 -#define UDMA_CHCTL_ARBSIZE_128 0x0001C000 -#define UDMA_CHCTL_ARBSIZE_256 0x00020000 -#define UDMA_CHCTL_ARBSIZE_512 0x00024000 -#define UDMA_CHCTL_ARBSIZE_1024 0x00028000 -#define UDMA_CHCTL_XFERSIZE_MASK 0x00003FF0 #define UDMA_CHCTL_XFERSIZE(n) ((n-1) << 4) -#define UDMA_CHCTL_NXTUSEBURST 0x00000008 -#define UDMA_CHCTL_XFERMODE_MASK 0x00000007 -#define UDMA_CHCTL_XFERMODE_STOP 0x00000000 -#define UDMA_CHCTL_XFERMODE_BASIC 0x00000001 -#define UDMA_CHCTL_XFERMODE_AUTO 0x00000002 -#define UDMA_CHCTL_XFERMODE_PINGPONG 0x00000003 -#define UDMA_CHCTL_XFERMODE_MSG 0x00000004 -#define UDMA_CHCTL_XFERMODE_AMSG 0x00000005 -#define UDMA_CHCTL_XFERMODE_PSG 0x00000006 -#define UDMA_CHCTL_XFERMODE_APSG 0x00000007 -/** @} */ /*===========================================================================*/ /* Driver pre-compile time settings. */ -- cgit v1.2.3 From 9617145f2190d02942d537c8a9bc79d10d174187 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Tue, 18 Apr 2017 22:20:21 +0200 Subject: Added driver.mk file for each low level peripheral driver. --- os/hal/ports/TIVA/LLD/uDMA/driver.mk | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 os/hal/ports/TIVA/LLD/uDMA/driver.mk (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/driver.mk b/os/hal/ports/TIVA/LLD/uDMA/driver.mk new file mode 100644 index 0000000..3a2d929 --- /dev/null +++ b/os/hal/ports/TIVA/LLD/uDMA/driver.mk @@ -0,0 +1,2 @@ +PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c +PLATFORMINC += $(CHIBIOS_CONTRIB)/os/hal/ports/TIVA/LLD/uDMA -- cgit v1.2.3 From cfbd190b1e161029c6d8e87325697fedfd2a5816 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Tue, 18 Apr 2017 23:17:00 +0200 Subject: Fixed Tiva low level driver @file documentation. --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c | 10 ++++++++++ os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 10 ++++++++++ 2 files changed, 20 insertions(+) (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c index bb379cb..1e78bcd 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c @@ -14,6 +14,14 @@ limitations under the License. */ +/** + * @file uDMA/tiva_udma.c + * @brief DMA helper driver code. + * + * @addtogroup TIVA_DMA + * @{ + */ + #include "hal.h" /* The following macro is only defined if some driver requiring DMA services @@ -139,3 +147,5 @@ void udmaChannelRelease(uint8_t dmach) } #endif + +/** @} */ diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h index 0157277..9b7d255 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -14,6 +14,14 @@ limitations under the License. */ +/** + * @file uDMA/tiva_udma.h + * @brief DMA helper driver header. + * + * @addtogroup TIVA_DMA + * @{ + */ + #ifndef TIVA_UDMA_H_ #define TIVA_UDMA_H_ @@ -150,3 +158,5 @@ extern "C" { #endif #endif /* TIVA_UDMA_H_ */ + +/** @} */ -- cgit v1.2.3 From 2841fd88cde83b00d79c77e4d5c9441ddd9e22aa Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Thu, 20 Apr 2017 19:47:50 +0200 Subject: Updated license headers --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c | 2 +- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c index 1e78bcd..2d18ff5 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c @@ -1,5 +1,5 @@ /* - Copyright (C) 2014..2016 Marco Veeneman + Copyright (C) 2014..2017 Marco Veeneman Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h index 9b7d255..cf90399 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2014..2016 Marco Veeneman + Copyright (C) 2014..2017 Marco Veeneman Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. -- cgit v1.2.3 From ffd9d3fd90ffe7f8a7f9d824fa3d9d8b6f33c196 Mon Sep 17 00:00:00 2001 From: marcoveeneman Date: Sun, 2 Jul 2017 17:11:10 +0200 Subject: Initial ADC driver and testhal application for TM4C123x. --- os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'os/hal/ports/TIVA/LLD/uDMA') diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h index cf90399..a473f6c 100644 --- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h +++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h @@ -32,7 +32,7 @@ /** * @brief CHCTL XFERSIZE helper. */ -#define UDMA_CHCTL_XFERSIZE(n) ((n-1) << 4) +#define UDMA_CHCTL_XFERSIZE(n) (((n)-1) << 4) /*===========================================================================*/ /* Driver pre-compile time settings. */ -- cgit v1.2.3