From 8f3f907100909218f78648e4ad9dc3a2916777c3 Mon Sep 17 00:00:00 2001
From: Jonathan Struebel <jonathan.struebel@gmail.com>
Date: Sun, 17 Apr 2016 15:51:44 -0700
Subject: [KINETIS] Added shell demo for FRDM-KL25Z

---
 demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h | 58 ++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h

(limited to 'demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h')

diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h
new file mode 100644
index 0000000..8d5ef1c
--- /dev/null
+++ b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/mcuconf.h
@@ -0,0 +1,58 @@
+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+#define KL2x_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#if 0
+/* PEE mode - 48MHz system clock driven by (8 MHz) external crystal. */
+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_PEE
+#define KINETIS_PLLCLK_FREQUENCY    96000000UL
+#define KINETIS_SYSCLK_FREQUENCY    48000000UL
+#endif
+
+#if 1
+/* crystal-less FEI mode - 48 MHz with internal 32.768 kHz crystal */
+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_FEI
+#define KINETIS_MCG_FLL_DMX32       1           /* Fine-tune for 32.768 kHz */
+#define KINETIS_MCG_FLL_DRS         1           /* 1464x FLL factor */
+#define KINETIS_SYSCLK_FREQUENCY    47972352UL  /* 32.768 kHz * 1464 (~48 MHz) */
+#define KINETIS_CLKDIV1_OUTDIV1     1           /* do not divide system clock */
+#endif
+
+/*
+ * I2C driver system settings.
+ */
+#define KINETIS_I2C_USE_I2C0                  TRUE
+
+/*
+ * SERIAL driver system settings.
+ */
+#define KINETIS_SERIAL_USE_UART0              TRUE
+
+/*
+ * USB driver settings
+ */
+#define KINETIS_USB_USE_USB0                  TRUE
+/* need to redefine this, since the default is for K20x */
+#define KINETIS_USB_USB0_IRQ_PRIORITY         2
+
+#endif /* MCUCONF_H */
-- 
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