From 2c725099004628c1992e32390e3245928cd59eb4 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:22:33 +0700 Subject: Smart build for HAL. --- os/hal/hal.mk | 126 +++++++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 102 insertions(+), 24 deletions(-) diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 119db8a..377ffa9 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -1,27 +1,105 @@ include ${CHIBIOS}/os/hal/hal.mk -HALSRC += ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_nand.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_onewire.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_eicu.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_crc.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_rng.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_debug.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_desciter.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_hub.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_msd.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_ftdi.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_aoa.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_hid.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_uvc.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee24xx.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee25xx.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_eeprom.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c +ifeq ($(USE_SMART_BUILD),yes) -HALINC += ${CHIBIOS_CONTRIB}/os/hal/include +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +HALSRC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c +ifneq ($(findstring HAL_USE_NAND TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_nand.c +endif +ifneq ($(findstring HAL_USE_ONEWIRE TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_onewire.c +endif +ifneq ($(findstring HAL_USE_EICU TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_eicu.c +endif +ifneq ($(findstring HAL_USE_CRC TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_crc.c +endif +ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_rng.c +endif +ifneq ($(findstring HAL_USE_USBH TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_debug.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_desciter.c +endif +ifneq ($(findstring HAL_USBH_USE_HUB TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_hub.c +endif +ifneq ($(findstring HAL_USBH_USE_MSD TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_msd.c +endif +ifneq ($(findstring HAL_USBH_USE_FTDI TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh_ftdi.c +endif +ifneq ($(findstring HAL_USBH_USE_AOA TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh_aoa.c +endif +ifneq ($(findstring HAL_USBH_USE_HID TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh_hid.c +endif +ifneq ($(findstring HAL_USBH_USE_UVC TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_uvc.c +endif +ifneq ($(findstring HAL_USE_EEPROM TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_eeprom.c +ifneq ($(findstring EEPROM_USE_EE25XX TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee25xx.c +endif +ifneq ($(findstring EEPROM_USE_EE24XX TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee24xx.c +endif +endif +ifneq ($(findstring HAL_USE_TIMCAP TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c +endif +ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c +endif +ifneq ($(findstring HAL_USE_USB_HID TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c +endif +ifneq ($(findstring HAL_USE_USB_MSD TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c +endif +ifneq ($(findstring HAL_USE_COMP TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c +endif +else +HALSRC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_nand.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_onewire.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_eicu.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_crc.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_rng.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_usbh.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_debug.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_desciter.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_hub.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_msd.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_ftdi.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_aoa.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_hid.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/usbh/hal_usbh_uvc.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee24xx.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee25xx.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_eeprom.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c +endif + +HALINC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/include + +# Shared variables +ALLCSRC += $(HALSRC_CONTRIB) +ALLINC += $(HALINC_CONTRIB) -- cgit v1.2.3 From ccfc9108293123edf1de4ca38dd7876d2d357206 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:25:22 +0700 Subject: Update STM32 platform makefiles, add per-driver makefiles. --- os/hal/ports/STM32/LLD/COMPv1/driver.mk | 9 ++++++++ os/hal/ports/STM32/LLD/CRCv1/driver.mk | 9 ++++++++ os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk | 2 ++ os/hal/ports/STM32/LLD/FSMCv1/driver.mk | 17 ++++++++++++++ os/hal/ports/STM32/LLD/LTDCv1/driver.mk | 2 ++ os/hal/ports/STM32/LLD/TIMv1/driver.mk | 17 ++++++++++++++ os/hal/ports/STM32/LLD/USBHv1/driver.mk | 9 ++++++++ os/hal/ports/STM32/STM32F0xx/platform.mk | 23 ++++++++++++++----- os/hal/ports/STM32/STM32F1xx/platform.mk | 32 +++++++++++++++----------- os/hal/ports/STM32/STM32F3xx/platform.mk | 29 ++++++++++++++++-------- os/hal/ports/STM32/STM32F4xx/platform.mk | 39 +++++++++++++++++--------------- os/hal/ports/STM32/STM32F7xx/platform.mk | 22 +++++++++++++----- os/hal/ports/STM32/STM32L4xx/platform.mk | 39 +++++++++++++++++--------------- 13 files changed, 178 insertions(+), 71 deletions(-) create mode 100644 os/hal/ports/STM32/LLD/COMPv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/CRCv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/FSMCv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/LTDCv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/TIMv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/USBHv1/driver.mk diff --git a/os/hal/ports/STM32/LLD/COMPv1/driver.mk b/os/hal/ports/STM32/LLD/COMPv1/driver.mk new file mode 100644 index 0000000..e819a32 --- /dev/null +++ b/os/hal/ports/STM32/LLD/COMPv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_COMP TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1 diff --git a/os/hal/ports/STM32/LLD/CRCv1/driver.mk b/os/hal/ports/STM32/LLD/CRCv1/driver.mk new file mode 100644 index 0000000..b8c16d4 --- /dev/null +++ b/os/hal/ports/STM32/LLD/CRCv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_CRC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 diff --git a/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk b/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk new file mode 100644 index 0000000..22be164 --- /dev/null +++ b/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk @@ -0,0 +1,2 @@ +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d.c +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 diff --git a/os/hal/ports/STM32/LLD/FSMCv1/driver.mk b/os/hal/ports/STM32/LLD/FSMCv1/driver.mk new file mode 100644 index 0000000..d92230d --- /dev/null +++ b/os/hal/ports/STM32/LLD/FSMCv1/driver.mk @@ -0,0 +1,17 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_FSMC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram.c +endif +ifneq ($(findstring HAL_USE_NAND TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 diff --git a/os/hal/ports/STM32/LLD/LTDCv1/driver.mk b/os/hal/ports/STM32/LLD/LTDCv1/driver.mk new file mode 100644 index 0000000..d6cabcd --- /dev/null +++ b/os/hal/ports/STM32/LLD/LTDCv1/driver.mk @@ -0,0 +1,2 @@ +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 diff --git a/os/hal/ports/STM32/LLD/TIMv1/driver.mk b/os/hal/ports/STM32/LLD/TIMv1/driver.mk new file mode 100644 index 0000000..86eb7c7 --- /dev/null +++ b/os/hal/ports/STM32/LLD/TIMv1/driver.mk @@ -0,0 +1,17 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_EICU TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c +endif +ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c +endif +ifneq ($(findstring HAL_USE_TIMCAP TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 diff --git a/os/hal/ports/STM32/LLD/USBHv1/driver.mk b/os/hal/ports/STM32/LLD/USBHv1/driver.mk new file mode 100644 index 0000000..b8f8988 --- /dev/null +++ b/os/hal/ports/STM32/LLD/USBHv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_USBH TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk index 0102162..5bffece 100644 --- a/os/hal/ports/STM32/STM32F0xx/platform.mk +++ b/os/hal/ports/STM32/STM32F0xx/platform.mk @@ -1,9 +1,20 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F0xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c +ifeq ($(USE_SMART_BUILD),yes) -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/STM32/STM32F1xx/platform.mk b/os/hal/ports/STM32/STM32F1xx/platform.mk index a8f21bc..9562942 100644 --- a/os/hal/ports/STM32/STM32F1xx/platform.mk +++ b/os/hal/ports/STM32/STM32F1xx/platform.mk @@ -1,15 +1,21 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F1xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c - -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +ifeq ($(USE_SMART_BUILD),yes) + +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk index 910fb1f..f41da95 100644 --- a/os/hal/ports/STM32/STM32F3xx/platform.mk +++ b/os/hal/ports/STM32/STM32F3xx/platform.mk @@ -1,12 +1,21 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F3xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c \ - -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +ifeq ($(USE_SMART_BUILD),yes) + +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/STM32/STM32F4xx/platform.mk b/os/hal/ports/STM32/STM32F4xx/platform.mk index c312e72..73af8ff 100644 --- a/os/hal/ports/STM32/STM32F4xx/platform.mk +++ b/os/hal/ports/STM32/STM32F4xx/platform.mk @@ -1,21 +1,24 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F4xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c +ifeq ($(USE_SMART_BUILD),yes) -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/STM32/STM32F7xx/platform.mk b/os/hal/ports/STM32/STM32F7xx/platform.mk index 2f9392f..1c806a7 100644 --- a/os/hal/ports/STM32/STM32F7xx/platform.mk +++ b/os/hal/ports/STM32/STM32F7xx/platform.mk @@ -1,9 +1,19 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F7xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c +ifeq ($(USE_SMART_BUILD),yes) -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk index b9bbfea..096fd59 100644 --- a/os/hal/ports/STM32/STM32L4xx/platform.mk +++ b/os/hal/ports/STM32/STM32L4xx/platform.mk @@ -1,21 +1,24 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32L4xx/platform.mk -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c +ifeq ($(USE_SMART_BUILD),yes) -PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +else +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) -- cgit v1.2.3 From 7ab18994e7ac71872b9aa4684546dffe01c5c3f0 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:29:02 +0700 Subject: Adopt sources to new HAL. --- os/hal/src/hal_ee24xx.c | 1 + os/hal/src/hal_ee25xx.c | 1 + os/hal/src/usbh/hal_usbh_aoa.c | 11 ++++++++++- os/hal/src/usbh/hal_usbh_ftdi.c | 11 ++++++++++- os/hal/src/usbh/hal_usbh_msd.c | 1 + os/various/fatfs_bindings/fatfs.mk | 4 ++++ os/various/fatfs_bindings/fatfs_diskio.c | 12 ++++++------ os/various/ramdisk.c | 1 + 8 files changed, 34 insertions(+), 8 deletions(-) diff --git a/os/hal/src/hal_ee24xx.c b/os/hal/src/hal_ee24xx.c index 725258c..1df1b9f 100644 --- a/os/hal/src/hal_ee24xx.c +++ b/os/hal/src/hal_ee24xx.c @@ -334,6 +334,7 @@ static size_t read(void *ip, uint8_t *bp, size_t n) { } static const struct EepromFileStreamVMT vmt = { + (size_t)0, write, read, eepfs_put, diff --git a/os/hal/src/hal_ee25xx.c b/os/hal/src/hal_ee25xx.c index 8c35976..2849e66 100644 --- a/os/hal/src/hal_ee25xx.c +++ b/os/hal/src/hal_ee25xx.c @@ -383,6 +383,7 @@ static size_t read(void *ip, uint8_t *bp, size_t n) { } static const struct EepromFileStreamVMT vmt = { + (size_t)0, write, read, eepfs_put, diff --git a/os/hal/src/usbh/hal_usbh_aoa.c b/os/hal/src/usbh/hal_usbh_aoa.c index d565595..1447bdb 100644 --- a/os/hal/src/usbh/hal_usbh_aoa.c +++ b/os/hal/src/usbh/hal_usbh_aoa.c @@ -498,7 +498,15 @@ static size_t _read(USBHAOAChannel *aoacp, uint8_t *bp, size_t n) { return _read_timeout(aoacp, bp, n, TIME_INFINITE); } +static msg_t _ctl(USBHAOAChannel *ftdipp, unsigned int operation, void *arg) { + (void)ftdipp; + (void)operation; + (void)arg; + return MSG_OK; +} + static const struct AOADriverVMT async_channel_vmt = { + (size_t)0, (size_t (*)(void *, const uint8_t *, size_t))_write, (size_t (*)(void *, uint8_t *, size_t))_read, (msg_t (*)(void *, uint8_t))_put, @@ -506,7 +514,8 @@ static const struct AOADriverVMT async_channel_vmt = { (msg_t (*)(void *, uint8_t, systime_t))_put_timeout, (msg_t (*)(void *, systime_t))_get_timeout, (size_t (*)(void *, const uint8_t *, size_t, systime_t))_write_timeout, - (size_t (*)(void *, uint8_t *, size_t, systime_t))_read_timeout + (size_t (*)(void *, uint8_t *, size_t, systime_t))_read_timeout, + (msg_t (*)(void *, unsigned int, void *))_ctl }; static void _stop_channelS(USBHAOAChannel *aoacp) { diff --git a/os/hal/src/usbh/hal_usbh_ftdi.c b/os/hal/src/usbh/hal_usbh_ftdi.c index 6966028..7bd8f2d 100644 --- a/os/hal/src/usbh/hal_usbh_ftdi.c +++ b/os/hal/src/usbh/hal_usbh_ftdi.c @@ -600,6 +600,13 @@ static size_t _read(USBHFTDIPortDriver *ftdipp, uint8_t *bp, size_t n) { return _read_timeout(ftdipp, bp, n, TIME_INFINITE); } +static msg_t _ctl(USBHFTDIPortDriver *ftdipp, unsigned int operation, void *arg) { + (void)ftdipp; + (void)operation; + (void)arg; + return MSG_OK; +} + static void _vt(void *p) { USBHFTDIPortDriver *const ftdipp = (USBHFTDIPortDriver *)p; osalSysLockFromISR(); @@ -615,6 +622,7 @@ static void _vt(void *p) { } static const struct FTDIPortDriverVMT async_channel_vmt = { + (size_t)0, (size_t (*)(void *, const uint8_t *, size_t))_write, (size_t (*)(void *, uint8_t *, size_t))_read, (msg_t (*)(void *, uint8_t))_put, @@ -622,7 +630,8 @@ static const struct FTDIPortDriverVMT async_channel_vmt = { (msg_t (*)(void *, uint8_t, systime_t))_put_timeout, (msg_t (*)(void *, systime_t))_get_timeout, (size_t (*)(void *, const uint8_t *, size_t, systime_t))_write_timeout, - (size_t (*)(void *, uint8_t *, size_t, systime_t))_read_timeout + (size_t (*)(void *, uint8_t *, size_t, systime_t))_read_timeout, + (msg_t (*)(void *, unsigned int, void *))_ctl }; diff --git a/os/hal/src/usbh/hal_usbh_msd.c b/os/hal/src/usbh/hal_usbh_msd.c index 7233a0b..fe97ff0 100644 --- a/os/hal/src/usbh/hal_usbh_msd.c +++ b/os/hal/src/usbh/hal_usbh_msd.c @@ -683,6 +683,7 @@ static msd_result_t scsi_write10(USBHMassStorageLUNDriver *lunp, uint32_t lba, u USBHMassStorageLUNDriver MSBLKD[HAL_USBHMSD_MAX_LUNS]; static const struct USBHMassStorageDriverVMT blk_vmt = { + (size_t)0, (bool (*)(void *))usbhmsdLUNIsInserted, (bool (*)(void *))usbhmsdLUNIsProtected, (bool (*)(void *))usbhmsdLUNConnect, diff --git a/os/various/fatfs_bindings/fatfs.mk b/os/various/fatfs_bindings/fatfs.mk index f2feeb5..2a3b4d6 100644 --- a/os/various/fatfs_bindings/fatfs.mk +++ b/os/various/fatfs_bindings/fatfs.mk @@ -5,3 +5,7 @@ FATFSSRC = ${CHIBIOS_CONTRIB}/os/various/fatfs_bindings/fatfs_diskio.c \ $(CHIBIOS)/ext/fatfs/src/ffunicode.c FATFSINC = ${CHIBIOS}/ext/fatfs/src + +# Shared variables +ALLCSRC += $(FATFSSRC) +ALLINC += $(FATFSINC) diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c index 80d1502..eb732fd 100644 --- a/os/various/fatfs_bindings/fatfs_diskio.c +++ b/os/various/fatfs_bindings/fatfs_diskio.c @@ -243,12 +243,12 @@ DRESULT disk_ioctl ( switch (cmd) { case CTRL_SYNC: return RES_OK; -#if _MAX_SS > _MIN_SS +#if FF_MAX_SS > FF_MIN_SS case GET_SECTOR_SIZE: *((WORD *)buff) = MMCSD_BLOCK_SIZE; return RES_OK; #endif -#if _USE_TRIM +#if FF_USE_TRIM case CTRL_TRIM: mmcErase(&MMCD1, *((DWORD *)buff), *((DWORD *)buff + 1)); return RES_OK; @@ -264,7 +264,7 @@ DRESULT disk_ioctl ( case GET_SECTOR_COUNT: *((DWORD *)buff) = mmcsdGetCardCapacity(&SDCD1); return RES_OK; -#if _MAX_SS > _MIN_SS +#if FF_MAX_SS > FF_MIN_SS case GET_SECTOR_SIZE: *((WORD *)buff) = MMCSD_BLOCK_SIZE; return RES_OK; @@ -272,7 +272,7 @@ DRESULT disk_ioctl ( case GET_BLOCK_SIZE: *((DWORD *)buff) = 256; /* 512b blocks in one erase block */ return RES_OK; -#if _USE_TRIM +#if FF_USE_TRIM case CTRL_TRIM: sdcErase(&SDCD1, *((DWORD *)buff), *((DWORD *)buff + 1)); return RES_OK; @@ -289,12 +289,12 @@ DRESULT disk_ioctl ( case GET_SECTOR_COUNT: *((DWORD *)buff) = MSBLKD[0].info.blk_num; return RES_OK; -#if _MAX_SS > _MIN_SS +#if FF_MAX_SS > FF_MIN_SS case GET_SECTOR_SIZE: *((WORD *)buff) = MSBLKD[0].info.blk_size; return RES_OK; #endif -#if _USE_TRIM +#if FF_USE_TRIM #error "unimplemented yet!" // case CTRL_TRIM: // .... diff --git a/os/various/ramdisk.c b/os/various/ramdisk.c index 23bf658..d0d366a 100644 --- a/os/various/ramdisk.c +++ b/os/various/ramdisk.c @@ -139,6 +139,7 @@ static bool get_info(void *instance, BlockDeviceInfo *bdip) { * */ static const struct BaseBlockDeviceVMT vmt = { + (size_t)0, is_inserted, is_protected, connect, -- cgit v1.2.3 From 2db0e3fd7877253bf82766fb0666ab16234639b3 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:31:28 +0700 Subject: New style makefiles for demos and tests. --- demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile | 20 ++++++--------- demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile | 26 ++++++------------- demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile | 26 ++++++------------- .../boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk | 4 +++ os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk | 4 +++ testhal/STM32/STM32F0xx/crc/Makefile | 20 ++++++--------- testhal/STM32/STM32F0xx/onewire/Makefile | 21 ++++++---------- testhal/STM32/STM32F0xx/qei/Makefile | 21 ++++++---------- testhal/STM32/STM32F1xx/onewire/Makefile | 21 ++++++---------- testhal/STM32/STM32F1xx/qei/Makefile | 21 ++++++---------- testhal/STM32/STM32F3xx/COMP/Makefile | 21 ++++++---------- testhal/STM32/STM32F3xx/EEProm/Makefile | 21 ++++++---------- testhal/STM32/STM32F3xx/TIMCAP/Makefile | 21 ++++++---------- testhal/STM32/STM32F4xx/EICU/Makefile | 21 ++++++---------- testhal/STM32/STM32F4xx/FSMC_NAND/Makefile | 20 ++++++--------- testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile | 21 ++++++---------- testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile | 21 ++++++---------- testhal/STM32/STM32F4xx/USB_HOST/Makefile | 29 +++++++--------------- testhal/STM32/STM32F4xx/onewire/Makefile | 21 ++++++---------- testhal/STM32/STM32F7xx/USB_MSD/Makefile | 23 ++++++----------- 20 files changed, 138 insertions(+), 265 deletions(-) diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile b/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile index 2173b3e..738a956 100644 --- a/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile +++ b/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk # HAL-OSAL files (optional). @@ -105,20 +107,14 @@ LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ $(CHIBIOS_CONTRIB)/os/various/pid.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,12 +137,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile index 6cf025a..aa99ec7 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile +++ b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -110,16 +112,8 @@ LDSCRIPT = STM32F429xI_SDRAM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ $(CHIBIOS_CONTRIB)/os/various/devices_lib/lcd/ili9341.c \ main.c usbcfg.c \ wolf3d_palette.c \ @@ -127,7 +121,7 @@ CSRC = $(STARTUPSRC) \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -150,14 +144,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) \ - $(CHIBIOS)/os/various \ +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various/devices_lib/lcd \ res diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile index 1203a72..ead8513 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile +++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -110,23 +112,15 @@ LDSCRIPT = $(STARTUPLD)/STM32F429xI.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ $(CHIBIOS_CONTRIB)/os/various/tribuf.c \ usbcfg.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -149,14 +143,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) \ - $(CHIBIOS)/os/various \ +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk index 8c28257..0303442 100644 --- a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk +++ b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk @@ -3,3 +3,7 @@ BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board. # Required include directories BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk b/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk index 35b3939..614835d 100644 --- a/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk +++ b/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/ST_STM32F0308_DISCOVERY/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/ST_STM32F0308_DISCOVERY + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/testhal/STM32/STM32F0xx/crc/Makefile b/testhal/STM32/STM32F0xx/crc/Makefile index 7dfc020..6721d80 100644 --- a/testhal/STM32/STM32F0xx/crc/Makefile +++ b/testhal/STM32/STM32F0xx/crc/Makefile @@ -83,6 +83,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk # HAL-OSAL files (optional). @@ -103,19 +105,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F051x8.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -138,12 +134,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/testhal/STM32/STM32F0xx/onewire/Makefile b/testhal/STM32/STM32F0xx/onewire/Makefile index cb248f6..c863257 100644 --- a/testhal/STM32/STM32F0xx/onewire/Makefile +++ b/testhal/STM32/STM32F0xx/onewire/Makefile @@ -84,6 +84,8 @@ PROJECT = ch CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk # HAL-OSAL files (optional). @@ -104,20 +106,14 @@ LDSCRIPT= $(STARTUPLD)/STM32F051x8.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c \ $(TESTHAL)/testhal_onewire.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various \ +INCDIR = $(ALLINC) $(TESTINC) \ $(TESTHAL) # diff --git a/testhal/STM32/STM32F0xx/qei/Makefile b/testhal/STM32/STM32F0xx/qei/Makefile index 7dfc020..0e8d92f 100644 --- a/testhal/STM32/STM32F0xx/qei/Makefile +++ b/testhal/STM32/STM32F0xx/qei/Makefile @@ -83,6 +83,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk # HAL-OSAL files (optional). @@ -103,19 +105,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F051x8.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -138,13 +134,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F1xx/onewire/Makefile b/testhal/STM32/STM32F1xx/onewire/Makefile index 5b72418..91052f8 100644 --- a/testhal/STM32/STM32F1xx/onewire/Makefile +++ b/testhal/STM32/STM32F1xx/onewire/Makefile @@ -89,6 +89,8 @@ PROJECT = ch CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk # HAL-OSAL files (optional). @@ -109,20 +111,14 @@ LDSCRIPT= $(STARTUPLD)/STM32F103xB.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c \ $(TESTHAL)/testhal_onewire.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -145,13 +141,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various \ +INCDIR = $(ALLINC) $(TESTINC) \ $(TESTHAL) # diff --git a/testhal/STM32/STM32F1xx/qei/Makefile b/testhal/STM32/STM32F1xx/qei/Makefile index f7a7450..5f16036 100644 --- a/testhal/STM32/STM32F1xx/qei/Makefile +++ b/testhal/STM32/STM32F1xx/qei/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk # HAL-OSAL files (optional). @@ -108,19 +110,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F103xB.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,13 +139,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F3xx/COMP/Makefile b/testhal/STM32/STM32F3xx/COMP/Makefile index 0e3d04d..3730513 100644 --- a/testhal/STM32/STM32F3xx/COMP/Makefile +++ b/testhal/STM32/STM32F3xx/COMP/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk # HAL-OSAL files (optional). @@ -108,19 +110,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,13 +139,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F3xx/EEProm/Makefile b/testhal/STM32/STM32F3xx/EEProm/Makefile index 0e3d04d..3730513 100644 --- a/testhal/STM32/STM32F3xx/EEProm/Makefile +++ b/testhal/STM32/STM32F3xx/EEProm/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk # HAL-OSAL files (optional). @@ -108,19 +110,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,13 +139,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F3xx/TIMCAP/Makefile b/testhal/STM32/STM32F3xx/TIMCAP/Makefile index b67e7f1..8c6490e 100644 --- a/testhal/STM32/STM32F3xx/TIMCAP/Makefile +++ b/testhal/STM32/STM32F3xx/TIMCAP/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk # HAL-OSAL files (optional). @@ -108,19 +110,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,13 +139,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F4xx/EICU/Makefile b/testhal/STM32/STM32F4xx/EICU/Makefile index c1eae62..d458565 100644 --- a/testhal/STM32/STM32F4xx/EICU/Makefile +++ b/testhal/STM32/STM32F4xx/EICU/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -108,19 +110,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,13 +139,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile index 5996f17..2c622eb 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -108,13 +110,7 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ $(CHIBIOS_CONTRIB)/os/various/bitmap.c \ dma_storm_adc.c \ @@ -124,7 +120,7 @@ CSRC = $(STARTUPSRC) \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -147,12 +143,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile index efdd3e9..b575f08 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -109,13 +111,7 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c \ membench.c \ @@ -123,7 +119,7 @@ CSRC = $(STARTUPSRC) \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = $(CHCPPSRC) \ +CPPSRC = $(ALLCPPSRC) \ $(CHIBIOS_CONTRIB)/os/various/memtest.cpp # C sources to be compiled in ARM mode regardless of the global setting. @@ -147,13 +143,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various/cpp_wrappers \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile index 28e3d68..a60eef9 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -109,13 +111,7 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c \ membench.c \ @@ -123,7 +119,7 @@ CSRC = $(STARTUPSRC) \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = $(CHCPPSRC) \ +CPPSRC = $(ALLCPPSRC) \ $(CHIBIOS_CONTRIB)/os/various/memtest.cpp # C sources to be compiled in ARM mode regardless of the global setting. @@ -147,13 +143,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various/cpp_wrappers \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # diff --git a/testhal/STM32/STM32F4xx/USB_HOST/Makefile b/testhal/STM32/STM32F4xx/USB_HOST/Makefile index a29150e..bf0d11a 100644 --- a/testhal/STM32/STM32F4xx/USB_HOST/Makefile +++ b/testhal/STM32/STM32F4xx/USB_HOST/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -111,22 +113,13 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(TESTSRC) \ - $(FATFSSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c usbh_custom_class_example.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -149,14 +142,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) $(FATFSINC) \ - $(CHIBIOS_CONTRIB)/os/various +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) # # Project, sources and paths diff --git a/testhal/STM32/STM32F4xx/onewire/Makefile b/testhal/STM32/STM32F4xx/onewire/Makefile index 17b1f31..0e13de2 100644 --- a/testhal/STM32/STM32F4xx/onewire/Makefile +++ b/testhal/STM32/STM32F4xx/onewire/Makefile @@ -89,6 +89,8 @@ PROJECT = ch CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk # HAL-OSAL files (optional). @@ -109,20 +111,14 @@ LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c \ $(TESTHAL)/testhal_onewire.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -145,13 +141,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS_CONTRIB)/os/various \ +INCDIR = $(ALLINC) $(TESTINC) \ $(TESTHAL) # diff --git a/testhal/STM32/STM32F7xx/USB_MSD/Makefile b/testhal/STM32/STM32F7xx/USB_MSD/Makefile index 10ec19f..30d9bec 100644 --- a/testhal/STM32/STM32F7xx/USB_MSD/Makefile +++ b/testhal/STM32/STM32F7xx/USB_MSD/Makefile @@ -93,6 +93,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk # HAL-OSAL files (optional). @@ -115,16 +117,8 @@ LDSCRIPT= $(STARTUPLD)/STM32F76xxI.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ $(CHIBIOS_CONTRIB)/os/various/ramdisk.c \ $(CHIBIOS_CONTRIB)/os/various/lib_scsi.c \ usbcfg.c \ @@ -132,7 +126,7 @@ CSRC = $(STARTUPSRC) \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -155,13 +149,10 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) \ +INCDIR = $(ALLINC) $(TESTINC) \ $(CHIBIOS_CONTRIB)/os/various # -- cgit v1.2.3 From 933415a3b951a2be552db7e7f30249eee4ed3f64 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:32:45 +0700 Subject: Update chconf.h to RT v5.1. --- demos/STM32/RT-STM32F303-DISCOVERY-PID/chconf.h | 92 +++++++++++++++++++++- demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h | 92 +++++++++++++++++++++- demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F0xx/crc/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F0xx/onewire/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F0xx/qei/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F1xx/onewire/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F1xx/qei/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F3xx/COMP/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F3xx/EEProm/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F3xx/TIMCAP/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/EICU/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/USB_HOST/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F4xx/onewire/chconf.h | 92 +++++++++++++++++++++- testhal/STM32/STM32F7xx/USB_MSD/chconf.h | 92 +++++++++++++++++++++- 18 files changed, 1620 insertions(+), 36 deletions(-) diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-PID/chconf.h b/demos/STM32/RT-STM32F303-DISCOVERY-PID/chconf.h index 53bd676..58cd5db 100644 --- a/demos/STM32/RT-STM32F303-DISCOVERY-PID/chconf.h +++ b/demos/STM32/RT-STM32F303-DISCOVERY-PID/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h index 0a0db68..8c948a7 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h +++ b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY FALSE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS TRUE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING TRUE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h index 33ff292..ac60c0b 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h +++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS FALSE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES FALSE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES FALSE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS FALSE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS FALSE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY FALSE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS TRUE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING TRUE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F0xx/crc/chconf.h b/testhal/STM32/STM32F0xx/crc/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F0xx/crc/chconf.h +++ b/testhal/STM32/STM32F0xx/crc/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F0xx/onewire/chconf.h b/testhal/STM32/STM32F0xx/onewire/chconf.h index 9339775..1f43bf9 100644 --- a/testhal/STM32/STM32F0xx/onewire/chconf.h +++ b/testhal/STM32/STM32F0xx/onewire/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 16 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 16 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 16 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F0xx/qei/chconf.h b/testhal/STM32/STM32F0xx/qei/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F0xx/qei/chconf.h +++ b/testhal/STM32/STM32F0xx/qei/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F1xx/onewire/chconf.h b/testhal/STM32/STM32F1xx/onewire/chconf.h index 42ee69b..c0052b1 100644 --- a/testhal/STM32/STM32F1xx/onewire/chconf.h +++ b/testhal/STM32/STM32F1xx/onewire/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 16 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F1xx/qei/chconf.h b/testhal/STM32/STM32F1xx/qei/chconf.h index 42ee69b..c0052b1 100644 --- a/testhal/STM32/STM32F1xx/qei/chconf.h +++ b/testhal/STM32/STM32F1xx/qei/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 16 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F3xx/COMP/chconf.h b/testhal/STM32/STM32F3xx/COMP/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F3xx/COMP/chconf.h +++ b/testhal/STM32/STM32F3xx/COMP/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F3xx/EEProm/chconf.h b/testhal/STM32/STM32F3xx/EEProm/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F3xx/EEProm/chconf.h +++ b/testhal/STM32/STM32F3xx/EEProm/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F3xx/TIMCAP/chconf.h b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F3xx/TIMCAP/chconf.h +++ b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/EICU/chconf.h b/testhal/STM32/STM32F4xx/EICU/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F4xx/EICU/chconf.h +++ b/testhal/STM32/STM32F4xx/EICU/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h index 1843208..be5b6b0 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h index 1843208..be5b6b0 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h index 1843208..be5b6b0 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h +++ b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F4xx/onewire/chconf.h b/testhal/STM32/STM32F4xx/onewire/chconf.h index 53bd676..58cd5db 100644 --- a/testhal/STM32/STM32F4xx/onewire/chconf.h +++ b/testhal/STM32/STM32F4xx/onewire/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY TRUE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } diff --git a/testhal/STM32/STM32F7xx/USB_MSD/chconf.h b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h index b9b2e81..7fa83eb 100644 --- a/testhal/STM32/STM32F7xx/USB_MSD/chconf.h +++ b/testhal/STM32/STM32F7xx/USB_MSD/chconf.h @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,26 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 10000 +#endif /** * @brief Time intervals data size. * @note Allowed values are 16, 32 or 64 bits. */ +#if !defined(CH_CFG_INTERVALS_SIZE) #define CH_CFG_INTERVALS_SIZE 32 +#endif /** * @brief Time types data size. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) #define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -71,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 2 +#endif /** @} */ @@ -94,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ +#if !defined(CH_CFG_TIME_QUANTUM) #define CH_CFG_TIME_QUANTUM 0 +#endif /** * @brief Managed RAM size. @@ -107,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -116,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -135,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -153,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM TRUE +#endif /** * @brief Threads registry APIs. @@ -161,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -170,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -178,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -189,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -197,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -207,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -217,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -227,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -235,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -245,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -254,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -265,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -275,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -284,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -296,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -305,7 +355,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif /** * @brief Objects FIFOs APIs. @@ -314,7 +366,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) #define CH_CFG_USE_OBJ_FIFOS FALSE +#endif /** * @brief Dynamic Threads APIs. @@ -325,7 +379,9 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif /** @} */ @@ -343,39 +399,53 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_CFG_USE_FACTORY) #define CH_CFG_USE_FACTORY FALSE +#endif /** * @brief Maximum length for object names. * @details If the specified length is zero then the name is stored by * pointer but this could have unintended side effects. */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) #define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif /** * @brief Enables the registry of generic objects. */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) #define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif /** * @brief Enables factory for generic buffers. */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) #define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif /** * @brief Enables factory for semaphores. */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) #define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif /** * @brief Enables factory for mailboxes. */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) #define CH_CFG_FACTORY_MAILBOXES TRUE +#endif /** * @brief Enables factory for objects FIFOs. */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) #define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -391,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -400,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -409,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -419,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -427,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -446,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -456,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -467,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -490,7 +578,7 @@ * @details User initialization code added to the @p chSysInit() function * just before interrupts are enabled globally. */ -#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ /* Add threads initialization code here.*/ \ } -- cgit v1.2.3 From 6f018973caa979897d4c932222b53e705113b612 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Mon, 24 Sep 2018 20:33:31 +0700 Subject: Various tests and demos fixes. --- demos/STM32/RT-STM32F303-DISCOVERY-PID/main.c | 2 +- testhal/STM32/STM32F4xx/EICU/EICU_F4x.config | 2 - testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator | 1 - testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator.user | 156 - testhal/STM32/STM32F4xx/EICU/EICU_F4x.files | 3443 -------------------- testhal/STM32/STM32F4xx/EICU/EICU_F4x.includes | 769 ----- testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c | 2 + 7 files changed, 3 insertions(+), 4372 deletions(-) delete mode 100644 testhal/STM32/STM32F4xx/EICU/EICU_F4x.config delete mode 100644 testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator delete mode 100644 testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator.user delete mode 100644 testhal/STM32/STM32F4xx/EICU/EICU_F4x.files delete mode 100644 testhal/STM32/STM32F4xx/EICU/EICU_F4x.includes diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-PID/main.c b/demos/STM32/RT-STM32F303-DISCOVERY-PID/main.c index 6f09f0c..d2e5e00 100644 --- a/demos/STM32/RT-STM32F303-DISCOVERY-PID/main.c +++ b/demos/STM32/RT-STM32F303-DISCOVERY-PID/main.c @@ -23,7 +23,7 @@ #define ADC_GRP1_NUM_CHANNELS 1 #define ADC_GRP1_BUF_DEPTH 8 -static pid_t pid; +static pidc_t pid; static float input = 0, output = 0, target = 0; static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; diff --git a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.config b/testhal/STM32/STM32F4xx/EICU/EICU_F4x.config deleted file mode 100644 index e0284f4..0000000 --- a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.config +++ /dev/null @@ -1,2 +0,0 @@ -// Add predefined macros for your project here. For example: -// #define THE_ANSWER 42 diff --git a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator b/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator deleted file mode 100644 index e94cbbd..0000000 --- a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator +++ /dev/null @@ -1 +0,0 @@ -[General] diff --git a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator.user b/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator.user deleted file mode 100644 index 80d783a..0000000 --- a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.creator.user +++ /dev/null @@ -1,156 +0,0 @@ - - - - - - EnvironmentId - {19e2588b-face-4845-bb71-0434e910b089} - - - ProjectExplorer.Project.ActiveTarget - 0 - - - ProjectExplorer.Project.EditorSettings - - true - false - true - - Cpp - - CppGlobal - - - 1 - UTF-8 - false - 4 - false - 80 - true - true - 1 - true - false - 0 - true - 0 - 8 - true - 1 - true - true - true - false - - - - ProjectExplorer.Project.PluginSettings - - - - ProjectExplorer.Project.Target.0 - - arm-none-eabi - arm-none-eabi - {a0910195-c955-413e-bfeb-0bb1d84cfc8b} - 0 - -1 - 1 - - /home/barthess/projects/chibios-git/community/testhal/STM32/STM32F4xx/EICU - - - - all - - false - -j4 - - true - Make - - GenericProjectManager.GenericMakeStep - - 1 - Build - - ProjectExplorer.BuildSteps.Build - - - - - clean - - true - - - true - Make - - GenericProjectManager.GenericMakeStep - - 1 - Clean - - ProjectExplorer.BuildSteps.Clean - - 2 - false - - Default - Default - GenericProjectManager.GenericBuildConfiguration - - 1 - 0 - - - 2 - - - - false - %{buildDir} - Custom Executable - - ProjectExplorer.CustomExecutableRunConfiguration - 3768 - false - true - false - false - true - - - /home/barthess/projects/chibios-git/community/testhal/STM32/STM32F4xx/EICU/build/ch.elf - /home/barthess/projects/chibios-git/community/testhal/STM32/STM32F4xx/EICU - Run on GDB server or hardware debugger - - BareMetal.CustomRunConfig - - - 3768 - false - true - false - false - true - - 2 - - - - ProjectExplorer.Project.TargetCount - 1 - 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-os/hal/ports/LPC/LPC214x/vic.h -os/hal/ports/simulator/win32/hal_lld.c -os/hal/ports/simulator/win32/hal_lld.h -os/hal/ports/simulator/win32/serial_lld.c -os/hal/ports/simulator/win32/serial_lld.h -os/hal/ports/simulator/console.c -os/hal/ports/simulator/console.h -os/hal/ports/simulator/pal_lld.c -os/hal/ports/simulator/pal_lld.h -os/hal/ports/simulator/st_lld.c -os/hal/ports/simulator/st_lld.h -os/hal/ports/STM32/LLD/DACv1/dac_lld.c -os/hal/ports/STM32/LLD/DACv1/dac_lld.h -os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c -os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h -os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c -os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h -os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c -os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h -os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c -os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h -os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c -os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h -os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h -os/hal/ports/STM32/LLD/OTGv1/usb_lld.c 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-os/hal/ports/STM32/LLD/USARTv2/serial_lld.c -os/hal/ports/STM32/LLD/USARTv2/serial_lld.h -os/hal/ports/STM32/LLD/USARTv2/uart_lld.c -os/hal/ports/STM32/LLD/USARTv2/uart_lld.h -os/hal/ports/STM32/LLD/USBv1/stm32_usb.h -os/hal/ports/STM32/LLD/USBv1/usb_lld.c -os/hal/ports/STM32/LLD/USBv1/usb_lld.h -os/hal/ports/STM32/LLD/can_lld.c -os/hal/ports/STM32/LLD/can_lld.h -os/hal/ports/STM32/LLD/ext_lld.c -os/hal/ports/STM32/LLD/ext_lld.h -os/hal/ports/STM32/LLD/mac_lld.c -os/hal/ports/STM32/LLD/mac_lld.h -os/hal/ports/STM32/LLD/sdc_lld.c -os/hal/ports/STM32/LLD/sdc_lld.h -os/hal/ports/STM32/STM32F0xx/adc_lld.c -os/hal/ports/STM32/STM32F0xx/adc_lld.h -os/hal/ports/STM32/STM32F0xx/ext_lld_isr.c -os/hal/ports/STM32/STM32F0xx/ext_lld_isr.h -os/hal/ports/STM32/STM32F0xx/hal_lld.c -os/hal/ports/STM32/STM32F0xx/hal_lld.h -os/hal/ports/STM32/STM32F0xx/stm32_dma.c -os/hal/ports/STM32/STM32F0xx/stm32_dma.h -os/hal/ports/STM32/STM32F0xx/stm32_isr.h -os/hal/ports/STM32/STM32F0xx/stm32_rcc.h -os/hal/ports/STM32/STM32F0xx/stm32_registry.h -os/hal/ports/STM32/STM32F1xx/adc_lld.c -os/hal/ports/STM32/STM32F1xx/adc_lld.h -os/hal/ports/STM32/STM32F1xx/ext_lld_isr.c -os/hal/ports/STM32/STM32F1xx/ext_lld_isr.h -os/hal/ports/STM32/STM32F1xx/hal_lld.c -os/hal/ports/STM32/STM32F1xx/hal_lld.h -os/hal/ports/STM32/STM32F1xx/hal_lld_f100.h -os/hal/ports/STM32/STM32F1xx/hal_lld_f103.h -os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h -os/hal/ports/STM32/STM32F1xx/stm32_dma.c -os/hal/ports/STM32/STM32F1xx/stm32_dma.h -os/hal/ports/STM32/STM32F1xx/stm32_isr.h -os/hal/ports/STM32/STM32F1xx/stm32_rcc.h -os/hal/ports/STM32/STM32F1xx/stm32_registry.h -os/hal/ports/STM32/STM32F37x/adc_lld.c -os/hal/ports/STM32/STM32F37x/adc_lld.h -os/hal/ports/STM32/STM32F37x/ext_lld_isr.c -os/hal/ports/STM32/STM32F37x/ext_lld_isr.h -os/hal/ports/STM32/STM32F37x/hal_lld.c -os/hal/ports/STM32/STM32F37x/hal_lld.h -os/hal/ports/STM32/STM32F37x/stm32_dma.c -os/hal/ports/STM32/STM32F37x/stm32_dma.h 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a/testhal/STM32/STM32F4xx/EICU/EICU_F4x.includes +++ /dev/null @@ -1,769 +0,0 @@ -. -community/demos/NRF51/RT-WVSHARE_BLE400 -community/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D -community/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/res -community/demos/TIVA/RT-TM4C123G-LAUNCHPAD -community/demos/TIVA/RT-TM4C1294-LAUNCHPAD -community/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP -community/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/web -community/os/common/ports/ARMCMx/devices/NRF51822 -community/os/common/ports/ARMCMx/devices/TM4C123x -community/os/common/ports/ARMCMx/devices/TM4C129x -community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2 -community/os/hal/boards/ST_STM32F0308_DISCOVERY -community/os/hal/boards/TI_TM4C123G_LAUNCHPAD -community/os/hal/boards/TI_TM4C1294_LAUNCHPAD -community/os/hal/boards/WVSHARE_BLE400 -community/os/hal/include -community/os/hal/ports/NRF51/NRF51822 -community/os/hal/ports/STM32/LLD/DMA2Dv1 -community/os/hal/ports/STM32/LLD/FSMCv1 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-community/testhal/TIVA/TM4C123x/GPT -community/testhal/TIVA/TM4C123x/I2C -community/testhal/TIVA/TM4C123x/PWM -community/testhal/TIVA/TM4C123x/SPI -os/common/ports/ARM/devices/LPC214x -os/common/ports/ARMCMx/devices/K20x -os/common/ports/ARMCMx/devices/KL2x -os/common/ports/ARMCMx/devices/STM32F0xx -os/common/ports/ARMCMx/devices/STM32F1xx -os/common/ports/ARMCMx/devices/STM32F3xx -os/common/ports/ARMCMx/devices/STM32F4xx -os/common/ports/ARMCMx/devices/STM32L0xx -os/common/ports/ARMCMx/devices/STM32L1xx -os/common/ports/e200/compilers/GCC -os/common/ports/e200/devices/SPC560BCxx -os/common/ports/e200/devices/SPC560Bxx -os/common/ports/e200/devices/SPC560Dxx -os/common/ports/e200/devices/SPC560Pxx -os/common/ports/e200/devices/SPC563Mxx -os/common/ports/e200/devices/SPC564Axx -os/common/ports/e200/devices/SPC56ECxx -os/common/ports/e200/devices/SPC56ELxx -os/common/ports/e200/devices/SPC57EMxx_HSM -os/ext/CMSIS/include -os/ext/CMSIS/KINETIS -os/ext/CMSIS/ST -os/hal/boards/ARDUINO_MEGA -os/hal/boards/EA_LPCXPRESSO_11C24 -os/hal/boards/EA_LPCXPRESSO_BB_1114 -os/hal/boards/EA_LPCXPRESSO_BB_11U14 -os/hal/boards/EA_LPCXPRESSO_BB_1343 -os/hal/boards/EA_LPCXPRESSO_LPC812 -os/hal/boards/FREESCALE_FREEDOM_K20D50M -os/hal/boards/FREESCALE_FREEDOM_KL25Z -os/hal/boards/MAPLEMINI_STM32_F103 -os/hal/boards/MCHCK_K20 -os/hal/boards/NGX_BB_LPC11U14 -os/hal/boards/NONSTANDARD_STM32F4_BARTHESS1 -os/hal/boards/OLIMEX_AVR_CAN -os/hal/boards/OLIMEX_AVR_MT_128 -os/hal/boards/OLIMEX_LPC_P1227 -os/hal/boards/OLIMEX_LPC_P1343 -os/hal/boards/OLIMEX_LPC_P2148 -os/hal/boards/OLIMEX_MSP430_P1611 -os/hal/boards/OLIMEX_SAM7_EX256 -os/hal/boards/OLIMEX_SAM7_P256 -os/hal/boards/OLIMEX_STM32_103STK -os/hal/boards/OLIMEX_STM32_E407 -os/hal/boards/OLIMEX_STM32_E407_REV_D -os/hal/boards/OLIMEX_STM32_H103 -os/hal/boards/OLIMEX_STM32_H407 -os/hal/boards/OLIMEX_STM32_LCD -os/hal/boards/OLIMEX_STM32_P103 -os/hal/boards/OLIMEX_STM32_P107 -os/hal/boards/OLIMEX_STM32_P407 -os/hal/boards/PJRC_TEENSY_3 -os/hal/boards/RAISONANCE_REVA_STM8S -os/hal/boards/simulator -os/hal/boards/ST_EVB_SPC560B -os/hal/boards/ST_EVB_SPC560BC -os/hal/boards/ST_EVB_SPC560D -os/hal/boards/ST_EVB_SPC560P -os/hal/boards/ST_EVB_SPC563M -os/hal/boards/ST_EVB_SPC564A -os/hal/boards/ST_EVB_SPC56EC -os/hal/boards/ST_EVB_SPC56EL -os/hal/boards/ST_INEMO_M1_DISCOVERY -os/hal/boards/ST_NUCLEO_F030R8 -os/hal/boards/ST_NUCLEO_F103RB -os/hal/boards/ST_NUCLEO_F302R8 -os/hal/boards/ST_NUCLEO_F334R8 -os/hal/boards/ST_NUCLEO_F401RE -os/hal/boards/ST_NUCLEO_F411RE -os/hal/boards/ST_NUCLEO_L152RE -os/hal/boards/ST_STM3210C_EVAL -os/hal/boards/ST_STM3210E_EVAL -os/hal/boards/ST_STM3220G_EVAL -os/hal/boards/ST_STM32373C_EVAL -os/hal/boards/ST_STM32F072B_DISCOVERY -os/hal/boards/ST_STM32F0_DISCOVERY -os/hal/boards/ST_STM32F3_DISCOVERY -os/hal/boards/ST_STM32F401C_DISCOVERY -os/hal/boards/ST_STM32F429I_DISCOVERY -os/hal/boards/ST_STM32F4_DISCOVERY -os/hal/boards/ST_STM32L_DISCOVERY -os/hal/boards/ST_STM32VL_DISCOVERY -os/hal/boards/ST_STM8L_DISCOVERY -os/hal/boards/ST_STM8S_DISCOVERY -os/hal/boards/STUDIEL_AT91SAM7A3_EK -os/hal/include -os/hal/lib/streams -os/hal/osal/nil -os/hal/osal/os-less/ARMCMx -os/hal/osal/rt -os/hal/ports/AVR -os/hal/ports/common/ARMCMx -os/hal/ports/KINETIS/K20x -os/hal/ports/KINETIS/KL2x -os/hal/ports/KINETIS/LLD -os/hal/ports/LPC/LPC214x -os/hal/ports/simulator -os/hal/ports/simulator/win32 -os/hal/ports/STM32/LLD -os/hal/ports/STM32/LLD/DACv1 -os/hal/ports/STM32/LLD/DMAv1 -os/hal/ports/STM32/LLD/GPIOv1 -os/hal/ports/STM32/LLD/GPIOv2 -os/hal/ports/STM32/LLD/I2Cv1 -os/hal/ports/STM32/LLD/I2Cv2 -os/hal/ports/STM32/LLD/OTGv1 -os/hal/ports/STM32/LLD/RTCv1 -os/hal/ports/STM32/LLD/RTCv2 -os/hal/ports/STM32/LLD/SPIv1 -os/hal/ports/STM32/LLD/SPIv2 -os/hal/ports/STM32/LLD/TIMv1 -os/hal/ports/STM32/LLD/USARTv1 -os/hal/ports/STM32/LLD/USARTv2 -os/hal/ports/STM32/LLD/USBv1 -os/hal/ports/STM32/STM32F0xx -os/hal/ports/STM32/STM32F1xx -os/hal/ports/STM32/STM32F37x -os/hal/ports/STM32/STM32F3xx -os/hal/ports/STM32/STM32F4xx -os/hal/ports/STM32/STM32L1xx -os/hal/templates -os/hal/templates/osal -os/nil/include -os/nil/ports/ARMCMx -os/nil/ports/ARMCMx/compilers/GCC -os/nil/ports/AVR -os/nil/ports/AVR/compilers/GCC -os/nil/ports/e200 -os/nil/ports/e200/compilers/GCC -os/nil/templates -os/rt/include -os/rt/ports/ARM -os/rt/ports/ARM/compilers/GCC -os/rt/ports/ARMCMx -os/rt/ports/ARMCMx/cmsis_os -os/rt/ports/ARMCMx/compilers/GCC -os/rt/ports/ARMCMx/compilers/IAR -os/rt/ports/ARMCMx/compilers/RVCT -os/rt/ports/AVR -os/rt/ports/AVR/compilers/GCC -os/rt/ports/e200 -os/rt/ports/e200/compilers/GCC -os/rt/ports/SIMIA32 -os/rt/ports/SIMIA32/compilers/GCC -os/rt/templates -os/rt/templates/meta -os/various -os/various/devices_lib/accel -os/various/devices_lib/lcd -os/various/lwip_bindings -os/various/lwip_bindings/arch diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c index 2c2e1db..431d959 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_adc.c @@ -57,6 +57,8 @@ static const ADCConversionGroup adccg = { ADC_SMPR1_SMP_AN14(ADC_SAMPLE_3) | ADC_SMPR1_SMP_AN15(ADC_SAMPLE_3), 0, /* SMPR2 */ + 0, + 0, ADC_SQR1_NUM_CH(ADC_NUM_CHANNELS), 0, ADC_SQR3_SQ6_N(ADC_AN33_2) | -- cgit v1.2.3 From 22e538df162c8c8ecdaf2f223c24c0e8a67c9db5 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Fri, 28 Sep 2018 12:10:01 +0200 Subject: Generate PAL_LINE for named pins --- tools/mx2board.py | 2 ++ 1 file changed, 2 insertions(+) mode change 100644 => 100755 tools/mx2board.py diff --git a/tools/mx2board.py b/tools/mx2board.py old mode 100644 new mode 100755 index 642a934..132689e --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -267,6 +267,8 @@ def gen_defines(project): defines['PORT_'+label] = 'GPIO' + port_key defines['PAD_'+label] = pad_key + defines['LINE_'+label] = 'PAL_LINE(GPIO' + port_key + defines['LINE_'+label] += ', ' + str(pad_key) + 'U)' if re.search(r"TIM\d+_CH\d$", signal, re.M): timer = signal.replace('S_TIM', '').replace('_CH', '')[:-1] -- cgit v1.2.3 From 36ccd9f43a5e090bdf1796f121e155b3a8135fbe Mon Sep 17 00:00:00 2001 From: Austin Morton Date: Tue, 18 Jul 2017 01:01:16 -0400 Subject: implement _ptxfe_int to support ISO and INT out transfers --- os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c index 2894907..226f1bb 100644 --- a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +++ b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c @@ -1172,9 +1172,17 @@ static inline void _nptxfe_int(USBHDriver *host) { } static inline void _ptxfe_int(USBHDriver *host) { - //TODO: implement - (void)host; - uinfo("PTXFE"); + uint32_t rem; + stm32_otg_t *const otg = host->otg; + + rem = _write_packet(&host->ep_active_lists[USBH_EPTYPE_ISO], + otg->HPTXSTS & HPTXSTS_PTXFSAVL_MASK); + + rem += _write_packet(&host->ep_active_lists[USBH_EPTYPE_INT], + otg->HPTXSTS & HPTXSTS_PTXFSAVL_MASK); + + if (!rem) + otg->GINTMSK &= ~GINTMSK_PTXFEM; } static void _disable(USBHDriver *host) { -- cgit v1.2.3 From ca79ff2e87ed8b483cf7c889ec7225d9703bc2da Mon Sep 17 00:00:00 2001 From: Austin Morton Date: Tue, 18 Jul 2017 01:02:34 -0400 Subject: fix some compiler warnings around USBH_DEBUG_ENABLE conditions --- os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c index 226f1bb..a0583a6 100644 --- a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +++ b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c @@ -987,7 +987,7 @@ static inline void _hcint_int(USBHDriver *host) { haint = host->otg->HAINT; haint &= host->otg->HAINTMSK; -#if USBH_LLD_DEBUG_ENABLE_ERRORS +#if USBH_DEBUG_ENABLE && USBH_LLD_DEBUG_ENABLE_ERRORS if (!haint) { uint32_t a, b; a = host->otg->HAINT; @@ -1327,7 +1327,7 @@ static void usb_lld_serve_interrupt(USBHDriver *host) { gintsts &= otg->GINTMSK; if (!gintsts) { -#if USBH_DEBUG_ENABLE_WARNINGS +#if USBH_DEBUG_ENABLE && USBH_DEBUG_ENABLE_WARNINGS uint32_t a, b; a = otg->GINTSTS; b = otg->GINTMSK; -- cgit v1.2.3 From 40769f9bd350be59b9a9ef944c77d63cfc883f2e Mon Sep 17 00:00:00 2001 From: Austin Morton Date: Wed, 27 Dec 2017 05:53:41 -0500 Subject: avoid using list_for_each_entry_safe when closing endpoints to prevent potential infinite loop list_for_each_entry_safe is only safe when the current entry is being removed. If other entries in the list could potentially be removed it can result in an infinite loop. Because usbh_lld_ep_close blocks on each urb during iteration, it may give up its lock on the system and allow an interrupt to remove a different urb from the list, resulting in an infinite loop when the thread resumes. --- os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c index a0583a6..3298c20 100644 --- a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +++ b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c @@ -594,9 +594,10 @@ void usbh_lld_ep_open(usbh_ep_t *ep) { } void usbh_lld_ep_close(usbh_ep_t *ep) { - usbh_urb_t *urb, *tmp; + usbh_urb_t *urb; uinfof("\t%s: Closing EP...", ep->name); - list_for_each_entry_safe(urb, usbh_urb_t, tmp, &ep->urb_list, node) { + while (!list_empty(&ep->urb_list)) { + urb = list_first_entry(&ep->urb_list, usbh_urb_t, node); uinfof("\t%s: Abort URB, USBH_URBSTATUS_DISCONNECTED", ep->name); _usbh_urb_abort_and_waitS(urb, USBH_URBSTATUS_DISCONNECTED); } -- cgit v1.2.3 From c4519da48a02bebfde897e3227ae40b600fa1cb0 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Tue, 16 Oct 2018 20:25:29 +0200 Subject: Added setting qei to value for stm32 --- os/hal/include/hal_qei.h | 1 + os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/os/hal/include/hal_qei.h b/os/hal/include/hal_qei.h index 15f24ce..de41b97 100644 --- a/os/hal/include/hal_qei.h +++ b/os/hal/include/hal_qei.h @@ -145,6 +145,7 @@ extern "C" { void qeiEnable(QEIDriver *qeip); void qeiDisable(QEIDriver *qeip); qeicnt_t qeiGetCount(QEIDriver *qeip); + void qeiSetCount(QEIDriver *qeip, qeicnt_t value); qeidelta_t qeiUpdate(QEIDriver *qeip); qeidelta_t qeiUpdateI(QEIDriver *qeip); qeidelta_t qeiAdjustI(QEIDriver *qeip, qeidelta_t delta); diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h index 73468f5..a9bdaf4 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h @@ -415,7 +415,7 @@ struct QEIDriver { * * @notapi */ -#define qei_lld_set_count(qeip, value) +#define qei_lld_set_count(qeip, value) ((qeip)->tim->CNT = (value)) /*===========================================================================*/ /* External declarations. */ -- cgit v1.2.3 From 28a4beafd13a80bec19e74acc5875bd6723a8e1d Mon Sep 17 00:00:00 2001 From: Dave Flogeras Date: Thu, 1 Nov 2018 09:34:19 -0300 Subject: Fix for rccEnableCRC macro parameter. This was removed in commit ae7a4d40b84d8afc999691577210696f16e682f6#diff-7ddaa5ecc31109f41b7801dea2660b47 But I think is still necessary as the underlying rccEnableAHB macros take parameter 'lp'. It seems to work for the F0xx series, because its rccEnableAHB ignores the 'lp'. It is required when I tried to use the CRC driver on a family that does require the 'lp' parameter in the lower level macros. --- os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c index 180a383..882022b 100755 --- a/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c +++ b/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c @@ -160,7 +160,7 @@ void crc_lld_start(CRCDriver *crcp) { if (crcp->config == NULL) crcp->config = &default_config; - rccEnableCRC(); + rccEnableCRC( FALSE ); #if STM32_CRC_PROGRAMMABLE == TRUE crcp->crc->INIT = crcp->config->initial_val; -- cgit v1.2.3 From ca35947f8132f1879b2706ecceb82c112bfe0f71 Mon Sep 17 00:00:00 2001 From: "Konstantin K. Oblaukhov" Date: Tue, 20 Nov 2018 09:52:01 +0700 Subject: Reorganize NRF5x driver files. --- os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c | 227 ++++++++++++ os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.h | 229 ++++++++++++ os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c | 168 +++++++++ os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h | 139 ++++++++ os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c | 158 +++++++++ os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h | 351 ++++++++++++++++++ os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c | 492 ++++++++++++++++++++++++++ os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.h | 334 +++++++++++++++++ os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c | 300 ++++++++++++++++ os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.h | 390 ++++++++++++++++++++ os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c | 169 +++++++++ os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.h | 159 +++++++++ os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c | 389 ++++++++++++++++++++ os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.h | 238 +++++++++++++ os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c | 361 +++++++++++++++++++ os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.h | 264 ++++++++++++++ os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c | 328 +++++++++++++++++ os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.h | 285 +++++++++++++++ os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c | 467 ++++++++++++++++++++++++ os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h | 232 ++++++++++++ os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c | 343 ++++++++++++++++++ os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.h | 155 ++++++++ os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c | 157 ++++++++ os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.h | 143 ++++++++ os/hal/ports/NRF5/LLD/hal_gpt_lld.c | 361 ------------------- os/hal/ports/NRF5/LLD/hal_gpt_lld.h | 264 -------------- os/hal/ports/NRF5/LLD/hal_i2c_lld.c | 467 ------------------------ os/hal/ports/NRF5/LLD/hal_i2c_lld.h | 232 ------------ os/hal/ports/NRF5/LLD/hal_pal_lld.c | 158 --------- os/hal/ports/NRF5/LLD/hal_pal_lld.h | 351 ------------------ os/hal/ports/NRF5/LLD/hal_qei_lld.c | 300 ---------------- os/hal/ports/NRF5/LLD/hal_qei_lld.h | 390 -------------------- os/hal/ports/NRF5/LLD/hal_rng_lld.c | 169 --------- os/hal/ports/NRF5/LLD/hal_rng_lld.h | 159 --------- os/hal/ports/NRF5/LLD/hal_serial_lld.c | 343 ------------------ os/hal/ports/NRF5/LLD/hal_serial_lld.h | 155 -------- os/hal/ports/NRF5/LLD/hal_spi_lld.c | 389 -------------------- os/hal/ports/NRF5/LLD/hal_spi_lld.h | 238 ------------- os/hal/ports/NRF5/LLD/hal_st_lld.c | 328 ----------------- os/hal/ports/NRF5/LLD/hal_st_lld.h | 285 --------------- os/hal/ports/NRF5/LLD/hal_wdg_lld.c | 157 -------- os/hal/ports/NRF5/LLD/hal_wdg_lld.h | 143 -------- os/hal/ports/NRF5/NRF51822/hal_adc_lld.c | 227 ------------ os/hal/ports/NRF5/NRF51822/hal_adc_lld.h | 229 ------------ os/hal/ports/NRF5/NRF51822/hal_ext_lld.c | 168 --------- os/hal/ports/NRF5/NRF51822/hal_ext_lld.h | 139 -------- os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c | 492 -------------------------- os/hal/ports/NRF5/NRF51822/hal_pwm_lld.h | 334 ----------------- 48 files changed, 6478 insertions(+), 6478 deletions(-) create mode 100644 os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c create mode 100644 os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.h create mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c create mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h create mode 100644 os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c create mode 100644 os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h create mode 100644 os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c create mode 100644 os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.h create mode 100644 os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c create mode 100644 os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.h create mode 100644 os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c create mode 100644 os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.h create mode 100644 os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c create mode 100644 os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.h create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.h create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.h create mode 100644 os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c create mode 100644 os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h create mode 100644 os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c create mode 100644 os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.h create mode 100644 os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c create mode 100644 os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_gpt_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_gpt_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_i2c_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_i2c_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_pal_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_pal_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_qei_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_qei_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_rng_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_rng_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_serial_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_serial_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_spi_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_spi_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_st_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_st_lld.h delete mode 100644 os/hal/ports/NRF5/LLD/hal_wdg_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/hal_wdg_lld.h delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_adc_lld.c delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_adc_lld.h delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_ext_lld.c delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_ext_lld.h delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_pwm_lld.h diff --git a/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c b/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c new file mode 100644 index 0000000..e1d8bc6 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c @@ -0,0 +1,227 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ADCv1/adc_lld.c + * @brief NRF51 ADC subsystem low level driver source. + * + * @addtogroup ADC + * @{ + */ + +#include "hal.h" + +#if HAL_USE_ADC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ +#define ADC_CHANNEL_MASK 0x7 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief ADC1 driver identifier.*/ +#if NRF5_ADC_USE_ADC1 || defined(__DOXYGEN__) +ADCDriver ADCD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void adc_lld_config_next_channel(ADCDriver *adcp, uint32_t config) { + + /* Default to all analog input pins disabled */ + config &= ~ADC_CONFIG_PSEL_Msk; + + if (adcp->grpp->channel_mask) { + /* Skip to the next channel */ + while (((1 << adcp->current_channel) & adcp->grpp->channel_mask) == 0) + adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; + config |= (((1 << adcp->current_channel) << ADC_CONFIG_PSEL_Pos) & ADC_CONFIG_PSEL_Msk); + } + + /* Setup analog input pin select and user config values */ + adcp->adc->CONFIG = config; +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_ADC_USE_ADC1 || defined(__DOXYGEN__) +/** + * @brief ADC interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector5C) { + + ADCDriver *adcp = &ADCD1; + NRF_ADC_Type *adc = adcp->adc; + bool more = true; + + OSAL_IRQ_PROLOGUE(); + + /* Clear the ADC event */ + adc->EVENTS_END = 0; + + /* Read the sample into the buffer */ + adcp->samples[adcp->current_index++] = adc->RESULT; + + /* At the end of the buffer then we may be finished */ + if (adcp->current_index == adcp->number_of_samples) { + _adc_isr_full_code(adcp); + + adcp->current_index = 0; + + /* We are never finished in circular mode */ + more = adcp->grpp->circular; + } + + if (more) { + + /* Signal half completion in circular mode. */ + if (adcp->grpp->circular && + (adcp->current_index == (adcp->number_of_samples / 2))) { + + _adc_isr_half_code(adcp); + } + + /* Skip to the next channel */ + adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; + adc_lld_config_next_channel(adcp, adcp->adc->CONFIG); + adcp->adc->TASKS_START = 1; + } else { + adc_lld_stop_conversion(adcp); + } + + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ADC driver initialization. + * + * @notapi + */ +void adc_lld_init(void) { + +#if NRF5_ADC_USE_ADC1 + /* Driver initialization.*/ + adcObjectInit(&ADCD1); + ADCD1.adc = NRF_ADC; +#endif +} + +/** + * @brief Configures and activates the ADC peripheral. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_start(ADCDriver *adcp) { + + /* If in stopped state then configures and enables the ADC. */ + if (adcp->state == ADC_STOP) { +#if NRF5_ADC_USE_ADC1 + if (&ADCD1 == adcp) { + + adcp->adc->INTENSET = ADC_INTENSET_END_Enabled << ADC_INTENSET_END_Pos; + nvicEnableVector(ADC_IRQn, NRF5_ADC_IRQ_PRIORITY); + } +#endif /* NRF5_ADC_USE_ADC1 */ + } +} + +/** + * @brief Deactivates the ADC peripheral. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_stop(ADCDriver *adcp) { + + /* If in ready state then disables the ADC clock and analog part.*/ + if (adcp->state == ADC_READY) { + +#if NRF5_ADC_USE_ADC1 + if (&ADCD1 == adcp) { + + nvicDisableVector(ADC_IRQn); + adcp->adc->INTENCLR = ADC_INTENCLR_END_Clear << ADC_INTENCLR_END_Pos; + adc_lld_stop_conversion(adcp); + } +#endif + } +} + +/** + * @brief Starts an ADC conversion. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_start_conversion(ADCDriver *adcp) { + + NRF_ADC_Type *adc = adcp->adc; + + adcp->number_of_samples = adcp->depth * adcp->grpp->num_channels; + adcp->current_index = 0; + + /* At least one sample must be configured */ + osalDbgAssert(adcp->number_of_samples, "must configure at least one sample"); + + /* Skip to the next channel */ + adcp->current_channel = 0; + adc_lld_config_next_channel(adcp, adcp->grpp->cfg); + + /* Enable and start the conversion */ + adc->ENABLE = ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos; + adc->TASKS_START = 1; +} + +/** + * @brief Stops an ongoing conversion. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_stop_conversion(ADCDriver *adcp) { + + NRF_ADC_Type *adc = adcp->adc; + + adc->TASKS_STOP = 1; + adc->ENABLE = ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos; +} + +#endif /* HAL_USE_ADC */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.h b/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.h new file mode 100644 index 0000000..4e185d5 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.h @@ -0,0 +1,229 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ADCv1/adc_lld.h + * @brief NRF51 ADC subsystem low level driver header. + * + * @addtogroup ADC + * @{ + */ + +#ifndef HAL_ADC_LLD_H +#define HAL_ADC_LLD_H + +#if HAL_USE_ADC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief ADC1 driver enable switch. + * @details If set to @p TRUE the support for ADC1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_ADC_USE_ADC1) || defined(__DOXYGEN__) +#define NRF5_ADC_USE_ADC1 FALSE +#endif + +/** + * @brief ADC interrupt priority level setting. + */ +#if !defined(NRF5_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ADC_IRQ_PRIORITY 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !NRF5_ADC_USE_ADC1 +#error "ADC driver activated but no ADC peripheral assigned" +#endif + +#if NRF5_ADC_USE_ADC1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ADC_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to ADC1" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief ADC sample data type. + */ +typedef uint16_t adcsample_t; + +/** + * @brief Channels number in a conversion group. + */ +typedef uint8_t adc_channels_num_t; + +/** + * @brief Type of a structure representing an ADC driver. + */ +typedef struct ADCDriver ADCDriver; + +/** + * @brief ADC notification callback type. + * + * @param[in] adcp pointer to the @p ADCDriver object triggering the + * callback + * @param[in] buffer pointer to the most recent samples data + * @param[in] n number of buffer rows available starting from @p buffer + */ +typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); + +/** + * @brief Conversion group configuration structure. + * @details This implementation-dependent structure describes a conversion + * operation. + * @note The use of this configuration structure requires knowledge of + * STM32 ADC cell registers interface, please refer to the STM32 + * reference manual for details. + */ +typedef struct { + /** + * @brief Enables the circular buffer mode for the group. + */ + bool circular; + /** + * @brief Number of the analog channels belonging to the conversion group. + */ + adc_channels_num_t num_channels; + /** + * @brief Callback function associated to the group or @p NULL. + */ + adccallback_t end_cb; + /* End of the mandatory fields.*/ + /** + * @brief Bitmask of channels for ADC conversion. + */ + uint32_t channel_mask; + /** + * @brief ADC CONFIG register details. + * @note All the required bits must be defined into this field. + */ + uint32_t cfg; +} ADCConversionGroup; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + uint32_t dummy; +} ADCConfig; + +/** + * @brief Structure representing an ADC driver. + */ +struct ADCDriver { + /** + * @brief Driver state. + */ + adcstate_t state; + /** + * @brief Current configuration data. + */ + const ADCConfig *config; + /** + * @brief Current samples buffer pointer or @p NULL. + */ + adcsample_t *samples; + /** + * @brief Current samples buffer depth or @p 0. + */ + size_t depth; + /** + * @brief Current conversion group pointer or @p NULL. + */ + const ADCConversionGroup *grpp; +#if ADC_USE_WAIT || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif +#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* ADC_USE_MUTUAL_EXCLUSION */ +#if defined(ADC_DRIVER_EXT_FIELDS) + ADC_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the ADCx registers block. + */ + NRF_ADC_Type *adc; + /** + * @brief Number of samples expected. + */ + size_t number_of_samples; + /** + * @brief Current position in the buffer. + */ + size_t current_index; + /** + * @brief Current channel index into group channel_mask. + */ + size_t current_channel; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_ADC_USE_ADC1 && !defined(__DOXYGEN__) +extern ADCDriver ADCD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void adc_lld_init(void); + void adc_lld_start(ADCDriver *adcp); + void adc_lld_stop(ADCDriver *adcp); + void adc_lld_start_conversion(ADCDriver *adcp); + void adc_lld_stop_conversion(ADCDriver *adcp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_ADC */ + +#endif /* HAL_ADC_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c new file mode 100644 index 0000000..f38fa0c --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c @@ -0,0 +1,168 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOTEv1/ext_lld.c + * @brief NRF51 EXT subsystem low level driver source. + * + * @addtogroup EXT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +#include "hal_ext_lld_isr.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief EXTD1 driver identifier. + */ +EXTDriver EXTD1; + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level EXT driver initialization. + * + * @notapi + */ +void ext_lld_init(void) { + + /* Driver initialization.*/ + extObjectInit(&EXTD1); +} + +/** + * @brief Configures and activates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_start(EXTDriver *extp) { + + unsigned i; + + ext_lld_exti_irq_enable(); + + /* Configuration of automatic channels.*/ + for (i = 0; i < EXT_MAX_CHANNELS; i++) { + uint32_t config = 0; + uint32_t pad = (extp->config->channels[i].mode & EXT_MODE_GPIO_MASK) + >> EXT_MODE_GPIO_OFFSET; + + if (extp->config->channels[i].mode & EXT_CH_MODE_BOTH_EDGES) + config |= (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); + else if (extp->config->channels[i].mode & EXT_CH_MODE_RISING_EDGE) + config |= (GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos); + else + config |= (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos); + + config |= (pad << GPIOTE_CONFIG_PSEL_Pos); + + NRF_GPIOTE->CONFIG[i] = config; + NRF_GPIOTE->EVENTS_PORT = 0; + NRF_GPIOTE->EVENTS_IN[i] = 0; + + if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART) + ext_lld_channel_enable(extp, i); + else + ext_lld_channel_disable(extp, i); + } +} + +/** + * @brief Deactivates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_stop(EXTDriver *extp) { + + unsigned i; + + (void)extp; + ext_lld_exti_irq_disable(); + + for (i = 0; i < EXT_MAX_CHANNELS; i++) + NRF_GPIOTE->CONFIG[i] = 0; + + NRF_GPIOTE->INTENCLR = + (GPIOTE_INTENCLR_IN3_Msk | GPIOTE_INTENCLR_IN2_Msk | + GPIOTE_INTENCLR_IN1_Msk | GPIOTE_INTENCLR_IN0_Msk); +} + +/** + * @brief Enables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be enabled + * + * @notapi + */ +void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { + + uint32_t config = NRF_GPIOTE->CONFIG[channel] & ~GPIOTE_CONFIG_MODE_Msk; + + (void)extp; + config |= (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos); + + NRF_GPIOTE->CONFIG[channel] = config; + NRF_GPIOTE->INTENSET = (1 << channel); +} + +/** + * @brief Disables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be disabled + * + * @notapi + */ +void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + NRF_GPIOTE->CONFIG[channel] &= ~GPIOTE_CONFIG_MODE_Msk; + NRF_GPIOTE->INTENCLR = (1 << channel); +} + +#endif /* HAL_USE_EXT */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h new file mode 100644 index 0000000..8a93b6d --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h @@ -0,0 +1,139 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOTEv1/ext_lld.h + * @brief NRF51 EXT subsystem low level driver header. + * + * @addtogroup EXT + * @{ + */ + +#ifndef HAL_EXT_LLD_H +#define HAL_EXT_LLD_H + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Available number of EXT channels. + */ +#define EXT_MAX_CHANNELS 4 +#define EXT_MODE_GPIO_MASK 0xF8 /**< @brief Pad field mask. */ +#define EXT_MODE_GPIO_OFFSET 3 /**< @brief Pad field offset. */ +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief EXT channel identifier. + */ +typedef uint32_t expchannel_t; + +/** + * @brief Type of an EXT generic notification callback. + * + * @param[in] extp pointer to the @p EXPDriver object triggering the + * callback + */ +typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); + +/** + * @brief Channel configuration structure. + */ +typedef struct { + /** + * @brief Channel mode. + */ + uint32_t mode; + /** + * @brief Channel callback. + * @details In the STM32 implementation a @p NULL callback pointer is + * valid and configures the channel as an event sources instead + * of an interrupt source. + */ + extcallback_t cb; +} EXTChannelConfig; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Channel configurations. + */ + EXTChannelConfig channels[EXT_MAX_CHANNELS]; + /* End of the mandatory fields.*/ +} EXTConfig; + +/** + * @brief Structure representing an EXT driver. + */ +struct EXTDriver { + /** + * @brief Driver state. + */ + extstate_t state; + /** + * @brief Current configuration data. + */ + const EXTConfig *config; + /* End of the mandatory fields.*/ +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) +extern EXTDriver EXTD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void ext_lld_init(void); + void ext_lld_start(EXTDriver *extp); + void ext_lld_stop(EXTDriver *extp); + void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); + void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_EXT */ + +#endif /* HAL_EXT_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c new file mode 100644 index 0000000..9cfad8d --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c @@ -0,0 +1,158 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.c + * @brief NRF5 PAL subsystem low level driver source. + * + * @addtogroup PAL + * @{ + */ + +#include "osal.h" +#include "hal.h" + +#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode) +{ + (void)port; + osalDbgAssert(pad < PAL_IOPORTS_WIDTH, "pal_lld_setpadmode() - invalid pad"); + + switch (mode) { + case PAL_MODE_RESET: + case PAL_MODE_UNCONNECTED: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); + break; + case PAL_MODE_INPUT: + case PAL_MODE_INPUT_ANALOG: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); + break; + case PAL_MODE_INPUT_PULLUP: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); + break; + case PAL_MODE_INPUT_PULLDOWN: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); + break; + case PAL_MODE_OUTPUT_PUSHPULL: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); + break; + case PAL_MODE_OUTPUT_OPENDRAIN: + IOPORT1->PIN_CNF[pad] = + (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | + (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | + (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | + (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); + break; + default: + osalDbgAssert(FALSE, "invalid pal mode"); + break; + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief NRF5 I/O ports configuration. + * + * @param[in] config the NRF5 ports configuration + * + * @notapi + */ +void _pal_lld_init(const PALConfig *config) +{ + uint8_t i; + + for (i = 0; i < TOTAL_GPIO_PADS; i++) { + pal_lld_setpadmode(IOPORT1, i, config->pads[i]); + } +} + +/** + * @brief Pads mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode + * + * @notapi + */ +void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode) +{ + uint8_t i; + + for (i = 0; i < TOTAL_GPIO_PADS; i++, mask >>= 1) { + if (mask & 1) { + pal_lld_setpadmode(port, i, mode); + } + } +} + +#endif /* HAL_USE_PAL == TRUE */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h new file mode 100644 index 0000000..4bb14e2 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h @@ -0,0 +1,351 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.h + * @brief NRF5 PAL subsystem low level driver header. + * + * @addtogroup PAL + * @{ + */ + +#ifndef HAL_PAL_LLD_H +#define HAL_PAL_LLD_H + +#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Unsupported modes and specific modes */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* I/O Ports Types and constants. */ +/*===========================================================================*/ + +#define TOTAL_GPIO_PADS 32 + +/** + * @name Port related definitions + * @{ + */ +/** + * @brief Width, in bits, of an I/O port. + */ +#define PAL_IOPORTS_WIDTH 32U + +/** + * @brief Whole port mask. + * @brief This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFFU) +/** @} */ + +/** + * @name Line handling macros + * @{ + */ +/** + * @brief Forms a line identifier. + * @details A port/pad pair are encoded into an @p ioline_t type. The encoding + * of this type is platform-dependent. + */ +#define PAL_LINE(port, pad) \ + ((ioline_t)((uint32_t)(pad))) + +/** + * @brief Decodes a port identifier from a line identifier. + */ +#define PAL_PORT(line) \ + ((ioportid_t)(IOPORT1)) + +/** + * @brief Decodes a pad identifier from a line identifier. + */ +#define PAL_PAD(line) \ + ((uint32_t)(line)) + +/** + * @brief Value identifying an invalid line. + */ +#define PAL_NOLINE ((ioline_t)-1) +/** @} */ + +/** + * @brief Generic I/O ports static initializer. + * @details An instance of this structure must be passed to @p palInit() at + * system startup time in order to initialized the digital I/O + * subsystem. This represents only the initial setup, specific pads + * or whole ports can be reprogrammed at later time. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ +typedef struct { + uint32_t pads[TOTAL_GPIO_PADS]; +} PALConfig; + +/** + * @brief Digital I/O port sized unsigned type. + */ +typedef uint32_t ioportmask_t; + +/** + * @brief Digital I/O modes. + */ +typedef uint8_t iomode_t; + +/** + * @brief Type of an I/O line. + */ +typedef uint32_t ioline_t; + +/** + * @brief Port Identifier. + * @details This type can be a scalar or some kind of pointer, do not make + * any assumption about it, use the provided macros when populating + * variables of this type. + */ +typedef NRF_GPIO_Type *ioportid_t; + +/*===========================================================================*/ +/* I/O Ports Identifiers. */ +/*===========================================================================*/ + +/** + * @brief First I/O port identifier. + * @details Low level drivers can define multiple ports, it is suggested to + * use this naming convention. + */ +#if NRF_SERIES == 51 +#define IOPORT1 NRF_GPIO +#else +#define IOPORT1 NRF_P0 +#endif + +/*===========================================================================*/ +/* Implementation, some of the following macros could be implemented as */ +/* functions, if so please put them in pal_lld.c. */ +/*===========================================================================*/ + +/** + * @brief Low level PAL subsystem initialization. + * + * @param[in] config architecture-dependent ports configuration + * + * @notapi + */ +#define pal_lld_init(config) _pal_lld_init(config) + +/** + * @brief Reads the physical I/O port states. + * + * @param[in] port port identifier + * @return The port bits. + * + * @notapi + */ +#define pal_lld_readport(port) (IOPORT1->IN) + +/** + * @brief Reads the output latch. + * @details The purpose of this function is to read back the latched output + * value. + * + * @param[in] port port identifier + * @return The latched logical states. + * + * @notapi + */ +#define pal_lld_readlatch(port) (IOPORT1->OUT) + +/** + * @brief Writes a bits mask on a I/O port. + * + * @param[in] port port identifier + * @param[in] bits bits to be written on the specified port + * + * @notapi + */ +#define pal_lld_writeport(port, bits) (IOPORT1->OUT = (bits)) + +/** + * @brief Sets a bits mask on a I/O port. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] bits bits to be ORed on the specified port + * + * @notapi + */ +#define pal_lld_setport(port, bits) (IOPORT1->OUTSET = (bits)) + + +/** + * @brief Clears a bits mask on a I/O port. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] bits bits to be cleared on the specified port + * + * @notapi + */ +#define pal_lld_clearport(port, bits) (IOPORT1->OUTCLR = (bits)) + +/** + * @brief Pads group mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @param[in] mode group mode + * + * @notapi + */ +#define pal_lld_setgroupmode(port, mask, offset, mode) \ + _pal_lld_setgroupmode(port, mask << offset, mode) + +/** + * @brief Reads a logical state from an I/O pad. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @return The logical state. + * @retval PAL_LOW low logical state. + * @retval PAL_HIGH high logical state. + * + * @notapi + */ +#define pal_lld_readpad(port, pad) \ + ((IOPORT1->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW) + +/** + * @brief Writes a logical state on an output pad. + * @note This function is not meant to be invoked directly by the + * application code. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH + * + * @notapi + */ +#define pal_lld_writepad(port, pad, bit) \ + do { \ + (void)port; \ + if (bit == PAL_HIGH) \ + IOPORT1->OUTSET = ((uint32_t) 1 << pad); \ + else \ + IOPORT1->OUTCLR = ((uint32_t) 1 << pad); \ + } while (false) + +/** + * @brief Sets a pad logical state to @p PAL_HIGH. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_setpad(port, pad) (IOPORT1->OUTSET = (uint32_t) 1 << (pad)) + +/** + * @brief Clears a pad logical state to @p PAL_LOW. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_clearpad(port, pad) (IOPORT1->OUTCLR = (uint32_t) 1 << (pad)) + +/** + * @brief Toggles a pad logical state. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_togglepad(port, pad) \ + do { \ + uint8_t bit = (IOPORT1->OUT >> (pad)) & 1; \ + if (bit) \ + IOPORT1->OUTCLR = 1 << (pad); \ + else \ + IOPORT1->OUTSET = 1 << (pad); \ + } while (0) + +/** + * @brief Pad mode setup. + * @details This function programs a pad with the specified mode. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad mode + * + * @notapi + */ +#define pal_lld_setpadmode(port, pad, mode) _pal_lld_setpadmode(port, pad, mode) + +#if !defined(__DOXYGEN__) +extern const PALConfig pal_default_config; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void _pal_lld_init(const PALConfig *config); + void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode); + void _pal_lld_setpadmode(ioportid_t port, + uint8_t pad, + iomode_t mode); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PAL == TRUE */ + +#endif /* HAL_PAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c b/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c new file mode 100644 index 0000000..d5201b8 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c @@ -0,0 +1,492 @@ +/* + ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PWMv1/hal_pwm_lld.c + * @brief NRF51 PWM subsystem low level driver source. + * + * @note Using the method described in nrf51-pwm-library to correctly + * handle toggling of the pin with GPIOTE when changing period. + * It means it is generally unsafe to use GPIOTE with a period + * less than (2 * PWM_GPIOTE_DECISION_TIME / 16MHz) + * + * @addtogroup PWM + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define PWM_GPIOTE_PPI_CC 3 +#define PWM_GPIOTE_DECISION_TIME 160 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief PWMD1 driver identifier. + * @note The driver PWMD1 allocates the timer TIMER0 when enabled. + */ +#if NRF5_PWM_USE_TIMER0 || defined(__DOXYGEN__) +PWMDriver PWMD1; +#endif + +/** + * @brief PWMD2 driver identifier. + * @note The driver PWMD2 allocates the timer TIMER1 when enabled. + */ +#if NRF5_PWM_USE_TIMER1 || defined(__DOXYGEN__) +PWMDriver PWMD2; +#endif + +/** + * @brief PWMD3 driver identifier. + * @note The driver PWMD3 allocates the timer TIMER2 when enabled. + */ +#if NRF5_PWM_USE_TIMER2 || defined(__DOXYGEN__) +PWMDriver PWMD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +static const uint8_t pwm_margin_by_prescaler[] = { + (PWM_GPIOTE_DECISION_TIME + 0) >> 0, + (PWM_GPIOTE_DECISION_TIME + 1) >> 1, + (PWM_GPIOTE_DECISION_TIME + 3) >> 2, + (PWM_GPIOTE_DECISION_TIME + 7) >> 3, + (PWM_GPIOTE_DECISION_TIME + 15) >> 4, + (PWM_GPIOTE_DECISION_TIME + 31) >> 5, + (PWM_GPIOTE_DECISION_TIME + 63) >> 6, + (PWM_GPIOTE_DECISION_TIME + 127) >> 7, + (PWM_GPIOTE_DECISION_TIME + 255) >> 8, + (PWM_GPIOTE_DECISION_TIME + 511) >> 9 +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { + uint8_t channel; + /* Deal with PWM channels + */ + for (channel = 0 ; channel < pwmp->channels ; channel++) { + if (pwmp->timer->EVENTS_COMPARE[channel]) { + pwmp->timer->EVENTS_COMPARE[channel] = 0; + + if (pwmp->config->channels[channel].callback != NULL) { + pwmp->config->channels[channel].callback(pwmp); + } + } + } + + /* Deal with PWM period + */ + if (pwmp->timer->EVENTS_COMPARE[pwmp->channels]) { + pwmp->timer->EVENTS_COMPARE[pwmp->channels] = 0; + + if (pwmp->config->callback != NULL) { + pwmp->config->callback(pwmp); + } + } +} + +static inline +bool pwm_within_safe_margins(PWMDriver *pwmp, uint32_t timer, uint32_t width) { + const uint32_t margin = pwm_margin_by_prescaler[pwmp->timer->PRESCALER]; + return (width <= margin) + ? ((width <= timer) && (timer < (pwmp->period + width - margin))) + : ((width <= timer) || (timer < (width - margin))); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_PWM_USE_TIMER0 +/** + * @brief TIMER0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_TIMER0 */ + +#if NRF5_PWM_USE_TIMER1 +/** + * @brief TIMER1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector64) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_TIMER1 */ + +#if NRF5_PWM_USE_TIMER2 +/** + * @brief TIMER2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector68) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_TIMER2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level PWM driver initialization. + * + * @notapi + */ +void pwm_lld_init(void) { + +#if NRF5_PWM_USE_TIMER0 + pwmObjectInit(&PWMD1); + PWMD1.channels = PWM_CHANNELS; + PWMD1.timer = NRF_TIMER0; +#endif + +#if NRF5_PWM_USE_TIMER1 + pwmObjectInit(&PWMD2); + PWMD2.channels = PWM_CHANNELS; + PWMD2.timer = NRF_TIMER1; +#endif + +#if NRF5_PWM_USE_TIMER2 + pwmObjectInit(&PWMD3); + PWMD3.channels = PWM_CHANNELS; + PWMD3.timer = NRF_TIMER2; +#endif +} + +/** + * @brief Configures and activates the PWM peripheral. + * @note Starting a driver that is already in the @p PWM_READY state + * disables all the active channels. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_start(PWMDriver *pwmp) { + /* Prescaler value calculation: ftimer = 16MHz / 2^PRESCALER */ + uint16_t psc_ratio = NRF5_HFCLK_FREQUENCY / pwmp->config->frequency; + /* Prescaler ratio must be between 1 and 512, and a power of two. */ + osalDbgAssert(psc_ratio <= 512 && !(psc_ratio & (psc_ratio - 1)), + "invalid frequency"); + /* Prescaler value as a power of 2, must be 0..9 */ + uint32_t psc_value; + for (psc_value = 0; psc_value < 10; psc_value++) + if (psc_ratio == (unsigned)(1 << psc_value)) + break; + + /* Configure as 16bits timer (only TIMER0 support 32bits) */ + pwmp->timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; + pwmp->timer->MODE = TIMER_MODE_MODE_Timer; + + /* With clear shortcuts for period */ + pwmp->timer->SHORTS = + 0x1UL << (TIMER_SHORTS_COMPARE0_CLEAR_Pos + pwmp->channels); + + /* Disable and reset interrupts for compare events */ + pwmp->timer->INTENCLR = (TIMER_INTENCLR_COMPARE0_Msk | + TIMER_INTENCLR_COMPARE1_Msk | + TIMER_INTENCLR_COMPARE2_Msk | + TIMER_INTENCLR_COMPARE3_Msk ); + pwmp->timer->EVENTS_COMPARE[0] = 0; + pwmp->timer->EVENTS_COMPARE[1] = 0; + pwmp->timer->EVENTS_COMPARE[2] = 0; + pwmp->timer->EVENTS_COMPARE[3] = 0; + + /* Set prescaler */ + pwmp->timer->PRESCALER = psc_value; + + /* Set period */ + pwmp->timer->CC[pwmp->channels] = pwmp->period; + + /* Clear everything */ + pwmp->timer->TASKS_CLEAR = 1; + + /* Enable interrupt */ +#if NRF5_PWM_USE_TIMER0 + if (&PWMD1 == pwmp) { + nvicEnableVector(TIMER0_IRQn, NRF5_PWM_TIMER0_PRIORITY); + } +#endif + +#if NRF5_PWM_USE_TIMER1 + if (&PWMD2 == pwmp) { + nvicEnableVector(TIMER1_IRQn, NRF5_PWM_TIMER1_PRIORITY); + } +#endif + +#if NRF5_PWM_USE_TIMER2 + if (&PWMD3 == pwmp) { + nvicEnableVector(TIMER2_IRQn, NRF5_PWM_TIMER2_PRIORITY); + } +#endif + + /* Start timer */ + pwmp->timer->TASKS_START = 1; +} + +/** + * @brief Deactivates the PWM peripheral. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_stop(PWMDriver *pwmp) { + pwmp->timer->TASKS_SHUTDOWN = 1; + +#if NRF5_PWM_USE_TIMER0 + if (&PWMD1 == pwmp) { + nvicDisableVector(TIMER0_IRQn); + } +#endif + +#if NRF5_PWM_USE_TIMER1 + if (&PWMD2 == pwmp) { + nvicDisableVector(TIMER1_IRQn); + } +#endif + +#if NRF5_PWM_USE_TIMER2 + if (&PWMD3 == pwmp) { + nvicDisableVector(TIMER2_IRQn); + } +#endif +} + +/** + * @brief Enables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is active using the specified configuration. + * @note The function has effect at the next cycle start. + * @note Channel notification is not enabled. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * @param[in] width PWM pulse width as clock pulses number + * + * @notapi + */ +void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width) { +#if NRF5_PWM_USE_GPIOTE_PPI + const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; + const uint8_t gpiote_channel = cfg_channel->gpiote_channel; + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + + uint32_t outinit; + switch(cfg_channel->mode & PWM_OUTPUT_MASK) { + case PWM_OUTPUT_ACTIVE_LOW : outinit = GPIOTE_CONFIG_OUTINIT_Low; break; + case PWM_OUTPUT_ACTIVE_HIGH: outinit = GPIOTE_CONFIG_OUTINIT_High; break; + case PWM_OUTPUT_DISABLED : /* fall-through */ + default : goto no_output_config; + } + + /* Deal with corner case: 0% and 100% */ + if ((width <= 0) || (width >= pwmp->period)) { + /* Disable GPIOTE/PPI task */ + NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Disabled; + NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + /* Set Line */ + palWriteLine(cfg_channel->ioline, + ((width <= 0) ^ + ((cfg_channel->mode & PWM_OUTPUT_MASK) == PWM_OUTPUT_ACTIVE_HIGH))); + + /* Really doing PWM */ + } else { + const uint32_t gpio_pin = PAL_PAD(cfg_channel->ioline); + const uint32_t polarity = GPIOTE_CONFIG_POLARITY_Toggle; + + /* Program tasks (one for duty cycle, one for periode) */ + NRF_PPI->CH[ppi_channel[0]].EEP = + (uint32_t)&pwmp->timer->EVENTS_COMPARE[channel]; + NRF_PPI->CH[ppi_channel[0]].TEP = + (uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel]; + NRF_PPI->CH[ppi_channel[1]].EEP = + (uint32_t)&pwmp->timer->EVENTS_COMPARE[pwmp->channels]; + NRF_PPI->CH[ppi_channel[1]].TEP = + (uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel]; + NRF_PPI->CHENSET = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + + /* Something Old, something New */ + const uint32_t old_width = pwmp->timer->CC[channel]; + const uint32_t new_width = width; + + /* Check GPIOTE state */ + const bool gpiote = (NRF_GPIOTE->CONFIG[gpiote_channel] & + GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled; + + /* GPIOTE is currently running */ + if (gpiote) { + uint32_t current; + while (true) { + pwmp->timer->TASKS_CAPTURE[PWM_GPIOTE_PPI_CC] = 1; + current = pwmp->timer->CC[PWM_GPIOTE_PPI_CC]; + + if (pwm_within_safe_margins(pwmp, current, old_width) && + pwm_within_safe_margins(pwmp, current, new_width)) + break; + } + if (((old_width <= current) && (current < new_width)) || + ((new_width <= current) && (current < old_width))) { + NRF_GPIOTE->TASKS_OUT[gpiote_channel] = 1; + } + + /* GPIOTE need to be restarted */ + } else { + /* Create GPIO Task */ + NRF_GPIOTE->CONFIG[gpiote_channel] = + (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) | + ((gpio_pin << GPIOTE_CONFIG_PSEL_Pos ) & GPIOTE_CONFIG_PSEL_Msk )| + ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk)| + ((outinit << GPIOTE_CONFIG_OUTINIT_Pos ) & GPIOTE_CONFIG_OUTINIT_Msk ); + + pwmp->timer->TASKS_CAPTURE[PWM_GPIOTE_PPI_CC] = 1; + if (pwmp->timer->CC[PWM_GPIOTE_PPI_CC] > width) + NRF_GPIOTE->TASKS_OUT[gpiote_channel] = 1; + } + } + + no_output_config: +#endif + + pwmp->timer->CC[channel] = width; +} + +/** + * @brief Disables a PWM channel and its notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is disabled and its output line returned to the + * idle state. + * @note The function has effect at the next cycle start. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { + pwmp->timer->CC[channel] = 0; +#if NRF5_PWM_USE_GPIOTE_PPI + const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; + switch(cfg_channel->mode & PWM_OUTPUT_MASK) { + case PWM_OUTPUT_ACTIVE_LOW: + case PWM_OUTPUT_ACTIVE_HIGH: { + const uint8_t gpiote_channel = cfg_channel->gpiote_channel; + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Disabled; + break; + } + case PWM_OUTPUT_DISABLED: + default: + break; + } +#endif +} + +/** + * @brief Enables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { + pwmp->timer->INTENSET = + 0x1UL << (TIMER_INTENSET_COMPARE0_Pos + pwmp->channels); +} + +/** + * @brief Disables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { + pwmp->timer->INTENCLR = + 0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + pwmp->channels); +} + +/** + * @brief Enables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + pwmp->timer->INTENSET = + 0x1UL << (TIMER_INTENSET_COMPARE0_Pos + channel); +} + +/** + * @brief Disables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + pwmp->timer->INTENCLR = + 0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + channel); +} + +#endif /* HAL_USE_PWM */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.h b/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.h new file mode 100644 index 0000000..616e61a --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.h @@ -0,0 +1,334 @@ +/* + ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PWMv1/hal_pwm_lld.h + * @brief NRF51 PWM subsystem low level driver header. + * + * @addtogroup PWM + * @{ + */ + +#ifndef HAL_PWM_LLD_H_ +#define HAL_PWM_LLD_H_ + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Number of PWM channels per PWM driver. + */ +#if NRF5_PWM_USE_GPIOTE_PPI +#define PWM_CHANNELS 2 +#else +#define PWM_CHANNELS 3 +#endif + +#define PWM_FREQUENCY_16MHZ 16000000 /** @brief 16MHz */ +#define PWM_FREQUENCY_8MHZ 8000000 /** @brief 8MHz */ +#define PWM_FREQUENCY_4MHZ 4000000 /** @brief 4MHz */ +#define PWM_FREQUENCY_2MHZ 2000000 /** @brief 2MHz */ +#define PWM_FREQUENCY_1MHZ 1000000 /** @brief 1MHz */ +#define PWM_FREQUENCY_500KHZ 500000 /** @brief 500kHz */ +#define PWM_FREQUENCY_250KHZ 250000 /** @brief 250kHz */ +#define PWM_FREQUENCY_125KHZ 125000 /** @brief 125kHz */ +#define PWM_FREQUENCY_62500HZ 62500 /** @brief 62500Hz */ +#define PWM_FREQUENCY_31250HZ 31250 /** @brief 31250Hz */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** + * @brief TIMER0 as driver implementation + */ +#if !defined(NRF5_PWM_USE_TIMER0) +#define NRF5_PWM_USE_TIMER0 FALSE +#endif + +/** + * @brief TIMER1 as driver implementation + */ +#if !defined(NRF5_PWM_USE_TIMER1) +#define NRF5_PWM_USE_TIMER1 FALSE +#endif + +/** + * @brief TIMER2 as driver implementation + */ +#if !defined(NRF5_PWM_USE_TIMER2) +#define NRF5_PWM_USE_TIMER2 FALSE +#endif + +/** + * @brief TIMER0 interrupt priority level setting. + */ +#if !defined(NRF5_PWM_TIMER0_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_PWM_TIMER0_PRIORITY 3 +#endif + +/** + * @brief TIMER1 interrupt priority level setting. + */ +#if !defined(NRF5_PWM_TIMER1_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_PWM_TIMER1_PRIORITY 3 +#endif + +/** + * @brief TIMER2 interrupt priority level setting. + */ +#if !defined(NRF5_PWM_TIMER2_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_PWM_TIMER2_PRIORITY 3 +#endif + +/** + * @brief Allow driver to use GPIOTE/PPI to control PAL line + */ +#if !defined(NRF5_PWM_USE_GPIOTE_PPI) +#define NRF5_PWM_USE_GPIOTE_PPI TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/* Configuration checks. */ +/*===========================================================================*/ + +#if !NRF5_PWM_USE_TIMER0 && !NRF5_PWM_USE_TIMER1 && !NRF5_PWM_USE_TIMER2 +#error "PWM driver activated but no TIMER peripheral assigned" +#endif + +#if (NRF5_ST_USE_TIMER0 == TRUE) && (NRF5_PWM_USE_TIMER0 == TRUE) +#error "TIMER0 used for ST and PWM" +#endif + +#if NRF5_PWM_USE_TIMER0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER0_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER0" +#endif + +#if NRF5_PWM_USE_TIMER1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER1_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER1" +#endif + +#if NRF5_PWM_USE_TIMER2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER2_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER2" +#endif + + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a PWM mode. + */ +typedef uint32_t pwmmode_t; + +/** + * @brief Type of a PWM channel. + */ +typedef uint8_t pwmchannel_t; + +/** + * @brief Type of a channels mask. + */ +typedef uint32_t pwmchnmsk_t; + +/** + * @brief Type of a PWM counter. + */ +typedef uint16_t pwmcnt_t; + +/** + * @brief Type of a PWM driver channel configuration structure. + */ +typedef struct { + /** + * @brief Channel active logic level. + */ + pwmmode_t mode; + + /** + * @brief Channel callback pointer. + * @note This callback is invoked on the channel compare event. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /* End of the mandatory fields.*/ + +#if NRF5_PWM_USE_GPIOTE_PPI || defined(__DOXYGEN__) + /** + * @brief PAL line to toggle. + * @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW. + * @note When NRF5_PWM_USE_GPIOTE_PPI is used and channel enabled, + * it wont be possible to access this PAL line using the PAL + * driver. + */ + ioline_t ioline; + + /** + * @brief Unique GPIOTE channel to use. (1 channel) + * @note Only 4 GPIOTE channels are available on nRF51. + */ + uint8_t gpiote_channel; + + /** + * @brief Unique PPI channels to use. (2 channels) + * @note Only 16 PPI channels are available on nRF51 + * (When Softdevice is enabled, only channels 0-7 are available) + */ + uint8_t ppi_channel[2]; +#endif +} PWMChannelConfig; + +/** + * @brief Type of a PWM driver configuration structure. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + uint32_t frequency; + /** + * @brief PWM period in ticks. + * @note The low level can use assertions in order to catch invalid + * period specifications. + */ + pwmcnt_t period; + /** + * @brief Periodic callback pointer. + * @note This callback is invoked on PWM counter reset. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /** + * @brief Channels configurations. + */ + PWMChannelConfig channels[PWM_CHANNELS]; + /* End of the mandatory fields.*/ +} PWMConfig; + +/** + * @brief Structure representing a PWM driver. + */ +struct PWMDriver { + /** + * @brief Driver state. + */ + pwmstate_t state; + /** + * @brief Current driver configuration data. + */ + const PWMConfig *config; + /** + * @brief Current PWM period in ticks. + */ + pwmcnt_t period; + /** + * @brief Mask of the enabled channels. + */ + pwmchnmsk_t enabled; + /** + * @brief Number of channels in this instance. + */ + pwmchannel_t channels; +#if defined(PWM_DRIVER_EXT_FIELDS) + PWM_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the TIMER registers block. + */ + NRF_TIMER_Type *timer; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the period the PWM peripheral. + * @details This function changes the period of a PWM unit that has already + * been activated using @p pwmStart(). + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The PWM unit period is changed to the new value. + * @note The function has effect at the next cycle start. + * @note If a period is specified that is shorter than the pulse width + * programmed in one of the channels then the behavior is not + * guaranteed. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] period new cycle time in ticks + * + * @notapi + */ +#define pwm_lld_change_period(pwmp, period) \ + do { \ + (pwmp)->timer->CC[(pwmp)->channels] = ((period) - 1); \ + } while(0) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_PWM_USE_TIMER0 || defined(__DOXYGEN__) +extern PWMDriver PWMD1; +#endif +#if NRF5_PWM_USE_TIMER1 || defined(__DOXYGEN__) +extern PWMDriver PWMD2; +#endif +#if NRF5_PWM_USE_TIMER2 || defined(__DOXYGEN__) +extern PWMDriver PWMD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void pwm_lld_init(void); + void pwm_lld_start(PWMDriver *pwmp); + void pwm_lld_stop(PWMDriver *pwmp); + void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width); + void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); + void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); + void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PWM */ + +#endif /* HAL_PWM_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c b/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c new file mode 100644 index 0000000..f0c24c9 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c @@ -0,0 +1,300 @@ +/* + ChibiOS - Copyright (C) 2016..2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file QDECv1/hal_qei_lld.c + * @brief NRF5 QEI subsystem low level driver. + * + * @addtogroup QEI + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__) + + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief QEID1 driver identifier. + */ +#if NRF5_QEI_USE_QDEC0 || defined(__DOXYGEN__) +QEIDriver QEID1; +#endif + + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Common IRQ handler. + * + * @param[in] qeip pointer to an QEIDriver + */ +static void serve_interrupt(QEIDriver *qeip) { + NRF_QDEC_Type *qdec = qeip->qdec; + +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + /* Accumulator overflowed + */ + if (qdec->EVENTS_ACCOF) { + qdec->EVENTS_ACCOF = 0; +#if CORTEX_MODEL >= 4 + (void)qdec->EVENTS_ACCOF; +#endif + + qeip->overflowed++; + if (qeip->config->overflowed_cb) + qeip->config->overflowed_cb(qeip); + } +#endif + + /* Report ready + */ + if (qdec->EVENTS_REPORTRDY) { + qdec->EVENTS_REPORTRDY = 0; +#if CORTEX_MODEL >= 4 + (void)qdec->EVENTS_REPORTRDY; +#endif + + /* Read (and clear counters due to shortcut) */ + int16_t acc = ( int16_t)qdec->ACCREAD; + uint16_t accdbl = (uint16_t)qdec->ACCDBLREAD; + + /* Inverse direction if requested */ + if (qeip->config->dirinv) + acc = -acc; // acc is [-1024..+1023], its okay on int16_t + + /* Adjust counter */ + qeiAdjustI(qeip, acc); + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_QEI_USE_QDEC0 == TRUE +/** + * @brief Quadrature decoder vector (QDEC) + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector88) { + + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&QEID1); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level QEI driver initialization. + * + * @notapi + */ +void qei_lld_init(void) { + +#if NRF5_QEI_USE_QDEC0 == TRUE + /* Driver initialization.*/ + qeiObjectInit(&QEID1); + QEID1.qdec = NRF_QDEC; +#endif +} + +/** + * @brief Configures and activates the QEI peripheral. + * + * @param[in] qeip pointer to the @p QEIDriver object + * + * @notapi + */ +void qei_lld_start(QEIDriver *qeip) { + NRF_QDEC_Type *qdec = qeip->qdec; + const QEIConfig *cfg = qeip->config; + + if (qeip->state == QEI_STOP) { + /* Set Pins */ + palSetLineMode(cfg->phase_a, PAL_MODE_INPUT); + palSetLineMode(cfg->phase_b, PAL_MODE_INPUT); +#if NRF5_QEI_USE_LED == TRUE + if (cfg->led != PAL_NOLINE) { + palSetLineMode(cfg->led, PAL_MODE_INPUT); + } +#endif + + /* Set interrupt masks and enable interrupt */ +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + qdec->INTENSET = QDEC_INTENSET_REPORTRDY_Msk | + QDEC_INTENSET_ACCOF_Msk; +#else + qdec->INTENSET = QDEC_INTENSET_REPORTRDY_Msk; +#endif +#if NRF5_QEI_USE_QDEC0 == TRUE + if (&QEID1 == qeip) { + nvicEnableVector(QDEC_IRQn, NRF5_QEI_QDEC0_IRQ_PRIORITY); + } +#endif + + /* Select pin for Phase A and Phase B */ +#if NRF_SERIES == 51 + qdec->PSELA = PAL_PAD(cfg->phase_a); + qdec->PSELB = PAL_PAD(cfg->phase_b); +#else + qdec->PSEL.A = PAL_PAD(cfg->phase_a); + qdec->PSEL.B = PAL_PAD(cfg->phase_b); +#endif + /* Select (optional) pin for LED, and configure it */ +#if NRF5_QEI_USE_LED == TRUE +#if NRF_SERIES == 51 + qdec->PSELLED = PAL_PAD(cfg->led); +#else + qdec->PSEL.LED = PAL_PAD(cfg->led); +#endif + qdec->LEDPOL = ((cfg->led_polarity == QEI_LED_POLARITY_LOW) + ? QDEC_LEDPOL_LEDPOL_ActiveLow + : QDEC_LEDPOL_LEDPOL_ActiveHigh) + << QDEC_LEDPOL_LEDPOL_Pos; + qdec->LEDPRE = cfg->led_warming; +#else +#if NRF_SERIES == 51 + qdec->PSELLED = (uint32_t)-1; +#else + qdec->PSEL.LED = (uint32_t)-1; +#endif +#endif + + /* Set sampling resolution and debouncing */ + qdec->SAMPLEPER = cfg->resolution; + qdec->DBFEN = (cfg->debouncing ? QDEC_DBFEN_DBFEN_Enabled + : QDEC_DBFEN_DBFEN_Disabled) + << QDEC_DBFEN_DBFEN_Pos; + + /* Define minimum sampling before reporting + and create shortcut to clear accumulation */ + qdec->REPORTPER = cfg->report; + qdec->SHORTS = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk; + + /* Enable peripheric */ + qdec->ENABLE = 1; + } + + /* Initially state is stopped, events cleared */ + qdec->TASKS_STOP = 1; + qdec->EVENTS_SAMPLERDY = 0; + qdec->EVENTS_REPORTRDY = 0; + qdec->EVENTS_ACCOF = 0; +#if CORTEX_MODEL >= 4 + (void)qdec->EVENTS_SAMPLERDY; + (void)qdec->EVENTS_REPORTRDY; + (void)qdec->EVENTS_ACCOF; +#endif +} + +/** + * @brief Deactivates the QEI peripheral. + * + * @param[in] qeip pointer to the @p QEIDriver object + * + * @notapi + */ +void qei_lld_stop(QEIDriver *qeip) { + + NRF_QDEC_Type *qdec = qeip->qdec; + const QEIConfig *cfg = qeip->config; + + if (qeip->state == QEI_READY) { + qdec->TASKS_STOP = 1; + qdec->ENABLE = 0; + + /* Unset interrupt masks and disable interrupt */ +#if NRF5_QEI_USE_QDEC0 == TRUE + if (&QEID1 == qeip) { + nvicDisableVector(QDEC_IRQn); + } +#endif +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + qdec->INTENCLR = QDEC_INTENCLR_REPORTRDY_Msk | + QDEC_INTENCLR_ACCOF_Msk; +#else + qdec->INTENCLR = QDEC_INTENCLR_REPORTRDY_Msk; +#endif + + /* Return pins to reset state */ + palSetLineMode(cfg->phase_a, PAL_MODE_RESET); + palSetLineMode(cfg->phase_b, PAL_MODE_RESET); +#if NRF5_QEI_USE_LED == TRUE + if (cfg->led != PAL_NOLINE) { + palSetLineMode(cfg->led, PAL_MODE_RESET); + } +#endif + } +} + +/** + * @brief Enables the input capture. + * + * @param[in] qeip pointer to the @p QEIDriver object + * + * @notapi + */ +void qei_lld_enable(QEIDriver *qeip) { +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + qeip->overflowed = 0; +#endif + + qeip->qdec->EVENTS_SAMPLERDY = 0; + qeip->qdec->EVENTS_REPORTRDY = 0; + qeip->qdec->EVENTS_ACCOF = 0; +#if CORTEX_MODEL >= 4 + (void)qeip->qdec->EVENTS_SAMPLERDY; + (void)qeip->qdec->EVENTS_REPORTRDY; + (void)qeip->qdec->EVENTS_ACCOF; +#endif + qeip->qdec->TASKS_START = 1; +} + +/** + * @brief Disables the input capture. + * + * @param[in] qeip pointer to the @p QEIDriver object + * + * @notapi + */ +void qei_lld_disable(QEIDriver *qeip) { + qeip->qdec->TASKS_STOP = 1; +} + + +#endif /* HAL_USE_QEI */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.h b/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.h new file mode 100644 index 0000000..f4db11e --- /dev/null +++ b/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.h @@ -0,0 +1,390 @@ +/* + ChibiOS - Copyright (C) 2016..2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file QDECv1/hal_qei_lld.h + * @brief NRF5 QEI subsystem low level driver header. + * + * @note Not tested with LED pin + * + * @note Pins are configured as input with no pull. + * + * @addtogroup QEI + * @{ + */ + +#ifndef HAL_QEI_LLD_H +#define HAL_QEI_LLD_H + +#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief For LED active on LOW + */ +#define QEI_LED_POLARITY_LOW 0 + +/** + * @brief For LED active on HIGH + */ +#define QEI_LED_POLARITY_HIGH 1 + +/** + * @brief Mininum usable value for defining counter underflow + */ +#define QEI_COUNT_MIN (-2147483648) + +/** + * @brief Maximum usable value for defining counter overflow + */ +#define QEI_COUNT_MAX ( 2147483647) + + + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief LED control enable switch. + * @details If set to @p TRUE the support for LED control + * is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_QEI_USE_LED) || defined(__DOXYGEN__) +#define NRF5_QEI_USE_LED FALSE +#endif + +/** + * @brief Accumulator overflow notification enable switch. + * @details If set to @p TRUE the support for accumulator overflow + * is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_QEI_USE_ACC_OVERFLOWED_CB) || defined(__DOXYGEN__) +#define NRF5_QEI_USE_ACC_OVERFLOWED_CB FALSE +#endif + +/** + * @brief QEID1 driver enable switch. + * @details If set to @p TRUE the support for QEID1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_QEI_USE_QDEC0) || defined(__DOXYGEN__) +#define NRF5_QEI_USE_QDEC0 FALSE +#endif + +/** + * @brief QEID interrupt priority level setting for QDEC0. + */ +#if !defined(NRF5_QEI_QDEC0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_QEI_QDEC0_IRQ_PRIORITY 2 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if NRF5_QEI_USE_QDEC0 == FALSE +#error "Requesting QEI driver, but no QDEC peripheric attached" +#endif + +#if NRF5_QEI_USE_QDEC0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_QEI_QDEC0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to QDEC0" +#endif + + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief QEI count mode. + */ +typedef enum { + QEI_MODE_QUADRATURE = 0, /**< Quadrature encoder mode. */ +} qeimode_t; + +/** + * @brief QEI resolution. + */ +typedef enum { + QEI_RESOLUTION_128us = 0x00UL, /**< 128us sample period. */ + QEI_RESOLUTION_256us = 0x01UL, /**< 256us sample period. */ + QEI_RESOLUTION_512us = 0x02UL, /**< 512us sample period. */ + QEI_RESOLUTION_1024us = 0x03UL, /**< 1024us sample period. */ + QEI_RESOLUTION_2048us = 0x04UL, /**< 2048us sample period. */ + QEI_RESOLUTION_4096us = 0x05UL, /**< 4096us sample period. */ + QEI_RESOLUTION_8192us = 0x06UL, /**< 8192us sample period. */ + QEI_RESOLUTION_16384us = 0x07UL, /**< 16384us sample period. */ +} qeiresolution_t; + +/** + * @brief Clusters of samples. + */ +typedef enum { + QEI_REPORT_10 = 0x00UL, /**< 10 samples per report. */ + QEI_REPORT_40 = 0x01UL, /**< 40 samples per report. */ + QEI_REPORT_80 = 0x02UL, /**< 80 samples per report. */ + QEI_REPORT_120 = 0x03UL, /**< 120 samples per report. */ + QEI_REPORT_160 = 0x04UL, /**< 160 samples per report. */ + QEI_REPORT_200 = 0x05UL, /**< 200 samples per report. */ + QEI_REPORT_240 = 0x06UL, /**< 240 samples per report. */ + QEI_REPORT_280 = 0x07UL, /**< 280 samples per report. */ +} qeireport_t; + +/** + * @brief QEI direction inversion. + */ +typedef enum { + QEI_DIRINV_FALSE = 0, /**< Do not invert counter direction. */ + QEI_DIRINV_TRUE = 1, /**< Invert counter direction. */ +} qeidirinv_t; + +/** + * @brief QEI counter type. + */ +typedef int16_t qeicnt_t; + +/** + * @brief QEI delta type. + */ +typedef int16_t qeidelta_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Count mode. + */ + qeimode_t mode; + /** + * @brief Resolution. + */ + qeiresolution_t resolution; + /** + * @brief Direction inversion. + */ + qeidirinv_t dirinv; + /** + * @brief Handling of counter overflow/underflow + * + * @details When overflow occurs, the counter value is updated + * according to: + * - QEI_OVERFLOW_DISCARD: + * discard the update value, counter doesn't change + * - QEI_OVERFLOW_MINMAX + * counter will be updated to reach min or max + * - QEI_OVERFLOW_WRAP: + * counter value will wrap around + */ + qeioverflow_t overflow; + /** + * @brief Min count value. + * + * @note If min == max, then QEI_COUNT_MIN is used. + */ + qeicnt_t min; + /** + * @brief Max count value. + * + * @note If min == max, then QEI_COUNT_MAX is used. + */ + qeicnt_t max; + /** + * @brief Notify of value change + * + * @note Called from ISR context. + */ + qeicallback_t notify_cb; + /** + * @brief Notify of overflow + * + * @note Overflow notification is performed after + * value changed notification. + * @note Called from ISR context. + */ + void (*overflow_cb)(QEIDriver *qeip, qeidelta_t delta); + /* End of the mandatory fields.*/ + /** + * @brief Line for reading Phase A + */ + ioline_t phase_a; + /** + * @brief Line for reading Phase B + */ + ioline_t phase_b; +#if (NRF5_QEI_USE_LED == TRUE) || defined(__DOXYGEN__) + /** + * @brief Line used to control LED + * + * @note If LED is not controlled by MCU, you need to use the + * PAL_NOLINE value. + */ + ioline_t led; + /** + * @brief Period in µs the LED is switched on prior to sampling. + * + * @details LED warming is expressed in micro-seconds and value + * is [0..511] + * + * @note 31µs is the recommanded default. + * + * @note If debouncing is activated, LED is always on for the + * whole sampling period (aka: resolution) + */ + uint16_t led_warming; + /** + * @brief LED polarity to used (when LED is controlled by MCU) + */ + uint8_t led_polarity; +#endif + /** + * @brief Activate debouncing filter + * + * @note If LED is controlled by MCU, the led_warming is ignored and, + * LED is always on for the whole sampling period (aka: resolution) + */ + bool debouncing; + /** + * @brief Number of samples per report + * + * @details Default to QEI_REPORT_10 + */ + qeireport_t report; +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + /** + * @brief Notify of internal accumulator overflowed + * (ie: MCU discarding samples) + * + * @note Called from ISR context. + */ + qeicallback_t overflowed_cb; +#endif +} QEIConfig; + +/** + * @brief Structure representing an QEI driver. + */ +struct QEIDriver { + /** + * @brief Driver state. + */ + qeistate_t state; + /** + * @brief Last count value. + */ + qeicnt_t last; + /** + * @brief Current configuration data. + */ + const QEIConfig *config; +#if defined(QEI_DRIVER_EXT_FIELDS) + QEI_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Counter + */ + qeicnt_t count; +#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE + /** + * @brief Number of time the MCU discarded updates due to + * accumulator overflow + */ + uint32_t overflowed; +#endif + /** + * @brief Pointer to the QDECx registers block. + */ + NRF_QDEC_Type *qdec; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Returns the counter value. + * + * @param[in] qeip pointer to the @p QEIDriver object + * @return The current counter value. + * + * @notapi + */ +#define qei_lld_get_count(qeip) ((qeip)->count) + + +/** + * @brief Set the counter value. + * + * @param[in] qeip pointer to the @p QEIDriver object + * @param[in] value counter value + * + * @notapi + */ +#define qei_lld_set_count(qeip, value) \ + if ((qeip)->count != ((qeicnt_t)value)) { \ + (qeip)->count = value; \ + if ((qeip)->config->notify_cb) \ + (qeip)->config->notify_cb(qeip); \ + } while(0) + + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_QEI_USE_QDEC0 && !defined(__DOXYGEN__) +extern QEIDriver QEID1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void qei_lld_init(void); + void qei_lld_start(QEIDriver *qeip); + void qei_lld_stop(QEIDriver *qeip); + void qei_lld_enable(QEIDriver *qeip); + void qei_lld_disable(QEIDriver *qeip); + qeidelta_t qei_lld_adjust_count(QEIDriver *qeip, qeidelta_t delta); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* To be moved in hal_qei */ +/*===========================================================================*/ + +void qeiSetCount(QEIDriver *qeip, qeicnt_t value); +qeidelta_t qeiAdjust(QEIDriver *qeip, qeidelta_t delta); + +#endif /* HAL_USE_QEI */ + +#endif /* HAL_QEI_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c b/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c new file mode 100644 index 0000000..bf9382c --- /dev/null +++ b/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c @@ -0,0 +1,169 @@ +/* + RNG for ChibiOS - Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file RNGv1/hal_rng_lld.c + * @brief NRF5 RNG subsystem low level driver source. + * + * @addtogroup RNG + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_RNG == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/** + * @brief RNG default configuration. + */ +static const RNGConfig default_config = { + .digital_error_correction = 1, +}; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief RNGD1 driver identifier.*/ +#if NRF5_RNG_USE_RNG0 || defined(__DOXYGEN__) +RNGDriver RNGD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level RNG driver initialization. + * + * @notapi + */ +void rng_lld_init(void) { + rngObjectInit(&RNGD1); + RNGD1.rng = NRF_RNG; + RNGD1.irq = RNG_IRQn; +} + +/** + * @brief Configures and activates the RNG peripheral. + * + * @param[in] rngp pointer to the @p RNGDriver object + * + * @notapi + */ +void rng_lld_start(RNGDriver *rngp) { + NRF_RNG_Type *rng = rngp->rng; + + /* If not specified, set default configuration */ + if (rngp->config == NULL) + rngp->config = &default_config; + + /* Configure digital error correction */ + if (rngp->config->digital_error_correction) + rng->CONFIG |= RNG_CONFIG_DERCEN_Msk; + else + rng->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; + + /* Clear pending events */ + rng->EVENTS_VALRDY = 0; +#if CORTEX_MODEL >= 4 + (void)rng->EVENTS_VALRDY; +#endif + + /* Set interrupt mask */ + rng->INTENSET = RNG_INTENSET_VALRDY_Msk; + + /* Start */ + rng->TASKS_START = 1; +} + + +/** + * @brief Deactivates the RNG peripheral. + * + * @param[in] rngp pointer to the @p RNGDriver object + * + * @notapi + */ +void rng_lld_stop(RNGDriver *rngp) { + NRF_RNG_Type *rng = rngp->rng; + + /* Stop peripheric */ + rng->TASKS_STOP = 1; +} + + +/** + * @brief Write random bytes; + * + * @param[in] rngp pointer to the @p RNGDriver object + * @param[in] n size of buf in bytes + * @param[in] buf @p buffer location + * + * @notapi + */ +msg_t rng_lld_write(RNGDriver *rngp, uint8_t *buf, size_t n, + systime_t timeout) { + NRF_RNG_Type *rng = rngp->rng; + size_t i; + + for (i = 0 ; i < n ; i++) { + /* Wait for byte ready + * It take about 677µs to generate a new byte, not sure if + * forcing a context switch will be a benefit + */ + while (rng->EVENTS_VALRDY == 0) { + /* Sleep and wakeup on ARM event (interrupt) */ + SCB->SCR |= SCB_SCR_SEVONPEND_Msk; + __SEV(); + __WFE(); + __WFE(); + } + + /* Read byte */ + buf[i] = (char)rng->VALUE; + + /* Mark as read */ + rng->EVENTS_VALRDY = 0; +#if CORTEX_MODEL >= 4 + (void)rng->EVENTS_VALRDY; +#endif + + /* Clear interrupt so we can wake up again */ + nvicClearPending(rngp->irq); + } + return MSG_OK; +} + +#endif /* HAL_USE_RNG */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.h b/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.h new file mode 100644 index 0000000..a74f6ef --- /dev/null +++ b/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.h @@ -0,0 +1,159 @@ +/* + RNG for ChibiOS - Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file RNGv1/hal_rng_lld.h + * @brief NRF5 RNG subsystem low level driver header. + * + * @addtogroup RNG + * @{ + */ + +#ifndef HAL_RNG_LLD_H +#define HAL_RNG_LLD_H + +#if (HAL_USE_RNG == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief RNGD1 driver enable switch. + * @details If set to @p TRUE the support for RNGD1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_RNG_USE_RNG0) || defined(__DOXYGEN__) +#define NRF5_RNG_USE_RNG0 FALSE +#endif + +/** + * @brief RNG interrupt priority level setting for RNG0. + */ +#if !defined(NRF5_RNG_RNG0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_RNG_RNG0_IRQ_PRIORITY 3 +#endif + + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if NRF5_RNG_USE_RNG0 == FALSE +#error "Requesting RNG driver, but no RNG peripheric attached" +#endif + +#if NRF5_RNG_USE_RNG0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_RNG_RNG0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to RNG0" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an RNG driver. + */ +typedef struct RNGDriver RNGDriver; + +/** + * @brief Driver configuration structure. + */ +typedef struct { + /* End of the mandatory fields.*/ + /** + * @brief Activate the digital error correction + * + * @details A digital corrector algorithm is employed to remove any + * bias toward '1' or '0'. Disabling it offers a substantial + * speed advantage, but may result in a statistical distribution + * that is not perfectly uniform. + * + * @note For nRF51, on average, it take 167µs to get a byte without + * digitial error correction and 677µs with, but no garantee + * is made on the necessary time to generate one byte. + */ + uint8_t digital_error_correction:1; +} RNGConfig; + + +/** + * @brief Structure representing an RNG driver. + */ +struct RNGDriver { + /** + * @brief Driver state. + */ + rngstate_t state; + /** + * @brief Current configuration data. + */ + const RNGConfig *config; +#if RNG_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* RNG_USE_MUTUAL_EXCLUSION */ + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the RNGx registers block. + */ + NRF_RNG_Type *rng; + /** + * @brief IRQ number + */ + uint32_t irq; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_RNG_USE_RNG0 && !defined(__DOXYGEN__) +extern RNGDriver RNGD1; +#endif /* NRF5_RNG_USE_RNG0 */ + +#ifdef __cplusplus +extern "C" { +#endif + void rng_lld_init(void); + void rng_lld_start(RNGDriver *rngp); + void rng_lld_stop(RNGDriver *rngp); + msg_t rng_lld_write(RNGDriver *rngp, uint8_t *buf, size_t n, + systime_t timeout); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_RNG */ + +#endif /* HAL_RNG_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c new file mode 100644 index 0000000..95bb9b7 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c @@ -0,0 +1,389 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SPIv1/hal_spi_lld.c + * @brief NRF5 low level SPI driver code. + * + * @addtogroup SPI + * @{ + */ + +#include "hal.h" + +#if HAL_USE_SPI || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +#if NRF5_SPI_USE_SPI0 || defined(__DOXYGEN__) +/** @brief SPI1 driver identifier.*/ +SPIDriver SPID1; +#endif + +#if NRF5_SPI_USE_SPI1 || defined(__DOXYGEN__) +/** @brief SPI2 driver identifier.*/ +SPIDriver SPID2; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Preloads the transmit FIFO. + * + * @param[in] spip pointer to the @p SPIDriver object + */ +static void port_fifo_preload(SPIDriver *spip) { + NRF_SPI_Type *port = spip->port; + + if (spip->txcnt > 0 && spip->txptr != NULL) + port->TXD = *(uint8_t *)spip->txptr++; + else + port->TXD = 0xFF; + spip->txcnt--; +} + +#if defined(__GNUC__) +__attribute__((noinline)) +#endif +/** + * @brief Common IRQ handler. + * + * @param[in] spip pointer to the @p SPIDriver object + */ +static void serve_interrupt(SPIDriver *spip) { + NRF_SPI_Type *port = spip->port; + + // Clear SPI READY event flag + port->EVENTS_READY = 0; +#if CORTEX_MODEL >= 4 + (void)port->EVENTS_READY; +#endif + + if (spip->rxptr != NULL) { + *(uint8_t *)spip->rxptr++ = port->RXD; + } + else { + (void)port->RXD; + if (--spip->rxcnt == 0) { + osalDbgAssert(spip->txcnt == 0, "counter out of synch"); + /* Stops the IRQ sources.*/ + spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); + /* Portable SPI ISR code defined in the high level driver, note, it is + a macro.*/ + _spi_isr_code(spip); + return; + } + } + if (spip->txcnt > 0) { + port_fifo_preload(spip); + } + else { + spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); + /* Portable SPI ISR code defined in the high level driver, note, it is + a macro.*/ + _spi_isr_code(spip); + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_SPI_USE_SPI0 || defined(__DOXYGEN__) +/** + * @brief SPI0 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(Vector4C) { + + CH_IRQ_PROLOGUE(); + serve_interrupt(&SPID1); + CH_IRQ_EPILOGUE(); +} +#endif +#if NRF5_SPI_USE_SPI1 || defined(__DOXYGEN__) +/** + * @brief SPI1 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(Vector50) { + + CH_IRQ_PROLOGUE(); + serve_interrupt(&SPID2); + CH_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level SPI driver initialization. + * + * @notapi + */ +void spi_lld_init(void) { + +#if NRF5_SPI_USE_SPI0 + spiObjectInit(&SPID1); + SPID1.port = NRF_SPI0; +#endif +#if NRF5_SPI_USE_SPI1 + spiObjectInit(&SPID2); + SPID2.port = NRF_SPI1; +#endif +} + +/** + * @brief Configures and activates the SPI peripheral. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_start(SPIDriver *spip) { + uint32_t config; + + if (spip->state == SPI_STOP) { +#if NRF5_SPI_USE_SPI0 + if (&SPID1 == spip) + nvicEnableVector(SPI0_TWI0_IRQn, NRF5_SPI_SPI0_IRQ_PRIORITY); +#endif +#if NRF5_SPI_USE_SPI1 + if (&SPID2 == spip) + nvicEnableVector(SPI1_TWI1_IRQn, NRF5_SPI_SPI1_IRQ_PRIORITY); +#endif + } + + config = spip->config->lsbfirst ? + (SPI_CONFIG_ORDER_LsbFirst << SPI_CONFIG_ORDER_Pos) : + (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos); + + switch (spip->config->mode) { + case 1: + config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); + config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); + break; + case 2: + config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); + config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); + break; + case 3: + config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); + config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); + break; + default: + config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); + config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); + break; + } + + /* Configuration.*/ + spip->port->CONFIG = config; +#if NRF_SERIES == 51 + spip->port->PSELSCK = spip->config->sckpad; + spip->port->PSELMOSI = spip->config->mosipad; + spip->port->PSELMISO = spip->config->misopad; +#else + spip->port->PSEL.SCK = spip->config->sckpad; + spip->port->PSEL.MOSI = spip->config->mosipad; + spip->port->PSEL.MISO = spip->config->misopad; +#endif + spip->port->FREQUENCY = spip->config->freq; + spip->port->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); + + /* clear events flag */ + spip->port->EVENTS_READY = 0; +#if CORTEX_MODEL >= 4 + (void)spip->port->EVENTS_READY; +#endif +} + +/** + * @brief Deactivates the SPI peripheral. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_stop(SPIDriver *spip) { + + if (spip->state != SPI_STOP) { + spip->port->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); + spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); +#if NRF5_SPI_USE_SPI0 + if (&SPID1 == spip) + nvicDisableVector(SPI0_TWI0_IRQn); +#endif +#if NRF5_SPI_USE_SPI1 + if (&SPID2 == spip) + nvicDisableVector(SPI1_TWI1_IRQn); +#endif + } +} + +/** + * @brief Asserts the slave select signal and prepares for transfers. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_select(SPIDriver *spip) { + + palClearPad(IOPORT1, spip->config->sspad); +} + +/** + * @brief Deasserts the slave select signal. + * @details The previously selected peripheral is unselected. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_unselect(SPIDriver *spip) { + + palSetPad(IOPORT1, spip->config->sspad); +} + +/** + * @brief Ignores data on the SPI bus. + * @details This function transmits a series of idle words on the SPI bus and + * ignores the received data. This function can be invoked even + * when a slave select signal has not been yet asserted. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to be ignored + * + * @notapi + */ +void spi_lld_ignore(SPIDriver *spip, size_t n) { + + spip->rxptr = NULL; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; + port_fifo_preload(spip); + spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); +} + +/** + * @brief Exchanges data on the SPI bus. + * @details This asynchronous function starts a simultaneous transmit/receive + * operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to be exchanged + * @param[in] txbuf the pointer to the transmit buffer + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void spi_lld_exchange(SPIDriver *spip, size_t n, + const void *txbuf, void *rxbuf) { + + spip->rxptr = rxbuf; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; + port_fifo_preload(spip); + spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); +} + +/** + * @brief Sends data over the SPI bus. + * @details This asynchronous function starts a transmit operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to send + * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi + */ +void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { + + spip->rxptr = NULL; + spip->txptr = txbuf; + spip->rxcnt = spip->txcnt = n; + port_fifo_preload(spip); + spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); +} + +/** + * @brief Receives data from the SPI bus. + * @details This asynchronous function starts a receive operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to receive + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { + + spip->rxptr = rxbuf; + spip->txptr = NULL; + spip->rxcnt = spip->txcnt = n; + port_fifo_preload(spip); + spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); +} + +/** + * @brief Exchanges one frame using a polled wait. + * @details This synchronous function exchanges one frame using a polled + * synchronization method. This function is useful when exchanging + * small amount of data on high speed channels, usually in this + * situation is much more efficient just wait for completion using + * polling than suspending the thread waiting for an interrupt. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] frame the data frame to send over the SPI bus + * @return The received data frame from the SPI bus. + */ +uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { + + spip->port->TXD = (uint8_t)frame; + while (spip->port->EVENTS_READY == 0) + ; + spip->port->EVENTS_READY = 0; +#if CORTEX_MODEL >= 4 + (void)spip->port->EVENTS_READY; +#endif + return spip->port->RXD; +} + +#endif /* HAL_USE_SPI */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.h new file mode 100644 index 0000000..1c6d858 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.h @@ -0,0 +1,238 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SPIv1/hal_spi_lld.h + * @brief NRF5 low level SPI driver header. + * + * @addtogroup SPI + * @{ + */ + +#ifndef HAL_SPI_LLD_H +#define HAL_SPI_LLD_H + +#if HAL_USE_SPI || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief SPI0 interrupt priority level setting. + */ +#if !defined(NRF5_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_SPI_SPI0_IRQ_PRIORITY 3 +#endif + +/** + * @brief SPI1 interrupt priority level setting. + */ +#if !defined(NRF5_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_SPI_SPI1_IRQ_PRIORITY 3 +#endif + +/** + * @brief Overflow error hook. + * @details The default action is to stop the system. + */ +#if !defined(NRF5_SPI_SPI_ERROR_HOOK) || defined(__DOXYGEN__) +#define NRF5_SPI_SPI_ERROR_HOOK() chSysHalt() +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !NRF5_SPI_USE_SPI0 && !NRF5_SPI_USE_SPI1 +#error "SPI driver activated but no SPI peripheral assigned" +#endif + +#if NRF5_SPI_USE_SPI0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SPI_SPI0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to SPI0" +#endif + +#if NRF5_SPI_USE_SPI1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SPI_SPI1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to SPI1" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an SPI driver. + */ +typedef struct SPIDriver SPIDriver; + +/** + * @brief SPI notification callback type. + * + * @param[in] spip pointer to the @p SPIDriver object triggering the + * callback + */ +typedef void (*spicallback_t)(SPIDriver *spip); + +/** + * @brief SPI frequency + */ +typedef enum { + NRF5_SPI_FREQ_125KBPS = (SPI_FREQUENCY_FREQUENCY_K125 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_250KBPS = (SPI_FREQUENCY_FREQUENCY_K250 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_500KBPS = (SPI_FREQUENCY_FREQUENCY_K500 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_1MBPS = (SPI_FREQUENCY_FREQUENCY_M1 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_2MBPS = (SPI_FREQUENCY_FREQUENCY_M2 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_4MBPS = (SPI_FREQUENCY_FREQUENCY_M4 << SPI_FREQUENCY_FREQUENCY_Pos), + NRF5_SPI_FREQ_8MBPS = (SPI_FREQUENCY_FREQUENCY_M8 << SPI_FREQUENCY_FREQUENCY_Pos), +} spifreq_t; + +/** + * @brief Driver configuration structure. + */ +typedef struct { + /** + * @brief Operation complete callback or @p NULL. + */ + spicallback_t end_cb; + /** + * @brief The frequency of the SPI peripheral + */ + spifreq_t freq; + /** + * @brief The SCK pad + */ + uint16_t sckpad; + /** + * @brief The MOSI pad + */ + uint16_t mosipad; + /** + * @brief The MOSI pad + */ + uint16_t misopad; + /* End of the mandatory fields.*/ + /** + * @brief The chip select line pad number. + */ + uint16_t sspad; + /** + * @brief Shift out least significant bit first + */ + uint8_t lsbfirst; + /** + * @brief SPI mode + */ + uint8_t mode; +} SPIConfig; + +/** + * @brief Structure representing a SPI driver. + */ +struct SPIDriver { + /** + * @brief Driver state. + */ + spistate_t state; + /** + * @brief Current configuration data. + */ + const SPIConfig *config; +#if SPI_USE_WAIT || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif /* SPI_USE_WAIT */ +#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) +#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the bus. + */ + mutex_t mutex; +#elif CH_CFG_USE_SEMAPHORES + semaphore_t semaphore; +#endif +#endif /* SPI_USE_MUTUAL_EXCLUSION */ +#if defined(SPI_DRIVER_EXT_FIELDS) + SPI_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the SPI port. + */ + NRF_SPI_Type *port; + /** + * @brief Number of bytes yet to be received. + */ + uint32_t rxcnt; + /** + * @brief Receive pointer or @p NULL. + */ + void *rxptr; + /** + * @brief Number of bytes yet to be transmitted. + */ + uint32_t txcnt; + /** + * @brief Transmit pointer or @p NULL. + */ + const void *txptr; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_SPI_USE_SPI0 && !defined(__DOXYGEN__) +extern SPIDriver SPID1; +#endif +#if NRF5_SPI_USE_SPI1 && !defined(__DOXYGEN__) +extern SPIDriver SPID2; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void spi_lld_init(void); + void spi_lld_start(SPIDriver *spip); + void spi_lld_stop(SPIDriver *spip); + void spi_lld_select(SPIDriver *spip); + void spi_lld_unselect(SPIDriver *spip); + void spi_lld_ignore(SPIDriver *spip, size_t n); + void spi_lld_exchange(SPIDriver *spip, size_t n, + const void *txbuf, void *rxbuf); + void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); + void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); + uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SPI */ + +#endif /* HAL_SPI_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c b/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c new file mode 100644 index 0000000..aaff432 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c @@ -0,0 +1,361 @@ +/* + ChibiOS - 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TIMERv1/hal_gpt_lld.c + * @brief NRF5 GPT subsystem low level driver source. + * + * @addtogroup GPT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define NRF5_TIMER_PRESCALER_NUM 10 +#define NRF5_TIMER_COMPARE_NUM 4 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief GPTD1 driver identifier. + * @note The driver GPTD1 allocates the complex timer TIM1 when enabled. + */ +#if NRF5_GPT_USE_TIMER0 || defined(__DOXYGEN__) +GPTDriver GPTD1; +#endif + +/** + * @brief GPTD2 driver identifier. + * @note The driver GPTD2 allocates the timer TIM2 when enabled. + */ +#if NRF5_GPT_USE_TIMER1 || defined(__DOXYGEN__) +GPTDriver GPTD2; +#endif + +/** + * @brief GPTD3 driver identifier. + * @note The driver GPTD3 allocates the timer TIM3 when enabled. + */ +#if NRF5_GPT_USE_TIMER2 || defined(__DOXYGEN__) +GPTDriver GPTD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static uint8_t prescaler(uint16_t freq) +{ + uint8_t i; + static const gptfreq_t frequencies[] = { + NRF5_GPT_FREQ_16MHZ, + NRF5_GPT_FREQ_8MHZ, + NRF5_GPT_FREQ_4MHZ, + NRF5_GPT_FREQ_2MHZ, + NRF5_GPT_FREQ_1MHZ, + NRF5_GPT_FREQ_500KHZ, + NRF5_GPT_FREQ_250KHZ, + NRF5_GPT_FREQ_125KHZ, + NRF5_GPT_FREQ_62500HZ, + NRF5_GPT_FREQ_31250HZ, + }; + + for (i = 0; i < NRF5_TIMER_PRESCALER_NUM; i++) + if (freq == frequencies[i]) + return i; + + osalDbgAssert(FALSE, "invalid timer frequency"); + + return 0; +} + +/** + * @brief Shared IRQ handler. + * + * @param[in] gptp pointer to a @p GPTDriver object + */ +static void gpt_lld_serve_interrupt(GPTDriver *gptp) { + + gptp->tim->EVENTS_COMPARE[gptp->cc_int] = 0; +#if CORTEX_MODEL >= 4 + (void)gptp->tim->EVENTS_COMPARE[gptp->cc_int]; +#endif + if (gptp->state == GPT_ONESHOT) + gptp->state = GPT_READY; /* Back in GPT_READY state. */ + gptp->config->callback(gptp); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_GPT_USE_TIMER0 +/** + * @brief TIMER0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD1); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_GPT_USE_TIMER0 */ + +#if NRF5_GPT_USE_TIMER1 +/** + * @brief TIMER1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector64) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD2); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_GPT_USE_TIMER1 */ + +#if NRF5_GPT_USE_TIMER2 +/** + * @brief TIMER2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector68) { + + OSAL_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD3); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_GPT_USE_TIMER2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level GPT driver initialization. + * + * @notapi + */ +void gpt_lld_init(void) { + +#if NRF5_GPT_USE_TIMER0 + /* Driver initialization.*/ + GPTD1.tim = NRF_TIMER0; + gptObjectInit(&GPTD1); +#endif + +#if NRF5_GPT_USE_TIMER1 + /* Driver initialization.*/ + GPTD2.tim = NRF_TIMER1; + gptObjectInit(&GPTD2); +#endif + +#if NRF5_GPT_USE_TIMER2 + /* Driver initialization.*/ + GPTD3.tim = NRF_TIMER2; + gptObjectInit(&GPTD3); +#endif +} + +/** + * @brief Configures and activates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_start(GPTDriver *gptp) { + + NRF_TIMER_Type *tim = gptp->tim; + + if (gptp->state == GPT_STOP) { + osalDbgAssert(gptp->cc_int < NRF5_TIMER_COMPARE_NUM, + "invalid capture/compare index"); + + tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; +#if NRF5_GPT_USE_TIMER0 + if (&GPTD1 == gptp) + nvicEnableVector(TIMER0_IRQn, NRF5_GPT_TIMER0_IRQ_PRIORITY); +#endif +#if NRF5_GPT_USE_TIMER1 + if (&GPTD2 == gptp) + nvicEnableVector(TIMER1_IRQn, NRF5_GPT_TIMER1_IRQ_PRIORITY); +#endif +#if NRF5_GPT_USE_TIMER2 + if (&GPTD3 == gptp) + nvicEnableVector(TIMER2_IRQn, NRF5_GPT_TIMER2_IRQ_PRIORITY); +#endif + } + + /* Prescaler value calculation.*/ + tim->PRESCALER = prescaler(gptp->config->frequency); + + /* Timer configuration.*/ + tim->MODE = TIMER_MODE_MODE_Timer << TIMER_MODE_MODE_Pos; + + switch (gptp->config->resolution) { + + case 8: + tim->BITMODE = TIMER_BITMODE_BITMODE_08Bit << TIMER_BITMODE_BITMODE_Pos; + break; + + case 16: + tim->BITMODE = TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos; + break; + +#if NRF5_GPT_USE_TIMER0 + case 24: + tim->BITMODE = TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos; + break; + + case 32: + tim->BITMODE = TIMER_BITMODE_BITMODE_32Bit << TIMER_BITMODE_BITMODE_Pos; + break; +#endif + + default: + osalDbgAssert(FALSE, "invalid timer resolution"); + break; + }; +} + +/** + * @brief Deactivates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop(GPTDriver *gptp) { + + if (gptp->state == GPT_READY) { + gptp->tim->TASKS_SHUTDOWN = 1; + +#if NRF5_GPT_USE_TIMER0 + if (&GPTD1 == gptp) + nvicDisableVector(TIMER0_IRQn); +#endif +#if NRF5_GPT_USE_TIMER1 + if (&GPTD2 == gptp) + nvicDisableVector(TIMER1_IRQn); +#endif +#if NRF5_GPT_USE_TIMER2 + if (&GPTD3 == gptp) + nvicDisableVector(TIMER2_IRQn); +#endif + gptp->tim->INTENCLR = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; + } +} + +/** + * @brief Starts the timer in continuous mode. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval period in ticks + * + * @notapi + */ +void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { + + NRF_TIMER_Type *tim = gptp->tim; + + tim->TASKS_CLEAR = 1; + tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ + if (gptp->state == GPT_ONESHOT) + gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_STOP_Msk << gptp->cc_int; + else if (gptp->state == GPT_CONTINUOUS) + gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Msk << gptp->cc_int; + tim->TASKS_START = 1; +} + +/** + * @brief Stops the timer. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop_timer(GPTDriver *gptp) { + + gptp->tim->TASKS_STOP = 1; +} + +/** + * @brief Starts the timer in one shot mode and waits for completion. + * @details This function specifically polls the timer waiting for completion + * in order to not have extra delays caused by interrupt servicing, + * this function is only recommended for short delays. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval time interval in ticks + * + * @notapi + */ +void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { + + NRF_TIMER_Type *tim = gptp->tim; + + tim->INTENCLR = (1UL << gptp->cc_int) << TIMER_INTENSET_COMPARE0_Pos; + tim->TASKS_CLEAR = 1; + tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ + tim->TASKS_START = 1; + while (!(tim->INTENSET & (TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int))) + ; + tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; +} + +/** + * @brief Returns the counter value of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * @note The nature of the counter is not defined, it may count upward + * or downward, it could be continuously running or not. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current counter value. + * + * @notapi + */ +gptcnt_t gpt_lld_get_counter(GPTDriver *gptp) { + + gptp->tim->TASKS_CAPTURE[gptp->cc_get] = 1; + return gptp->tim->CC[gptp->cc_get]; +} + +#endif /* HAL_USE_GPT */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.h b/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.h new file mode 100644 index 0000000..d362106 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.h @@ -0,0 +1,264 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TIMERv1/gpt_lld.h + * @brief NRF5 GPT subsystem low level driver header. + * + * @addtogroup GPT + * @{ + */ + +#ifndef HAL_GPT_LLD_H +#define HAL_GPT_LLD_H + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief GPTD1 driver enable switch. + * @details If set to @p TRUE the support for GPTD1 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_GPT_USE_TIMER0) || defined(__DOXYGEN__) +#define NRF5_GPT_USE_TIMER0 FALSE +#endif + +/** + * @brief GPTD2 driver enable switch. + * @details If set to @p TRUE the support for GPTD2 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_GPT_USE_TIMER1) || defined(__DOXYGEN__) +#define NRF5_GPT_USE_TIMER1 FALSE +#endif + +/** + * @brief GPTD3 driver enable switch. + * @details If set to @p TRUE the support for GPTD3 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_GPT_USE_TIMER2) || defined(__DOXYGEN__) +#define NRF5_GPT_USE_TIMER2 FALSE +#endif + +/** + * @brief GPTD1 interrupt priority level setting. + */ +#if !defined(NRF5_GPT_TIMER0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_GPT_TIMER0_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPTD2 interrupt priority level setting. + */ +#if !defined(NRF5_GPT_TIMER1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_GPT_TIMER1_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPTD3 interrupt priority level setting. + */ +#if !defined(NRF5_GPT_TIMER2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_GPT_TIMER2_IRQ_PRIORITY 3 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !NRF5_GPT_USE_TIMER0 && !NRF5_GPT_USE_TIMER1 && \ + !NRF5_GPT_USE_TIMER2 +#error "GPT driver activated but no TIMER peripheral assigned" +#endif + +#if NRF5_GPT_USE_TIMER0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER0" +#endif + +#if NRF5_GPT_USE_TIMER1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER1" +#endif + +#if NRF5_GPT_USE_TIMER2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER2" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief GPT frequency type. + */ +typedef enum { + NRF5_GPT_FREQ_31250HZ = 31250, + NRF5_GPT_FREQ_62500HZ = 62500, + NRF5_GPT_FREQ_125KHZ = 125000, + NRF5_GPT_FREQ_250KHZ = 250000, + NRF5_GPT_FREQ_500KHZ = 500000, + NRF5_GPT_FREQ_1MHZ = 1000000, + NRF5_GPT_FREQ_2MHZ = 2000000, + NRF5_GPT_FREQ_4MHZ = 4000000, + NRF5_GPT_FREQ_8MHZ = 8000000, + NRF5_GPT_FREQ_16MHZ = 16000000, +} gptfreq_t; + +/** + * @brief GPT counter type. + */ +typedef uint32_t gptcnt_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + gptfreq_t frequency; + /** + * @brief Timer callback pointer. + * @note This callback is invoked on GPT counter events. + * @note This callback can be set to @p NULL but in that case the + * one-shot mode cannot be used. + */ + gptcallback_t callback; + /* End of the mandatory fields.*/ + /** + * @brief The timer resolution in bits (8/16/24/32) + * @note The default value of this field is 16 bits + * @note The 24 and 32 bit modes are only valid for TIMER0 + */ + uint8_t resolution; +} GPTConfig; + +/** + * @brief Structure representing a GPT driver. + */ +struct GPTDriver { + /** + * @brief Driver state. + */ + gptstate_t state; + /** + * @brief Current configuration data. + */ + const GPTConfig *config; +#if defined(GPT_DRIVER_EXT_FIELDS) + GPT_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the TIMERx registers block. + */ + NRF_TIMER_Type *tim; + /** + * @brief Index of the TIMERx capture/compare register used for setting the + * interval between compare events. + */ + uint8_t cc_int; + /** + * @brief Index of the TIMERx capture/compare register used for getting the + * current timer counter value. + */ + uint8_t cc_get; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the interval of GPT peripheral. + * @details This function changes the interval of a running GPT unit. + * @pre The GPT unit must be running in continuous mode. + * @post The GPT unit interval is changed to the new value. + * @note The function has effect at the next cycle start. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @param[in] interval new cycle time in timer ticks + * + * @notapi + */ +#define gpt_lld_change_interval(gptp, interval) \ + ((gptp)->tim->CC[(gptp)->cc_int] = (uint32_t)((interval) - 1)) + +/** + * @brief Returns the interval of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current interval. + * + * @notapi + */ +#define gpt_lld_get_interval(gptp) \ + ((gptcnt_t)((gptp)->tim->CC[(gptp)->cc_int]) + 1) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_GPT_USE_TIMER0 && !defined(__DOXYGEN__) +extern GPTDriver GPTD1; +#endif + +#if NRF5_GPT_USE_TIMER1 && !defined(__DOXYGEN__) +extern GPTDriver GPTD2; +#endif + +#if NRF5_GPT_USE_TIMER2 && !defined(__DOXYGEN__) +extern GPTDriver GPTD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void gpt_lld_init(void); + void gpt_lld_start(GPTDriver *gptp); + void gpt_lld_stop(GPTDriver *gptp); + void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period); + void gpt_lld_stop_timer(GPTDriver *gptp); + void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); + gptcnt_t gpt_lld_get_counter(GPTDriver *gptp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_GPT */ + +#endif /* HAL_GPT_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c b/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c new file mode 100644 index 0000000..20aa6e0 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c @@ -0,0 +1,328 @@ +/* + ChibiOS - Copyright (C) 2015 Fabio Utzig + 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TIMERv1/hal_st_lld.c + * @brief NRF5 ST subsystem low level driver source. + * + * @addtogroup ST + * @{ + */ + +#include "hal.h" + +#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) +#if NRF5_ST_USE_RTC0 == TRUE +/** + * @brief System Timer vector (RTC0) + * @details This interrupt is used for system tick in periodic mode + * if selected with NRF5_ST_USE_RTC0 + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector6C) { + + OSAL_IRQ_PROLOGUE(); + + NRF_RTC0->EVENTS_TICK = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_TICK; +#endif + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if NRF5_ST_USE_RTC1 == TRUE +/** + * @brief System Timer vector (RTC1) + * @details This interrupt is used for system tick in periodic mode + * if selected with NRF5_ST_USE_RTC1 + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector84) { + + OSAL_IRQ_PROLOGUE(); + + NRF_RTC1->EVENTS_TICK = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_TICK; +#endif + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if NRF5_ST_USE_TIMER0 == TRUE +/** + * @brief System Timer vector. (TIMER0) + * @details This interrupt is used for system tick in periodic mode + * if selected with NRF5_ST_USE_TIMER0 + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + + OSAL_IRQ_PROLOGUE(); + + /* Clear timer compare event */ + if (NRF_TIMER0->EVENTS_COMPARE[0] != 0) { + NRF_TIMER0->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_TIMER0->EVENTS_COMPARE[0]; +#endif + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + } + + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ + +#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__) +#if NRF5_ST_USE_RTC0 == TRUE +/** + * @brief System Timer vector (RTC0) + * @details This interrupt is used for freerunning mode (tick-less) + * if selected with NRF5_ST_USE_RTC0 + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector6C) { + + OSAL_IRQ_PROLOGUE(); + + if (NRF_RTC0->EVENTS_COMPARE[0]) { + NRF_RTC0->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[0]; +#endif + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + } + +#if OSAL_ST_RESOLUTION == 16 + if (NRF_RTC0->EVENTS_COMPARE[1]) { + NRF_RTC0->EVENTS_COMPARE[1] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[1]; +#endif + NRF_RTC0->TASKS_CLEAR = 1; + } +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if NRF5_ST_USE_RTC1 == TRUE +/** + * @brief System Timer vector (RTC1) + * @details This interrupt is used for freerunning mode (tick-less) + * if selected with NRF5_ST_USE_RTC1 + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector84) { + + OSAL_IRQ_PROLOGUE(); + + if (NRF_RTC1->EVENTS_COMPARE[0]) { + NRF_RTC1->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_COMPARE[0]; +#endif + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + } + +#if OSAL_ST_RESOLUTION == 16 + if (NRF_RTC1->EVENTS_COMPARE[1]) { + NRF_RTC1->EVENTS_COMPARE[1] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_COMPARE[1]; +#endif + NRF_RTC1->TASKS_CLEAR = 1; + } +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ST driver initialization. + * + * @notapi + */ +void st_lld_init(void) { +#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING + +#if NRF5_ST_USE_RTC0 == TRUE + /* Using RTC with prescaler */ + NRF_RTC0->TASKS_STOP = 1; + NRF_RTC0->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; + NRF_RTC0->EVTENCLR = RTC_EVTENSET_COMPARE0_Msk; + NRF_RTC0->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[0]; +#endif + NRF_RTC0->INTENSET = RTC_INTENSET_COMPARE0_Msk; +#if OSAL_ST_RESOLUTION == 16 + NRF_RTC0->CC[1] = 0x10000; /* 2^16 */ + NRF_RTC0->EVENTS_COMPARE[1] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[1]; +#endif + NRF_RTC0->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; + NRF_RTC0->INTENSET = RTC_INTENSET_COMPARE1_Msk; +#endif + NRF_RTC0->TASKS_CLEAR = 1; + + /* Start timer */ + nvicEnableVector(RTC0_IRQn, NRF5_ST_PRIORITY); + NRF_RTC0->TASKS_START = 1; +#endif /* NRF5_ST_USE_RTC0 == TRUE */ + +#if NRF5_ST_USE_RTC1 == TRUE + /* Using RTC with prescaler */ + NRF_RTC1->TASKS_STOP = 1; + NRF_RTC1->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; + NRF_RTC1->EVTENCLR = RTC_EVTENSET_COMPARE0_Msk; + NRF_RTC1->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_COMPARE[0]; +#endif + NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE0_Msk; +#if OSAL_ST_RESOLUTION == 16 + NRF_RTC1->CC[1] = 0x10000; /* 2^16 */ + NRF_RTC1->EVENTS_COMPARE[1] = 0; +#if CORTEX_MODEL >= 4 + NRF_RTC1->EVENTS_COMPARE[1]; +#endif + NRF_RTC1->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; + NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE1_Msk; +#endif + NRF_RTC1->TASKS_CLEAR = 1; + + /* Start timer */ + nvicEnableVector(RTC1_IRQn, NRF5_ST_PRIORITY); + NRF_RTC1->TASKS_START = 1; +#endif /* NRF5_ST_USE_RTC1 == TRUE */ + +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ + +#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC + +#if NRF5_ST_USE_RTC0 == TRUE + /* Using RTC with prescaler */ + NRF_RTC0->TASKS_STOP = 1; + NRF_RTC0->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; + NRF_RTC0->INTENSET = RTC_INTENSET_TICK_Msk; + + /* Start timer */ + nvicEnableVector(RTC0_IRQn, NRF5_ST_PRIORITY); + NRF_RTC0->TASKS_START = 1; +#endif /* NRF5_ST_USE_RTC0 == TRUE */ + +#if NRF5_ST_USE_RTC1 == TRUE + /* Using RTC with prescaler */ + NRF_RTC1->TASKS_STOP = 1; + NRF_RTC1->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; + NRF_RTC1->INTENSET = RTC_INTENSET_TICK_Msk; + + /* Start timer */ + nvicEnableVector(RTC1_IRQn, NRF5_ST_PRIORITY); + NRF_RTC1->TASKS_START = 1; +#endif /* NRF5_ST_USE_RTC1 == TRUE */ + +#if NRF5_ST_USE_TIMER0 == TRUE + NRF_TIMER0->TASKS_CLEAR = 1; + + /* + * Using 32-bit mode with prescaler 1/16 configures this + * timer with a 1MHz clock, reducing power consumption. + */ + NRF_TIMER0->BITMODE = TIMER_BITMODE_BITMODE_32Bit; + NRF_TIMER0->PRESCALER = 4; + + /* + * Configure timer 0 compare capture 0 to generate interrupt + * and clear timer value when event is generated. + */ + NRF_TIMER0->CC[0] = (1000000 / OSAL_ST_FREQUENCY) - 1; + NRF_TIMER0->SHORTS = 1; + NRF_TIMER0->INTENSET = TIMER_INTENSET_COMPARE0_Msk; + + /* Start timer */ + nvicEnableVector(TIMER0_IRQn, NRF5_ST_PRIORITY); + NRF_TIMER0->TASKS_START = 1; +#endif /* NRF5_ST_USE_TIMER0 == TRUE */ + +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ +} + +#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.h b/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.h new file mode 100644 index 0000000..c026d2b --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.h @@ -0,0 +1,285 @@ +/* + ChibiOS - Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TIMERv1/st_lld.h + * @brief NRF5 ST subsystem low level driver header. + * @details This header is designed to be include-able without having to + * include other files from the HAL. + * + * @addtogroup ST + * @{ + */ + +#ifndef HAL_ST_LLD_H +#define HAL_ST_LLD_H + +#include "halconf.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Use RTC0 to generates system ticks + * + * @note Avoid using RTC0, as PPI has pre-programmed channels on it + * that can be used to control RADIO or TIMER0 + */ +#if !defined(NRF5_ST_USE_RTC0) || defined(__DOXYGEN__) +#define NRF5_ST_USE_RTC0 FALSE +#endif + +/** + * @brief Use RTC1 to generates system ticks + */ +#if !defined(NRF5_ST_USE_RTC1) || defined(__DOXYGEN__) +#define NRF5_ST_USE_RTC1 TRUE +#endif + +/** + * @brief Use TIMER0 to generates system ticks + * + * @note Avoid using TIMER0 as it will draw more current + */ +#if !defined(NRF5_ST_USE_TIMER0) || defined(__DOXYGEN__) +#define NRF5_ST_USE_TIMER0 FALSE +#endif + +/** + * @brief ST interrupt priority level setting. + */ +#if !defined(NRF5_ST_PRIORITY) || defined(__DOXYGEN__) +#if !defined(SOFTDEVICE_PRESENT) +#define NRF5_ST_PRIORITY CORTEX_MAX_KERNEL_PRIORITY +#else +#define NRF5_ST_PRIORITY 1 +#endif +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if OSAL_ST_MODE != OSAL_ST_MODE_NONE +#if (NRF5_ST_USE_TIMER0 == TRUE) && (NRF5_GPT_USE_TIMER0 == TRUE) +#error "TIMER0 already used by GPT driver" +#endif + +#if (NRF5_ST_USE_RTC0 == FALSE) && \ + (NRF5_ST_USE_RTC1 == FALSE) && \ + (NRF5_ST_USE_TIMER0 == FALSE) +#error "One clock source is needed, enable one (RTC0, RTC1, or TIMER0)" +#endif + +#if ((NRF5_ST_USE_RTC0 == TRUE ? 1 : 0) + \ + (NRF5_ST_USE_RTC1 == TRUE ? 1 : 0) + \ + (NRF5_ST_USE_TIMER0 == TRUE ? 1 : 0)) > 1 +#error "Only one clock source can be used (RTC0, RTC1, or TIMER0)" +#endif + +#if defined(SOFTDEVICE_PRESENT) +#if NRF5_ST_USE_RTC0 == TRUE +#error "RTC0 cannot be used for system ticks when SOFTDEVICE present" +#endif + +#if NRF5_ST_USE_TIMER0 == TRUE +#error "TIMER0 cannot be used for system ticks when SOFTDEVICE present" +#endif + +#if NRF5_ST_PRIORITY != 1 +#error "ST priority must be 1 when SOFTDEVICE present" +#endif + +#endif /* defined(SOFTDEVICE_PRESENT) */ +#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ + +#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING +#if defined(CH_CFG_ST_TIMEDELTA) && (CH_CFG_ST_TIMEDELTA < 5) +#error "CH_CFG_ST_TIMEDELTA is too low" +#endif +#if NRF5_ST_USE_TIMER0 == TRUE +#error "Freeruning (tick-less) mode not supported with TIMER, use RTC" +#endif +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ + +#if !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ST_PRIORITY) +#error "Invalid IRQ priority assigned to ST driver" +#endif + + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void st_lld_init(void); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Driver inline functions. */ +/*===========================================================================*/ + +/** + * @brief Returns the time counter value. + * + * @return The counter value. + * + * @notapi + */ +static inline systime_t st_lld_get_counter(void) { +#if NRF5_ST_USE_RTC0 == TRUE + return (systime_t)NRF_RTC0->COUNTER; +#endif +#if NRF5_ST_USE_RTC1 == TRUE + return (systime_t)NRF_RTC1->COUNTER; +#endif +#if NRF5_ST_USE_TIMER0 == TRUE + return (systime_t)0; +#endif +} + +/** + * @brief Starts the alarm. + * @note Makes sure that no spurious alarms are triggered after + * this call. + * + * @param[in] abstime the time to be set for the first alarm + * + * @notapi + */ +static inline void st_lld_start_alarm(systime_t abstime) { +#if NRF5_ST_USE_RTC0 == TRUE + NRF_RTC0->CC[0] = abstime; + NRF_RTC0->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[0]; +#endif + NRF_RTC0->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; +#endif +#if NRF5_ST_USE_RTC1 == TRUE + NRF_RTC1->CC[0] = abstime; + NRF_RTC1->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_COMPARE[0]; +#endif + NRF_RTC1->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; +#endif +#if NRF5_ST_USE_TIMER0 == TRUE + (void)abstime; +#endif +} + +/** + * @brief Stops the alarm interrupt. + * + * @notapi + */ +static inline void st_lld_stop_alarm(void) { +#if NRF5_ST_USE_RTC0 == TRUE + NRF_RTC0->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk; + NRF_RTC0->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC0->EVENTS_COMPARE[0]; +#endif +#endif +#if NRF5_ST_USE_RTC1 == TRUE + NRF_RTC1->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk; + NRF_RTC1->EVENTS_COMPARE[0] = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_RTC1->EVENTS_COMPARE[0]; +#endif +#endif +} + +/** + * @brief Sets the alarm time. + * + * @param[in] abstime the time to be set for the next alarm + * + * @notapi + */ +static inline void st_lld_set_alarm(systime_t abstime) { +#if NRF5_ST_USE_RTC0 == TRUE + NRF_RTC0->CC[0] = abstime; +#endif +#if NRF5_ST_USE_RTC1 == TRUE + NRF_RTC1->CC[0] = abstime; +#endif +#if NRF5_ST_USE_TIMER0 == TRUE + (void)abstime; +#endif +} + +/** + * @brief Returns the current alarm time. + * + * @return The currently set alarm time. + * + * @notapi + */ +static inline systime_t st_lld_get_alarm(void) { +#if NRF5_ST_USE_RTC0 == TRUE + return (systime_t)NRF_RTC0->CC[0]; +#endif +#if NRF5_ST_USE_RTC1 == TRUE + return (systime_t)NRF_RTC1->CC[0]; +#endif +#if NRF5_ST_USE_TIMER0 == TRUE + return (systime_t)0; +#endif +} + +/** + * @brief Determines if the alarm is active. + * + * @return The alarm status. + * @retval false if the alarm is not active. + * @retval true is the alarm is active + * + * @notapi + */ +static inline bool st_lld_is_alarm_active(void) { +#if NRF5_ST_USE_RTC0 == TRUE + return NRF_RTC0->EVTEN & RTC_EVTEN_COMPARE0_Msk; +#endif +#if NRF5_ST_USE_RTC1 == TRUE + return NRF_RTC1->EVTEN & RTC_EVTEN_COMPARE0_Msk; +#endif +#if NRF5_ST_USE_TIMER0 == TRUE + return false; +#endif +} + +#endif /* HAL_ST_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c new file mode 100644 index 0000000..9f75906 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c @@ -0,0 +1,467 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TWIv1/hal_i2c_lld.c + * @brief NRF5 I2C subsystem low level driver source. + * + * @addtogroup I2C + * @{ + */ + +#include "osal.h" +#include "hal.h" +#include "nrf_delay.h" + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */ +#define I2C_HIGH(p) do { IOPORT1->OUTSET = (1UL << (p)); } while(0) /*!< Pulls I2C line high */ +#define I2C_LOW(p) do { IOPORT1->OUTCLR = (1UL << (p)); } while(0) /*!< Pulls I2C line low */ +#define I2C_INPUT(p) do { IOPORT1->DIRCLR = (1UL << (p)); } while(0) /*!< Configures I2C pin as input */ +#define I2C_OUTPUT(p) do { IOPORT1->DIRSET = (1UL << (p)); } while(0) /*!< Configures I2C pin as output */ + +#define I2C_PIN_CNF \ + ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ + | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ + | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ + | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) + +#define I2C_PIN_CNF_CLR \ + ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ + | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ + | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ + | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) + +#if NRF5_I2C_USE_I2C0 +#define I2C_IRQ_NUM SPI0_TWI0_IRQn +#define I2C_IRQ_PRI NRF5_I2C_I2C0_IRQ_PRIORITY +#elif NRF5_I2C_USE_I2C1 +#define I2C_IRQ_NUM SPI1_TWI1_IRQn +#define I2C_IRQ_PRI NRF5_I2C_I2C1_IRQ_PRIORITY +#endif + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief I2C0 driver identifier. + */ +#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) +I2CDriver I2CD1; +#endif + +/** + * @brief I2C1 driver identifier. + */ +#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) +I2CDriver I2CD2; +#endif + +uint8_t tx_resume_count; +uint8_t rx_resume_count; +uint8_t stop_count; + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Function for detecting stuck slaves (SDA = 0 and SCL = 1) and tries to clear the bus. + * + * @return + * @retval false Bus is stuck. + * @retval true Bus is clear. + */ +static void i2c_clear_bus(I2CDriver *i2cp) +{ + const I2CConfig *cfg = i2cp->config; + int i; + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + + I2C_HIGH(cfg->sda_pad); + I2C_HIGH(cfg->scl_pad); + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + + nrf_delay_us(4); + + for(i = 0; i < 9; i++) { + if (palReadPad(IOPORT1, cfg->sda_pad)) { + if(i > 0) + break; + else + return; + } + + I2C_LOW(cfg->scl_pad); + nrf_delay_us(4); + I2C_HIGH(cfg->scl_pad); + nrf_delay_us(4); + } + + I2C_LOW(cfg->sda_pad); + nrf_delay_us(4); + I2C_HIGH(cfg->sda_pad); +} + +static inline void i2c_setup_shortcut(I2CDriver *i2cp) +{ + uint32_t rxbytes = i2cp->rxbytes; + uint32_t txbytes = i2cp->txbytes; + + osalDbgAssert(rxbytes + txbytes, "transfer must be greater than zero"); + + if (txbytes > 1 || (!txbytes && rxbytes > 1)) + i2cp->i2c->SHORTS = TWI_SHORTS_BB_SUSPEND_Enabled << TWI_SHORTS_BB_SUSPEND_Pos; + else if (((txbytes == 1) && !rxbytes) || ((rxbytes == 1) && !txbytes)) + i2cp->i2c->SHORTS = TWI_SHORTS_BB_STOP_Enabled << TWI_SHORTS_BB_STOP_Pos; + else + i2cp->i2c->SHORTS = 0; +} + +#if defined(__GNUC__) +__attribute__((noinline)) +#endif +/** + * @brief Common IRQ handler. + * @note Tries hard to clear all the pending interrupt sources, we don't + * want to go through the whole ISR and have another interrupt soon + * after. + * + * @param[in] i2cp pointer to an I2CDriver + */ +static void serve_interrupt(I2CDriver *i2cp) { + + NRF_TWI_Type *i2c = i2cp->i2c; + + if(i2c->EVENTS_TXDSENT) { + + i2c->EVENTS_TXDSENT = 0; +#if CORTEX_MODEL >= 4 + (void)i2c->EVENTS_TXDSENT; +#endif + + if(--i2cp->txbytes) { + + i2c->TXD = *i2cp->txptr++; + i2c_setup_shortcut(i2cp); + i2c->TASKS_RESUME = 1; + tx_resume_count++; + } + else if (i2cp->rxbytes) { + + i2c_setup_shortcut(i2cp); + i2c->TASKS_STARTRX = 1; + } + } + if(i2c->EVENTS_RXDREADY) { + + i2c->EVENTS_RXDREADY = 0; +#if CORTEX_MODEL >= 4 + (void)i2c->EVENTS_RXDREADY; +#endif + + *i2cp->rxptr++ = i2c->RXD; + + if(--i2cp->rxbytes) { + i2c_setup_shortcut(i2cp); + i2c->TASKS_RESUME = 1; + rx_resume_count++; + } + } + if(i2c->EVENTS_ERROR) { + + uint32_t err = i2c->ERRORSRC; + i2c->EVENTS_ERROR = 0; +#if CORTEX_MODEL >= 4 + (void)i2c->EVENTS_ERROR; +#endif + if (err & TWI_ERRORSRC_OVERRUN_Msk) + i2cp->errors |= I2C_OVERRUN; + if (err & (TWI_ERRORSRC_ANACK_Msk | TWI_ERRORSRC_DNACK_Msk)) + i2cp->errors |= I2C_ACK_FAILURE; + + i2c->TASKS_STOP = 1; + _i2c_wakeup_error_isr(i2cp); + } else if(i2c->EVENTS_STOPPED) { + + stop_count++; + i2c->EVENTS_STOPPED = 0; +#if CORTEX_MODEL >= 4 + (void)i2c->EVENTS_STOPPED; +#endif + _i2c_wakeup_isr(i2cp); + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(Vector4C) { + + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&I2CD1); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(Vector50) { + + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&I2CD2); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level I2C driver initialization. + * + * @notapi + */ +void i2c_lld_init(void) { + +#if NRF5_I2C_USE_I2C0 + i2cObjectInit(&I2CD1); + I2CD1.thread = NULL; + I2CD1.i2c = NRF_TWI0; +#endif + +#if NRF5_I2C_USE_I2C1 + i2cObjectInit(&I2CD2); + I2CD2.thread = NULL; + I2CD2.i2c = NRF_TWI1; +#endif + +} + +/** + * @brief Configures and activates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_start(I2CDriver *i2cp) { + + NRF_TWI_Type *i2c = i2cp->i2c; + const I2CConfig *cfg = i2cp->config; + + if (i2cp->state != I2C_STOP) + return; + + i2c_clear_bus(i2cp); + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + + i2c->EVENTS_RXDREADY = 0; + i2c->EVENTS_TXDSENT = 0; +#if CORTEX_MODEL >= 4 + (void)i2c->EVENTS_RXDREADY; + (void)i2c->EVENTS_TXDSENT; +#endif +#if NRF_SERIES == 51 + i2c->PSELSCL = cfg->scl_pad; + i2c->PSELSDA = cfg->sda_pad; +#else + i2c->PSEL.SCL = cfg->scl_pad; + i2c->PSEL.SDA = cfg->sda_pad; +#endif + + switch (cfg->clock) { + case 100000: + i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos; + break; + case 250000: + i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K250 << TWI_FREQUENCY_FREQUENCY_Pos; + break; + case 400000: + i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K400 << TWI_FREQUENCY_FREQUENCY_Pos; + break; + default: + osalDbgAssert(0, "invalid I2C frequency"); + break; + }; + + nvicEnableVector(I2C_IRQ_NUM, I2C_IRQ_PRI); + + i2c->INTENSET = TWI_INTENSET_TXDSENT_Msk | TWI_INTENSET_STOPPED_Msk | + TWI_INTENSET_ERROR_Msk | TWI_INTENSET_RXDREADY_Msk; + + i2c->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos; +} + +/** + * @brief Deactivates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_stop(I2CDriver *i2cp) { + + NRF_TWI_Type *i2c = i2cp->i2c; + const I2CConfig *cfg = i2cp->config; + + if (i2cp->state != I2C_STOP) { + + i2c->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos; + + i2c->INTENCLR = TWI_INTENSET_TXDSENT_Msk | TWI_INTENSET_STOPPED_Msk | + TWI_INTENSET_ERROR_Msk | TWI_INTENSET_RXDREADY_Msk; + + nvicDisableVector(I2C_IRQ_NUM); + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + } +} + +static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + NRF_TWI_Type *i2c = i2cp->i2c; + + (void)timeout; + msg_t msg; + + i2cp->errors = I2C_NO_ERROR; + i2cp->addr = addr; + + i2cp->txptr = txbuf; + i2cp->txbytes = txbytes; + + i2cp->rxptr = rxbuf; + i2cp->rxbytes = rxbytes; + + i2c->ADDRESS = addr; + + tx_resume_count = 0; + rx_resume_count = 0; + stop_count = 0; + + if (i2cp->txbytes) { + + i2c->TXD = *i2cp->txptr++; + i2c_setup_shortcut(i2cp); + i2c->TASKS_STARTTX = 1; + } else if (i2cp->rxbytes) { + + i2c_setup_shortcut(i2cp); + i2c->TASKS_STARTRX = 1; + } else { + + osalDbgAssert(0, "no bytes to transfer"); + } + + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + + if (msg == MSG_TIMEOUT) + i2c->TASKS_STOP = 1; + + return msg; +} + +/** + * @brief Receives data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout); +} + +/** + * @brief Transmits data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[in] txbuf pointer to the transmit buffer + * @param[in] txbytes number of bytes to be transmitted + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout); +} + +#endif /* HAL_USE_I2C */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h new file mode 100644 index 0000000..7a4050b --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h @@ -0,0 +1,232 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file TWIv1/hal_i2c_lld.h + * @brief NRF5 I2C subsystem low level driver header. + * + * @addtogroup I2C + * @{ + */ + +#ifndef HAL_I2C_LLD_H +#define HAL_I2C_LLD_H + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#define STATE_STOP 0x00 +#define STATE_SEND 0x01 +#define STATE_RECV 0x02 +#define STATE_DUMMY 0x03 + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief I2C0 driver enable switch. + * @details If set to @p TRUE the support for I2C0 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_I2C_USE_I2C0) || defined(__DOXYGEN__) +#define NRF5_I2C_USE_I2C0 FALSE +#endif + +/** + * @brief I2C1 driver enable switch. + * @details If set to @p TRUE the support for I2C1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_I2C_USE_I2C1) || defined(__DOXYGEN__) +#define NRF5_I2C_USE_I2C1 FALSE +#endif + +/** + * @brief I2C0 interrupt priority level setting. + */ +#if !defined(NRF5_I2C_I2C0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_I2C_I2C0_IRQ_PRIORITY 3 +#endif + +/** + * @brief I2C1 interrupt priority level setting. + */ +#if !defined(NRF5_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_I2C_I2C1_IRQ_PRIORITY 3 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if NRF5_I2C_USE_I2C0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to I2C0" +#endif + +#if NRF5_I2C_USE_I2C1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to I2C1" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/* @brief Type representing I2C address. */ +typedef uint8_t i2caddr_t; + +/* @brief Type of I2C Driver condition flags. */ +typedef uint32_t i2cflags_t; + +/* @brief Type used to control the ISR state machine. */ +typedef uint8_t intstate_t; + +/** + * @brief Driver configuration structure. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ + +/** + * @brief Driver configuration structure. + */ +typedef struct { + + /* @brief Clock to be used for the I2C bus. */ + uint32_t clock; + /* @brief Pad number for SCL */ + uint8_t scl_pad; + /* @brief Pad number for SDA */ + uint8_t sda_pad; + +} I2CConfig; + +/** + * @brief Type of a structure representing an I2C driver. + */ +typedef struct I2CDriver I2CDriver; + +/** + * @brief Structure representing an I2C driver. + */ +struct I2CDriver { + /** + * @brief Driver state. + */ + i2cstate_t state; + /** + * @brief Current configuration data. + */ + const I2CConfig *config; + /** + * @brief Error flags. + */ + i2cflags_t errors; +#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) +#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the bus. + */ + mutex_t mutex; +#elif CH_CFG_USE_SEMAPHORES + semaphore_t semaphore; +#endif +#endif /* I2C_USE_MUTUAL_EXCLUSION */ +#if defined(I2C_DRIVER_EXT_FIELDS) + I2C_DRIVER_EXT_FIELDS +#endif + /* @brief Thread waiting for I/O completion. */ + thread_reference_t thread; + /* @brief Current slave address without R/W bit. */ + i2caddr_t addr; + + /* End of the mandatory fields.*/ + + /* @brief Pointer to the buffer with data to send. */ + const uint8_t *txptr; + /* @brief Number of bytes of data to send. */ + size_t txbytes; + /* @brief Pointer to the buffer to put received data. */ + uint8_t *rxptr; + /* @brief Number of bytes of data to receive. */ + size_t rxbytes; + /* @brief Tracks current ISR state. */ + intstate_t intstate; + /* @brief Low-level register access. */ + NRF_TWI_Type *i2c; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Get errors from I2C driver. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + +#if NRF5_I2C_USE_I2C0 +extern I2CDriver I2CD1; +#endif + +#if NRF5_I2C_USE_I2C1 +extern I2CDriver I2CD2; +#endif + +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void i2c_lld_init(void); + void i2c_lld_start(I2CDriver *i2cp); + void i2c_lld_stop(I2CDriver *i2cp); + msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); + msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_I2C */ + +#endif /* HAL_I2C_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c b/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c new file mode 100644 index 0000000..76ba0e0 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c @@ -0,0 +1,343 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file UARTv1/hal_serial_lld.c + * @brief NRF5 serial subsystem low level driver source. + * + * @addtogroup SERIAL + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__) + +#if NRF_SERIES == 51 +#include "nrf51.h" +#elif NRF_SERIES == 52 +#include "nrf52.h" +#define UART0_IRQn UARTE0_UART0_IRQn +#endif + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief USART1 serial driver identifier.*/ +#if (NRF5_SERIAL_USE_UART0 == TRUE) || defined(__DOXYGEN__) +SerialDriver SD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Driver default configuration. + */ +static const SerialConfig default_config = { + .speed = 38400, + .tx_pad = NRF5_SERIAL_PAD_DISCONNECTED, + .rx_pad = NRF5_SERIAL_PAD_DISCONNECTED, +#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) + .rts_pad = NRF5_SERIAL_PAD_DISCONNECTED, + .cts_pad = NRF5_SERIAL_PAD_DISCONNECTED, +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/* + * @brief Maps a baudrate speed to a BAUDRATE register value. + */ + +/** + * @brief Common UART configuration. + * + */ +static void configure_uart(const SerialConfig *config) +{ + uint32_t speed = UART_BAUDRATE_BAUDRATE_Baud250000; + + switch (config->speed) { + case 1200: speed = UART_BAUDRATE_BAUDRATE_Baud1200; break; + case 2400: speed = UART_BAUDRATE_BAUDRATE_Baud2400; break; + case 4800: speed = UART_BAUDRATE_BAUDRATE_Baud4800; break; + case 9600: speed = UART_BAUDRATE_BAUDRATE_Baud9600; break; + case 14400: speed = UART_BAUDRATE_BAUDRATE_Baud14400; break; + case 19200: speed = UART_BAUDRATE_BAUDRATE_Baud19200; break; + case 28800: speed = UART_BAUDRATE_BAUDRATE_Baud28800; break; + case 38400: speed = UART_BAUDRATE_BAUDRATE_Baud38400; break; + case 57600: speed = UART_BAUDRATE_BAUDRATE_Baud57600; break; + case 76800: speed = UART_BAUDRATE_BAUDRATE_Baud76800; break; + case 115200: speed = UART_BAUDRATE_BAUDRATE_Baud115200; break; + case 230400: speed = UART_BAUDRATE_BAUDRATE_Baud230400; break; + case 250000: speed = UART_BAUDRATE_BAUDRATE_Baud250000; break; + case 460800: speed = UART_BAUDRATE_BAUDRATE_Baud460800; break; + case 921600: speed = UART_BAUDRATE_BAUDRATE_Baud921600; break; + case 1000000: speed = UART_BAUDRATE_BAUDRATE_Baud1M; break; + default: osalDbgAssert(0, "invalid baudrate"); break; + }; + + /* Configure PINs mode */ + if (config->tx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { + palSetPadMode(IOPORT1, config->tx_pad, PAL_MODE_OUTPUT_PUSHPULL); + } + if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { + palSetPadMode(IOPORT1, config->rx_pad, PAL_MODE_INPUT); + } +#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) + if (config->rts_pad != NRF5_SERIAL_PAD_DISCONNECTED) { + palSetPadMode(IOPORT1, config->rts_pad, PAL_MODE_OUTPUT_PUSHPULL); + } + if (config->cts_pad != NRF5_SERIAL_PAD_DISCONNECTED) { + palSetPadMode(IOPORT1, config->cts_pad, PAL_MODE_INPUT); + } +#endif + + /* Select PINs used by UART */ + NRF_UART0->PSELTXD = config->tx_pad; + NRF_UART0->PSELRXD = config->rx_pad; +#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) + NRF_UART0->PSELRTS = config->rts_pad; + NRF_UART0->PSELCTS = config->cts_pad; +#else + NRF_UART0->PSELRTS = NRF5_SERIAL_PAD_DISCONNECTED; + NRF_UART0->PSELCTS = NRF5_SERIAL_PAD_DISCONNECTED; +#endif + + /* Set baud rate */ + NRF_UART0->BAUDRATE = speed; + + /* Set config */ + NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos); + + /* Adjust flow control */ +#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) + if ((config->rts_pad < TOTAL_GPIO_PADS) || + (config->cts_pad < TOTAL_GPIO_PADS)) { + NRF_UART0->CONFIG |= UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos; + } else { + NRF_UART0->CONFIG &= ~(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); + } +#else + NRF_UART0->CONFIG &= ~(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); +#endif + + /* Enable UART and clear events */ + NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled; + NRF_UART0->EVENTS_RXDRDY = 0; + NRF_UART0->EVENTS_TXDRDY = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_UART0->EVENTS_RXDRDY; + (void)NRF_UART0->EVENTS_TXDRDY; +#endif + + if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { + while (NRF_UART0->EVENTS_RXDRDY != 0) { + (void)NRF_UART0->RXD; + } + } +} + + +/** + * @brief Driver output notification. + */ +#if NRF5_SERIAL_USE_UART0 || defined(__DOXYGEN__) +static void notify1(io_queue_t *qp) +{ + SerialDriver *sdp = &SD1; + + (void)qp; + + if (NRF_UART0->PSELTXD == NRF5_SERIAL_PAD_DISCONNECTED) + return; + + if (!sdp->tx_busy) { + msg_t b = oqGetI(&sdp->oqueue); + + if (b < Q_OK) { + chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); + NRF_UART0->TASKS_STOPTX = 1; + return; + } + sdp->tx_busy = 1; + NRF_UART0->TASKS_STARTTX = 1; + NRF_UART0->TXD = b; + } +} +#endif + + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_SERIAL_USE_UART0 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(Vector48) { + + OSAL_IRQ_PROLOGUE(); + + SerialDriver *sdp = &SD1; + uint32_t isr = NRF_UART0->INTENSET; + + if ((NRF_UART0->EVENTS_RXDRDY != 0) && (isr & UART_INTENSET_RXDRDY_Msk)) { + // Clear UART RX event flag + NRF_UART0->EVENTS_RXDRDY = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_UART0->EVENTS_RXDRDY; +#endif + + osalSysLockFromISR(); + if (iqIsEmptyI(&sdp->iqueue)) + chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE); + if (iqPutI(&sdp->iqueue, NRF_UART0->RXD) < Q_OK) + chnAddFlagsI(sdp, SD_OVERRUN_ERROR); + osalSysUnlockFromISR(); + } + + if ((NRF_UART0->EVENTS_TXDRDY != 0) && (isr & UART_INTENSET_TXDRDY_Msk)) { + msg_t b; + + // Clear UART TX event flag. + NRF_UART0->EVENTS_TXDRDY = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_UART0->EVENTS_TXDRDY; +#endif + + osalSysLockFromISR(); + b = oqGetI(&sdp->oqueue); + osalSysUnlockFromISR(); + + if (b < Q_OK) { + osalSysLockFromISR(); + chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); + osalSysUnlockFromISR(); + NRF_UART0->TASKS_STOPTX = 1; + sdp->tx_busy = 0; + } else { + sdp->tx_busy = 1; + NRF_UART0->TXD = b; + } + } + + /* TODO: Error handling for EVENTS_ERROR */ + if ((NRF_UART0->EVENTS_ERROR != 0) && (isr & UART_INTENSET_ERROR_Msk)) { + // Clear UART ERROR event flag. + NRF_UART0->EVENTS_ERROR = 0; +#if CORTEX_MODEL >= 4 + (void)NRF_UART0->EVENTS_ERROR; +#endif + } + + + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level serial driver initialization. + * + * @notapi + */ +void sd_lld_init(void) { + +#if NRF5_SERIAL_USE_UART0 == TRUE + sdObjectInit(&SD1, NULL, notify1); +#endif +} + +/** + * @brief Low level serial driver configuration and (re)start. + * + * @param[in] sdp pointer to a @p SerialDriver object + * @param[in] config the architecture-dependent serial driver configuration. + * If this parameter is set to @p NULL then a default + * configuration is used. + * + * @notapi + */ +void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { + + if (config == NULL) + config = &default_config; + + osalDbgAssert( + (config->rx_pad < TOTAL_GPIO_PADS) || (config->tx_pad < TOTAL_GPIO_PADS), + "must configure at least an RX or TX pad"); + + if (sdp->state == SD_STOP) { + +#if NRF5_SERIAL_USE_UART0 == TRUE + if (sdp == &SD1) { + configure_uart(config); + + // Enable UART interrupt + NRF_UART0->INTENCLR = (uint32_t)-1; + NRF_UART0->INTENSET = UART_INTENSET_ERROR_Msk; + if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) + NRF_UART0->INTENSET |= UART_INTENSET_RXDRDY_Msk; + if (config->tx_pad != NRF5_SERIAL_PAD_DISCONNECTED) + NRF_UART0->INTENSET |= UART_INTENSET_TXDRDY_Msk; + + nvicEnableVector(UART0_IRQn, NRF5_SERIAL_UART0_PRIORITY); + + if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) + NRF_UART0->TASKS_STARTRX = 1; + } +#endif + + } +} + +/** + * @brief Low level serial driver stop. + * @details De-initializes the USART, stops the associated clock, resets the + * interrupt vector. + * + * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi + */ +void sd_lld_stop(SerialDriver *sdp) { + + if (sdp->state == SD_READY) { + +#if NRF5_SERIAL_USE_UART0 == TRUE + if (&SD1 == sdp) { + nvicDisableVector(UART0_IRQn); + NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Disabled; + } +#endif + } +} + +#endif /* HAL_USE_SERIAL == TRUE */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.h b/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.h new file mode 100644 index 0000000..9c76777 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.h @@ -0,0 +1,155 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file UARTv1/hal_serial_lld.h + * @brief NRF5 serial subsystem low level driver header. + * + * @addtogroup SERIAL + * @{ + */ + +#ifndef HAL_SERIAL_LLD_H +#define HAL_SERIAL_LLD_H + +#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name PLATFORM configuration options + * @{ + */ +/** + * @brief SD flow control enable switch. + * @details If set to @p TRUE the support for hardware flow control + * is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_SERIAL_USE_HWFLOWCTRL) || defined(__DOXYGEN__) +#define NRF5_SERIAL_USE_HWFLOWCTRL FALSE +#endif + +/** + * @brief SD1 driver enable switch. + * @details If set to @p TRUE the support for SD1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_SERIAL_USE_UART0) || defined(__DOXYGEN__) +#define NRF5_SERIAL_USE_UART0 FALSE +#endif + +/** + * @brief UART0 interrupt priority level setting. + */ +#if !defined(NRF5_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_SERIAL_UART0_PRIORITY 3 +#endif + +/* Value indicating that no pad is connected to this UART register. */ +#define NRF5_SERIAL_PAD_DISCONNECTED 0xFFFFFFFFU +#define NRF5_SERIAL_INVALID_BAUDRATE 0xFFFFFFFFU + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if NRF5_SERIAL_USE_UART0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SERIAL_UART0_PRIORITY) +#error "Invalid IRQ priority assigned to UART0" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief NRF51 Serial Driver configuration structure. + * @details An instance of this structure must be passed to @p sdStart() + * in order to configure and start a serial driver operations. + * @note This structure content is architecture dependent, each driver + * implementation defines its own version and the custom static + * initializers. + */ +typedef struct { + /** + * @brief Bit rate. + */ + uint32_t speed; + /* End of the mandatory fields.*/ + uint32_t tx_pad; + uint32_t rx_pad; +#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) + uint32_t rts_pad; + uint32_t cts_pad; +#endif +} SerialConfig; + +/** + * @brief @p SerialDriver specific data. + */ +#define _serial_driver_data \ + _base_asynchronous_channel_data \ + /* Driver state.*/ \ + sdstate_t state; \ + /* Input queue.*/ \ + input_queue_t iqueue; \ + /* Output queue.*/ \ + output_queue_t oqueue; \ + /* Input circular buffer.*/ \ + uint8_t ib[SERIAL_BUFFERS_SIZE]; \ + /* Output circular buffer.*/ \ + uint8_t ob[SERIAL_BUFFERS_SIZE]; \ + /* 1 if port is busy transmitting, 0 otherwise. */ \ + uint8_t tx_busy; \ + /* End of the mandatory fields.*/ \ + thread_t *thread; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if (NRF5_SERIAL_USE_UART0 == TRUE) && !defined(__DOXYGEN__) +extern SerialDriver SD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void sd_lld_init(void); + void sd_lld_start(SerialDriver *sdp, const SerialConfig *config); + void sd_lld_stop(SerialDriver *sdp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SERIAL == TRUE */ + +#endif /* HAL_SERIAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c b/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c new file mode 100644 index 0000000..7bd2966 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c @@ -0,0 +1,157 @@ +/* + ChibiOS - Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file WDTv1/hal_wdg_lld.c + * @brief NRF5 Watchdog Driver subsystem low level driver source template. + * + * @addtogroup WDG + * @{ + */ + +#include "hal.h" + +#if HAL_USE_WDG || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define RELOAD_REQUEST_VALUE 0x6E524635 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +WDGDriver WDGD1; + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if WDG_USE_TIMEOUT_CALLBACK == TRUE +/** + * @brief Watchdog vector. + * @details This interrupt is used when watchdog timeout. + * + * @note Only 2 cycles at NRF5_LFCLK_FREQUENCY are available + * to they good bye. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector80) { + + OSAL_IRQ_PROLOGUE(); + osalSysLockFromISR(); + + /* Notify */ + if (WDGD1.config->callback) + WDGD1.config->callback(); + + /* Wait for reboot */ + while (1) { /* */ } + + osalSysUnlockFromISR(); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level WDG driver initialization. + * + * @notapi + */ +void wdg_lld_init(void) { + WDGD1.state = WDG_STOP; + WDGD1.wdt = NRF_WDT; +} + +/** + * @brief Configures and activates the WDG peripheral. + * + * @note Once started there is no way out. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @notapi + */ +void wdg_lld_start(WDGDriver *wdgp) { + osalDbgAssert((wdgp->state == WDG_STOP), + "This WDG driver cannot be restarted once activated"); + + /* Generate interrupt on timeout */ +#if WDG_USE_TIMEOUT_CALLBACK == TRUE + wdgp->wdt->INTENSET = WDT_INTENSET_TIMEOUT_Msk; +#endif + + /* When to pause? (halt, sleep) */ + uint32_t config = 0; + if (!wdgp->config->pause_on_sleep) + config |= WDT_CONFIG_SLEEP_Msk; + if (!wdgp->config->pause_on_halt) + config |= WDT_CONFIG_HALT_Msk; + wdgp->wdt->CONFIG = config; + + /* Timeout in milli-seconds */ + uint64_t tout = (NRF5_LFCLK_FREQUENCY * wdgp->config->timeout_ms / 1000) - 1; + osalDbgAssert(tout <= 0xFFFFFFFF, "watchdog timout value exceeded"); + wdgp->wdt->CRV = (uint32_t)tout; + + /* Reload request (using RR0) */ + wdgp->wdt->RREN = WDT_RREN_RR0_Msk; + + /* Say your prayers, little one. */ + wdgp->wdt->TASKS_START = 1; +} + +/** + * @brief Deactivates the WDG peripheral. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @api + */ +void wdg_lld_stop(WDGDriver *wdgp) { + (void)wdgp; + osalDbgAssert(false, "This WDG driver cannot be stopped once activated"); +} + +/** + * @brief Reloads WDG's counter. + * + * @param[in] wdgp pointer to the @p WDGDriver object + * + * @notapi + */ +void wdg_lld_reset(WDGDriver * wdgp) { + wdgp->wdt->RR[0] = RELOAD_REQUEST_VALUE; +} + +#endif /* HAL_USE_WDG */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.h b/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.h new file mode 100644 index 0000000..c478919 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.h @@ -0,0 +1,143 @@ +/* + ChibiOS - Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file WDTv1/hal_wdg_lld.h + * @brief NRF5 Watchdog Driver subsystem low level driver header template. + * + * @addtogroup WDG + * @{ + */ + +#ifndef HAL_WDG_LLD_H +#define HAL_WDG_LLD_H + +#if (HAL_USE_WDG == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#define WDG_MAX_TIMEOUT_MS \ + ((uint32_t)(0xFFFFFFFFu * 1000 / NRF5_LFCLK_FREQUENCY)) + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** + * @brief WDG driver implement timeout callback. + * @note The default is @p FALSE. + */ +#if !defined(WDG_USE_TIMEOUT_CALLBACK) || defined(__DOXYGEN__) +#define WDG_USE_TIMEOUT_CALLBACK FALSE +#endif +/** @} */ + + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an WDG driver. + */ +typedef struct WDGDriver WDGDriver; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + struct { + /** + * @brief Pause watchdog while the CPU is sleeping + */ + uint8_t pause_on_sleep : 1; + /** + * @brief Pause watchdog while the CPU is halted by the debugger + */ + uint8_t pause_on_halt : 1; + }; + /** + * + */ + uint32_t timeout_ms; +#if WDG_USE_TIMEOUT_CALLBACK == TRUE + /** + * @brief Notification callback when watchdog timedout + * + * @note About 2 cycles at NRF5_LFCLK_FREQUENCY are available + * before automatic reboot. + * + */ + void (*callback)(void); +#endif +} WDGConfig; + + + +/** + * @brief Structure representing an WDG driver. + */ +struct WDGDriver { + /** + * @brief Driver state. + */ + wdgstate_t state; + /** + * @brief Current configuration data. + */ + const WDGConfig *config; + /* End of the mandatory fields.*/ + NRF_WDT_Type *wdt; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +extern WDGDriver WDGD1; + +#ifdef __cplusplus +extern "C" { +#endif + void wdg_lld_init(void); + void wdg_lld_start(WDGDriver *wdgp); + void wdg_lld_stop(WDGDriver *wdgp); + void wdg_lld_reset(WDGDriver *wdgp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_WDG == TRUE */ + +#endif /* HAL_WDG_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_gpt_lld.c b/os/hal/ports/NRF5/LLD/hal_gpt_lld.c deleted file mode 100644 index 20dbcef..0000000 --- a/os/hal/ports/NRF5/LLD/hal_gpt_lld.c +++ /dev/null @@ -1,361 +0,0 @@ -/* - ChibiOS - 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_gpt_lld.c - * @brief NRF5 GPT subsystem low level driver source. - * - * @addtogroup GPT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_GPT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define NRF5_TIMER_PRESCALER_NUM 10 -#define NRF5_TIMER_COMPARE_NUM 4 - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief GPTD1 driver identifier. - * @note The driver GPTD1 allocates the complex timer TIM1 when enabled. - */ -#if NRF5_GPT_USE_TIMER0 || defined(__DOXYGEN__) -GPTDriver GPTD1; -#endif - -/** - * @brief GPTD2 driver identifier. - * @note The driver GPTD2 allocates the timer TIM2 when enabled. - */ -#if NRF5_GPT_USE_TIMER1 || defined(__DOXYGEN__) -GPTDriver GPTD2; -#endif - -/** - * @brief GPTD3 driver identifier. - * @note The driver GPTD3 allocates the timer TIM3 when enabled. - */ -#if NRF5_GPT_USE_TIMER2 || defined(__DOXYGEN__) -GPTDriver GPTD3; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static uint8_t prescaler(uint16_t freq) -{ - uint8_t i; - static const gptfreq_t frequencies[] = { - NRF5_GPT_FREQ_16MHZ, - NRF5_GPT_FREQ_8MHZ, - NRF5_GPT_FREQ_4MHZ, - NRF5_GPT_FREQ_2MHZ, - NRF5_GPT_FREQ_1MHZ, - NRF5_GPT_FREQ_500KHZ, - NRF5_GPT_FREQ_250KHZ, - NRF5_GPT_FREQ_125KHZ, - NRF5_GPT_FREQ_62500HZ, - NRF5_GPT_FREQ_31250HZ, - }; - - for (i = 0; i < NRF5_TIMER_PRESCALER_NUM; i++) - if (freq == frequencies[i]) - return i; - - osalDbgAssert(FALSE, "invalid timer frequency"); - - return 0; -} - -/** - * @brief Shared IRQ handler. - * - * @param[in] gptp pointer to a @p GPTDriver object - */ -static void gpt_lld_serve_interrupt(GPTDriver *gptp) { - - gptp->tim->EVENTS_COMPARE[gptp->cc_int] = 0; -#if CORTEX_MODEL >= 4 - (void)gptp->tim->EVENTS_COMPARE[gptp->cc_int]; -#endif - if (gptp->state == GPT_ONESHOT) - gptp->state = GPT_READY; /* Back in GPT_READY state. */ - gptp->config->callback(gptp); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_GPT_USE_TIMER0 -/** - * @brief TIMER0 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector60) { - - OSAL_IRQ_PROLOGUE(); - - gpt_lld_serve_interrupt(&GPTD1); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_GPT_USE_TIMER0 */ - -#if NRF5_GPT_USE_TIMER1 -/** - * @brief TIMER1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector64) { - - OSAL_IRQ_PROLOGUE(); - - gpt_lld_serve_interrupt(&GPTD2); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_GPT_USE_TIMER1 */ - -#if NRF5_GPT_USE_TIMER2 -/** - * @brief TIMER2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector68) { - - OSAL_IRQ_PROLOGUE(); - - gpt_lld_serve_interrupt(&GPTD3); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_GPT_USE_TIMER2 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level GPT driver initialization. - * - * @notapi - */ -void gpt_lld_init(void) { - -#if NRF5_GPT_USE_TIMER0 - /* Driver initialization.*/ - GPTD1.tim = NRF_TIMER0; - gptObjectInit(&GPTD1); -#endif - -#if NRF5_GPT_USE_TIMER1 - /* Driver initialization.*/ - GPTD2.tim = NRF_TIMER1; - gptObjectInit(&GPTD2); -#endif - -#if NRF5_GPT_USE_TIMER2 - /* Driver initialization.*/ - GPTD3.tim = NRF_TIMER2; - gptObjectInit(&GPTD3); -#endif -} - -/** - * @brief Configures and activates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_start(GPTDriver *gptp) { - - NRF_TIMER_Type *tim = gptp->tim; - - if (gptp->state == GPT_STOP) { - osalDbgAssert(gptp->cc_int < NRF5_TIMER_COMPARE_NUM, - "invalid capture/compare index"); - - tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; -#if NRF5_GPT_USE_TIMER0 - if (&GPTD1 == gptp) - nvicEnableVector(TIMER0_IRQn, NRF5_GPT_TIMER0_IRQ_PRIORITY); -#endif -#if NRF5_GPT_USE_TIMER1 - if (&GPTD2 == gptp) - nvicEnableVector(TIMER1_IRQn, NRF5_GPT_TIMER1_IRQ_PRIORITY); -#endif -#if NRF5_GPT_USE_TIMER2 - if (&GPTD3 == gptp) - nvicEnableVector(TIMER2_IRQn, NRF5_GPT_TIMER2_IRQ_PRIORITY); -#endif - } - - /* Prescaler value calculation.*/ - tim->PRESCALER = prescaler(gptp->config->frequency); - - /* Timer configuration.*/ - tim->MODE = TIMER_MODE_MODE_Timer << TIMER_MODE_MODE_Pos; - - switch (gptp->config->resolution) { - - case 8: - tim->BITMODE = TIMER_BITMODE_BITMODE_08Bit << TIMER_BITMODE_BITMODE_Pos; - break; - - case 16: - tim->BITMODE = TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos; - break; - -#if NRF5_GPT_USE_TIMER0 - case 24: - tim->BITMODE = TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos; - break; - - case 32: - tim->BITMODE = TIMER_BITMODE_BITMODE_32Bit << TIMER_BITMODE_BITMODE_Pos; - break; -#endif - - default: - osalDbgAssert(FALSE, "invalid timer resolution"); - break; - }; -} - -/** - * @brief Deactivates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop(GPTDriver *gptp) { - - if (gptp->state == GPT_READY) { - gptp->tim->TASKS_SHUTDOWN = 1; - -#if NRF5_GPT_USE_TIMER0 - if (&GPTD1 == gptp) - nvicDisableVector(TIMER0_IRQn); -#endif -#if NRF5_GPT_USE_TIMER1 - if (&GPTD2 == gptp) - nvicDisableVector(TIMER1_IRQn); -#endif -#if NRF5_GPT_USE_TIMER2 - if (&GPTD3 == gptp) - nvicDisableVector(TIMER2_IRQn); -#endif - gptp->tim->INTENCLR = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; - } -} - -/** - * @brief Starts the timer in continuous mode. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] interval period in ticks - * - * @notapi - */ -void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { - - NRF_TIMER_Type *tim = gptp->tim; - - tim->TASKS_CLEAR = 1; - tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ - if (gptp->state == GPT_ONESHOT) - gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_STOP_Msk << gptp->cc_int; - else if (gptp->state == GPT_CONTINUOUS) - gptp->tim->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Msk << gptp->cc_int; - tim->TASKS_START = 1; -} - -/** - * @brief Stops the timer. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop_timer(GPTDriver *gptp) { - - gptp->tim->TASKS_STOP = 1; -} - -/** - * @brief Starts the timer in one shot mode and waits for completion. - * @details This function specifically polls the timer waiting for completion - * in order to not have extra delays caused by interrupt servicing, - * this function is only recommended for short delays. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] interval time interval in ticks - * - * @notapi - */ -void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { - - NRF_TIMER_Type *tim = gptp->tim; - - tim->INTENCLR = (1UL << gptp->cc_int) << TIMER_INTENSET_COMPARE0_Pos; - tim->TASKS_CLEAR = 1; - tim->CC[gptp->cc_int] = (uint32_t)(interval - 1); /* Time constant. */ - tim->TASKS_START = 1; - while (!(tim->INTENSET & (TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int))) - ; - tim->INTENSET = TIMER_INTENSET_COMPARE0_Msk << gptp->cc_int; -} - -/** - * @brief Returns the counter value of GPT peripheral. - * @pre The GPT unit must be running in continuous mode. - * @note The nature of the counter is not defined, it may count upward - * or downward, it could be continuously running or not. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @return The current counter value. - * - * @notapi - */ -gptcnt_t gpt_lld_get_counter(GPTDriver *gptp) { - - gptp->tim->TASKS_CAPTURE[gptp->cc_get] = 1; - return gptp->tim->CC[gptp->cc_get]; -} - -#endif /* HAL_USE_GPT */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_gpt_lld.h b/os/hal/ports/NRF5/LLD/hal_gpt_lld.h deleted file mode 100644 index 4173a3a..0000000 --- a/os/hal/ports/NRF5/LLD/hal_gpt_lld.h +++ /dev/null @@ -1,264 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/gpt_lld.h - * @brief NRF5 GPT subsystem low level driver header. - * - * @addtogroup GPT - * @{ - */ - -#ifndef HAL_GPT_LLD_H -#define HAL_GPT_LLD_H - -#if HAL_USE_GPT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief GPTD1 driver enable switch. - * @details If set to @p TRUE the support for GPTD1 is included. - * @note The default is @p TRUE. - */ -#if !defined(NRF5_GPT_USE_TIMER0) || defined(__DOXYGEN__) -#define NRF5_GPT_USE_TIMER0 FALSE -#endif - -/** - * @brief GPTD2 driver enable switch. - * @details If set to @p TRUE the support for GPTD2 is included. - * @note The default is @p TRUE. - */ -#if !defined(NRF5_GPT_USE_TIMER1) || defined(__DOXYGEN__) -#define NRF5_GPT_USE_TIMER1 FALSE -#endif - -/** - * @brief GPTD3 driver enable switch. - * @details If set to @p TRUE the support for GPTD3 is included. - * @note The default is @p TRUE. - */ -#if !defined(NRF5_GPT_USE_TIMER2) || defined(__DOXYGEN__) -#define NRF5_GPT_USE_TIMER2 FALSE -#endif - -/** - * @brief GPTD1 interrupt priority level setting. - */ -#if !defined(NRF5_GPT_TIMER0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_GPT_TIMER0_IRQ_PRIORITY 3 -#endif - -/** - * @brief GPTD2 interrupt priority level setting. - */ -#if !defined(NRF5_GPT_TIMER1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_GPT_TIMER1_IRQ_PRIORITY 3 -#endif - -/** - * @brief GPTD3 interrupt priority level setting. - */ -#if !defined(NRF5_GPT_TIMER2_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_GPT_TIMER2_IRQ_PRIORITY 3 -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !NRF5_GPT_USE_TIMER0 && !NRF5_GPT_USE_TIMER1 && \ - !NRF5_GPT_USE_TIMER2 -#error "GPT driver activated but no TIMER peripheral assigned" -#endif - -#if NRF5_GPT_USE_TIMER0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER0" -#endif - -#if NRF5_GPT_USE_TIMER1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER1" -#endif - -#if NRF5_GPT_USE_TIMER2 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_GPT_TIMER2_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER2" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief GPT frequency type. - */ -typedef enum { - NRF5_GPT_FREQ_31250HZ = 31250, - NRF5_GPT_FREQ_62500HZ = 62500, - NRF5_GPT_FREQ_125KHZ = 125000, - NRF5_GPT_FREQ_250KHZ = 250000, - NRF5_GPT_FREQ_500KHZ = 500000, - NRF5_GPT_FREQ_1MHZ = 1000000, - NRF5_GPT_FREQ_2MHZ = 2000000, - NRF5_GPT_FREQ_4MHZ = 4000000, - NRF5_GPT_FREQ_8MHZ = 8000000, - NRF5_GPT_FREQ_16MHZ = 16000000, -} gptfreq_t; - -/** - * @brief GPT counter type. - */ -typedef uint32_t gptcnt_t; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - gptfreq_t frequency; - /** - * @brief Timer callback pointer. - * @note This callback is invoked on GPT counter events. - * @note This callback can be set to @p NULL but in that case the - * one-shot mode cannot be used. - */ - gptcallback_t callback; - /* End of the mandatory fields.*/ - /** - * @brief The timer resolution in bits (8/16/24/32) - * @note The default value of this field is 16 bits - * @note The 24 and 32 bit modes are only valid for TIMER0 - */ - uint8_t resolution; -} GPTConfig; - -/** - * @brief Structure representing a GPT driver. - */ -struct GPTDriver { - /** - * @brief Driver state. - */ - gptstate_t state; - /** - * @brief Current configuration data. - */ - const GPTConfig *config; -#if defined(GPT_DRIVER_EXT_FIELDS) - GPT_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the TIMERx registers block. - */ - NRF_TIMER_Type *tim; - /** - * @brief Index of the TIMERx capture/compare register used for setting the - * interval between compare events. - */ - uint8_t cc_int; - /** - * @brief Index of the TIMERx capture/compare register used for getting the - * current timer counter value. - */ - uint8_t cc_get; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the interval of GPT peripheral. - * @details This function changes the interval of a running GPT unit. - * @pre The GPT unit must be running in continuous mode. - * @post The GPT unit interval is changed to the new value. - * @note The function has effect at the next cycle start. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @param[in] interval new cycle time in timer ticks - * - * @notapi - */ -#define gpt_lld_change_interval(gptp, interval) \ - ((gptp)->tim->CC[(gptp)->cc_int] = (uint32_t)((interval) - 1)) - -/** - * @brief Returns the interval of GPT peripheral. - * @pre The GPT unit must be running in continuous mode. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @return The current interval. - * - * @notapi - */ -#define gpt_lld_get_interval(gptp) \ - ((gptcnt_t)((gptp)->tim->CC[(gptp)->cc_int]) + 1) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_GPT_USE_TIMER0 && !defined(__DOXYGEN__) -extern GPTDriver GPTD1; -#endif - -#if NRF5_GPT_USE_TIMER1 && !defined(__DOXYGEN__) -extern GPTDriver GPTD2; -#endif - -#if NRF5_GPT_USE_TIMER2 && !defined(__DOXYGEN__) -extern GPTDriver GPTD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void gpt_lld_init(void); - void gpt_lld_start(GPTDriver *gptp); - void gpt_lld_stop(GPTDriver *gptp); - void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period); - void gpt_lld_stop_timer(GPTDriver *gptp); - void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); - gptcnt_t gpt_lld_get_counter(GPTDriver *gptp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_GPT */ - -#endif /* HAL_GPT_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_i2c_lld.c b/os/hal/ports/NRF5/LLD/hal_i2c_lld.c deleted file mode 100644 index fefca0c..0000000 --- a/os/hal/ports/NRF5/LLD/hal_i2c_lld.c +++ /dev/null @@ -1,467 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_i2c_lld.c - * @brief NRF5 I2C subsystem low level driver source. - * - * @addtogroup I2C - * @{ - */ - -#include "osal.h" -#include "hal.h" -#include "nrf_delay.h" - -#if HAL_USE_I2C || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */ -#define I2C_HIGH(p) do { IOPORT1->OUTSET = (1UL << (p)); } while(0) /*!< Pulls I2C line high */ -#define I2C_LOW(p) do { IOPORT1->OUTCLR = (1UL << (p)); } while(0) /*!< Pulls I2C line low */ -#define I2C_INPUT(p) do { IOPORT1->DIRCLR = (1UL << (p)); } while(0) /*!< Configures I2C pin as input */ -#define I2C_OUTPUT(p) do { IOPORT1->DIRSET = (1UL << (p)); } while(0) /*!< Configures I2C pin as output */ - -#define I2C_PIN_CNF \ - ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ - | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ - | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) - -#define I2C_PIN_CNF_CLR \ - ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ - | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ - | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) - -#if NRF5_I2C_USE_I2C0 -#define I2C_IRQ_NUM SPI0_TWI0_IRQn -#define I2C_IRQ_PRI NRF5_I2C_I2C0_IRQ_PRIORITY -#elif NRF5_I2C_USE_I2C1 -#define I2C_IRQ_NUM SPI1_TWI1_IRQn -#define I2C_IRQ_PRI NRF5_I2C_I2C1_IRQ_PRIORITY -#endif - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief I2C0 driver identifier. - */ -#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) -I2CDriver I2CD1; -#endif - -/** - * @brief I2C1 driver identifier. - */ -#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) -I2CDriver I2CD2; -#endif - -uint8_t tx_resume_count; -uint8_t rx_resume_count; -uint8_t stop_count; - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Function for detecting stuck slaves (SDA = 0 and SCL = 1) and tries to clear the bus. - * - * @return - * @retval false Bus is stuck. - * @retval true Bus is clear. - */ -static void i2c_clear_bus(I2CDriver *i2cp) -{ - const I2CConfig *cfg = i2cp->config; - int i; - - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; - - I2C_HIGH(cfg->sda_pad); - I2C_HIGH(cfg->scl_pad); - - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; - - nrf_delay_us(4); - - for(i = 0; i < 9; i++) { - if (palReadPad(IOPORT1, cfg->sda_pad)) { - if(i > 0) - break; - else - return; - } - - I2C_LOW(cfg->scl_pad); - nrf_delay_us(4); - I2C_HIGH(cfg->scl_pad); - nrf_delay_us(4); - } - - I2C_LOW(cfg->sda_pad); - nrf_delay_us(4); - I2C_HIGH(cfg->sda_pad); -} - -static inline void i2c_setup_shortcut(I2CDriver *i2cp) -{ - uint32_t rxbytes = i2cp->rxbytes; - uint32_t txbytes = i2cp->txbytes; - - osalDbgAssert(rxbytes + txbytes, "transfer must be greater than zero"); - - if (txbytes > 1 || (!txbytes && rxbytes > 1)) - i2cp->i2c->SHORTS = TWI_SHORTS_BB_SUSPEND_Enabled << TWI_SHORTS_BB_SUSPEND_Pos; - else if (((txbytes == 1) && !rxbytes) || ((rxbytes == 1) && !txbytes)) - i2cp->i2c->SHORTS = TWI_SHORTS_BB_STOP_Enabled << TWI_SHORTS_BB_STOP_Pos; - else - i2cp->i2c->SHORTS = 0; -} - -#if defined(__GNUC__) -__attribute__((noinline)) -#endif -/** - * @brief Common IRQ handler. - * @note Tries hard to clear all the pending interrupt sources, we don't - * want to go through the whole ISR and have another interrupt soon - * after. - * - * @param[in] i2cp pointer to an I2CDriver - */ -static void serve_interrupt(I2CDriver *i2cp) { - - NRF_TWI_Type *i2c = i2cp->i2c; - - if(i2c->EVENTS_TXDSENT) { - - i2c->EVENTS_TXDSENT = 0; -#if CORTEX_MODEL >= 4 - (void)i2c->EVENTS_TXDSENT; -#endif - - if(--i2cp->txbytes) { - - i2c->TXD = *i2cp->txptr++; - i2c_setup_shortcut(i2cp); - i2c->TASKS_RESUME = 1; - tx_resume_count++; - } - else if (i2cp->rxbytes) { - - i2c_setup_shortcut(i2cp); - i2c->TASKS_STARTRX = 1; - } - } - if(i2c->EVENTS_RXDREADY) { - - i2c->EVENTS_RXDREADY = 0; -#if CORTEX_MODEL >= 4 - (void)i2c->EVENTS_RXDREADY; -#endif - - *i2cp->rxptr++ = i2c->RXD; - - if(--i2cp->rxbytes) { - i2c_setup_shortcut(i2cp); - i2c->TASKS_RESUME = 1; - rx_resume_count++; - } - } - if(i2c->EVENTS_ERROR) { - - uint32_t err = i2c->ERRORSRC; - i2c->EVENTS_ERROR = 0; -#if CORTEX_MODEL >= 4 - (void)i2c->EVENTS_ERROR; -#endif - if (err & TWI_ERRORSRC_OVERRUN_Msk) - i2cp->errors |= I2C_OVERRUN; - if (err & (TWI_ERRORSRC_ANACK_Msk | TWI_ERRORSRC_DNACK_Msk)) - i2cp->errors |= I2C_ACK_FAILURE; - - i2c->TASKS_STOP = 1; - _i2c_wakeup_error_isr(i2cp); - } else if(i2c->EVENTS_STOPPED) { - - stop_count++; - i2c->EVENTS_STOPPED = 0; -#if CORTEX_MODEL >= 4 - (void)i2c->EVENTS_STOPPED; -#endif - _i2c_wakeup_isr(i2cp); - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(Vector4C) { - - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&I2CD1); - OSAL_IRQ_EPILOGUE(); -} - -#endif - -#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(Vector50) { - - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&I2CD2); - OSAL_IRQ_EPILOGUE(); -} - -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level I2C driver initialization. - * - * @notapi - */ -void i2c_lld_init(void) { - -#if NRF5_I2C_USE_I2C0 - i2cObjectInit(&I2CD1); - I2CD1.thread = NULL; - I2CD1.i2c = NRF_TWI0; -#endif - -#if NRF5_I2C_USE_I2C1 - i2cObjectInit(&I2CD2); - I2CD2.thread = NULL; - I2CD2.i2c = NRF_TWI1; -#endif - -} - -/** - * @brief Configures and activates the I2C peripheral. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -void i2c_lld_start(I2CDriver *i2cp) { - - NRF_TWI_Type *i2c = i2cp->i2c; - const I2CConfig *cfg = i2cp->config; - - if (i2cp->state != I2C_STOP) - return; - - i2c_clear_bus(i2cp); - - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; - - i2c->EVENTS_RXDREADY = 0; - i2c->EVENTS_TXDSENT = 0; -#if CORTEX_MODEL >= 4 - (void)i2c->EVENTS_RXDREADY; - (void)i2c->EVENTS_TXDSENT; -#endif -#if NRF_SERIES == 51 - i2c->PSELSCL = cfg->scl_pad; - i2c->PSELSDA = cfg->sda_pad; -#else - i2c->PSEL.SCL = cfg->scl_pad; - i2c->PSEL.SDA = cfg->sda_pad; -#endif - - switch (cfg->clock) { - case 100000: - i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos; - break; - case 250000: - i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K250 << TWI_FREQUENCY_FREQUENCY_Pos; - break; - case 400000: - i2c->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K400 << TWI_FREQUENCY_FREQUENCY_Pos; - break; - default: - osalDbgAssert(0, "invalid I2C frequency"); - break; - }; - - nvicEnableVector(I2C_IRQ_NUM, I2C_IRQ_PRI); - - i2c->INTENSET = TWI_INTENSET_TXDSENT_Msk | TWI_INTENSET_STOPPED_Msk | - TWI_INTENSET_ERROR_Msk | TWI_INTENSET_RXDREADY_Msk; - - i2c->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos; -} - -/** - * @brief Deactivates the I2C peripheral. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -void i2c_lld_stop(I2CDriver *i2cp) { - - NRF_TWI_Type *i2c = i2cp->i2c; - const I2CConfig *cfg = i2cp->config; - - if (i2cp->state != I2C_STOP) { - - i2c->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos; - - i2c->INTENCLR = TWI_INTENSET_TXDSENT_Msk | TWI_INTENSET_STOPPED_Msk | - TWI_INTENSET_ERROR_Msk | TWI_INTENSET_RXDREADY_Msk; - - nvicDisableVector(I2C_IRQ_NUM); - - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; - } -} - -static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - NRF_TWI_Type *i2c = i2cp->i2c; - - (void)timeout; - msg_t msg; - - i2cp->errors = I2C_NO_ERROR; - i2cp->addr = addr; - - i2cp->txptr = txbuf; - i2cp->txbytes = txbytes; - - i2cp->rxptr = rxbuf; - i2cp->rxbytes = rxbytes; - - i2c->ADDRESS = addr; - - tx_resume_count = 0; - rx_resume_count = 0; - stop_count = 0; - - if (i2cp->txbytes) { - - i2c->TXD = *i2cp->txptr++; - i2c_setup_shortcut(i2cp); - i2c->TASKS_STARTTX = 1; - } else if (i2cp->rxbytes) { - - i2c_setup_shortcut(i2cp); - i2c->TASKS_STARTRX = 1; - } else { - - osalDbgAssert(0, "no bytes to transfer"); - } - - msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); - - if (msg == MSG_TIMEOUT) - i2c->TASKS_STOP = 1; - - return msg; -} - -/** - * @brief Receives data via the I2C bus as master. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * @param[in] addr slave device address - * @param[out] rxbuf pointer to the receive buffer - * @param[in] rxbytes number of bytes to be received - * @param[in] timeout the number of ticks before the operation timeouts, - * the following special values are allowed: - * - @a TIME_INFINITE no timeout. - * . - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET if one or more I2C errors occurred, the errors can - * be retrieved using @p i2cGetErrors(). - * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a - * timeout the driver must be stopped and restarted - * because the bus is in an uncertain state. - * - * @notapi - */ -msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout); -} - -/** - * @brief Transmits data via the I2C bus as master. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * @param[in] addr slave device address - * @param[in] txbuf pointer to the transmit buffer - * @param[in] txbytes number of bytes to be transmitted - * @param[out] rxbuf pointer to the receive buffer - * @param[in] rxbytes number of bytes to be received - * @param[in] timeout the number of ticks before the operation timeouts, - * the following special values are allowed: - * - @a TIME_INFINITE no timeout. - * . - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET if one or more I2C errors occurred, the errors can - * be retrieved using @p i2cGetErrors(). - * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a - * timeout the driver must be stopped and restarted - * because the bus is in an uncertain state. - * - * @notapi - */ -msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout); -} - -#endif /* HAL_USE_I2C */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_i2c_lld.h b/os/hal/ports/NRF5/LLD/hal_i2c_lld.h deleted file mode 100644 index 578d69b..0000000 --- a/os/hal/ports/NRF5/LLD/hal_i2c_lld.h +++ /dev/null @@ -1,232 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_i2c_lld.h - * @brief NRF5 I2C subsystem low level driver header. - * - * @addtogroup I2C - * @{ - */ - -#ifndef HAL_I2C_LLD_H -#define HAL_I2C_LLD_H - -#if HAL_USE_I2C || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#define STATE_STOP 0x00 -#define STATE_SEND 0x01 -#define STATE_RECV 0x02 -#define STATE_DUMMY 0x03 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief I2C0 driver enable switch. - * @details If set to @p TRUE the support for I2C0 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_I2C_USE_I2C0) || defined(__DOXYGEN__) -#define NRF5_I2C_USE_I2C0 FALSE -#endif - -/** - * @brief I2C1 driver enable switch. - * @details If set to @p TRUE the support for I2C1 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_I2C_USE_I2C1) || defined(__DOXYGEN__) -#define NRF5_I2C_USE_I2C1 FALSE -#endif - -/** - * @brief I2C0 interrupt priority level setting. - */ -#if !defined(NRF5_I2C_I2C0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_I2C_I2C0_IRQ_PRIORITY 3 -#endif - -/** - * @brief I2C1 interrupt priority level setting. - */ -#if !defined(NRF5_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_I2C_I2C1_IRQ_PRIORITY 3 -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if NRF5_I2C_USE_I2C0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to I2C0" -#endif - -#if NRF5_I2C_USE_I2C1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to I2C1" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/* @brief Type representing I2C address. */ -typedef uint8_t i2caddr_t; - -/* @brief Type of I2C Driver condition flags. */ -typedef uint32_t i2cflags_t; - -/* @brief Type used to control the ISR state machine. */ -typedef uint8_t intstate_t; - -/** - * @brief Driver configuration structure. - * @note Implementations may extend this structure to contain more, - * architecture dependent, fields. - */ - -/** - * @brief Driver configuration structure. - */ -typedef struct { - - /* @brief Clock to be used for the I2C bus. */ - uint32_t clock; - /* @brief Pad number for SCL */ - uint8_t scl_pad; - /* @brief Pad number for SDA */ - uint8_t sda_pad; - -} I2CConfig; - -/** - * @brief Type of a structure representing an I2C driver. - */ -typedef struct I2CDriver I2CDriver; - -/** - * @brief Structure representing an I2C driver. - */ -struct I2CDriver { - /** - * @brief Driver state. - */ - i2cstate_t state; - /** - * @brief Current configuration data. - */ - const I2CConfig *config; - /** - * @brief Error flags. - */ - i2cflags_t errors; -#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) -#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#elif CH_CFG_USE_SEMAPHORES - semaphore_t semaphore; -#endif -#endif /* I2C_USE_MUTUAL_EXCLUSION */ -#if defined(I2C_DRIVER_EXT_FIELDS) - I2C_DRIVER_EXT_FIELDS -#endif - /* @brief Thread waiting for I/O completion. */ - thread_reference_t thread; - /* @brief Current slave address without R/W bit. */ - i2caddr_t addr; - - /* End of the mandatory fields.*/ - - /* @brief Pointer to the buffer with data to send. */ - const uint8_t *txptr; - /* @brief Number of bytes of data to send. */ - size_t txbytes; - /* @brief Pointer to the buffer to put received data. */ - uint8_t *rxptr; - /* @brief Number of bytes of data to receive. */ - size_t rxbytes; - /* @brief Tracks current ISR state. */ - intstate_t intstate; - /* @brief Low-level register access. */ - NRF_TWI_Type *i2c; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Get errors from I2C driver. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) - -#if NRF5_I2C_USE_I2C0 -extern I2CDriver I2CD1; -#endif - -#if NRF5_I2C_USE_I2C1 -extern I2CDriver I2CD2; -#endif - -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void i2c_lld_init(void); - void i2c_lld_start(I2CDriver *i2cp); - void i2c_lld_stop(I2CDriver *i2cp); - msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout); - msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_I2C */ - -#endif /* HAL_I2C_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_pal_lld.c b/os/hal/ports/NRF5/LLD/hal_pal_lld.c deleted file mode 100644 index 21e4b0b..0000000 --- a/os/hal/ports/NRF5/LLD/hal_pal_lld.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_pal_lld.c - * @brief NRF5 PAL subsystem low level driver source. - * - * @addtogroup PAL - * @{ - */ - -#include "osal.h" -#include "hal.h" - -#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode) -{ - (void)port; - osalDbgAssert(pad < PAL_IOPORTS_WIDTH, "pal_lld_setpadmode() - invalid pad"); - - switch (mode) { - case PAL_MODE_RESET: - case PAL_MODE_UNCONNECTED: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); - break; - case PAL_MODE_INPUT: - case PAL_MODE_INPUT_ANALOG: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); - break; - case PAL_MODE_INPUT_PULLUP: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); - break; - case PAL_MODE_INPUT_PULLDOWN: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos); - break; - case PAL_MODE_OUTPUT_PUSHPULL: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - break; - case PAL_MODE_OUTPUT_OPENDRAIN: - IOPORT1->PIN_CNF[pad] = - (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) | - (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) | - (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) | - (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos); - break; - default: - osalDbgAssert(FALSE, "invalid pal mode"); - break; - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief NRF5 I/O ports configuration. - * - * @param[in] config the NRF5 ports configuration - * - * @notapi - */ -void _pal_lld_init(const PALConfig *config) -{ - uint8_t i; - - for (i = 0; i < TOTAL_GPIO_PADS; i++) { - pal_lld_setpadmode(IOPORT1, i, config->pads[i]); - } -} - -/** - * @brief Pads mode setup. - * @details This function programs a pads group belonging to the same port - * with the specified mode. - * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode - * - * @notapi - */ -void _pal_lld_setgroupmode(ioportid_t port, - ioportmask_t mask, - iomode_t mode) -{ - uint8_t i; - - for (i = 0; i < TOTAL_GPIO_PADS; i++, mask >>= 1) { - if (mask & 1) { - pal_lld_setpadmode(port, i, mode); - } - } -} - -#endif /* HAL_USE_PAL == TRUE */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/hal_pal_lld.h deleted file mode 100644 index 745afd3..0000000 --- a/os/hal/ports/NRF5/LLD/hal_pal_lld.h +++ /dev/null @@ -1,351 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_pal_lld.h - * @brief NRF5 PAL subsystem low level driver header. - * - * @addtogroup PAL - * @{ - */ - -#ifndef HAL_PAL_LLD_H -#define HAL_PAL_LLD_H - -#if (HAL_USE_PAL == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Unsupported modes and specific modes */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* I/O Ports Types and constants. */ -/*===========================================================================*/ - -#define TOTAL_GPIO_PADS 32 - -/** - * @name Port related definitions - * @{ - */ -/** - * @brief Width, in bits, of an I/O port. - */ -#define PAL_IOPORTS_WIDTH 32U - -/** - * @brief Whole port mask. - * @brief This macro specifies all the valid bits into a port. - */ -#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFFU) -/** @} */ - -/** - * @name Line handling macros - * @{ - */ -/** - * @brief Forms a line identifier. - * @details A port/pad pair are encoded into an @p ioline_t type. The encoding - * of this type is platform-dependent. - */ -#define PAL_LINE(port, pad) \ - ((ioline_t)((uint32_t)(pad))) - -/** - * @brief Decodes a port identifier from a line identifier. - */ -#define PAL_PORT(line) \ - ((ioportid_t)(IOPORT1)) - -/** - * @brief Decodes a pad identifier from a line identifier. - */ -#define PAL_PAD(line) \ - ((uint32_t)(line)) - -/** - * @brief Value identifying an invalid line. - */ -#define PAL_NOLINE ((ioline_t)-1) -/** @} */ - -/** - * @brief Generic I/O ports static initializer. - * @details An instance of this structure must be passed to @p palInit() at - * system startup time in order to initialized the digital I/O - * subsystem. This represents only the initial setup, specific pads - * or whole ports can be reprogrammed at later time. - * @note Implementations may extend this structure to contain more, - * architecture dependent, fields. - */ -typedef struct { - uint32_t pads[TOTAL_GPIO_PADS]; -} PALConfig; - -/** - * @brief Digital I/O port sized unsigned type. - */ -typedef uint32_t ioportmask_t; - -/** - * @brief Digital I/O modes. - */ -typedef uint8_t iomode_t; - -/** - * @brief Type of an I/O line. - */ -typedef uint32_t ioline_t; - -/** - * @brief Port Identifier. - * @details This type can be a scalar or some kind of pointer, do not make - * any assumption about it, use the provided macros when populating - * variables of this type. - */ -typedef NRF_GPIO_Type *ioportid_t; - -/*===========================================================================*/ -/* I/O Ports Identifiers. */ -/*===========================================================================*/ - -/** - * @brief First I/O port identifier. - * @details Low level drivers can define multiple ports, it is suggested to - * use this naming convention. - */ -#if NRF_SERIES == 51 -#define IOPORT1 NRF_GPIO -#else -#define IOPORT1 NRF_P0 -#endif - -/*===========================================================================*/ -/* Implementation, some of the following macros could be implemented as */ -/* functions, if so please put them in pal_lld.c. */ -/*===========================================================================*/ - -/** - * @brief Low level PAL subsystem initialization. - * - * @param[in] config architecture-dependent ports configuration - * - * @notapi - */ -#define pal_lld_init(config) _pal_lld_init(config) - -/** - * @brief Reads the physical I/O port states. - * - * @param[in] port port identifier - * @return The port bits. - * - * @notapi - */ -#define pal_lld_readport(port) (IOPORT1->IN) - -/** - * @brief Reads the output latch. - * @details The purpose of this function is to read back the latched output - * value. - * - * @param[in] port port identifier - * @return The latched logical states. - * - * @notapi - */ -#define pal_lld_readlatch(port) (IOPORT1->OUT) - -/** - * @brief Writes a bits mask on a I/O port. - * - * @param[in] port port identifier - * @param[in] bits bits to be written on the specified port - * - * @notapi - */ -#define pal_lld_writeport(port, bits) (IOPORT1->OUT = (bits)) - -/** - * @brief Sets a bits mask on a I/O port. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] bits bits to be ORed on the specified port - * - * @notapi - */ -#define pal_lld_setport(port, bits) (IOPORT1->OUTSET = (bits)) - - -/** - * @brief Clears a bits mask on a I/O port. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] bits bits to be cleared on the specified port - * - * @notapi - */ -#define pal_lld_clearport(port, bits) (IOPORT1->OUTCLR = (bits)) - -/** - * @brief Pads group mode setup. - * @details This function programs a pads group belonging to the same port - * with the specified mode. - * @note Programming an unknown or unsupported mode is silently ignored. - * - * @param[in] port port identifier - * @param[in] mask group mask - * @param[in] offset group bit offset within the port - * @param[in] mode group mode - * - * @notapi - */ -#define pal_lld_setgroupmode(port, mask, offset, mode) \ - _pal_lld_setgroupmode(port, mask << offset, mode) - -/** - * @brief Reads a logical state from an I/O pad. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @return The logical state. - * @retval PAL_LOW low logical state. - * @retval PAL_HIGH high logical state. - * - * @notapi - */ -#define pal_lld_readpad(port, pad) \ - ((IOPORT1->IN & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW) - -/** - * @brief Writes a logical state on an output pad. - * @note This function is not meant to be invoked directly by the - * application code. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] bit logical value, the value must be @p PAL_LOW or - * @p PAL_HIGH - * - * @notapi - */ -#define pal_lld_writepad(port, pad, bit) \ - do { \ - (void)port; \ - if (bit == PAL_HIGH) \ - IOPORT1->OUTSET = ((uint32_t) 1 << pad); \ - else \ - IOPORT1->OUTCLR = ((uint32_t) 1 << pad); \ - } while (false) - -/** - * @brief Sets a pad logical state to @p PAL_HIGH. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_setpad(port, pad) (IOPORT1->OUTSET = (uint32_t) 1 << (pad)) - -/** - * @brief Clears a pad logical state to @p PAL_LOW. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_clearpad(port, pad) (IOPORT1->OUTCLR = (uint32_t) 1 << (pad)) - -/** - * @brief Toggles a pad logical state. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_togglepad(port, pad) \ - do { \ - uint8_t bit = (IOPORT1->OUT >> (pad)) & 1; \ - if (bit) \ - IOPORT1->OUTCLR = 1 << (pad); \ - else \ - IOPORT1->OUTSET = 1 << (pad); \ - } while (0) - -/** - * @brief Pad mode setup. - * @details This function programs a pad with the specified mode. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * @note Programming an unknown or unsupported mode is silently ignored. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] mode pad mode - * - * @notapi - */ -#define pal_lld_setpadmode(port, pad, mode) _pal_lld_setpadmode(port, pad, mode) - -#if !defined(__DOXYGEN__) -extern const PALConfig pal_default_config; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void _pal_lld_init(const PALConfig *config); - void _pal_lld_setgroupmode(ioportid_t port, - ioportmask_t mask, - iomode_t mode); - void _pal_lld_setpadmode(ioportid_t port, - uint8_t pad, - iomode_t mode); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PAL == TRUE */ - -#endif /* HAL_PAL_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_qei_lld.c b/os/hal/ports/NRF5/LLD/hal_qei_lld.c deleted file mode 100644 index d3b99cd..0000000 --- a/os/hal/ports/NRF5/LLD/hal_qei_lld.c +++ /dev/null @@ -1,300 +0,0 @@ -/* - ChibiOS - Copyright (C) 2016..2016 Stéphane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51/hal_qei_lld.c - * @brief NRF51 QEI subsystem low level driver. - * - * @addtogroup QEI - * @{ - */ - -#include "hal.h" - -#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__) - - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief QEID1 driver identifier. - */ -#if NRF5_QEI_USE_QDEC0 || defined(__DOXYGEN__) -QEIDriver QEID1; -#endif - - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Common IRQ handler. - * - * @param[in] qeip pointer to an QEIDriver - */ -static void serve_interrupt(QEIDriver *qeip) { - NRF_QDEC_Type *qdec = qeip->qdec; - -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - /* Accumulator overflowed - */ - if (qdec->EVENTS_ACCOF) { - qdec->EVENTS_ACCOF = 0; -#if CORTEX_MODEL >= 4 - (void)qdec->EVENTS_ACCOF; -#endif - - qeip->overflowed++; - if (qeip->config->overflowed_cb) - qeip->config->overflowed_cb(qeip); - } -#endif - - /* Report ready - */ - if (qdec->EVENTS_REPORTRDY) { - qdec->EVENTS_REPORTRDY = 0; -#if CORTEX_MODEL >= 4 - (void)qdec->EVENTS_REPORTRDY; -#endif - - /* Read (and clear counters due to shortcut) */ - int16_t acc = ( int16_t)qdec->ACCREAD; - uint16_t accdbl = (uint16_t)qdec->ACCDBLREAD; - - /* Inverse direction if requested */ - if (qeip->config->dirinv) - acc = -acc; // acc is [-1024..+1023], its okay on int16_t - - /* Adjust counter */ - qeiAdjustI(qeip, acc); - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_QEI_USE_QDEC0 == TRUE -/** - * @brief Quadrature decoder vector (QDEC) - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector88) { - - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&QEID1); - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level QEI driver initialization. - * - * @notapi - */ -void qei_lld_init(void) { - -#if NRF5_QEI_USE_QDEC0 == TRUE - /* Driver initialization.*/ - qeiObjectInit(&QEID1); - QEID1.qdec = NRF_QDEC; -#endif -} - -/** - * @brief Configures and activates the QEI peripheral. - * - * @param[in] qeip pointer to the @p QEIDriver object - * - * @notapi - */ -void qei_lld_start(QEIDriver *qeip) { - NRF_QDEC_Type *qdec = qeip->qdec; - const QEIConfig *cfg = qeip->config; - - if (qeip->state == QEI_STOP) { - /* Set Pins */ - palSetLineMode(cfg->phase_a, PAL_MODE_INPUT); - palSetLineMode(cfg->phase_b, PAL_MODE_INPUT); -#if NRF5_QEI_USE_LED == TRUE - if (cfg->led != PAL_NOLINE) { - palSetLineMode(cfg->led, PAL_MODE_INPUT); - } -#endif - - /* Set interrupt masks and enable interrupt */ -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - qdec->INTENSET = QDEC_INTENSET_REPORTRDY_Msk | - QDEC_INTENSET_ACCOF_Msk; -#else - qdec->INTENSET = QDEC_INTENSET_REPORTRDY_Msk; -#endif -#if NRF5_QEI_USE_QDEC0 == TRUE - if (&QEID1 == qeip) { - nvicEnableVector(QDEC_IRQn, NRF5_QEI_QDEC0_IRQ_PRIORITY); - } -#endif - - /* Select pin for Phase A and Phase B */ -#if NRF_SERIES == 51 - qdec->PSELA = PAL_PAD(cfg->phase_a); - qdec->PSELB = PAL_PAD(cfg->phase_b); -#else - qdec->PSEL.A = PAL_PAD(cfg->phase_a); - qdec->PSEL.B = PAL_PAD(cfg->phase_b); -#endif - /* Select (optional) pin for LED, and configure it */ -#if NRF5_QEI_USE_LED == TRUE -#if NRF_SERIES == 51 - qdec->PSELLED = PAL_PAD(cfg->led); -#else - qdec->PSEL.LED = PAL_PAD(cfg->led); -#endif - qdec->LEDPOL = ((cfg->led_polarity == QEI_LED_POLARITY_LOW) - ? QDEC_LEDPOL_LEDPOL_ActiveLow - : QDEC_LEDPOL_LEDPOL_ActiveHigh) - << QDEC_LEDPOL_LEDPOL_Pos; - qdec->LEDPRE = cfg->led_warming; -#else -#if NRF_SERIES == 51 - qdec->PSELLED = (uint32_t)-1; -#else - qdec->PSEL.LED = (uint32_t)-1; -#endif -#endif - - /* Set sampling resolution and debouncing */ - qdec->SAMPLEPER = cfg->resolution; - qdec->DBFEN = (cfg->debouncing ? QDEC_DBFEN_DBFEN_Enabled - : QDEC_DBFEN_DBFEN_Disabled) - << QDEC_DBFEN_DBFEN_Pos; - - /* Define minimum sampling before reporting - and create shortcut to clear accumulation */ - qdec->REPORTPER = cfg->report; - qdec->SHORTS = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk; - - /* Enable peripheric */ - qdec->ENABLE = 1; - } - - /* Initially state is stopped, events cleared */ - qdec->TASKS_STOP = 1; - qdec->EVENTS_SAMPLERDY = 0; - qdec->EVENTS_REPORTRDY = 0; - qdec->EVENTS_ACCOF = 0; -#if CORTEX_MODEL >= 4 - (void)qdec->EVENTS_SAMPLERDY; - (void)qdec->EVENTS_REPORTRDY; - (void)qdec->EVENTS_ACCOF; -#endif -} - -/** - * @brief Deactivates the QEI peripheral. - * - * @param[in] qeip pointer to the @p QEIDriver object - * - * @notapi - */ -void qei_lld_stop(QEIDriver *qeip) { - - NRF_QDEC_Type *qdec = qeip->qdec; - const QEIConfig *cfg = qeip->config; - - if (qeip->state == QEI_READY) { - qdec->TASKS_STOP = 1; - qdec->ENABLE = 0; - - /* Unset interrupt masks and disable interrupt */ -#if NRF5_QEI_USE_QDEC0 == TRUE - if (&QEID1 == qeip) { - nvicDisableVector(QDEC_IRQn); - } -#endif -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - qdec->INTENCLR = QDEC_INTENCLR_REPORTRDY_Msk | - QDEC_INTENCLR_ACCOF_Msk; -#else - qdec->INTENCLR = QDEC_INTENCLR_REPORTRDY_Msk; -#endif - - /* Return pins to reset state */ - palSetLineMode(cfg->phase_a, PAL_MODE_RESET); - palSetLineMode(cfg->phase_b, PAL_MODE_RESET); -#if NRF5_QEI_USE_LED == TRUE - if (cfg->led != PAL_NOLINE) { - palSetLineMode(cfg->led, PAL_MODE_RESET); - } -#endif - } -} - -/** - * @brief Enables the input capture. - * - * @param[in] qeip pointer to the @p QEIDriver object - * - * @notapi - */ -void qei_lld_enable(QEIDriver *qeip) { -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - qeip->overflowed = 0; -#endif - - qeip->qdec->EVENTS_SAMPLERDY = 0; - qeip->qdec->EVENTS_REPORTRDY = 0; - qeip->qdec->EVENTS_ACCOF = 0; -#if CORTEX_MODEL >= 4 - (void)qeip->qdec->EVENTS_SAMPLERDY; - (void)qeip->qdec->EVENTS_REPORTRDY; - (void)qeip->qdec->EVENTS_ACCOF; -#endif - qeip->qdec->TASKS_START = 1; -} - -/** - * @brief Disables the input capture. - * - * @param[in] qeip pointer to the @p QEIDriver object - * - * @notapi - */ -void qei_lld_disable(QEIDriver *qeip) { - qeip->qdec->TASKS_STOP = 1; -} - - -#endif /* HAL_USE_QEI */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_qei_lld.h b/os/hal/ports/NRF5/LLD/hal_qei_lld.h deleted file mode 100644 index 85c96a5..0000000 --- a/os/hal/ports/NRF5/LLD/hal_qei_lld.h +++ /dev/null @@ -1,390 +0,0 @@ -/* - ChibiOS - Copyright (C) 2016..2016 Stéphane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51/hal_qei_lld.h - * @brief NRF51 QEI subsystem low level driver header. - * - * @note Not tested with LED pin - * - * @note Pins are configured as input with no pull. - * - * @addtogroup QEI - * @{ - */ - -#ifndef HAL_QEI_LLD_H -#define HAL_QEI_LLD_H - -#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief For LED active on LOW - */ -#define QEI_LED_POLARITY_LOW 0 - -/** - * @brief For LED active on HIGH - */ -#define QEI_LED_POLARITY_HIGH 1 - -/** - * @brief Mininum usable value for defining counter underflow - */ -#define QEI_COUNT_MIN (-2147483648) - -/** - * @brief Maximum usable value for defining counter overflow - */ -#define QEI_COUNT_MAX ( 2147483647) - - - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief LED control enable switch. - * @details If set to @p TRUE the support for LED control - * is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_QEI_USE_LED) || defined(__DOXYGEN__) -#define NRF5_QEI_USE_LED FALSE -#endif - -/** - * @brief Accumulator overflow notification enable switch. - * @details If set to @p TRUE the support for accumulator overflow - * is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_QEI_USE_ACC_OVERFLOWED_CB) || defined(__DOXYGEN__) -#define NRF5_QEI_USE_ACC_OVERFLOWED_CB FALSE -#endif - -/** - * @brief QEID1 driver enable switch. - * @details If set to @p TRUE the support for QEID1 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_QEI_USE_QDEC0) || defined(__DOXYGEN__) -#define NRF5_QEI_USE_QDEC0 FALSE -#endif - -/** - * @brief QEID interrupt priority level setting for QDEC0. - */ -#if !defined(NRF5_QEI_QDEC0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_QEI_QDEC0_IRQ_PRIORITY 2 -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if NRF5_QEI_USE_QDEC0 == FALSE -#error "Requesting QEI driver, but no QDEC peripheric attached" -#endif - -#if NRF5_QEI_USE_QDEC0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_QEI_QDEC0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to QDEC0" -#endif - - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief QEI count mode. - */ -typedef enum { - QEI_MODE_QUADRATURE = 0, /**< Quadrature encoder mode. */ -} qeimode_t; - -/** - * @brief QEI resolution. - */ -typedef enum { - QEI_RESOLUTION_128us = 0x00UL, /**< 128us sample period. */ - QEI_RESOLUTION_256us = 0x01UL, /**< 256us sample period. */ - QEI_RESOLUTION_512us = 0x02UL, /**< 512us sample period. */ - QEI_RESOLUTION_1024us = 0x03UL, /**< 1024us sample period. */ - QEI_RESOLUTION_2048us = 0x04UL, /**< 2048us sample period. */ - QEI_RESOLUTION_4096us = 0x05UL, /**< 4096us sample period. */ - QEI_RESOLUTION_8192us = 0x06UL, /**< 8192us sample period. */ - QEI_RESOLUTION_16384us = 0x07UL, /**< 16384us sample period. */ -} qeiresolution_t; - -/** - * @brief Clusters of samples. - */ -typedef enum { - QEI_REPORT_10 = 0x00UL, /**< 10 samples per report. */ - QEI_REPORT_40 = 0x01UL, /**< 40 samples per report. */ - QEI_REPORT_80 = 0x02UL, /**< 80 samples per report. */ - QEI_REPORT_120 = 0x03UL, /**< 120 samples per report. */ - QEI_REPORT_160 = 0x04UL, /**< 160 samples per report. */ - QEI_REPORT_200 = 0x05UL, /**< 200 samples per report. */ - QEI_REPORT_240 = 0x06UL, /**< 240 samples per report. */ - QEI_REPORT_280 = 0x07UL, /**< 280 samples per report. */ -} qeireport_t; - -/** - * @brief QEI direction inversion. - */ -typedef enum { - QEI_DIRINV_FALSE = 0, /**< Do not invert counter direction. */ - QEI_DIRINV_TRUE = 1, /**< Invert counter direction. */ -} qeidirinv_t; - -/** - * @brief QEI counter type. - */ -typedef int16_t qeicnt_t; - -/** - * @brief QEI delta type. - */ -typedef int16_t qeidelta_t; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Count mode. - */ - qeimode_t mode; - /** - * @brief Resolution. - */ - qeiresolution_t resolution; - /** - * @brief Direction inversion. - */ - qeidirinv_t dirinv; - /** - * @brief Handling of counter overflow/underflow - * - * @details When overflow occurs, the counter value is updated - * according to: - * - QEI_OVERFLOW_DISCARD: - * discard the update value, counter doesn't change - * - QEI_OVERFLOW_MINMAX - * counter will be updated to reach min or max - * - QEI_OVERFLOW_WRAP: - * counter value will wrap around - */ - qeioverflow_t overflow; - /** - * @brief Min count value. - * - * @note If min == max, then QEI_COUNT_MIN is used. - */ - qeicnt_t min; - /** - * @brief Max count value. - * - * @note If min == max, then QEI_COUNT_MAX is used. - */ - qeicnt_t max; - /** - * @brief Notify of value change - * - * @note Called from ISR context. - */ - qeicallback_t notify_cb; - /** - * @brief Notify of overflow - * - * @note Overflow notification is performed after - * value changed notification. - * @note Called from ISR context. - */ - void (*overflow_cb)(QEIDriver *qeip, qeidelta_t delta); - /* End of the mandatory fields.*/ - /** - * @brief Line for reading Phase A - */ - ioline_t phase_a; - /** - * @brief Line for reading Phase B - */ - ioline_t phase_b; -#if (NRF5_QEI_USE_LED == TRUE) || defined(__DOXYGEN__) - /** - * @brief Line used to control LED - * - * @note If LED is not controlled by MCU, you need to use the - * PAL_NOLINE value. - */ - ioline_t led; - /** - * @brief Period in µs the LED is switched on prior to sampling. - * - * @details LED warming is expressed in micro-seconds and value - * is [0..511] - * - * @note 31µs is the recommanded default. - * - * @note If debouncing is activated, LED is always on for the - * whole sampling period (aka: resolution) - */ - uint16_t led_warming; - /** - * @brief LED polarity to used (when LED is controlled by MCU) - */ - uint8_t led_polarity; -#endif - /** - * @brief Activate debouncing filter - * - * @note If LED is controlled by MCU, the led_warming is ignored and, - * LED is always on for the whole sampling period (aka: resolution) - */ - bool debouncing; - /** - * @brief Number of samples per report - * - * @details Default to QEI_REPORT_10 - */ - qeireport_t report; -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - /** - * @brief Notify of internal accumulator overflowed - * (ie: MCU discarding samples) - * - * @note Called from ISR context. - */ - qeicallback_t overflowed_cb; -#endif -} QEIConfig; - -/** - * @brief Structure representing an QEI driver. - */ -struct QEIDriver { - /** - * @brief Driver state. - */ - qeistate_t state; - /** - * @brief Last count value. - */ - qeicnt_t last; - /** - * @brief Current configuration data. - */ - const QEIConfig *config; -#if defined(QEI_DRIVER_EXT_FIELDS) - QEI_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Counter - */ - qeicnt_t count; -#if NRF5_QEI_USE_ACC_OVERFLOWED_CB == TRUE - /** - * @brief Number of time the MCU discarded updates due to - * accumulator overflow - */ - uint32_t overflowed; -#endif - /** - * @brief Pointer to the QDECx registers block. - */ - NRF_QDEC_Type *qdec; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Returns the counter value. - * - * @param[in] qeip pointer to the @p QEIDriver object - * @return The current counter value. - * - * @notapi - */ -#define qei_lld_get_count(qeip) ((qeip)->count) - - -/** - * @brief Set the counter value. - * - * @param[in] qeip pointer to the @p QEIDriver object - * @param[in] value counter value - * - * @notapi - */ -#define qei_lld_set_count(qeip, value) \ - if ((qeip)->count != ((qeicnt_t)value)) { \ - (qeip)->count = value; \ - if ((qeip)->config->notify_cb) \ - (qeip)->config->notify_cb(qeip); \ - } while(0) - - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_QEI_USE_QDEC0 && !defined(__DOXYGEN__) -extern QEIDriver QEID1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void qei_lld_init(void); - void qei_lld_start(QEIDriver *qeip); - void qei_lld_stop(QEIDriver *qeip); - void qei_lld_enable(QEIDriver *qeip); - void qei_lld_disable(QEIDriver *qeip); - qeidelta_t qei_lld_adjust_count(QEIDriver *qeip, qeidelta_t delta); -#ifdef __cplusplus -} -#endif - -/*===========================================================================*/ -/* To be moved in hal_qei */ -/*===========================================================================*/ - -void qeiSetCount(QEIDriver *qeip, qeicnt_t value); -qeidelta_t qeiAdjust(QEIDriver *qeip, qeidelta_t delta); - -#endif /* HAL_USE_QEI */ - -#endif /* HAL_QEI_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_rng_lld.c b/os/hal/ports/NRF5/LLD/hal_rng_lld.c deleted file mode 100644 index 9712150..0000000 --- a/os/hal/ports/NRF5/LLD/hal_rng_lld.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - RNG for ChibiOS - Copyright (C) 2016 Stephane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_rng_lld.c - * @brief NRF5 RNG subsystem low level driver source. - * - * @addtogroup RNG - * @{ - */ - -#include "hal.h" - -#if (HAL_USE_RNG == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/** - * @brief RNG default configuration. - */ -static const RNGConfig default_config = { - .digital_error_correction = 1, -}; - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief RNGD1 driver identifier.*/ -#if NRF5_RNG_USE_RNG0 || defined(__DOXYGEN__) -RNGDriver RNGD1; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level RNG driver initialization. - * - * @notapi - */ -void rng_lld_init(void) { - rngObjectInit(&RNGD1); - RNGD1.rng = NRF_RNG; - RNGD1.irq = RNG_IRQn; -} - -/** - * @brief Configures and activates the RNG peripheral. - * - * @param[in] rngp pointer to the @p RNGDriver object - * - * @notapi - */ -void rng_lld_start(RNGDriver *rngp) { - NRF_RNG_Type *rng = rngp->rng; - - /* If not specified, set default configuration */ - if (rngp->config == NULL) - rngp->config = &default_config; - - /* Configure digital error correction */ - if (rngp->config->digital_error_correction) - rng->CONFIG |= RNG_CONFIG_DERCEN_Msk; - else - rng->CONFIG &= ~RNG_CONFIG_DERCEN_Msk; - - /* Clear pending events */ - rng->EVENTS_VALRDY = 0; -#if CORTEX_MODEL >= 4 - (void)rng->EVENTS_VALRDY; -#endif - - /* Set interrupt mask */ - rng->INTENSET = RNG_INTENSET_VALRDY_Msk; - - /* Start */ - rng->TASKS_START = 1; -} - - -/** - * @brief Deactivates the RNG peripheral. - * - * @param[in] rngp pointer to the @p RNGDriver object - * - * @notapi - */ -void rng_lld_stop(RNGDriver *rngp) { - NRF_RNG_Type *rng = rngp->rng; - - /* Stop peripheric */ - rng->TASKS_STOP = 1; -} - - -/** - * @brief Write random bytes; - * - * @param[in] rngp pointer to the @p RNGDriver object - * @param[in] n size of buf in bytes - * @param[in] buf @p buffer location - * - * @notapi - */ -msg_t rng_lld_write(RNGDriver *rngp, uint8_t *buf, size_t n, - systime_t timeout) { - NRF_RNG_Type *rng = rngp->rng; - size_t i; - - for (i = 0 ; i < n ; i++) { - /* Wait for byte ready - * It take about 677µs to generate a new byte, not sure if - * forcing a context switch will be a benefit - */ - while (rng->EVENTS_VALRDY == 0) { - /* Sleep and wakeup on ARM event (interrupt) */ - SCB->SCR |= SCB_SCR_SEVONPEND_Msk; - __SEV(); - __WFE(); - __WFE(); - } - - /* Read byte */ - buf[i] = (char)rng->VALUE; - - /* Mark as read */ - rng->EVENTS_VALRDY = 0; -#if CORTEX_MODEL >= 4 - (void)rng->EVENTS_VALRDY; -#endif - - /* Clear interrupt so we can wake up again */ - nvicClearPending(rngp->irq); - } - return MSG_OK; -} - -#endif /* HAL_USE_RNG */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_rng_lld.h b/os/hal/ports/NRF5/LLD/hal_rng_lld.h deleted file mode 100644 index 5c56be2..0000000 --- a/os/hal/ports/NRF5/LLD/hal_rng_lld.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - RNG for ChibiOS - Copyright (C) 2016 Stephane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_rng_lld.h - * @brief NRF5 RNG subsystem low level driver header. - * - * @addtogroup RNG - * @{ - */ - -#ifndef HAL_RNG_LLD_H -#define HAL_RNG_LLD_H - -#if (HAL_USE_RNG == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief RNGD1 driver enable switch. - * @details If set to @p TRUE the support for RNGD1 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_RNG_USE_RNG0) || defined(__DOXYGEN__) -#define NRF5_RNG_USE_RNG0 FALSE -#endif - -/** - * @brief RNG interrupt priority level setting for RNG0. - */ -#if !defined(NRF5_RNG_RNG0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_RNG_RNG0_IRQ_PRIORITY 3 -#endif - - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if NRF5_RNG_USE_RNG0 == FALSE -#error "Requesting RNG driver, but no RNG peripheric attached" -#endif - -#if NRF5_RNG_USE_RNG0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_RNG_RNG0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to RNG0" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an RNG driver. - */ -typedef struct RNGDriver RNGDriver; - -/** - * @brief Driver configuration structure. - */ -typedef struct { - /* End of the mandatory fields.*/ - /** - * @brief Activate the digital error correction - * - * @details A digital corrector algorithm is employed to remove any - * bias toward '1' or '0'. Disabling it offers a substantial - * speed advantage, but may result in a statistical distribution - * that is not perfectly uniform. - * - * @note For nRF51, on average, it take 167µs to get a byte without - * digitial error correction and 677µs with, but no garantee - * is made on the necessary time to generate one byte. - */ - uint8_t digital_error_correction:1; -} RNGConfig; - - -/** - * @brief Structure representing an RNG driver. - */ -struct RNGDriver { - /** - * @brief Driver state. - */ - rngstate_t state; - /** - * @brief Current configuration data. - */ - const RNGConfig *config; -#if RNG_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the peripheral. - */ - mutex_t mutex; -#endif /* RNG_USE_MUTUAL_EXCLUSION */ - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the RNGx registers block. - */ - NRF_RNG_Type *rng; - /** - * @brief IRQ number - */ - uint32_t irq; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_RNG_USE_RNG0 && !defined(__DOXYGEN__) -extern RNGDriver RNGD1; -#endif /* NRF5_RNG_USE_RNG0 */ - -#ifdef __cplusplus -extern "C" { -#endif - void rng_lld_init(void); - void rng_lld_start(RNGDriver *rngp); - void rng_lld_stop(RNGDriver *rngp); - msg_t rng_lld_write(RNGDriver *rngp, uint8_t *buf, size_t n, - systime_t timeout); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_RNG */ - -#endif /* HAL_RNG_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_serial_lld.c b/os/hal/ports/NRF5/LLD/hal_serial_lld.c deleted file mode 100644 index 42091e8..0000000 --- a/os/hal/ports/NRF5/LLD/hal_serial_lld.c +++ /dev/null @@ -1,343 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_serial_lld.c - * @brief NRF5 serial subsystem low level driver source. - * - * @addtogroup SERIAL - * @{ - */ - -#include "hal.h" - -#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__) - -#if NRF_SERIES == 51 -#include "nrf51.h" -#elif NRF_SERIES == 52 -#include "nrf52.h" -#define UART0_IRQn UARTE0_UART0_IRQn -#endif - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief USART1 serial driver identifier.*/ -#if (NRF5_SERIAL_USE_UART0 == TRUE) || defined(__DOXYGEN__) -SerialDriver SD1; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Driver default configuration. - */ -static const SerialConfig default_config = { - .speed = 38400, - .tx_pad = NRF5_SERIAL_PAD_DISCONNECTED, - .rx_pad = NRF5_SERIAL_PAD_DISCONNECTED, -#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) - .rts_pad = NRF5_SERIAL_PAD_DISCONNECTED, - .cts_pad = NRF5_SERIAL_PAD_DISCONNECTED, -#endif -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/* - * @brief Maps a baudrate speed to a BAUDRATE register value. - */ - -/** - * @brief Common UART configuration. - * - */ -static void configure_uart(const SerialConfig *config) -{ - uint32_t speed = UART_BAUDRATE_BAUDRATE_Baud250000; - - switch (config->speed) { - case 1200: speed = UART_BAUDRATE_BAUDRATE_Baud1200; break; - case 2400: speed = UART_BAUDRATE_BAUDRATE_Baud2400; break; - case 4800: speed = UART_BAUDRATE_BAUDRATE_Baud4800; break; - case 9600: speed = UART_BAUDRATE_BAUDRATE_Baud9600; break; - case 14400: speed = UART_BAUDRATE_BAUDRATE_Baud14400; break; - case 19200: speed = UART_BAUDRATE_BAUDRATE_Baud19200; break; - case 28800: speed = UART_BAUDRATE_BAUDRATE_Baud28800; break; - case 38400: speed = UART_BAUDRATE_BAUDRATE_Baud38400; break; - case 57600: speed = UART_BAUDRATE_BAUDRATE_Baud57600; break; - case 76800: speed = UART_BAUDRATE_BAUDRATE_Baud76800; break; - case 115200: speed = UART_BAUDRATE_BAUDRATE_Baud115200; break; - case 230400: speed = UART_BAUDRATE_BAUDRATE_Baud230400; break; - case 250000: speed = UART_BAUDRATE_BAUDRATE_Baud250000; break; - case 460800: speed = UART_BAUDRATE_BAUDRATE_Baud460800; break; - case 921600: speed = UART_BAUDRATE_BAUDRATE_Baud921600; break; - case 1000000: speed = UART_BAUDRATE_BAUDRATE_Baud1M; break; - default: osalDbgAssert(0, "invalid baudrate"); break; - }; - - /* Configure PINs mode */ - if (config->tx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { - palSetPadMode(IOPORT1, config->tx_pad, PAL_MODE_OUTPUT_PUSHPULL); - } - if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { - palSetPadMode(IOPORT1, config->rx_pad, PAL_MODE_INPUT); - } -#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) - if (config->rts_pad != NRF5_SERIAL_PAD_DISCONNECTED) { - palSetPadMode(IOPORT1, config->rts_pad, PAL_MODE_OUTPUT_PUSHPULL); - } - if (config->cts_pad != NRF5_SERIAL_PAD_DISCONNECTED) { - palSetPadMode(IOPORT1, config->cts_pad, PAL_MODE_INPUT); - } -#endif - - /* Select PINs used by UART */ - NRF_UART0->PSELTXD = config->tx_pad; - NRF_UART0->PSELRXD = config->rx_pad; -#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) - NRF_UART0->PSELRTS = config->rts_pad; - NRF_UART0->PSELCTS = config->cts_pad; -#else - NRF_UART0->PSELRTS = NRF5_SERIAL_PAD_DISCONNECTED; - NRF_UART0->PSELCTS = NRF5_SERIAL_PAD_DISCONNECTED; -#endif - - /* Set baud rate */ - NRF_UART0->BAUDRATE = speed; - - /* Set config */ - NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos); - - /* Adjust flow control */ -#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) - if ((config->rts_pad < TOTAL_GPIO_PADS) || - (config->cts_pad < TOTAL_GPIO_PADS)) { - NRF_UART0->CONFIG |= UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos; - } else { - NRF_UART0->CONFIG &= ~(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); - } -#else - NRF_UART0->CONFIG &= ~(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); -#endif - - /* Enable UART and clear events */ - NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Enabled; - NRF_UART0->EVENTS_RXDRDY = 0; - NRF_UART0->EVENTS_TXDRDY = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_UART0->EVENTS_RXDRDY; - (void)NRF_UART0->EVENTS_TXDRDY; -#endif - - if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) { - while (NRF_UART0->EVENTS_RXDRDY != 0) { - (void)NRF_UART0->RXD; - } - } -} - - -/** - * @brief Driver output notification. - */ -#if NRF5_SERIAL_USE_UART0 || defined(__DOXYGEN__) -static void notify1(io_queue_t *qp) -{ - SerialDriver *sdp = &SD1; - - (void)qp; - - if (NRF_UART0->PSELTXD == NRF5_SERIAL_PAD_DISCONNECTED) - return; - - if (!sdp->tx_busy) { - msg_t b = oqGetI(&sdp->oqueue); - - if (b < Q_OK) { - chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); - NRF_UART0->TASKS_STOPTX = 1; - return; - } - sdp->tx_busy = 1; - NRF_UART0->TASKS_STARTTX = 1; - NRF_UART0->TXD = b; - } -} -#endif - - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_SERIAL_USE_UART0 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(Vector48) { - - OSAL_IRQ_PROLOGUE(); - - SerialDriver *sdp = &SD1; - uint32_t isr = NRF_UART0->INTENSET; - - if ((NRF_UART0->EVENTS_RXDRDY != 0) && (isr & UART_INTENSET_RXDRDY_Msk)) { - // Clear UART RX event flag - NRF_UART0->EVENTS_RXDRDY = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_UART0->EVENTS_RXDRDY; -#endif - - osalSysLockFromISR(); - if (iqIsEmptyI(&sdp->iqueue)) - chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE); - if (iqPutI(&sdp->iqueue, NRF_UART0->RXD) < Q_OK) - chnAddFlagsI(sdp, SD_OVERRUN_ERROR); - osalSysUnlockFromISR(); - } - - if ((NRF_UART0->EVENTS_TXDRDY != 0) && (isr & UART_INTENSET_TXDRDY_Msk)) { - msg_t b; - - // Clear UART TX event flag. - NRF_UART0->EVENTS_TXDRDY = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_UART0->EVENTS_TXDRDY; -#endif - - osalSysLockFromISR(); - b = oqGetI(&sdp->oqueue); - osalSysUnlockFromISR(); - - if (b < Q_OK) { - osalSysLockFromISR(); - chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); - osalSysUnlockFromISR(); - NRF_UART0->TASKS_STOPTX = 1; - sdp->tx_busy = 0; - } else { - sdp->tx_busy = 1; - NRF_UART0->TXD = b; - } - } - - /* TODO: Error handling for EVENTS_ERROR */ - if ((NRF_UART0->EVENTS_ERROR != 0) && (isr & UART_INTENSET_ERROR_Msk)) { - // Clear UART ERROR event flag. - NRF_UART0->EVENTS_ERROR = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_UART0->EVENTS_ERROR; -#endif - } - - - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level serial driver initialization. - * - * @notapi - */ -void sd_lld_init(void) { - -#if NRF5_SERIAL_USE_UART0 == TRUE - sdObjectInit(&SD1, NULL, notify1); -#endif -} - -/** - * @brief Low level serial driver configuration and (re)start. - * - * @param[in] sdp pointer to a @p SerialDriver object - * @param[in] config the architecture-dependent serial driver configuration. - * If this parameter is set to @p NULL then a default - * configuration is used. - * - * @notapi - */ -void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { - - if (config == NULL) - config = &default_config; - - osalDbgAssert( - (config->rx_pad < TOTAL_GPIO_PADS) || (config->tx_pad < TOTAL_GPIO_PADS), - "must configure at least an RX or TX pad"); - - if (sdp->state == SD_STOP) { - -#if NRF5_SERIAL_USE_UART0 == TRUE - if (sdp == &SD1) { - configure_uart(config); - - // Enable UART interrupt - NRF_UART0->INTENCLR = (uint32_t)-1; - NRF_UART0->INTENSET = UART_INTENSET_ERROR_Msk; - if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) - NRF_UART0->INTENSET |= UART_INTENSET_RXDRDY_Msk; - if (config->tx_pad != NRF5_SERIAL_PAD_DISCONNECTED) - NRF_UART0->INTENSET |= UART_INTENSET_TXDRDY_Msk; - - nvicEnableVector(UART0_IRQn, NRF5_SERIAL_UART0_PRIORITY); - - if (config->rx_pad != NRF5_SERIAL_PAD_DISCONNECTED) - NRF_UART0->TASKS_STARTRX = 1; - } -#endif - - } -} - -/** - * @brief Low level serial driver stop. - * @details De-initializes the USART, stops the associated clock, resets the - * interrupt vector. - * - * @param[in] sdp pointer to a @p SerialDriver object - * - * @notapi - */ -void sd_lld_stop(SerialDriver *sdp) { - - if (sdp->state == SD_READY) { - -#if NRF5_SERIAL_USE_UART0 == TRUE - if (&SD1 == sdp) { - nvicDisableVector(UART0_IRQn); - NRF_UART0->ENABLE = UART_ENABLE_ENABLE_Disabled; - } -#endif - } -} - -#endif /* HAL_USE_SERIAL == TRUE */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_serial_lld.h b/os/hal/ports/NRF5/LLD/hal_serial_lld.h deleted file mode 100644 index 741a40a..0000000 --- a/os/hal/ports/NRF5/LLD/hal_serial_lld.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_serial_lld.h - * @brief NRF5 serial subsystem low level driver header. - * - * @addtogroup SERIAL - * @{ - */ - -#ifndef HAL_SERIAL_LLD_H -#define HAL_SERIAL_LLD_H - -#if (HAL_USE_SERIAL == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name PLATFORM configuration options - * @{ - */ -/** - * @brief SD flow control enable switch. - * @details If set to @p TRUE the support for hardware flow control - * is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_SERIAL_USE_HWFLOWCTRL) || defined(__DOXYGEN__) -#define NRF5_SERIAL_USE_HWFLOWCTRL FALSE -#endif - -/** - * @brief SD1 driver enable switch. - * @details If set to @p TRUE the support for SD1 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_SERIAL_USE_UART0) || defined(__DOXYGEN__) -#define NRF5_SERIAL_USE_UART0 FALSE -#endif - -/** - * @brief UART0 interrupt priority level setting. - */ -#if !defined(NRF5_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_SERIAL_UART0_PRIORITY 3 -#endif - -/* Value indicating that no pad is connected to this UART register. */ -#define NRF5_SERIAL_PAD_DISCONNECTED 0xFFFFFFFFU -#define NRF5_SERIAL_INVALID_BAUDRATE 0xFFFFFFFFU - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if NRF5_SERIAL_USE_UART0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SERIAL_UART0_PRIORITY) -#error "Invalid IRQ priority assigned to UART0" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief NRF51 Serial Driver configuration structure. - * @details An instance of this structure must be passed to @p sdStart() - * in order to configure and start a serial driver operations. - * @note This structure content is architecture dependent, each driver - * implementation defines its own version and the custom static - * initializers. - */ -typedef struct { - /** - * @brief Bit rate. - */ - uint32_t speed; - /* End of the mandatory fields.*/ - uint32_t tx_pad; - uint32_t rx_pad; -#if (NRF5_SERIAL_USE_HWFLOWCTRL == TRUE) - uint32_t rts_pad; - uint32_t cts_pad; -#endif -} SerialConfig; - -/** - * @brief @p SerialDriver specific data. - */ -#define _serial_driver_data \ - _base_asynchronous_channel_data \ - /* Driver state.*/ \ - sdstate_t state; \ - /* Input queue.*/ \ - input_queue_t iqueue; \ - /* Output queue.*/ \ - output_queue_t oqueue; \ - /* Input circular buffer.*/ \ - uint8_t ib[SERIAL_BUFFERS_SIZE]; \ - /* Output circular buffer.*/ \ - uint8_t ob[SERIAL_BUFFERS_SIZE]; \ - /* 1 if port is busy transmitting, 0 otherwise. */ \ - uint8_t tx_busy; \ - /* End of the mandatory fields.*/ \ - thread_t *thread; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if (NRF5_SERIAL_USE_UART0 == TRUE) && !defined(__DOXYGEN__) -extern SerialDriver SD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void sd_lld_init(void); - void sd_lld_start(SerialDriver *sdp, const SerialConfig *config); - void sd_lld_stop(SerialDriver *sdp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SERIAL == TRUE */ - -#endif /* HAL_SERIAL_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_spi_lld.c b/os/hal/ports/NRF5/LLD/hal_spi_lld.c deleted file mode 100644 index 2c6ec91..0000000 --- a/os/hal/ports/NRF5/LLD/hal_spi_lld.c +++ /dev/null @@ -1,389 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_spi_lld.c - * @brief NRF5 low level SPI driver code. - * - * @addtogroup SPI - * @{ - */ - -#include "hal.h" - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -#if NRF5_SPI_USE_SPI0 || defined(__DOXYGEN__) -/** @brief SPI1 driver identifier.*/ -SPIDriver SPID1; -#endif - -#if NRF5_SPI_USE_SPI1 || defined(__DOXYGEN__) -/** @brief SPI2 driver identifier.*/ -SPIDriver SPID2; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Preloads the transmit FIFO. - * - * @param[in] spip pointer to the @p SPIDriver object - */ -static void port_fifo_preload(SPIDriver *spip) { - NRF_SPI_Type *port = spip->port; - - if (spip->txcnt > 0 && spip->txptr != NULL) - port->TXD = *(uint8_t *)spip->txptr++; - else - port->TXD = 0xFF; - spip->txcnt--; -} - -#if defined(__GNUC__) -__attribute__((noinline)) -#endif -/** - * @brief Common IRQ handler. - * - * @param[in] spip pointer to the @p SPIDriver object - */ -static void serve_interrupt(SPIDriver *spip) { - NRF_SPI_Type *port = spip->port; - - // Clear SPI READY event flag - port->EVENTS_READY = 0; -#if CORTEX_MODEL >= 4 - (void)port->EVENTS_READY; -#endif - - if (spip->rxptr != NULL) { - *(uint8_t *)spip->rxptr++ = port->RXD; - } - else { - (void)port->RXD; - if (--spip->rxcnt == 0) { - osalDbgAssert(spip->txcnt == 0, "counter out of synch"); - /* Stops the IRQ sources.*/ - spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); - /* Portable SPI ISR code defined in the high level driver, note, it is - a macro.*/ - _spi_isr_code(spip); - return; - } - } - if (spip->txcnt > 0) { - port_fifo_preload(spip); - } - else { - spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); - /* Portable SPI ISR code defined in the high level driver, note, it is - a macro.*/ - _spi_isr_code(spip); - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_SPI_USE_SPI0 || defined(__DOXYGEN__) -/** - * @brief SPI0 interrupt handler. - * - * @isr - */ -CH_IRQ_HANDLER(Vector4C) { - - CH_IRQ_PROLOGUE(); - serve_interrupt(&SPID1); - CH_IRQ_EPILOGUE(); -} -#endif -#if NRF5_SPI_USE_SPI1 || defined(__DOXYGEN__) -/** - * @brief SPI1 interrupt handler. - * - * @isr - */ -CH_IRQ_HANDLER(Vector50) { - - CH_IRQ_PROLOGUE(); - serve_interrupt(&SPID2); - CH_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level SPI driver initialization. - * - * @notapi - */ -void spi_lld_init(void) { - -#if NRF5_SPI_USE_SPI0 - spiObjectInit(&SPID1); - SPID1.port = NRF_SPI0; -#endif -#if NRF5_SPI_USE_SPI1 - spiObjectInit(&SPID2); - SPID2.port = NRF_SPI1; -#endif -} - -/** - * @brief Configures and activates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_start(SPIDriver *spip) { - uint32_t config; - - if (spip->state == SPI_STOP) { -#if NRF5_SPI_USE_SPI0 - if (&SPID1 == spip) - nvicEnableVector(SPI0_TWI0_IRQn, NRF5_SPI_SPI0_IRQ_PRIORITY); -#endif -#if NRF5_SPI_USE_SPI1 - if (&SPID2 == spip) - nvicEnableVector(SPI1_TWI1_IRQn, NRF5_SPI_SPI1_IRQ_PRIORITY); -#endif - } - - config = spip->config->lsbfirst ? - (SPI_CONFIG_ORDER_LsbFirst << SPI_CONFIG_ORDER_Pos) : - (SPI_CONFIG_ORDER_MsbFirst << SPI_CONFIG_ORDER_Pos); - - switch (spip->config->mode) { - case 1: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); - config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - case 2: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); - config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - case 3: - config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos); - config |= (SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos); - break; - default: - config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos); - config |= (SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos); - break; - } - - /* Configuration.*/ - spip->port->CONFIG = config; -#if NRF_SERIES == 51 - spip->port->PSELSCK = spip->config->sckpad; - spip->port->PSELMOSI = spip->config->mosipad; - spip->port->PSELMISO = spip->config->misopad; -#else - spip->port->PSEL.SCK = spip->config->sckpad; - spip->port->PSEL.MOSI = spip->config->mosipad; - spip->port->PSEL.MISO = spip->config->misopad; -#endif - spip->port->FREQUENCY = spip->config->freq; - spip->port->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos); - - /* clear events flag */ - spip->port->EVENTS_READY = 0; -#if CORTEX_MODEL >= 4 - (void)spip->port->EVENTS_READY; -#endif -} - -/** - * @brief Deactivates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_stop(SPIDriver *spip) { - - if (spip->state != SPI_STOP) { - spip->port->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos); - spip->port->INTENCLR = (SPI_INTENCLR_READY_Clear << SPI_INTENCLR_READY_Pos); -#if NRF5_SPI_USE_SPI0 - if (&SPID1 == spip) - nvicDisableVector(SPI0_TWI0_IRQn); -#endif -#if NRF5_SPI_USE_SPI1 - if (&SPID2 == spip) - nvicDisableVector(SPI1_TWI1_IRQn); -#endif - } -} - -/** - * @brief Asserts the slave select signal and prepares for transfers. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_select(SPIDriver *spip) { - - palClearPad(IOPORT1, spip->config->sspad); -} - -/** - * @brief Deasserts the slave select signal. - * @details The previously selected peripheral is unselected. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_unselect(SPIDriver *spip) { - - palSetPad(IOPORT1, spip->config->sspad); -} - -/** - * @brief Ignores data on the SPI bus. - * @details This function transmits a series of idle words on the SPI bus and - * ignores the received data. This function can be invoked even - * when a slave select signal has not been yet asserted. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be ignored - * - * @notapi - */ -void spi_lld_ignore(SPIDriver *spip, size_t n) { - - spip->rxptr = NULL; - spip->txptr = NULL; - spip->rxcnt = spip->txcnt = n; - port_fifo_preload(spip); - spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); -} - -/** - * @brief Exchanges data on the SPI bus. - * @details This asynchronous function starts a simultaneous transmit/receive - * operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be exchanged - * @param[in] txbuf the pointer to the transmit buffer - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf) { - - spip->rxptr = rxbuf; - spip->txptr = txbuf; - spip->rxcnt = spip->txcnt = n; - port_fifo_preload(spip); - spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); -} - -/** - * @brief Sends data over the SPI bus. - * @details This asynchronous function starts a transmit operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to send - * @param[in] txbuf the pointer to the transmit buffer - * - * @notapi - */ -void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - - spip->rxptr = NULL; - spip->txptr = txbuf; - spip->rxcnt = spip->txcnt = n; - port_fifo_preload(spip); - spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); -} - -/** - * @brief Receives data from the SPI bus. - * @details This asynchronous function starts a receive operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to receive - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - - spip->rxptr = rxbuf; - spip->txptr = NULL; - spip->rxcnt = spip->txcnt = n; - port_fifo_preload(spip); - spip->port->INTENSET = (SPI_INTENCLR_READY_Enabled << SPI_INTENCLR_READY_Pos); -} - -/** - * @brief Exchanges one frame using a polled wait. - * @details This synchronous function exchanges one frame using a polled - * synchronization method. This function is useful when exchanging - * small amount of data on high speed channels, usually in this - * situation is much more efficient just wait for completion using - * polling than suspending the thread waiting for an interrupt. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] frame the data frame to send over the SPI bus - * @return The received data frame from the SPI bus. - */ -uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - - spip->port->TXD = (uint8_t)frame; - while (spip->port->EVENTS_READY == 0) - ; - spip->port->EVENTS_READY = 0; -#if CORTEX_MODEL >= 4 - (void)spip->port->EVENTS_READY; -#endif - return spip->port->RXD; -} - -#endif /* HAL_USE_SPI */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_spi_lld.h b/os/hal/ports/NRF5/LLD/hal_spi_lld.h deleted file mode 100644 index afad5ab..0000000 --- a/os/hal/ports/NRF5/LLD/hal_spi_lld.h +++ /dev/null @@ -1,238 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF/LLD/hal_spi_lld.h - * @brief NRF5 low level SPI driver header. - * - * @addtogroup SPI - * @{ - */ - -#ifndef HAL_SPI_LLD_H -#define HAL_SPI_LLD_H - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief SPI0 interrupt priority level setting. - */ -#if !defined(NRF5_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_SPI_SPI0_IRQ_PRIORITY 3 -#endif - -/** - * @brief SPI1 interrupt priority level setting. - */ -#if !defined(NRF5_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_SPI_SPI1_IRQ_PRIORITY 3 -#endif - -/** - * @brief Overflow error hook. - * @details The default action is to stop the system. - */ -#if !defined(NRF5_SPI_SPI_ERROR_HOOK) || defined(__DOXYGEN__) -#define NRF5_SPI_SPI_ERROR_HOOK() chSysHalt() -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !NRF5_SPI_USE_SPI0 && !NRF5_SPI_USE_SPI1 -#error "SPI driver activated but no SPI peripheral assigned" -#endif - -#if NRF5_SPI_USE_SPI0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SPI_SPI0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI0" -#endif - -#if NRF5_SPI_USE_SPI1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_SPI_SPI1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI1" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an SPI driver. - */ -typedef struct SPIDriver SPIDriver; - -/** - * @brief SPI notification callback type. - * - * @param[in] spip pointer to the @p SPIDriver object triggering the - * callback - */ -typedef void (*spicallback_t)(SPIDriver *spip); - -/** - * @brief SPI frequency - */ -typedef enum { - NRF5_SPI_FREQ_125KBPS = (SPI_FREQUENCY_FREQUENCY_K125 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_250KBPS = (SPI_FREQUENCY_FREQUENCY_K250 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_500KBPS = (SPI_FREQUENCY_FREQUENCY_K500 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_1MBPS = (SPI_FREQUENCY_FREQUENCY_M1 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_2MBPS = (SPI_FREQUENCY_FREQUENCY_M2 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_4MBPS = (SPI_FREQUENCY_FREQUENCY_M4 << SPI_FREQUENCY_FREQUENCY_Pos), - NRF5_SPI_FREQ_8MBPS = (SPI_FREQUENCY_FREQUENCY_M8 << SPI_FREQUENCY_FREQUENCY_Pos), -} spifreq_t; - -/** - * @brief Driver configuration structure. - */ -typedef struct { - /** - * @brief Operation complete callback or @p NULL. - */ - spicallback_t end_cb; - /** - * @brief The frequency of the SPI peripheral - */ - spifreq_t freq; - /** - * @brief The SCK pad - */ - uint16_t sckpad; - /** - * @brief The MOSI pad - */ - uint16_t mosipad; - /** - * @brief The MOSI pad - */ - uint16_t misopad; - /* End of the mandatory fields.*/ - /** - * @brief The chip select line pad number. - */ - uint16_t sspad; - /** - * @brief Shift out least significant bit first - */ - uint8_t lsbfirst; - /** - * @brief SPI mode - */ - uint8_t mode; -} SPIConfig; - -/** - * @brief Structure representing a SPI driver. - */ -struct SPIDriver { - /** - * @brief Driver state. - */ - spistate_t state; - /** - * @brief Current configuration data. - */ - const SPIConfig *config; -#if SPI_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif /* SPI_USE_WAIT */ -#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) -#if CH_CFG_USE_MUTEXES || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#elif CH_CFG_USE_SEMAPHORES - semaphore_t semaphore; -#endif -#endif /* SPI_USE_MUTUAL_EXCLUSION */ -#if defined(SPI_DRIVER_EXT_FIELDS) - SPI_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the SPI port. - */ - NRF_SPI_Type *port; - /** - * @brief Number of bytes yet to be received. - */ - uint32_t rxcnt; - /** - * @brief Receive pointer or @p NULL. - */ - void *rxptr; - /** - * @brief Number of bytes yet to be transmitted. - */ - uint32_t txcnt; - /** - * @brief Transmit pointer or @p NULL. - */ - const void *txptr; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_SPI_USE_SPI0 && !defined(__DOXYGEN__) -extern SPIDriver SPID1; -#endif -#if NRF5_SPI_USE_SPI1 && !defined(__DOXYGEN__) -extern SPIDriver SPID2; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void spi_lld_init(void); - void spi_lld_start(SPIDriver *spip); - void spi_lld_stop(SPIDriver *spip); - void spi_lld_select(SPIDriver *spip); - void spi_lld_unselect(SPIDriver *spip); - void spi_lld_ignore(SPIDriver *spip, size_t n); - void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf); - void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); - void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); - uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SPI */ - -#endif /* HAL_SPI_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_st_lld.c b/os/hal/ports/NRF5/LLD/hal_st_lld.c deleted file mode 100644 index 8e42029..0000000 --- a/os/hal/ports/NRF5/LLD/hal_st_lld.c +++ /dev/null @@ -1,328 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 Fabio Utzig - 2016 Stephane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_st_lld.c - * @brief NRF5 ST subsystem low level driver source. - * - * @addtogroup ST - * @{ - */ - -#include "hal.h" - -#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) -#if NRF5_ST_USE_RTC0 == TRUE -/** - * @brief System Timer vector (RTC0) - * @details This interrupt is used for system tick in periodic mode - * if selected with NRF5_ST_USE_RTC0 - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector6C) { - - OSAL_IRQ_PROLOGUE(); - - NRF_RTC0->EVENTS_TICK = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_TICK; -#endif - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if NRF5_ST_USE_RTC1 == TRUE -/** - * @brief System Timer vector (RTC1) - * @details This interrupt is used for system tick in periodic mode - * if selected with NRF5_ST_USE_RTC1 - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector84) { - - OSAL_IRQ_PROLOGUE(); - - NRF_RTC1->EVENTS_TICK = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_TICK; -#endif - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if NRF5_ST_USE_TIMER0 == TRUE -/** - * @brief System Timer vector. (TIMER0) - * @details This interrupt is used for system tick in periodic mode - * if selected with NRF5_ST_USE_TIMER0 - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector60) { - - OSAL_IRQ_PROLOGUE(); - - /* Clear timer compare event */ - if (NRF_TIMER0->EVENTS_COMPARE[0] != 0) { - NRF_TIMER0->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_TIMER0->EVENTS_COMPARE[0]; -#endif - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - } - - OSAL_IRQ_EPILOGUE(); -} -#endif -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ - -#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__) -#if NRF5_ST_USE_RTC0 == TRUE -/** - * @brief System Timer vector (RTC0) - * @details This interrupt is used for freerunning mode (tick-less) - * if selected with NRF5_ST_USE_RTC0 - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector6C) { - - OSAL_IRQ_PROLOGUE(); - - if (NRF_RTC0->EVENTS_COMPARE[0]) { - NRF_RTC0->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[0]; -#endif - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - } - -#if OSAL_ST_RESOLUTION == 16 - if (NRF_RTC0->EVENTS_COMPARE[1]) { - NRF_RTC0->EVENTS_COMPARE[1] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[1]; -#endif - NRF_RTC0->TASKS_CLEAR = 1; - } -#endif - - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if NRF5_ST_USE_RTC1 == TRUE -/** - * @brief System Timer vector (RTC1) - * @details This interrupt is used for freerunning mode (tick-less) - * if selected with NRF5_ST_USE_RTC1 - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector84) { - - OSAL_IRQ_PROLOGUE(); - - if (NRF_RTC1->EVENTS_COMPARE[0]) { - NRF_RTC1->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_COMPARE[0]; -#endif - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - } - -#if OSAL_ST_RESOLUTION == 16 - if (NRF_RTC1->EVENTS_COMPARE[1]) { - NRF_RTC1->EVENTS_COMPARE[1] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_COMPARE[1]; -#endif - NRF_RTC1->TASKS_CLEAR = 1; - } -#endif - - OSAL_IRQ_EPILOGUE(); -} -#endif -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level ST driver initialization. - * - * @notapi - */ -void st_lld_init(void) { -#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING - -#if NRF5_ST_USE_RTC0 == TRUE - /* Using RTC with prescaler */ - NRF_RTC0->TASKS_STOP = 1; - NRF_RTC0->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; - NRF_RTC0->EVTENCLR = RTC_EVTENSET_COMPARE0_Msk; - NRF_RTC0->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[0]; -#endif - NRF_RTC0->INTENSET = RTC_INTENSET_COMPARE0_Msk; -#if OSAL_ST_RESOLUTION == 16 - NRF_RTC0->CC[1] = 0x10000; /* 2^16 */ - NRF_RTC0->EVENTS_COMPARE[1] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[1]; -#endif - NRF_RTC0->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; - NRF_RTC0->INTENSET = RTC_INTENSET_COMPARE1_Msk; -#endif - NRF_RTC0->TASKS_CLEAR = 1; - - /* Start timer */ - nvicEnableVector(RTC0_IRQn, NRF5_ST_PRIORITY); - NRF_RTC0->TASKS_START = 1; -#endif /* NRF5_ST_USE_RTC0 == TRUE */ - -#if NRF5_ST_USE_RTC1 == TRUE - /* Using RTC with prescaler */ - NRF_RTC1->TASKS_STOP = 1; - NRF_RTC1->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; - NRF_RTC1->EVTENCLR = RTC_EVTENSET_COMPARE0_Msk; - NRF_RTC1->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_COMPARE[0]; -#endif - NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE0_Msk; -#if OSAL_ST_RESOLUTION == 16 - NRF_RTC1->CC[1] = 0x10000; /* 2^16 */ - NRF_RTC1->EVENTS_COMPARE[1] = 0; -#if CORTEX_MODEL >= 4 - NRF_RTC1->EVENTS_COMPARE[1]; -#endif - NRF_RTC1->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; - NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE1_Msk; -#endif - NRF_RTC1->TASKS_CLEAR = 1; - - /* Start timer */ - nvicEnableVector(RTC1_IRQn, NRF5_ST_PRIORITY); - NRF_RTC1->TASKS_START = 1; -#endif /* NRF5_ST_USE_RTC1 == TRUE */ - -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ - -#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC - -#if NRF5_ST_USE_RTC0 == TRUE - /* Using RTC with prescaler */ - NRF_RTC0->TASKS_STOP = 1; - NRF_RTC0->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; - NRF_RTC0->INTENSET = RTC_INTENSET_TICK_Msk; - - /* Start timer */ - nvicEnableVector(RTC0_IRQn, NRF5_ST_PRIORITY); - NRF_RTC0->TASKS_START = 1; -#endif /* NRF5_ST_USE_RTC0 == TRUE */ - -#if NRF5_ST_USE_RTC1 == TRUE - /* Using RTC with prescaler */ - NRF_RTC1->TASKS_STOP = 1; - NRF_RTC1->PRESCALER = (NRF5_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; - NRF_RTC1->INTENSET = RTC_INTENSET_TICK_Msk; - - /* Start timer */ - nvicEnableVector(RTC1_IRQn, NRF5_ST_PRIORITY); - NRF_RTC1->TASKS_START = 1; -#endif /* NRF5_ST_USE_RTC1 == TRUE */ - -#if NRF5_ST_USE_TIMER0 == TRUE - NRF_TIMER0->TASKS_CLEAR = 1; - - /* - * Using 32-bit mode with prescaler 1/16 configures this - * timer with a 1MHz clock, reducing power consumption. - */ - NRF_TIMER0->BITMODE = TIMER_BITMODE_BITMODE_32Bit; - NRF_TIMER0->PRESCALER = 4; - - /* - * Configure timer 0 compare capture 0 to generate interrupt - * and clear timer value when event is generated. - */ - NRF_TIMER0->CC[0] = (1000000 / OSAL_ST_FREQUENCY) - 1; - NRF_TIMER0->SHORTS = 1; - NRF_TIMER0->INTENSET = TIMER_INTENSET_COMPARE0_Msk; - - /* Start timer */ - nvicEnableVector(TIMER0_IRQn, NRF5_ST_PRIORITY); - NRF_TIMER0->TASKS_START = 1; -#endif /* NRF5_ST_USE_TIMER0 == TRUE */ - -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ -} - -#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_st_lld.h b/os/hal/ports/NRF5/LLD/hal_st_lld.h deleted file mode 100644 index 93c2abb..0000000 --- a/os/hal/ports/NRF5/LLD/hal_st_lld.h +++ /dev/null @@ -1,285 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/st_lld.h - * @brief NRF5 ST subsystem low level driver header. - * @details This header is designed to be include-able without having to - * include other files from the HAL. - * - * @addtogroup ST - * @{ - */ - -#ifndef HAL_ST_LLD_H -#define HAL_ST_LLD_H - -#include "halconf.h" - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief Use RTC0 to generates system ticks - * - * @note Avoid using RTC0, as PPI has pre-programmed channels on it - * that can be used to control RADIO or TIMER0 - */ -#if !defined(NRF5_ST_USE_RTC0) || defined(__DOXYGEN__) -#define NRF5_ST_USE_RTC0 FALSE -#endif - -/** - * @brief Use RTC1 to generates system ticks - */ -#if !defined(NRF5_ST_USE_RTC1) || defined(__DOXYGEN__) -#define NRF5_ST_USE_RTC1 TRUE -#endif - -/** - * @brief Use TIMER0 to generates system ticks - * - * @note Avoid using TIMER0 as it will draw more current - */ -#if !defined(NRF5_ST_USE_TIMER0) || defined(__DOXYGEN__) -#define NRF5_ST_USE_TIMER0 FALSE -#endif - -/** - * @brief ST interrupt priority level setting. - */ -#if !defined(NRF5_ST_PRIORITY) || defined(__DOXYGEN__) -#if !defined(SOFTDEVICE_PRESENT) -#define NRF5_ST_PRIORITY CORTEX_MAX_KERNEL_PRIORITY -#else -#define NRF5_ST_PRIORITY 1 -#endif -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if OSAL_ST_MODE != OSAL_ST_MODE_NONE -#if (NRF5_ST_USE_TIMER0 == TRUE) && (NRF5_GPT_USE_TIMER0 == TRUE) -#error "TIMER0 already used by GPT driver" -#endif - -#if (NRF5_ST_USE_RTC0 == FALSE) && \ - (NRF5_ST_USE_RTC1 == FALSE) && \ - (NRF5_ST_USE_TIMER0 == FALSE) -#error "One clock source is needed, enable one (RTC0, RTC1, or TIMER0)" -#endif - -#if ((NRF5_ST_USE_RTC0 == TRUE ? 1 : 0) + \ - (NRF5_ST_USE_RTC1 == TRUE ? 1 : 0) + \ - (NRF5_ST_USE_TIMER0 == TRUE ? 1 : 0)) > 1 -#error "Only one clock source can be used (RTC0, RTC1, or TIMER0)" -#endif - -#if defined(SOFTDEVICE_PRESENT) -#if NRF5_ST_USE_RTC0 == TRUE -#error "RTC0 cannot be used for system ticks when SOFTDEVICE present" -#endif - -#if NRF5_ST_USE_TIMER0 == TRUE -#error "TIMER0 cannot be used for system ticks when SOFTDEVICE present" -#endif - -#if NRF5_ST_PRIORITY != 1 -#error "ST priority must be 1 when SOFTDEVICE present" -#endif - -#endif /* defined(SOFTDEVICE_PRESENT) */ -#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ - -#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING -#if defined(CH_CFG_ST_TIMEDELTA) && (CH_CFG_ST_TIMEDELTA < 5) -#error "CH_CFG_ST_TIMEDELTA is too low" -#endif -#if NRF5_ST_USE_TIMER0 == TRUE -#error "Freeruning (tick-less) mode not supported with TIMER, use RTC" -#endif -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */ - -#if !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ST_PRIORITY) -#error "Invalid IRQ priority assigned to ST driver" -#endif - - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#ifdef __cplusplus -extern "C" { -#endif - void st_lld_init(void); -#ifdef __cplusplus -} -#endif - -/*===========================================================================*/ -/* Driver inline functions. */ -/*===========================================================================*/ - -/** - * @brief Returns the time counter value. - * - * @return The counter value. - * - * @notapi - */ -static inline systime_t st_lld_get_counter(void) { -#if NRF5_ST_USE_RTC0 == TRUE - return (systime_t)NRF_RTC0->COUNTER; -#endif -#if NRF5_ST_USE_RTC1 == TRUE - return (systime_t)NRF_RTC1->COUNTER; -#endif -#if NRF5_ST_USE_TIMER0 == TRUE - return (systime_t)0; -#endif -} - -/** - * @brief Starts the alarm. - * @note Makes sure that no spurious alarms are triggered after - * this call. - * - * @param[in] abstime the time to be set for the first alarm - * - * @notapi - */ -static inline void st_lld_start_alarm(systime_t abstime) { -#if NRF5_ST_USE_RTC0 == TRUE - NRF_RTC0->CC[0] = abstime; - NRF_RTC0->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[0]; -#endif - NRF_RTC0->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; -#endif -#if NRF5_ST_USE_RTC1 == TRUE - NRF_RTC1->CC[0] = abstime; - NRF_RTC1->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_COMPARE[0]; -#endif - NRF_RTC1->EVTENSET = RTC_EVTENSET_COMPARE0_Msk; -#endif -#if NRF5_ST_USE_TIMER0 == TRUE - (void)abstime; -#endif -} - -/** - * @brief Stops the alarm interrupt. - * - * @notapi - */ -static inline void st_lld_stop_alarm(void) { -#if NRF5_ST_USE_RTC0 == TRUE - NRF_RTC0->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk; - NRF_RTC0->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC0->EVENTS_COMPARE[0]; -#endif -#endif -#if NRF5_ST_USE_RTC1 == TRUE - NRF_RTC1->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk; - NRF_RTC1->EVENTS_COMPARE[0] = 0; -#if CORTEX_MODEL >= 4 - (void)NRF_RTC1->EVENTS_COMPARE[0]; -#endif -#endif -} - -/** - * @brief Sets the alarm time. - * - * @param[in] abstime the time to be set for the next alarm - * - * @notapi - */ -static inline void st_lld_set_alarm(systime_t abstime) { -#if NRF5_ST_USE_RTC0 == TRUE - NRF_RTC0->CC[0] = abstime; -#endif -#if NRF5_ST_USE_RTC1 == TRUE - NRF_RTC1->CC[0] = abstime; -#endif -#if NRF5_ST_USE_TIMER0 == TRUE - (void)abstime; -#endif -} - -/** - * @brief Returns the current alarm time. - * - * @return The currently set alarm time. - * - * @notapi - */ -static inline systime_t st_lld_get_alarm(void) { -#if NRF5_ST_USE_RTC0 == TRUE - return (systime_t)NRF_RTC0->CC[0]; -#endif -#if NRF5_ST_USE_RTC1 == TRUE - return (systime_t)NRF_RTC1->CC[0]; -#endif -#if NRF5_ST_USE_TIMER0 == TRUE - return (systime_t)0; -#endif -} - -/** - * @brief Determines if the alarm is active. - * - * @return The alarm status. - * @retval false if the alarm is not active. - * @retval true is the alarm is active - * - * @notapi - */ -static inline bool st_lld_is_alarm_active(void) { -#if NRF5_ST_USE_RTC0 == TRUE - return NRF_RTC0->EVTEN & RTC_EVTEN_COMPARE0_Msk; -#endif -#if NRF5_ST_USE_RTC1 == TRUE - return NRF_RTC1->EVTEN & RTC_EVTEN_COMPARE0_Msk; -#endif -#if NRF5_ST_USE_TIMER0 == TRUE - return false; -#endif -} - -#endif /* HAL_ST_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_wdg_lld.c b/os/hal/ports/NRF5/LLD/hal_wdg_lld.c deleted file mode 100644 index 35c079f..0000000 --- a/os/hal/ports/NRF5/LLD/hal_wdg_lld.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - ChibiOS - Copyright (C) 2016 Stephane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_wdg_lld.c - * @brief NRF5 Watchdog Driver subsystem low level driver source template. - * - * @addtogroup WDG - * @{ - */ - -#include "hal.h" - -#if HAL_USE_WDG || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define RELOAD_REQUEST_VALUE 0x6E524635 - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -WDGDriver WDGD1; - -/*===========================================================================*/ -/* Driver local variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if WDG_USE_TIMEOUT_CALLBACK == TRUE -/** - * @brief Watchdog vector. - * @details This interrupt is used when watchdog timeout. - * - * @note Only 2 cycles at NRF5_LFCLK_FREQUENCY are available - * to they good bye. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector80) { - - OSAL_IRQ_PROLOGUE(); - osalSysLockFromISR(); - - /* Notify */ - if (WDGD1.config->callback) - WDGD1.config->callback(); - - /* Wait for reboot */ - while (1) { /* */ } - - osalSysUnlockFromISR(); - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level WDG driver initialization. - * - * @notapi - */ -void wdg_lld_init(void) { - WDGD1.state = WDG_STOP; - WDGD1.wdt = NRF_WDT; -} - -/** - * @brief Configures and activates the WDG peripheral. - * - * @note Once started there is no way out. - * - * @param[in] wdgp pointer to the @p WDGDriver object - * - * @notapi - */ -void wdg_lld_start(WDGDriver *wdgp) { - osalDbgAssert((wdgp->state == WDG_STOP), - "This WDG driver cannot be restarted once activated"); - - /* Generate interrupt on timeout */ -#if WDG_USE_TIMEOUT_CALLBACK == TRUE - wdgp->wdt->INTENSET = WDT_INTENSET_TIMEOUT_Msk; -#endif - - /* When to pause? (halt, sleep) */ - uint32_t config = 0; - if (!wdgp->config->pause_on_sleep) - config |= WDT_CONFIG_SLEEP_Msk; - if (!wdgp->config->pause_on_halt) - config |= WDT_CONFIG_HALT_Msk; - wdgp->wdt->CONFIG = config; - - /* Timeout in milli-seconds */ - uint64_t tout = (NRF5_LFCLK_FREQUENCY * wdgp->config->timeout_ms / 1000) - 1; - osalDbgAssert(tout <= 0xFFFFFFFF, "watchdog timout value exceeded"); - wdgp->wdt->CRV = (uint32_t)tout; - - /* Reload request (using RR0) */ - wdgp->wdt->RREN = WDT_RREN_RR0_Msk; - - /* Say your prayers, little one. */ - wdgp->wdt->TASKS_START = 1; -} - -/** - * @brief Deactivates the WDG peripheral. - * - * @param[in] wdgp pointer to the @p WDGDriver object - * - * @api - */ -void wdg_lld_stop(WDGDriver *wdgp) { - (void)wdgp; - osalDbgAssert(false, "This WDG driver cannot be stopped once activated"); -} - -/** - * @brief Reloads WDG's counter. - * - * @param[in] wdgp pointer to the @p WDGDriver object - * - * @notapi - */ -void wdg_lld_reset(WDGDriver * wdgp) { - wdgp->wdt->RR[0] = RELOAD_REQUEST_VALUE; -} - -#endif /* HAL_USE_WDG */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/hal_wdg_lld.h b/os/hal/ports/NRF5/LLD/hal_wdg_lld.h deleted file mode 100644 index 109b67e..0000000 --- a/os/hal/ports/NRF5/LLD/hal_wdg_lld.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - ChibiOS - Copyright (C) 2016 Stephane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/LLD/hal_wdg_lld.h - * @brief NRF5 Watchdog Driver subsystem low level driver header template. - * - * @addtogroup WDG - * @{ - */ - -#ifndef HAL_WDG_LLD_H -#define HAL_WDG_LLD_H - -#if (HAL_USE_WDG == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#define WDG_MAX_TIMEOUT_MS \ - ((uint32_t)(0xFFFFFFFFu * 1000 / NRF5_LFCLK_FREQUENCY)) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ - -/** - * @brief WDG driver implement timeout callback. - * @note The default is @p FALSE. - */ -#if !defined(WDG_USE_TIMEOUT_CALLBACK) || defined(__DOXYGEN__) -#define WDG_USE_TIMEOUT_CALLBACK FALSE -#endif -/** @} */ - - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an WDG driver. - */ -typedef struct WDGDriver WDGDriver; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - struct { - /** - * @brief Pause watchdog while the CPU is sleeping - */ - uint8_t pause_on_sleep : 1; - /** - * @brief Pause watchdog while the CPU is halted by the debugger - */ - uint8_t pause_on_halt : 1; - }; - /** - * - */ - uint32_t timeout_ms; -#if WDG_USE_TIMEOUT_CALLBACK == TRUE - /** - * @brief Notification callback when watchdog timedout - * - * @note About 2 cycles at NRF5_LFCLK_FREQUENCY are available - * before automatic reboot. - * - */ - void (*callback)(void); -#endif -} WDGConfig; - - - -/** - * @brief Structure representing an WDG driver. - */ -struct WDGDriver { - /** - * @brief Driver state. - */ - wdgstate_t state; - /** - * @brief Current configuration data. - */ - const WDGConfig *config; - /* End of the mandatory fields.*/ - NRF_WDT_Type *wdt; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -extern WDGDriver WDGD1; - -#ifdef __cplusplus -extern "C" { -#endif - void wdg_lld_init(void); - void wdg_lld_start(WDGDriver *wdgp); - void wdg_lld_stop(WDGDriver *wdgp); - void wdg_lld_reset(WDGDriver *wdgp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_WDG == TRUE */ - -#endif /* HAL_WDG_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_adc_lld.c b/os/hal/ports/NRF5/NRF51822/hal_adc_lld.c deleted file mode 100644 index 6c0f2c6..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_adc_lld.c +++ /dev/null @@ -1,227 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51Fx22/adc_lld.c - * @brief NRF51Fx22 ADC subsystem low level driver source. - * - * @addtogroup ADC - * @{ - */ - -#include "hal.h" - -#if HAL_USE_ADC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ -#define ADC_CHANNEL_MASK 0x7 - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief ADC1 driver identifier.*/ -#if NRF5_ADC_USE_ADC1 || defined(__DOXYGEN__) -ADCDriver ADCD1; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void adc_lld_config_next_channel(ADCDriver *adcp, uint32_t config) { - - /* Default to all analog input pins disabled */ - config &= ~ADC_CONFIG_PSEL_Msk; - - if (adcp->grpp->channel_mask) { - /* Skip to the next channel */ - while (((1 << adcp->current_channel) & adcp->grpp->channel_mask) == 0) - adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; - config |= (((1 << adcp->current_channel) << ADC_CONFIG_PSEL_Pos) & ADC_CONFIG_PSEL_Msk); - } - - /* Setup analog input pin select and user config values */ - adcp->adc->CONFIG = config; -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_ADC_USE_ADC1 || defined(__DOXYGEN__) -/** - * @brief ADC interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector5C) { - - ADCDriver *adcp = &ADCD1; - NRF_ADC_Type *adc = adcp->adc; - bool more = true; - - OSAL_IRQ_PROLOGUE(); - - /* Clear the ADC event */ - adc->EVENTS_END = 0; - - /* Read the sample into the buffer */ - adcp->samples[adcp->current_index++] = adc->RESULT; - - /* At the end of the buffer then we may be finished */ - if (adcp->current_index == adcp->number_of_samples) { - _adc_isr_full_code(adcp); - - adcp->current_index = 0; - - /* We are never finished in circular mode */ - more = adcp->grpp->circular; - } - - if (more) { - - /* Signal half completion in circular mode. */ - if (adcp->grpp->circular && - (adcp->current_index == (adcp->number_of_samples / 2))) { - - _adc_isr_half_code(adcp); - } - - /* Skip to the next channel */ - adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; - adc_lld_config_next_channel(adcp, adcp->adc->CONFIG); - adcp->adc->TASKS_START = 1; - } else { - adc_lld_stop_conversion(adcp); - } - - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level ADC driver initialization. - * - * @notapi - */ -void adc_lld_init(void) { - -#if NRF5_ADC_USE_ADC1 - /* Driver initialization.*/ - adcObjectInit(&ADCD1); - ADCD1.adc = NRF_ADC; -#endif -} - -/** - * @brief Configures and activates the ADC peripheral. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_start(ADCDriver *adcp) { - - /* If in stopped state then configures and enables the ADC. */ - if (adcp->state == ADC_STOP) { -#if NRF5_ADC_USE_ADC1 - if (&ADCD1 == adcp) { - - adcp->adc->INTENSET = ADC_INTENSET_END_Enabled << ADC_INTENSET_END_Pos; - nvicEnableVector(ADC_IRQn, NRF5_ADC_IRQ_PRIORITY); - } -#endif /* NRF5_ADC_USE_ADC1 */ - } -} - -/** - * @brief Deactivates the ADC peripheral. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_stop(ADCDriver *adcp) { - - /* If in ready state then disables the ADC clock and analog part.*/ - if (adcp->state == ADC_READY) { - -#if NRF5_ADC_USE_ADC1 - if (&ADCD1 == adcp) { - - nvicDisableVector(ADC_IRQn); - adcp->adc->INTENCLR = ADC_INTENCLR_END_Clear << ADC_INTENCLR_END_Pos; - adc_lld_stop_conversion(adcp); - } -#endif - } -} - -/** - * @brief Starts an ADC conversion. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_start_conversion(ADCDriver *adcp) { - - NRF_ADC_Type *adc = adcp->adc; - - adcp->number_of_samples = adcp->depth * adcp->grpp->num_channels; - adcp->current_index = 0; - - /* At least one sample must be configured */ - osalDbgAssert(adcp->number_of_samples, "must configure at least one sample"); - - /* Skip to the next channel */ - adcp->current_channel = 0; - adc_lld_config_next_channel(adcp, adcp->grpp->cfg); - - /* Enable and start the conversion */ - adc->ENABLE = ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos; - adc->TASKS_START = 1; -} - -/** - * @brief Stops an ongoing conversion. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_stop_conversion(ADCDriver *adcp) { - - NRF_ADC_Type *adc = adcp->adc; - - adc->TASKS_STOP = 1; - adc->ENABLE = ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos; -} - -#endif /* HAL_USE_ADC */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_adc_lld.h b/os/hal/ports/NRF5/NRF51822/hal_adc_lld.h deleted file mode 100644 index 2ee30ac..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_adc_lld.h +++ /dev/null @@ -1,229 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51x22/adc_lld.h - * @brief NRF51x22 ADC subsystem low level driver header. - * - * @addtogroup ADC - * @{ - */ - -#ifndef HAL_ADC_LLD_H -#define HAL_ADC_LLD_H - -#if HAL_USE_ADC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief ADC1 driver enable switch. - * @details If set to @p TRUE the support for ADC1 is included. - * @note The default is @p FALSE. - */ -#if !defined(NRF5_ADC_USE_ADC1) || defined(__DOXYGEN__) -#define NRF5_ADC_USE_ADC1 FALSE -#endif - -/** - * @brief ADC interrupt priority level setting. - */ -#if !defined(NRF5_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_ADC_IRQ_PRIORITY 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !NRF5_ADC_USE_ADC1 -#error "ADC driver activated but no ADC peripheral assigned" -#endif - -#if NRF5_ADC_USE_ADC1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ADC_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to ADC1" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief ADC sample data type. - */ -typedef uint16_t adcsample_t; - -/** - * @brief Channels number in a conversion group. - */ -typedef uint8_t adc_channels_num_t; - -/** - * @brief Type of a structure representing an ADC driver. - */ -typedef struct ADCDriver ADCDriver; - -/** - * @brief ADC notification callback type. - * - * @param[in] adcp pointer to the @p ADCDriver object triggering the - * callback - * @param[in] buffer pointer to the most recent samples data - * @param[in] n number of buffer rows available starting from @p buffer - */ -typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); - -/** - * @brief Conversion group configuration structure. - * @details This implementation-dependent structure describes a conversion - * operation. - * @note The use of this configuration structure requires knowledge of - * STM32 ADC cell registers interface, please refer to the STM32 - * reference manual for details. - */ -typedef struct { - /** - * @brief Enables the circular buffer mode for the group. - */ - bool circular; - /** - * @brief Number of the analog channels belonging to the conversion group. - */ - adc_channels_num_t num_channels; - /** - * @brief Callback function associated to the group or @p NULL. - */ - adccallback_t end_cb; - /* End of the mandatory fields.*/ - /** - * @brief Bitmask of channels for ADC conversion. - */ - uint32_t channel_mask; - /** - * @brief ADC CONFIG register details. - * @note All the required bits must be defined into this field. - */ - uint32_t cfg; -} ADCConversionGroup; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - uint32_t dummy; -} ADCConfig; - -/** - * @brief Structure representing an ADC driver. - */ -struct ADCDriver { - /** - * @brief Driver state. - */ - adcstate_t state; - /** - * @brief Current configuration data. - */ - const ADCConfig *config; - /** - * @brief Current samples buffer pointer or @p NULL. - */ - adcsample_t *samples; - /** - * @brief Current samples buffer depth or @p 0. - */ - size_t depth; - /** - * @brief Current conversion group pointer or @p NULL. - */ - const ADCConversionGroup *grpp; -#if ADC_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif -#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the peripheral. - */ - mutex_t mutex; -#endif /* ADC_USE_MUTUAL_EXCLUSION */ -#if defined(ADC_DRIVER_EXT_FIELDS) - ADC_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the ADCx registers block. - */ - NRF_ADC_Type *adc; - /** - * @brief Number of samples expected. - */ - size_t number_of_samples; - /** - * @brief Current position in the buffer. - */ - size_t current_index; - /** - * @brief Current channel index into group channel_mask. - */ - size_t current_channel; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_ADC_USE_ADC1 && !defined(__DOXYGEN__) -extern ADCDriver ADCD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void adc_lld_init(void); - void adc_lld_start(ADCDriver *adcp); - void adc_lld_stop(ADCDriver *adcp); - void adc_lld_start_conversion(ADCDriver *adcp); - void adc_lld_stop_conversion(ADCDriver *adcp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_ADC */ - -#endif /* HAL_ADC_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c b/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c deleted file mode 100644 index 47736c7..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51822/ext_lld.c - * @brief NRF51822 EXT subsystem low level driver source. - * - * @addtogroup EXT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -#include "hal_ext_lld_isr.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief EXTD1 driver identifier. - */ -EXTDriver EXTD1; - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level EXT driver initialization. - * - * @notapi - */ -void ext_lld_init(void) { - - /* Driver initialization.*/ - extObjectInit(&EXTD1); -} - -/** - * @brief Configures and activates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_start(EXTDriver *extp) { - - unsigned i; - - ext_lld_exti_irq_enable(); - - /* Configuration of automatic channels.*/ - for (i = 0; i < EXT_MAX_CHANNELS; i++) { - uint32_t config = 0; - uint32_t pad = (extp->config->channels[i].mode & EXT_MODE_GPIO_MASK) - >> EXT_MODE_GPIO_OFFSET; - - if (extp->config->channels[i].mode & EXT_CH_MODE_BOTH_EDGES) - config |= (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); - else if (extp->config->channels[i].mode & EXT_CH_MODE_RISING_EDGE) - config |= (GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos); - else - config |= (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos); - - config |= (pad << GPIOTE_CONFIG_PSEL_Pos); - - NRF_GPIOTE->CONFIG[i] = config; - NRF_GPIOTE->EVENTS_PORT = 0; - NRF_GPIOTE->EVENTS_IN[i] = 0; - - if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART) - ext_lld_channel_enable(extp, i); - else - ext_lld_channel_disable(extp, i); - } -} - -/** - * @brief Deactivates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_stop(EXTDriver *extp) { - - unsigned i; - - (void)extp; - ext_lld_exti_irq_disable(); - - for (i = 0; i < EXT_MAX_CHANNELS; i++) - NRF_GPIOTE->CONFIG[i] = 0; - - NRF_GPIOTE->INTENCLR = - (GPIOTE_INTENCLR_IN3_Msk | GPIOTE_INTENCLR_IN2_Msk | - GPIOTE_INTENCLR_IN1_Msk | GPIOTE_INTENCLR_IN0_Msk); -} - -/** - * @brief Enables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be enabled - * - * @notapi - */ -void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { - - uint32_t config = NRF_GPIOTE->CONFIG[channel] & ~GPIOTE_CONFIG_MODE_Msk; - - (void)extp; - config |= (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos); - - NRF_GPIOTE->CONFIG[channel] = config; - NRF_GPIOTE->INTENSET = (1 << channel); -} - -/** - * @brief Disables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be disabled - * - * @notapi - */ -void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - NRF_GPIOTE->CONFIG[channel] &= ~GPIOTE_CONFIG_MODE_Msk; - NRF_GPIOTE->INTENCLR = (1 << channel); -} - -#endif /* HAL_USE_EXT */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_ext_lld.h b/os/hal/ports/NRF5/NRF51822/hal_ext_lld.h deleted file mode 100644 index 37ae721..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_ext_lld.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51822/ext_lld.h - * @brief NRF51822 GPIOTE subsystem low level driver header. - * - * @addtogroup EXT - * @{ - */ - -#ifndef HAL_EXT_LLD_H -#define HAL_EXT_LLD_H - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Available number of EXT channels. - */ -#define EXT_MAX_CHANNELS 4 -#define EXT_MODE_GPIO_MASK 0xF8 /**< @brief Pad field mask. */ -#define EXT_MODE_GPIO_OFFSET 3 /**< @brief Pad field offset. */ -/** @} */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief EXT channel identifier. - */ -typedef uint32_t expchannel_t; - -/** - * @brief Type of an EXT generic notification callback. - * - * @param[in] extp pointer to the @p EXPDriver object triggering the - * callback - */ -typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); - -/** - * @brief Channel configuration structure. - */ -typedef struct { - /** - * @brief Channel mode. - */ - uint32_t mode; - /** - * @brief Channel callback. - * @details In the STM32 implementation a @p NULL callback pointer is - * valid and configures the channel as an event sources instead - * of an interrupt source. - */ - extcallback_t cb; -} EXTChannelConfig; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Channel configurations. - */ - EXTChannelConfig channels[EXT_MAX_CHANNELS]; - /* End of the mandatory fields.*/ -} EXTConfig; - -/** - * @brief Structure representing an EXT driver. - */ -struct EXTDriver { - /** - * @brief Driver state. - */ - extstate_t state; - /** - * @brief Current configuration data. - */ - const EXTConfig *config; - /* End of the mandatory fields.*/ -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) -extern EXTDriver EXTD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void ext_lld_init(void); - void ext_lld_start(EXTDriver *extp); - void ext_lld_stop(EXTDriver *extp); - void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); - void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_EXT */ - -#endif /* HAL_EXT_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c b/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c deleted file mode 100644 index e2b4b6b..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c +++ /dev/null @@ -1,492 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file hal_pwm_lld.c - * @brief NRF51 PWM subsystem low level driver source. - * - * @note Using the method described in nrf51-pwm-library to correctly - * handle toggling of the pin with GPIOTE when changing period. - * It means it is generally unsafe to use GPIOTE with a period - * less than (2 * PWM_GPIOTE_DECISION_TIME / 16MHz) - * - * @addtogroup PWM - * @{ - */ - -#include "hal.h" - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define PWM_GPIOTE_PPI_CC 3 -#define PWM_GPIOTE_DECISION_TIME 160 - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief PWMD1 driver identifier. - * @note The driver PWMD1 allocates the timer TIMER0 when enabled. - */ -#if NRF5_PWM_USE_TIMER0 || defined(__DOXYGEN__) -PWMDriver PWMD1; -#endif - -/** - * @brief PWMD2 driver identifier. - * @note The driver PWMD2 allocates the timer TIMER1 when enabled. - */ -#if NRF5_PWM_USE_TIMER1 || defined(__DOXYGEN__) -PWMDriver PWMD2; -#endif - -/** - * @brief PWMD3 driver identifier. - * @note The driver PWMD3 allocates the timer TIMER2 when enabled. - */ -#if NRF5_PWM_USE_TIMER2 || defined(__DOXYGEN__) -PWMDriver PWMD3; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -static const uint8_t pwm_margin_by_prescaler[] = { - (PWM_GPIOTE_DECISION_TIME + 0) >> 0, - (PWM_GPIOTE_DECISION_TIME + 1) >> 1, - (PWM_GPIOTE_DECISION_TIME + 3) >> 2, - (PWM_GPIOTE_DECISION_TIME + 7) >> 3, - (PWM_GPIOTE_DECISION_TIME + 15) >> 4, - (PWM_GPIOTE_DECISION_TIME + 31) >> 5, - (PWM_GPIOTE_DECISION_TIME + 63) >> 6, - (PWM_GPIOTE_DECISION_TIME + 127) >> 7, - (PWM_GPIOTE_DECISION_TIME + 255) >> 8, - (PWM_GPIOTE_DECISION_TIME + 511) >> 9 -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { - uint8_t channel; - /* Deal with PWM channels - */ - for (channel = 0 ; channel < pwmp->channels ; channel++) { - if (pwmp->timer->EVENTS_COMPARE[channel]) { - pwmp->timer->EVENTS_COMPARE[channel] = 0; - - if (pwmp->config->channels[channel].callback != NULL) { - pwmp->config->channels[channel].callback(pwmp); - } - } - } - - /* Deal with PWM period - */ - if (pwmp->timer->EVENTS_COMPARE[pwmp->channels]) { - pwmp->timer->EVENTS_COMPARE[pwmp->channels] = 0; - - if (pwmp->config->callback != NULL) { - pwmp->config->callback(pwmp); - } - } -} - -static inline -bool pwm_within_safe_margins(PWMDriver *pwmp, uint32_t timer, uint32_t width) { - const uint32_t margin = pwm_margin_by_prescaler[pwmp->timer->PRESCALER]; - return (width <= margin) - ? ((width <= timer) && (timer < (pwmp->period + width - margin))) - : ((width <= timer) || (timer < (width - margin))); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if NRF5_PWM_USE_TIMER0 -/** - * @brief TIMER0 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector60) { - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_PWM_USE_TIMER0 */ - -#if NRF5_PWM_USE_TIMER1 -/** - * @brief TIMER1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector64) { - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_PWM_USE_TIMER1 */ - -#if NRF5_PWM_USE_TIMER2 -/** - * @brief TIMER2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector68) { - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_PWM_USE_TIMER2 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level PWM driver initialization. - * - * @notapi - */ -void pwm_lld_init(void) { - -#if NRF5_PWM_USE_TIMER0 - pwmObjectInit(&PWMD1); - PWMD1.channels = PWM_CHANNELS; - PWMD1.timer = NRF_TIMER0; -#endif - -#if NRF5_PWM_USE_TIMER1 - pwmObjectInit(&PWMD2); - PWMD2.channels = PWM_CHANNELS; - PWMD2.timer = NRF_TIMER1; -#endif - -#if NRF5_PWM_USE_TIMER2 - pwmObjectInit(&PWMD3); - PWMD3.channels = PWM_CHANNELS; - PWMD3.timer = NRF_TIMER2; -#endif -} - -/** - * @brief Configures and activates the PWM peripheral. - * @note Starting a driver that is already in the @p PWM_READY state - * disables all the active channels. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_start(PWMDriver *pwmp) { - /* Prescaler value calculation: ftimer = 16MHz / 2^PRESCALER */ - uint16_t psc_ratio = NRF5_HFCLK_FREQUENCY / pwmp->config->frequency; - /* Prescaler ratio must be between 1 and 512, and a power of two. */ - osalDbgAssert(psc_ratio <= 512 && !(psc_ratio & (psc_ratio - 1)), - "invalid frequency"); - /* Prescaler value as a power of 2, must be 0..9 */ - uint32_t psc_value; - for (psc_value = 0; psc_value < 10; psc_value++) - if (psc_ratio == (unsigned)(1 << psc_value)) - break; - - /* Configure as 16bits timer (only TIMER0 support 32bits) */ - pwmp->timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; - pwmp->timer->MODE = TIMER_MODE_MODE_Timer; - - /* With clear shortcuts for period */ - pwmp->timer->SHORTS = - 0x1UL << (TIMER_SHORTS_COMPARE0_CLEAR_Pos + pwmp->channels); - - /* Disable and reset interrupts for compare events */ - pwmp->timer->INTENCLR = (TIMER_INTENCLR_COMPARE0_Msk | - TIMER_INTENCLR_COMPARE1_Msk | - TIMER_INTENCLR_COMPARE2_Msk | - TIMER_INTENCLR_COMPARE3_Msk ); - pwmp->timer->EVENTS_COMPARE[0] = 0; - pwmp->timer->EVENTS_COMPARE[1] = 0; - pwmp->timer->EVENTS_COMPARE[2] = 0; - pwmp->timer->EVENTS_COMPARE[3] = 0; - - /* Set prescaler */ - pwmp->timer->PRESCALER = psc_value; - - /* Set period */ - pwmp->timer->CC[pwmp->channels] = pwmp->period; - - /* Clear everything */ - pwmp->timer->TASKS_CLEAR = 1; - - /* Enable interrupt */ -#if NRF5_PWM_USE_TIMER0 - if (&PWMD1 == pwmp) { - nvicEnableVector(TIMER0_IRQn, NRF5_PWM_TIMER0_PRIORITY); - } -#endif - -#if NRF5_PWM_USE_TIMER1 - if (&PWMD2 == pwmp) { - nvicEnableVector(TIMER1_IRQn, NRF5_PWM_TIMER1_PRIORITY); - } -#endif - -#if NRF5_PWM_USE_TIMER2 - if (&PWMD3 == pwmp) { - nvicEnableVector(TIMER2_IRQn, NRF5_PWM_TIMER2_PRIORITY); - } -#endif - - /* Start timer */ - pwmp->timer->TASKS_START = 1; -} - -/** - * @brief Deactivates the PWM peripheral. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_stop(PWMDriver *pwmp) { - pwmp->timer->TASKS_SHUTDOWN = 1; - -#if NRF5_PWM_USE_TIMER0 - if (&PWMD1 == pwmp) { - nvicDisableVector(TIMER0_IRQn); - } -#endif - -#if NRF5_PWM_USE_TIMER1 - if (&PWMD2 == pwmp) { - nvicDisableVector(TIMER1_IRQn); - } -#endif - -#if NRF5_PWM_USE_TIMER2 - if (&PWMD3 == pwmp) { - nvicDisableVector(TIMER2_IRQn); - } -#endif -} - -/** - * @brief Enables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is active using the specified configuration. - * @note The function has effect at the next cycle start. - * @note Channel notification is not enabled. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * @param[in] width PWM pulse width as clock pulses number - * - * @notapi - */ -void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width) { -#if NRF5_PWM_USE_GPIOTE_PPI - const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; - const uint8_t gpiote_channel = cfg_channel->gpiote_channel; - const uint8_t *ppi_channel = cfg_channel->ppi_channel; - - uint32_t outinit; - switch(cfg_channel->mode & PWM_OUTPUT_MASK) { - case PWM_OUTPUT_ACTIVE_LOW : outinit = GPIOTE_CONFIG_OUTINIT_Low; break; - case PWM_OUTPUT_ACTIVE_HIGH: outinit = GPIOTE_CONFIG_OUTINIT_High; break; - case PWM_OUTPUT_DISABLED : /* fall-through */ - default : goto no_output_config; - } - - /* Deal with corner case: 0% and 100% */ - if ((width <= 0) || (width >= pwmp->period)) { - /* Disable GPIOTE/PPI task */ - NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Disabled; - NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); - /* Set Line */ - palWriteLine(cfg_channel->ioline, - ((width <= 0) ^ - ((cfg_channel->mode & PWM_OUTPUT_MASK) == PWM_OUTPUT_ACTIVE_HIGH))); - - /* Really doing PWM */ - } else { - const uint32_t gpio_pin = PAL_PAD(cfg_channel->ioline); - const uint32_t polarity = GPIOTE_CONFIG_POLARITY_Toggle; - - /* Program tasks (one for duty cycle, one for periode) */ - NRF_PPI->CH[ppi_channel[0]].EEP = - (uint32_t)&pwmp->timer->EVENTS_COMPARE[channel]; - NRF_PPI->CH[ppi_channel[0]].TEP = - (uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel]; - NRF_PPI->CH[ppi_channel[1]].EEP = - (uint32_t)&pwmp->timer->EVENTS_COMPARE[pwmp->channels]; - NRF_PPI->CH[ppi_channel[1]].TEP = - (uint32_t)&NRF_GPIOTE->TASKS_OUT[gpiote_channel]; - NRF_PPI->CHENSET = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); - - /* Something Old, something New */ - const uint32_t old_width = pwmp->timer->CC[channel]; - const uint32_t new_width = width; - - /* Check GPIOTE state */ - const bool gpiote = (NRF_GPIOTE->CONFIG[gpiote_channel] & - GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled; - - /* GPIOTE is currently running */ - if (gpiote) { - uint32_t current; - while (true) { - pwmp->timer->TASKS_CAPTURE[PWM_GPIOTE_PPI_CC] = 1; - current = pwmp->timer->CC[PWM_GPIOTE_PPI_CC]; - - if (pwm_within_safe_margins(pwmp, current, old_width) && - pwm_within_safe_margins(pwmp, current, new_width)) - break; - } - if (((old_width <= current) && (current < new_width)) || - ((new_width <= current) && (current < old_width))) { - NRF_GPIOTE->TASKS_OUT[gpiote_channel] = 1; - } - - /* GPIOTE need to be restarted */ - } else { - /* Create GPIO Task */ - NRF_GPIOTE->CONFIG[gpiote_channel] = - (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) | - ((gpio_pin << GPIOTE_CONFIG_PSEL_Pos ) & GPIOTE_CONFIG_PSEL_Msk )| - ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk)| - ((outinit << GPIOTE_CONFIG_OUTINIT_Pos ) & GPIOTE_CONFIG_OUTINIT_Msk ); - - pwmp->timer->TASKS_CAPTURE[PWM_GPIOTE_PPI_CC] = 1; - if (pwmp->timer->CC[PWM_GPIOTE_PPI_CC] > width) - NRF_GPIOTE->TASKS_OUT[gpiote_channel] = 1; - } - } - - no_output_config: -#endif - - pwmp->timer->CC[channel] = width; -} - -/** - * @brief Disables a PWM channel and its notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is disabled and its output line returned to the - * idle state. - * @note The function has effect at the next cycle start. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { - pwmp->timer->CC[channel] = 0; -#if NRF5_PWM_USE_GPIOTE_PPI - const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; - switch(cfg_channel->mode & PWM_OUTPUT_MASK) { - case PWM_OUTPUT_ACTIVE_LOW: - case PWM_OUTPUT_ACTIVE_HIGH: { - const uint8_t gpiote_channel = cfg_channel->gpiote_channel; - const uint8_t *ppi_channel = cfg_channel->ppi_channel; - NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); - NRF_GPIOTE->CONFIG[gpiote_channel] = GPIOTE_CONFIG_MODE_Disabled; - break; - } - case PWM_OUTPUT_DISABLED: - default: - break; - } -#endif -} - -/** - * @brief Enables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { - pwmp->timer->INTENSET = - 0x1UL << (TIMER_INTENSET_COMPARE0_Pos + pwmp->channels); -} - -/** - * @brief Disables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { - pwmp->timer->INTENCLR = - 0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + pwmp->channels); -} - -/** - * @brief Enables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->timer->INTENSET = - 0x1UL << (TIMER_INTENSET_COMPARE0_Pos + channel); -} - -/** - * @brief Disables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->timer->INTENCLR = - 0x1UL << (TIMER_INTENCLR_COMPARE0_Pos + channel); -} - -#endif /* HAL_USE_PWM */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.h b/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.h deleted file mode 100644 index 2cad6e7..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.h +++ /dev/null @@ -1,334 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Stéphane D'Alu - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file hal_pwm_lld.h - * @brief NRF51 PWM subsystem low level driver header. - * - * @addtogroup PWM - * @{ - */ - -#ifndef HAL_PWM_LLD_H_ -#define HAL_PWM_LLD_H_ - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Number of PWM channels per PWM driver. - */ -#if NRF5_PWM_USE_GPIOTE_PPI -#define PWM_CHANNELS 2 -#else -#define PWM_CHANNELS 3 -#endif - -#define PWM_FREQUENCY_16MHZ 16000000 /** @brief 16MHz */ -#define PWM_FREQUENCY_8MHZ 8000000 /** @brief 8MHz */ -#define PWM_FREQUENCY_4MHZ 4000000 /** @brief 4MHz */ -#define PWM_FREQUENCY_2MHZ 2000000 /** @brief 2MHz */ -#define PWM_FREQUENCY_1MHZ 1000000 /** @brief 1MHz */ -#define PWM_FREQUENCY_500KHZ 500000 /** @brief 500kHz */ -#define PWM_FREQUENCY_250KHZ 250000 /** @brief 250kHz */ -#define PWM_FREQUENCY_125KHZ 125000 /** @brief 125kHz */ -#define PWM_FREQUENCY_62500HZ 62500 /** @brief 62500Hz */ -#define PWM_FREQUENCY_31250HZ 31250 /** @brief 31250Hz */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ - -/** - * @brief TIMER0 as driver implementation - */ -#if !defined(NRF5_PWM_USE_TIMER0) -#define NRF5_PWM_USE_TIMER0 FALSE -#endif - -/** - * @brief TIMER1 as driver implementation - */ -#if !defined(NRF5_PWM_USE_TIMER1) -#define NRF5_PWM_USE_TIMER1 FALSE -#endif - -/** - * @brief TIMER2 as driver implementation - */ -#if !defined(NRF5_PWM_USE_TIMER2) -#define NRF5_PWM_USE_TIMER2 FALSE -#endif - -/** - * @brief TIMER0 interrupt priority level setting. - */ -#if !defined(NRF5_PWM_TIMER0_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_PWM_TIMER0_PRIORITY 3 -#endif - -/** - * @brief TIMER1 interrupt priority level setting. - */ -#if !defined(NRF5_PWM_TIMER1_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_PWM_TIMER1_PRIORITY 3 -#endif - -/** - * @brief TIMER2 interrupt priority level setting. - */ -#if !defined(NRF5_PWM_TIMER2_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_PWM_TIMER2_PRIORITY 3 -#endif - -/** - * @brief Allow driver to use GPIOTE/PPI to control PAL line - */ -#if !defined(NRF5_PWM_USE_GPIOTE_PPI) -#define NRF5_PWM_USE_GPIOTE_PPI TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/* Configuration checks. */ -/*===========================================================================*/ - -#if !NRF5_PWM_USE_TIMER0 && !NRF5_PWM_USE_TIMER1 && !NRF5_PWM_USE_TIMER2 -#error "PWM driver activated but no TIMER peripheral assigned" -#endif - -#if (NRF5_ST_USE_TIMER0 == TRUE) && (NRF5_PWM_USE_TIMER0 == TRUE) -#error "TIMER0 used for ST and PWM" -#endif - -#if NRF5_PWM_USE_TIMER0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER0_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER0" -#endif - -#if NRF5_PWM_USE_TIMER1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER1_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER1" -#endif - -#if NRF5_PWM_USE_TIMER2 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_PWM_TIMER2_PRIORITY) -#error "Invalid IRQ priority assigned to TIMER2" -#endif - - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a PWM mode. - */ -typedef uint32_t pwmmode_t; - -/** - * @brief Type of a PWM channel. - */ -typedef uint8_t pwmchannel_t; - -/** - * @brief Type of a channels mask. - */ -typedef uint32_t pwmchnmsk_t; - -/** - * @brief Type of a PWM counter. - */ -typedef uint16_t pwmcnt_t; - -/** - * @brief Type of a PWM driver channel configuration structure. - */ -typedef struct { - /** - * @brief Channel active logic level. - */ - pwmmode_t mode; - - /** - * @brief Channel callback pointer. - * @note This callback is invoked on the channel compare event. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /* End of the mandatory fields.*/ - -#if NRF5_PWM_USE_GPIOTE_PPI || defined(__DOXYGEN__) - /** - * @brief PAL line to toggle. - * @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW. - * @note When NRF5_PWM_USE_GPIOTE_PPI is used and channel enabled, - * it wont be possible to access this PAL line using the PAL - * driver. - */ - ioline_t ioline; - - /** - * @brief Unique GPIOTE channel to use. (1 channel) - * @note Only 4 GPIOTE channels are available on nRF51. - */ - uint8_t gpiote_channel; - - /** - * @brief Unique PPI channels to use. (2 channels) - * @note Only 16 PPI channels are available on nRF51 - * (When Softdevice is enabled, only channels 0-7 are available) - */ - uint8_t ppi_channel[2]; -#endif -} PWMChannelConfig; - -/** - * @brief Type of a PWM driver configuration structure. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - uint32_t frequency; - /** - * @brief PWM period in ticks. - * @note The low level can use assertions in order to catch invalid - * period specifications. - */ - pwmcnt_t period; - /** - * @brief Periodic callback pointer. - * @note This callback is invoked on PWM counter reset. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /** - * @brief Channels configurations. - */ - PWMChannelConfig channels[PWM_CHANNELS]; - /* End of the mandatory fields.*/ -} PWMConfig; - -/** - * @brief Structure representing a PWM driver. - */ -struct PWMDriver { - /** - * @brief Driver state. - */ - pwmstate_t state; - /** - * @brief Current driver configuration data. - */ - const PWMConfig *config; - /** - * @brief Current PWM period in ticks. - */ - pwmcnt_t period; - /** - * @brief Mask of the enabled channels. - */ - pwmchnmsk_t enabled; - /** - * @brief Number of channels in this instance. - */ - pwmchannel_t channels; -#if defined(PWM_DRIVER_EXT_FIELDS) - PWM_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the TIMER registers block. - */ - NRF_TIMER_Type *timer; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the period the PWM peripheral. - * @details This function changes the period of a PWM unit that has already - * been activated using @p pwmStart(). - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The PWM unit period is changed to the new value. - * @note The function has effect at the next cycle start. - * @note If a period is specified that is shorter than the pulse width - * programmed in one of the channels then the behavior is not - * guaranteed. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] period new cycle time in ticks - * - * @notapi - */ -#define pwm_lld_change_period(pwmp, period) \ - do { \ - (pwmp)->timer->CC[(pwmp)->channels] = ((period) - 1); \ - } while(0) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if NRF5_PWM_USE_TIMER0 || defined(__DOXYGEN__) -extern PWMDriver PWMD1; -#endif -#if NRF5_PWM_USE_TIMER1 || defined(__DOXYGEN__) -extern PWMDriver PWMD2; -#endif -#if NRF5_PWM_USE_TIMER2 || defined(__DOXYGEN__) -extern PWMDriver PWMD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void pwm_lld_init(void); - void pwm_lld_start(PWMDriver *pwmp); - void pwm_lld_stop(PWMDriver *pwmp); - void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width); - void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); - void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); - void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PWM */ - -#endif /* HAL_PWM_LLD_H_ */ - -/** @} */ -- cgit v1.2.3 From f4d6d909898e777efaa2d479095e41cd2045621d Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sat, 29 Sep 2018 16:33:50 +0700 Subject: NRF5x platform - new Makefiles. --- os/hal/ports/NRF5/LLD/ADCv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/GPIOv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/PWMv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/QDECv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/RNGv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/SPIv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/TIMERv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/TWIv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/UARTv1/driver.mk | 9 ++++ os/hal/ports/NRF5/LLD/WDTv1/driver.mk | 9 ++++ os/hal/ports/NRF5/NRF51822/platform.mk | 89 +++++++++++--------------------- os/hal/ports/NRF5/NRF52832/platform.mk | 71 +++++++++---------------- 13 files changed, 153 insertions(+), 106 deletions(-) create mode 100644 os/hal/ports/NRF5/LLD/ADCv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/GPIOv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/PWMv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/QDECv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/RNGv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/SPIv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/TWIv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/UARTv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/WDTv1/driver.mk diff --git a/os/hal/ports/NRF5/LLD/ADCv1/driver.mk b/os/hal/ports/NRF5/LLD/ADCv1/driver.mk new file mode 100644 index 0000000..88deb3e --- /dev/null +++ b/os/hal/ports/NRF5/LLD/ADCv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/ADCv1/hal_adc_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/ADCv1 diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk b/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk new file mode 100644 index 0000000..97e0660 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1 diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk b/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk new file mode 100644 index 0000000..a627fab --- /dev/null +++ b/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1 diff --git a/os/hal/ports/NRF5/LLD/PWMv1/driver.mk b/os/hal/ports/NRF5/LLD/PWMv1/driver.mk new file mode 100644 index 0000000..d64b5dc --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv1/hal_pwm_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv1 diff --git a/os/hal/ports/NRF5/LLD/QDECv1/driver.mk b/os/hal/ports/NRF5/LLD/QDECv1/driver.mk new file mode 100644 index 0000000..de18c39 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/QDECv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/QDECv1/hal_qei_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/QDECv1 diff --git a/os/hal/ports/NRF5/LLD/RNGv1/driver.mk b/os/hal/ports/NRF5/LLD/RNGv1/driver.mk new file mode 100644 index 0000000..c128aae --- /dev/null +++ b/os/hal/ports/NRF5/LLD/RNGv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1/hal_rng_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1 diff --git a/os/hal/ports/NRF5/LLD/SPIv1/driver.mk b/os/hal/ports/NRF5/LLD/SPIv1/driver.mk new file mode 100644 index 0000000..d583a68 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/SPIv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1 diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk b/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk new file mode 100644 index 0000000..6f3ce0e --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1 diff --git a/os/hal/ports/NRF5/LLD/TWIv1/driver.mk b/os/hal/ports/NRF5/LLD/TWIv1/driver.mk new file mode 100644 index 0000000..3bc55d8 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1 diff --git a/os/hal/ports/NRF5/LLD/UARTv1/driver.mk b/os/hal/ports/NRF5/LLD/UARTv1/driver.mk new file mode 100644 index 0000000..5b4f634 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/UARTv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/hal_serial_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1 diff --git a/os/hal/ports/NRF5/LLD/WDTv1/driver.mk b/os/hal/ports/NRF5/LLD/WDTv1/driver.mk new file mode 100644 index 0000000..07e0fb9 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/WDTv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1/hal_wdg_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1 diff --git a/os/hal/ports/NRF5/NRF51822/platform.mk b/os/hal/ports/NRF5/NRF51822/platform.mk index 7305acf..298a85c 100644 --- a/os/hal/ports/NRF5/NRF51822/platform.mk +++ b/os/hal/ports/NRF5/NRF51822/platform.mk @@ -1,66 +1,35 @@ +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822 + ifeq ($(USE_SMART_BUILD),yes) -HALCONF := $(strip $(shell cat halconf.h halconf_community.h 2>/dev/null | egrep -e "define")) -# List of all the NRF51x platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c - -ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c -endif -ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c -endif -ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c -endif -ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c -endif -ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_i2c_lld.c -endif -ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_adc_lld.c -endif -ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c -endif -ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c -endif -ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c -endif -ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c -endif -ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c -endif -else -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_adc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . endif -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822 +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/ADCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/QDECv1/driver.mk +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/NRF5/NRF52832/platform.mk b/os/hal/ports/NRF5/NRF52832/platform.mk index 248027b..e71f591 100644 --- a/os/hal/ports/NRF5/NRF52832/platform.mk +++ b/os/hal/ports/NRF5/NRF52832/platform.mk @@ -1,52 +1,31 @@ +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832 + ifeq ($(USE_SMART_BUILD),yes) -HALCONF := $(strip $(shell cat halconf.h halconf_community.h 2>/dev/null | egrep -e "define")) -# List of all the NRF51x platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c - -ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c -endif -ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c -endif -ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c -endif -ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_i2c_lld.c -endif -ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c -endif -ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c -endif -ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c -endif -ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),) -PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c -endif -else -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_spi_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . endif -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832 +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/QDECv1/driver.mk +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) -- cgit v1.2.3 From 0e6f501f80d590a7f79b3b4b3f4ec278df57ad40 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sat, 29 Sep 2018 18:08:56 +0700 Subject: Update all NRF5x makefiles and chconf.h. Add missing halconf_community.h --- demos/NRF51/MICROBIT/Makefile | 30 ++- demos/NRF51/MICROBIT/chconf.h | 229 +++++++++++++++++--- demos/NRF51/MICROBIT/halconf_community.h | 173 +++++++++++++++ demos/NRF51/MICROBIT/main.c | 6 +- demos/NRF51/OSHCHIP_V1.0/Makefile | 26 +-- demos/NRF51/OSHCHIP_V1.0/chconf.h | 229 +++++++++++++++++--- demos/NRF51/OSHCHIP_V1.0/halconf_community.h | 173 +++++++++++++++ demos/NRF51/OSHCHIP_V1.0/main.c | 6 +- demos/NRF51/RT-WVSHARE_BLE400/Makefile | 26 +-- demos/NRF51/RT-WVSHARE_BLE400/chconf.h | 229 +++++++++++++++++--- demos/NRF51/RT-WVSHARE_BLE400/halconf_community.h | 173 +++++++++++++++ demos/NRF51/RT-WVSHARE_BLE400/main.c | 6 +- demos/NRF52/Classic/Makefile | 48 ++--- demos/NRF52/Classic/chconf.h | 218 ++++++++++++++++--- demos/NRF52/Classic/halconf_community.h | 142 +++++++++++-- demos/NRF52/Classic/main.c | 3 +- .../ARMCMx/compilers/GCC/mk/startup_nrf51.mk | 11 +- .../ARMCMx/compilers/GCC/mk/startup_nrf52.mk | 11 +- os/hal/boards/MICROBIT/board.mk | 4 + os/hal/boards/NRF51-DK/board.mk | 4 + os/hal/boards/NRF52-DK/board.mk | 3 + os/hal/boards/OSHCHIP_V1.0/board.mk | 4 + os/hal/boards/WVSHARE_BLE400/board.mk | 4 + os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h | 5 + testhal/NRF51/NRF51822/ADC/Makefile | 22 +- testhal/NRF51/NRF51822/ADC/chconf.h | 219 ++++++++++++++++--- testhal/NRF51/NRF51822/ADC/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/EXT/Makefile | 28 +-- testhal/NRF51/NRF51822/EXT/chconf.h | 229 +++++++++++++++++--- testhal/NRF51/NRF51822/EXT/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/GPT/Makefile | 22 +- testhal/NRF51/NRF51822/GPT/chconf.h | 219 ++++++++++++++++--- testhal/NRF51/NRF51822/GPT/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/I2C/Makefile | 22 +- testhal/NRF51/NRF51822/I2C/chconf.h | 231 ++++++++++++++++++--- testhal/NRF51/NRF51822/I2C/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/PWM/Makefile | 25 +-- testhal/NRF51/NRF51822/PWM/chconf.h | 229 +++++++++++++++++--- testhal/NRF51/NRF51822/PWM/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/PWM/main.c | 2 - testhal/NRF51/NRF51822/RNG/Makefile | 35 ++-- testhal/NRF51/NRF51822/RNG/chconf.h | 185 ++++++++++++++++- testhal/NRF51/NRF51822/RNG/halconf_community.h | 90 ++++++-- testhal/NRF51/NRF51822/SPI/Makefile | 24 +-- testhal/NRF51/NRF51822/SPI/chconf.h | 229 +++++++++++++++++--- testhal/NRF51/NRF51822/SPI/halconf_community.h | 173 +++++++++++++++ testhal/NRF51/NRF51822/WDG/Makefile | 20 +- testhal/NRF51/NRF51822/WDG/chconf.h | 219 ++++++++++++++++--- testhal/NRF51/NRF51822/WDG/halconf_community.h | 173 +++++++++++++++ 49 files changed, 4470 insertions(+), 554 deletions(-) create mode 100644 demos/NRF51/MICROBIT/halconf_community.h create mode 100644 demos/NRF51/OSHCHIP_V1.0/halconf_community.h create mode 100644 demos/NRF51/RT-WVSHARE_BLE400/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/ADC/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/EXT/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/GPT/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/I2C/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/PWM/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/SPI/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/WDG/halconf_community.h diff --git a/demos/NRF51/MICROBIT/Makefile b/demos/NRF51/MICROBIT/Makefile index fec59c6..aa516e0 100644 --- a/demos/NRF51/MICROBIT/Makefile +++ b/demos/NRF51/MICROBIT/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -100,27 +102,22 @@ include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(STREAMSSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,14 +140,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) \ - $(CHIBIOS)/os/various +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/NRF51/MICROBIT/chconf.h b/demos/NRF51/MICROBIT/chconf.h index 14c1bf3..1750f63 100644 --- a/demos/NRF51/MICROBIT/chconf.h +++ b/demos/NRF51/MICROBIT/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Fabio Utzig + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/NRF51/MICROBIT/halconf_community.h b/demos/NRF51/MICROBIT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/NRF51/MICROBIT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/NRF51/MICROBIT/main.c b/demos/NRF51/MICROBIT/main.c index 4a9b24c..001420b 100644 --- a/demos/NRF51/MICROBIT/main.c +++ b/demos/NRF51/MICROBIT/main.c @@ -16,7 +16,8 @@ #include "ch.h" #include "hal.h" -#include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" /* See: https://lancaster-university.github.io/microbit-docs/ubit/display/ */ @@ -76,7 +77,8 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (1) { chThdSleepMilliseconds(500); } diff --git a/demos/NRF51/OSHCHIP_V1.0/Makefile b/demos/NRF51/OSHCHIP_V1.0/Makefile index 32ec1d8..27255b8 100644 --- a/demos/NRF51/OSHCHIP_V1.0/Makefile +++ b/demos/NRF51/OSHCHIP_V1.0/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -99,26 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/NRF51/OSHCHIP_V1.0/chconf.h b/demos/NRF51/OSHCHIP_V1.0/chconf.h index 14c1bf3..1750f63 100644 --- a/demos/NRF51/OSHCHIP_V1.0/chconf.h +++ b/demos/NRF51/OSHCHIP_V1.0/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Fabio Utzig + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/NRF51/OSHCHIP_V1.0/halconf_community.h b/demos/NRF51/OSHCHIP_V1.0/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/NRF51/OSHCHIP_V1.0/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/NRF51/OSHCHIP_V1.0/main.c b/demos/NRF51/OSHCHIP_V1.0/main.c index 8e386fb..1fd58af 100644 --- a/demos/NRF51/OSHCHIP_V1.0/main.c +++ b/demos/NRF51/OSHCHIP_V1.0/main.c @@ -16,7 +16,8 @@ #include "ch.h" #include "hal.h" -#include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" static THD_WORKING_AREA(waThread1, 64); static THD_FUNCTION(Thread1, arg) { @@ -74,7 +75,8 @@ int main(void) { */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (1) { chThdSleepMilliseconds(500); } diff --git a/demos/NRF51/RT-WVSHARE_BLE400/Makefile b/demos/NRF51/RT-WVSHARE_BLE400/Makefile index cb1ee35..29949a5 100644 --- a/demos/NRF51/RT-WVSHARE_BLE400/Makefile +++ b/demos/NRF51/RT-WVSHARE_BLE400/Makefile @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -99,26 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/NRF51/RT-WVSHARE_BLE400/chconf.h b/demos/NRF51/RT-WVSHARE_BLE400/chconf.h index 14c1bf3..1750f63 100644 --- a/demos/NRF51/RT-WVSHARE_BLE400/chconf.h +++ b/demos/NRF51/RT-WVSHARE_BLE400/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Fabio Utzig + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/NRF51/RT-WVSHARE_BLE400/halconf_community.h b/demos/NRF51/RT-WVSHARE_BLE400/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/NRF51/RT-WVSHARE_BLE400/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/NRF51/RT-WVSHARE_BLE400/main.c b/demos/NRF51/RT-WVSHARE_BLE400/main.c index 6b25a64..4b9e76a 100644 --- a/demos/NRF51/RT-WVSHARE_BLE400/main.c +++ b/demos/NRF51/RT-WVSHARE_BLE400/main.c @@ -16,7 +16,8 @@ #include "ch.h" #include "hal.h" -#include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" static THD_WORKING_AREA(waThread1, 64); static THD_FUNCTION(Thread1, arg) { @@ -63,7 +64,8 @@ int main(void) { */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (1) { chThdSleepMilliseconds(500); } diff --git a/demos/NRF52/Classic/Makefile b/demos/NRF52/Classic/Makefile index 0f318b1..8742dd3 100644 --- a/demos/NRF52/Classic/Makefile +++ b/demos/NRF52/Classic/Makefile @@ -3,9 +3,6 @@ # NOTE: Can be overridden externally. # -PLATFORM=NRF5/NRF52832 -BOARD=NRF52-DK - # Compiler options here. ifeq ($(USE_OPT),) USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 -std=c11 @@ -49,7 +46,7 @@ endif # If enabled, this option makes the build process faster by not compiling # modules not used in the current configuration. ifeq ($(USE_SMART_BUILD),) - USE_SMART_BUILD = no + USE_SMART_BUILD = yes endif # @@ -91,19 +88,23 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/hal.mk -include $(CHIBIOS_CONTRIB)/os/hal/ports/$(PLATFORM)/platform.mk -include $(CHIBIOS_CONTRIB)/os/hal/boards/$(BOARD)/board.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF52832/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF52-DK/board.mk include $(CHIBIOS)/os/hal/osal/rt/osal.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk # RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/various/shell/shell.mk # Define linker script file here @@ -111,23 +112,13 @@ LDSCRIPT= $(STARTUPLD)/NRF52832.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(SHELLSRC) \ - $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ - $(CHIBIOS)/os/hal/lib/streams/chprintf.c - -CSRC += main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -150,18 +141,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(SHELLINC) \ - $(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various - +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR += $(CHIBIOS_CONTRIB)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/NRF52/Classic/chconf.h b/demos/NRF52/Classic/chconf.h index c7ec876..1750f63 100644 --- a/demos/NRF52/Classic/chconf.h +++ b/demos/NRF52/Classic/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2016 Stephane D'Alu + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 0 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -447,7 +613,7 @@ * @details This hook is invoked just before switching between threads. */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ + /* Context switch code here.*/ \ } /** @@ -525,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/NRF52/Classic/halconf_community.h b/demos/NRF52/Classic/halconf_community.h index 907a7a6..e655bfc 100644 --- a/demos/NRF52/Classic/halconf_community.h +++ b/demos/NRF52/Classic/halconf_community.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2016 Stéphane D'Alu + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,10 +14,8 @@ limitations under the License. */ - -#ifndef _HALCONF_COMMUNITY_H_ -#define _HALCONF_COMMUNITY_H_ - +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H /** * @brief Enables the community overlay. @@ -26,17 +24,116 @@ #define HAL_USE_COMMUNITY TRUE #endif +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif /** - * @brief Enables the community subsystem. + * @brief Enables the RNG subsystem. */ #if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) #define HAL_USE_RNG TRUE #endif +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif -#define HAL_USE_QEI TRUE +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE /*===========================================================================*/ /* QEI driver related settings. */ @@ -46,26 +143,31 @@ * @brief Enables discard of overlow */ #if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) -#define QEI_USE_OVERFLOW_DISCARD TRUE +#define QEI_USE_OVERFLOW_DISCARD FALSE #endif /** - * @brief Enables discard of overlow + * @brief Enables min max of overlow */ #if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) -#define QEI_USE_OVERFLOW_MINMAX TRUE +#define QEI_USE_OVERFLOW_MINMAX FALSE #endif +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE +#endif /* HALCONF_COMMUNITY_H */ - -//#define HAL_USE_SOFTDEVICE TRUE - -#define HAL_USE_CAPSENSE TRUE -#define CAPSENSE_USE_WAIT TRUE -#define CAPSENSE_USE_MUTUAL_EXCLUSION TRUE - - - -#endif /* _HALCONF_COMMUNITY_H_ */ +/** @} */ diff --git a/demos/NRF52/Classic/main.c b/demos/NRF52/Classic/main.c index 28e7505..aa923b0 100644 --- a/demos/NRF52/Classic/main.c +++ b/demos/NRF52/Classic/main.c @@ -5,7 +5,8 @@ #include "hal.h" #include "chprintf.h" #include "shell.h" -#include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" #define LED_EXT 14 diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk index 8ec318f..36da146 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk @@ -1,11 +1,16 @@ # List of the ChibiOS generic NRF51 startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF51822 \ $(CHIBIOS)/os/common/ext/CMSIS/include \ $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk index 450ec41..e95f33d 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk @@ -1,11 +1,16 @@ # List of the ChibiOS generic NRF51 startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF52832 \ $(CHIBIOS)/os/common/ext/CMSIS/include \ $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/hal/boards/MICROBIT/board.mk b/os/hal/boards/MICROBIT/board.mk index 3595b1a..8e26ae6 100644 --- a/os/hal/boards/MICROBIT/board.mk +++ b/os/hal/boards/MICROBIT/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/MICROBIT/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/MICROBIT + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/NRF51-DK/board.mk b/os/hal/boards/NRF51-DK/board.mk index 631927b..3e3e465 100644 --- a/os/hal/boards/NRF51-DK/board.mk +++ b/os/hal/boards/NRF51-DK/board.mk @@ -9,3 +9,7 @@ JLINK_DEVICE = nrf51422 JLINK_PRE_FLASH = w4 4001e504 1 JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 JLINK_PIN_RESET = w4 40000544 1 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/NRF52-DK/board.mk b/os/hal/boards/NRF52-DK/board.mk index 4310291..b296d27 100644 --- a/os/hal/boards/NRF52-DK/board.mk +++ b/os/hal/boards/NRF52-DK/board.mk @@ -10,3 +10,6 @@ JLINK_PRE_FLASH = w4 4001e504 1 #JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 JLINK_PIN_RESET = w4 40000544 1 +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/OSHCHIP_V1.0/board.mk b/os/hal/boards/OSHCHIP_V1.0/board.mk index 08afdbd..de1c59d 100644 --- a/os/hal/boards/OSHCHIP_V1.0/board.mk +++ b/os/hal/boards/OSHCHIP_V1.0/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/OSHCHIP_V1.0/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/OSHCHIP_V1.0 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/WVSHARE_BLE400/board.mk b/os/hal/boards/WVSHARE_BLE400/board.mk index ade4201..684efeb 100644 --- a/os/hal/boards/WVSHARE_BLE400/board.mk +++ b/os/hal/boards/WVSHARE_BLE400/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/WVSHARE_BLE400/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/WVSHARE_BLE400 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h index 4bb14e2..a005d50 100644 --- a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h @@ -119,6 +119,11 @@ typedef uint32_t ioline_t; */ typedef NRF_GPIO_Type *ioportid_t; +/** + * @brief Type of an pad identifier. + */ +typedef uint32_t iopadid_t; + /*===========================================================================*/ /* I/O Ports Identifiers. */ /*===========================================================================*/ diff --git a/testhal/NRF51/NRF51822/ADC/Makefile b/testhal/NRF51/NRF51822/ADC/Makefile index 9024eb1..ee5667b 100644 --- a/testhal/NRF51/NRF51822/ADC/Makefile +++ b/testhal/NRF51/NRF51822/ADC/Makefile @@ -83,6 +83,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -94,26 +96,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -136,11 +132,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/ADC/chconf.h b/testhal/NRF51/NRF51822/ADC/chconf.h index 790132e..1750f63 100644 --- a/testhal/NRF51/NRF51822/ADC/chconf.h +++ b/testhal/NRF51/NRF51822/ADC/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Stephen Caudle + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/ADC/halconf_community.h b/testhal/NRF51/NRF51822/ADC/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/ADC/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/EXT/Makefile b/testhal/NRF51/NRF51822/EXT/Makefile index 21c415a..9cdc41d 100644 --- a/testhal/NRF51/NRF51822/EXT/Makefile +++ b/testhal/NRF51/NRF51822/EXT/Makefile @@ -43,6 +43,12 @@ ifeq ($(USE_VERBOSE_COMPILE),) USE_VERBOSE_COMPILE = no endif +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + # # Build global options ############################################################################## @@ -82,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -93,26 +101,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,11 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/EXT/chconf.h b/testhal/NRF51/NRF51822/EXT/chconf.h index eeb3fa3..0ac7be8 100644 --- a/testhal/NRF51/NRF51822/EXT/chconf.h +++ b/testhal/NRF51/NRF51822/EXT/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Stephen Caudle + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/EXT/halconf_community.h b/testhal/NRF51/NRF51822/EXT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/EXT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/GPT/Makefile b/testhal/NRF51/NRF51822/GPT/Makefile index 9024eb1..ee5667b 100644 --- a/testhal/NRF51/NRF51822/GPT/Makefile +++ b/testhal/NRF51/NRF51822/GPT/Makefile @@ -83,6 +83,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -94,26 +96,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -136,11 +132,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/GPT/chconf.h b/testhal/NRF51/NRF51822/GPT/chconf.h index 790132e..1750f63 100644 --- a/testhal/NRF51/NRF51822/GPT/chconf.h +++ b/testhal/NRF51/NRF51822/GPT/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Stephen Caudle + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/GPT/halconf_community.h b/testhal/NRF51/NRF51822/GPT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/GPT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/I2C/Makefile b/testhal/NRF51/NRF51822/I2C/Makefile index 21c415a..784ba49 100644 --- a/testhal/NRF51/NRF51822/I2C/Makefile +++ b/testhal/NRF51/NRF51822/I2C/Makefile @@ -82,6 +82,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -93,26 +95,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,11 +131,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/I2C/chconf.h b/testhal/NRF51/NRF51822/I2C/chconf.h index 3f6766a..1750f63 100644 --- a/testhal/NRF51/NRF51822/I2C/chconf.h +++ b/testhal/NRF51/NRF51822/I2C/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Stephen Caudle + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ -#define CH_CFG_USE_MESSAGES FALSE +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_MAILBOXES FALSE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES FALSE +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ -#define CH_CFG_USE_MEMCORE FALSE +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ -#define CH_CFG_USE_HEAP FALSE +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ -#define CH_CFG_USE_MEMPOOLS FALSE +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ -#define CH_CFG_USE_DYNAMIC FALSE +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/I2C/halconf_community.h b/testhal/NRF51/NRF51822/I2C/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/I2C/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/PWM/Makefile b/testhal/NRF51/NRF51822/PWM/Makefile index de6ba9f..cc7bc1b 100644 --- a/testhal/NRF51/NRF51822/PWM/Makefile +++ b/testhal/NRF51/NRF51822/PWM/Makefile @@ -91,6 +91,8 @@ CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # HAL-OSAL files (optional). include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF51822/platform.mk @@ -100,25 +102,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +138,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/PWM/chconf.h b/testhal/NRF51/NRF51822/PWM/chconf.h index 14c1bf3..1750f63 100644 --- a/testhal/NRF51/NRF51822/PWM/chconf.h +++ b/testhal/NRF51/NRF51822/PWM/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Fabio Utzig + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/PWM/halconf_community.h b/testhal/NRF51/NRF51822/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/PWM/main.c b/testhal/NRF51/NRF51822/PWM/main.c index 51179d8..5e7e825 100644 --- a/testhal/NRF51/NRF51822/PWM/main.c +++ b/testhal/NRF51/NRF51822/PWM/main.c @@ -46,8 +46,6 @@ int main(void) { .ioline = LINE_LED2, .gpiote_channel = 0, .ppi_channel = { 0, 1 } }, - { .mode = PWM_OUTPUT_DISABLED, - .callback = NULL, }, }, }; diff --git a/testhal/NRF51/NRF51822/RNG/Makefile b/testhal/NRF51/NRF51822/RNG/Makefile index 1c2acf2..9520152 100644 --- a/testhal/NRF51/NRF51822/RNG/Makefile +++ b/testhal/NRF51/NRF51822/RNG/Makefile @@ -86,8 +86,9 @@ CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF51822/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF51-DK/board.mk @@ -96,8 +97,11 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/various/shell/shell.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk # Define linker script file here @@ -105,22 +109,13 @@ LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(SHELLSRC) \ - $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ - $(CHIBIOS)/os/hal/lib/streams/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -143,15 +138,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(SHELLINC) \ - $(CHIBIOS)/os/hal/lib/streams \ - $(CHIBIOS)/os/various +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/RNG/chconf.h b/testhal/NRF51/NRF51822/RNG/chconf.h index ed43625..1750f63 100644 --- a/testhal/NRF51/NRF51822/RNG/chconf.h +++ b/testhal/NRF51/NRF51822/RNG/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2016 Stephane D'Alu + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,7 +495,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. @@ -356,14 +505,18 @@ * * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_MASK) #define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -375,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -385,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -396,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -407,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -416,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ diff --git a/testhal/NRF51/NRF51822/RNG/halconf_community.h b/testhal/NRF51/NRF51822/RNG/halconf_community.h index a85b95f..e655bfc 100644 --- a/testhal/NRF51/NRF51822/RNG/halconf_community.h +++ b/testhal/NRF51/NRF51822/RNG/halconf_community.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2016 Stéphane D'Alu + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,8 +14,8 @@ limitations under the License. */ -#ifndef _HALCONF_COMMUNITY_H_ -#define _HALCONF_COMMUNITY_H_ +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H /** * @brief Enables the community overlay. @@ -23,6 +23,7 @@ #if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) #define HAL_USE_COMMUNITY TRUE #endif + /** * @brief Enables the FSMC subsystem. */ @@ -52,19 +53,61 @@ #endif /** - * @brief Enables the community subsystem. + * @brief Enables the CRC subsystem. */ #if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) #define HAL_USE_CRC FALSE #endif /** - * @brief Enables the community subsystem. + * @brief Enables the RNG subsystem. */ #if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) #define HAL_USE_RNG TRUE #endif +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + /*===========================================================================*/ /* FSMCNAND driver related settings. */ /*===========================================================================*/ @@ -74,7 +117,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define NAND_USE_MUTUAL_EXCLUSION FALSE +#define NAND_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -90,28 +133,41 @@ * @brief Enables search ROM feature. * @note Disabling this option saves both code and data space. */ -#define ONEWIRE_USE_SEARCH_ROM FALSE +#define ONEWIRE_USE_SEARCH_ROM TRUE /*===========================================================================*/ -/* CRC driver settings. */ +/* QEI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables DMA engine when performing CRC transactions. - * @note Enabling this option also enables asynchronous API. + * @brief Enables discard of overlow */ -#if !defined(CRC_USE_DMA) || defined(__DOXYGEN__) -#define CRC_USE_DMA FALSE +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE #endif /** - * @brief Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs. - * @note Disabling this option saves both code and data space. + * @brief Enables min max of overlow */ -#if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define CRC_USE_MUTUAL_EXCLUSION FALSE +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE #endif -#endif /* _HALCONF_COMMUNITY_H_ */ +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/SPI/Makefile b/testhal/NRF51/NRF51822/SPI/Makefile index b04500e..e0fa91b 100644 --- a/testhal/NRF51/NRF51822/SPI/Makefile +++ b/testhal/NRF51/NRF51822/SPI/Makefile @@ -80,8 +80,10 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -93,26 +95,20 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +#include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,11 +131,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/SPI/chconf.h b/testhal/NRF51/NRF51822/SPI/chconf.h index 49a050a..1750f63 100644 --- a/testhal/NRF51/NRF51822/SPI/chconf.h +++ b/testhal/NRF51/NRF51822/SPI/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2015 Stephen Caudle + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/SPI/halconf_community.h b/testhal/NRF51/NRF51822/SPI/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/SPI/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/WDG/Makefile b/testhal/NRF51/NRF51822/WDG/Makefile index caa8b18..c096d27 100644 --- a/testhal/NRF51/NRF51822/WDG/Makefile +++ b/testhal/NRF51/NRF51822/WDG/Makefile @@ -83,6 +83,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk # HAL-OSAL files (optional). @@ -99,19 +101,13 @@ LDSCRIPT= $(STARTUPLD)/NRF51822.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -134,11 +130,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various $(CHIBIOS)/os/license +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/NRF51/NRF51822/WDG/chconf.h b/testhal/NRF51/NRF51822/WDG/chconf.h index 9952575..1750f63 100644 --- a/testhal/NRF51/NRF51822/WDG/chconf.h +++ b/testhal/NRF51/NRF51822/WDG/chconf.h @@ -1,5 +1,5 @@ /* - Copyright (C) 2016 Stephane D'Alu + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -377,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -387,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -398,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -409,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -418,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -430,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -468,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -477,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -520,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/NRF51/NRF51822/WDG/halconf_community.h b/testhal/NRF51/NRF51822/WDG/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/WDG/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ -- cgit v1.2.3 From d200007a2985ed585a674bccb683b1bc953b2e36 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sun, 7 Oct 2018 15:04:33 +0700 Subject: Reorganize KINETIS driver files --- os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c | 259 ++++++ os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.h | 360 ++++++++ os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c | 245 ++++++ os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h | 423 ++++++++++ os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c | 589 ++++++++++++++ os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.h | 247 ++++++ os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c | 391 +++++++++ os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.h | 333 ++++++++ os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c | 98 +++ os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.h | 156 ++++ os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c | 434 ++++++++++ os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.h | 188 +++++ os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c | 993 +++++++++++++++++++++++ os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.h | 202 +++++ os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c | 692 ++++++++++++++++ os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.h | 287 +++++++ os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c | 873 ++++++++++++++++++++ os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.h | 455 +++++++++++ os/hal/ports/KINETIS/LLD/hal_adc_lld.c | 259 ------ os/hal/ports/KINETIS/LLD/hal_adc_lld.h | 360 -------- os/hal/ports/KINETIS/LLD/hal_ext_lld.c | 434 ---------- os/hal/ports/KINETIS/LLD/hal_ext_lld.h | 188 ----- os/hal/ports/KINETIS/LLD/hal_gpt_lld.c | 391 --------- os/hal/ports/KINETIS/LLD/hal_gpt_lld.h | 333 -------- os/hal/ports/KINETIS/LLD/hal_i2c_lld.c | 589 -------------- os/hal/ports/KINETIS/LLD/hal_i2c_lld.h | 247 ------ os/hal/ports/KINETIS/LLD/hal_pal_lld.c | 245 ------ os/hal/ports/KINETIS/LLD/hal_pal_lld.h | 423 ---------- os/hal/ports/KINETIS/LLD/hal_sdc_lld.c | 993 ----------------------- os/hal/ports/KINETIS/LLD/hal_sdc_lld.h | 202 ----- os/hal/ports/KINETIS/LLD/hal_serial_lld.c | 692 ---------------- os/hal/ports/KINETIS/LLD/hal_serial_lld.h | 287 ------- os/hal/ports/KINETIS/LLD/hal_st_lld.c | 98 --- os/hal/ports/KINETIS/LLD/hal_st_lld.h | 156 ---- os/hal/ports/KINETIS/LLD/hal_usb_lld.c | 873 -------------------- os/hal/ports/KINETIS/LLD/hal_usb_lld.h | 455 ----------- 36 files changed, 7225 insertions(+), 7225 deletions(-) create mode 100644 os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_adc_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_adc_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_ext_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_ext_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_gpt_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_gpt_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_i2c_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_i2c_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_pal_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_pal_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_sdc_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_sdc_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_serial_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_serial_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_st_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_st_lld.h delete mode 100644 os/hal/ports/KINETIS/LLD/hal_usb_lld.c delete mode 100644 os/hal/ports/KINETIS/LLD/hal_usb_lld.h diff --git a/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c b/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c new file mode 100644 index 0000000..847f424 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c @@ -0,0 +1,259 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ADCv1/hal_adc_lld.c + * @brief KINETIS ADC subsystem low level driver source. + * + * @addtogroup ADC + * @{ + */ + +#include "hal.h" + +#if HAL_USE_ADC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define ADC_CHANNEL_MASK 0x1f + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief ADC1 driver identifier.*/ +#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__) +ADCDriver ADCD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void calibrate(ADCDriver *adcp) { + + /* Clock Divide by 8, Use Bus Clock Div 2 */ + /* At 48MHz this results in ADCCLK of 48/8/2 == 3MHz */ + adcp->adc->CFG1 = ADCx_CFG1_ADIV(ADCx_CFG1_ADIV_DIV_8) | + ADCx_CFG1_ADICLK(ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2); + + /* Use software trigger and disable DMA etc. */ + adcp->adc->SC2 = 0; + + /* Enable Hardware Average, Average 32 Samples, Calibrate */ + adcp->adc->SC3 = ADCx_SC3_AVGE | + ADCx_SC3_AVGS(ADCx_SC3_AVGS_AVERAGE_32_SAMPLES) | + ADCx_SC3_CAL; + + /* FIXME: May take several ms. Use an interrupt instead of busy wait */ + /* Wait for calibration completion */ + while (!(adcp->adc->SC1A & ADCx_SC1n_COCO)) + ; + + uint16_t gain = ((adcp->adc->CLP0 + adcp->adc->CLP1 + adcp->adc->CLP2 + + adcp->adc->CLP3 + adcp->adc->CLP4 + adcp->adc->CLPS) / 2) | 0x8000; + adcp->adc->PG = gain; + + gain = ((adcp->adc->CLM0 + adcp->adc->CLM1 + adcp->adc->CLM2 + + adcp->adc->CLM3 + adcp->adc->CLM4 + adcp->adc->CLMS) / 2) | 0x8000; + adcp->adc->MG = gain; + +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__) +/** + * @brief ADC interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_ADC0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + ADCDriver *adcp = &ADCD1; + + /* Disable Interrupt, Disable Channel */ + adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED); + + /* Read the sample into the buffer */ + adcp->samples[adcp->current_index++] = adcp->adc->RA; + + bool more = true; + + /* At the end of the buffer then we may be finished */ + if (adcp->current_index == adcp->number_of_samples) { + /* We are never finished in circular mode */ + more = ADCD1.grpp->circular; + + _adc_isr_full_code(&ADCD1); + + adcp->current_index = 0; + + } + + if (more) { + + /* Signal half completion in circular mode. */ + if (ADCD1.grpp->circular && + (adcp->current_index == (adcp->number_of_samples / 2))) { + + _adc_isr_half_code(&ADCD1); + } + + /* Skip to the next channel */ + do { + adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; + } while (((1 << adcp->current_channel) & adcp->grpp->channel_mask) == 0); + + /* Enable Interrupt, Select the Channel */ + adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel); + } + + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ADC driver initialization. + * + * @notapi + */ +void adc_lld_init(void) { + +#if KINETIS_ADC_USE_ADC0 + /* Driver initialization.*/ + adcObjectInit(&ADCD1); +#endif + + /* The shared vector is initialized on driver initialization and never + disabled.*/ + nvicEnableVector(ADC0_IRQn, KINETIS_ADC_IRQ_PRIORITY); +} + +/** + * @brief Configures and activates the ADC peripheral. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_start(ADCDriver *adcp) { + + /* If in stopped state then enables the ADC clock.*/ + if (adcp->state == ADC_STOP) { + SIM->SCGC6 |= SIM_SCGC6_ADC0; + +#if KINETIS_ADC_USE_ADC0 + if (&ADCD1 == adcp) { + adcp->adc = ADC0; + if (adcp->config->calibrate) { + calibrate(adcp); + } + } +#endif /* KINETIS_ADC_USE_ADC0 */ + } +} + +/** + * @brief Deactivates the ADC peripheral. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_stop(ADCDriver *adcp) { + + /* If in ready state then disables the ADC clock.*/ + if (adcp->state == ADC_READY) { + SIM->SCGC6 &= ~SIM_SCGC6_ADC0; + +#if KINETIS_ADC_USE_ADC0 + if (&ADCD1 == adcp) { + /* Disable Interrupt, Disable Channel */ + adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED); + } +#endif + } +} + +/** + * @brief Starts an ADC conversion. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_start_conversion(ADCDriver *adcp) { + const ADCConversionGroup *grpp = adcp->grpp; + + /* Enable the Bandgap Buffer if channel mask includes BANDGAP */ + if (grpp->channel_mask & ADC_BANDGAP) { + PMC->REGSC |= PMC_REGSC_BGBE; + } + + adcp->number_of_samples = adcp->depth * grpp->num_channels; + adcp->current_index = 0; + + /* Skip to the next channel */ + adcp->current_channel = 0; + while (((1 << adcp->current_channel) & grpp->channel_mask) == 0) { + adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; + } + + /* Set clock speed and conversion size */ + adcp->adc->CFG1 = grpp->cfg1; + + /* Set averaging */ + adcp->adc->SC3 = grpp->sc3; + + /* Enable Interrupt, Select Channel */ + adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel); +} + +/** + * @brief Stops an ongoing conversion. + * + * @param[in] adcp pointer to the @p ADCDriver object + * + * @notapi + */ +void adc_lld_stop_conversion(ADCDriver *adcp) { + const ADCConversionGroup *grpp = adcp->grpp; + + /* Disable the Bandgap buffer if channel mask includes BANDGAP */ + if (grpp->channel_mask & ADC_BANDGAP) { + /* Clear BGBE, ACKISO is w1c, avoid setting */ + PMC->REGSC &= ~(PMC_REGSC_BGBE | PMC_REGSC_ACKISO); + } + +} + +#endif /* HAL_USE_ADC */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.h b/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.h new file mode 100644 index 0000000..2d11a7d --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.h @@ -0,0 +1,360 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ADCv1/hal_adc_lld.h + * @brief KINETIS ADC subsystem low level driver header. + * + * @addtogroup ADC + * @{ + */ + +#ifndef HAL_ADC_LLD_H_ +#define HAL_ADC_LLD_H_ + +#if HAL_USE_ADC || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @name Absolute Maximum Ratings + * @{ + */ +/** + * @brief Minimum ADC clock frequency. + */ +#define KINETIS_ADCCLK_MIN 600000 + +/** + * @brief Maximum ADC clock frequency. + */ +#define KINETIS_ADCCLK_MAX 36000000 + +#define ADCx_SC3_AVGS_AVERAGE_4_SAMPLES 0 +#define ADCx_SC3_AVGS_AVERAGE_8_SAMPLES 1 +#define ADCx_SC3_AVGS_AVERAGE_16_SAMPLES 2 +#define ADCx_SC3_AVGS_AVERAGE_32_SAMPLES 3 + +#define ADCx_CFG1_ADIV_DIV_1 0 +#define ADCx_CFG1_ADIV_DIV_2 1 +#define ADCx_CFG1_ADIV_DIV_4 2 +#define ADCx_CFG1_ADIV_DIV_8 3 + +#define ADCx_CFG1_ADIVCLK_BUS_CLOCK 0 +#define ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2 1 +#define ADCx_CFG1_ADIVCLK_BUS_ALTCLK 2 +#define ADCx_CFG1_ADIVCLK_BUS_ADACK 3 + +#define ADCx_CFG1_MODE_8_OR_9_BITS 0 +#define ADCx_CFG1_MODE_12_OR_13_BITS 1 +#define ADCx_CFG1_MODE_10_OR_11_BITS 2 +#define ADCx_CFG1_MODE_16_BITS 3 + +#define ADCx_SC1n_ADCH_DAD0 0 +#define ADCx_SC1n_ADCH_DAD1 1 +#define ADCx_SC1n_ADCH_DAD2 2 +#define ADCx_SC1n_ADCH_DAD3 3 +#define ADCx_SC1n_ADCH_DADP0 0 +#define ADCx_SC1n_ADCH_DADP1 1 +#define ADCx_SC1n_ADCH_DADP2 2 +#define ADCx_SC1n_ADCH_DADP3 3 +#define ADCx_SC1n_ADCH_AD4 4 +#define ADCx_SC1n_ADCH_AD5 5 +#define ADCx_SC1n_ADCH_AD6 6 +#define ADCx_SC1n_ADCH_AD7 7 +#define ADCx_SC1n_ADCH_AD8 8 +#define ADCx_SC1n_ADCH_AD9 9 +#define ADCx_SC1n_ADCH_AD10 10 +#define ADCx_SC1n_ADCH_AD11 11 +#define ADCx_SC1n_ADCH_AD12 12 +#define ADCx_SC1n_ADCH_AD13 13 +#define ADCx_SC1n_ADCH_AD14 14 +#define ADCx_SC1n_ADCH_AD15 15 +#define ADCx_SC1n_ADCH_AD16 16 +#define ADCx_SC1n_ADCH_AD17 17 +#define ADCx_SC1n_ADCH_AD18 18 +#define ADCx_SC1n_ADCH_AD19 19 +#define ADCx_SC1n_ADCH_AD20 20 +#define ADCx_SC1n_ADCH_AD21 21 +#define ADCx_SC1n_ADCH_AD22 22 +#define ADCx_SC1n_ADCH_AD23 23 +#define ADCx_SC1n_ADCH_TEMP_SENSOR 26 +#define ADCx_SC1n_ADCH_BANDGAP 27 +#define ADCx_SC1n_ADCH_VREFSH 29 +#define ADCx_SC1n_ADCH_VREFSL 30 +#define ADCx_SC1n_ADCH_DISABLED 31 + +#define ADC_DAD0 (1 << ADCx_SC1n_ADCH_DAD0) +#define ADC_DAD1 (1 << ADCx_SC1n_ADCH_DAD1) +#define ADC_DAD2 (1 << ADCx_SC1n_ADCH_DAD2) +#define ADC_DAD3 (1 << ADCx_SC1n_ADCH_DAD3) +#define ADC_DADP0 (1 << ADCx_SC1n_ADCH_DADP0) +#define ADC_DADP1 (1 << ADCx_SC1n_ADCH_DADP1) +#define ADC_DADP2 (1 << ADCx_SC1n_ADCH_DADP2) +#define ADC_DADP3 (1 << ADCx_SC1n_ADCH_DADP3) +#define ADC_AD4 (1 << ADCx_SC1n_ADCH_AD4) +#define ADC_AD5 (1 << ADCx_SC1n_ADCH_AD5) +#define ADC_AD6 (1 << ADCx_SC1n_ADCH_AD6) +#define ADC_AD7 (1 << ADCx_SC1n_ADCH_AD7) +#define ADC_AD8 (1 << ADCx_SC1n_ADCH_AD8) +#define ADC_AD9 (1 << ADCx_SC1n_ADCH_AD9) +#define ADC_AD10 (1 << ADCx_SC1n_ADCH_AD10) +#define ADC_AD11 (1 << ADCx_SC1n_ADCH_AD11) +#define ADC_AD12 (1 << ADCx_SC1n_ADCH_AD12) +#define ADC_AD13 (1 << ADCx_SC1n_ADCH_AD13) +#define ADC_AD14 (1 << ADCx_SC1n_ADCH_AD14) +#define ADC_AD15 (1 << ADCx_SC1n_ADCH_AD15) +#define ADC_AD16 (1 << ADCx_SC1n_ADCH_AD16) +#define ADC_AD17 (1 << ADCx_SC1n_ADCH_AD17) +#define ADC_AD18 (1 << ADCx_SC1n_ADCH_AD18) +#define ADC_AD19 (1 << ADCx_SC1n_ADCH_AD19) +#define ADC_AD20 (1 << ADCx_SC1n_ADCH_AD20) +#define ADC_AD21 (1 << ADCx_SC1n_ADCH_AD21) +#define ADC_AD22 (1 << ADCx_SC1n_ADCH_AD22) +#define ADC_AD23 (1 << ADCx_SC1n_ADCH_AD23) +#define ADC_TEMP_SENSOR (1 << ADCx_SC1n_ADCH_TEMP_SENSOR) +#define ADC_BANDGAP (1 << ADCx_SC1n_ADCH_BANDGAP) +#define ADC_VREFSH (1 << ADCx_SC1n_ADCH_VREFSH) +#define ADC_VREFSL (1 << ADCx_SC1n_ADCH_VREFSL) +#define ADC_DISABLED (1 << ADCx_SC1n_ADCH_DISABLED) + +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** + * @brief ADC1 driver enable switch. + * @details If set to @p TRUE the support for ADC1 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_ADC_USE_ADC0) || defined(__DOXYGEN__) +#define KINETIS_ADC_USE_ADC0 FALSE +#endif + +/** + * @brief ADC interrupt priority level setting. + */ +#if !defined(KINETIS_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_ADC_IRQ_PRIORITY 5 +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if KINETIS_ADC_USE_ADC0 && !KINETIS_HAS_ADC0 +#error "ADC1 not present in the selected device" +#endif + +#if !KINETIS_ADC_USE_ADC0 +#error "ADC driver activated but no ADC peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief ADC sample data type. + */ +typedef uint16_t adcsample_t; + +/** + * @brief Channels number in a conversion group. + */ +typedef uint16_t adc_channels_num_t; + +/** + * @brief Possible ADC failure causes. + * @note Error codes are architecture dependent and should not relied + * upon. + */ +typedef enum { + ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ + ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */ +} adcerror_t; + +/** + * @brief Type of a structure representing an ADC driver. + */ +typedef struct ADCDriver ADCDriver; + +/** + * @brief ADC notification callback type. + * + * @param[in] adcp pointer to the @p ADCDriver object triggering the + * callback + * @param[in] buffer pointer to the most recent samples data + * @param[in] n number of buffer rows available starting from @p buffer + */ +typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); + +/** + * @brief ADC error callback type. + * + * @param[in] adcp pointer to the @p ADCDriver object triggering the + * callback + * @param[in] err ADC error code + */ +typedef void (*adcerrorcallback_t)(ADCDriver *adcp, adcerror_t err); + +/** + * @brief Conversion group configuration structure. + * @details This implementation-dependent structure describes a conversion + * operation. + */ +typedef struct { + /** + * @brief Enables the circular buffer mode for the group. + */ + bool circular; + /** + * @brief Number of the analog channels belonging to the conversion group. + */ + adc_channels_num_t num_channels; + /** + * @brief Callback function associated to the group or @p NULL. + */ + adccallback_t end_cb; + /** + * @brief Error callback or @p NULL. + */ + adcerrorcallback_t error_cb; + /* End of the mandatory fields.*/ + /** + * @brief Bitmask of channels for ADC conversion. + */ + uint32_t channel_mask; + /** + * @brief ADC CFG1 register initialization data. + * @note All the required bits must be defined into this field. + */ + uint32_t cfg1; + /** + * @brief ADC SC3 register initialization data. + * @note All the required bits must be defined into this field. + */ + uint32_t sc3; +} ADCConversionGroup; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /* Perform first time calibration */ + bool calibrate; +} ADCConfig; + +/** + * @brief Structure representing an ADC driver. + */ +struct ADCDriver { + /** + * @brief Driver state. + */ + adcstate_t state; + /** + * @brief Current configuration data. + */ + const ADCConfig *config; + /** + * @brief Current samples buffer pointer or @p NULL. + */ + adcsample_t *samples; + /** + * @brief Current samples buffer depth or @p 0. + */ + size_t depth; + /** + * @brief Current conversion group pointer or @p NULL. + */ + const ADCConversionGroup *grpp; +#if ADC_USE_WAIT || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif +#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* ADC_USE_MUTUAL_EXCLUSION */ +#if defined(ADC_DRIVER_EXT_FIELDS) + ADC_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the ADCx registers block. + */ + ADC_TypeDef *adc; + /** + * @brief Number of samples expected. + */ + size_t number_of_samples; + /** + * @brief Current position in the buffer. + */ + size_t current_index; + /** + * @brief Current channel index into group channel_mask. + */ + size_t current_channel; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_ADC_USE_ADC0 && !defined(__DOXYGEN__) +extern ADCDriver ADCD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void adc_lld_init(void); + void adc_lld_start(ADCDriver *adcp); + void adc_lld_stop(ADCDriver *adcp); + void adc_lld_start_conversion(ADCDriver *adcp); + void adc_lld_stop_conversion(ADCDriver *adcp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_ADC */ + +#endif /* HAL_ADC_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c new file mode 100644 index 0000000..3cba308 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c @@ -0,0 +1,245 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.c + * @brief PAL subsystem low level driver. + * + * @addtogroup PAL + * @{ + */ + +#include "osal.h" +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Reads a logical state from an I/O pad. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @return The logical state. + * @retval PAL_LOW low logical state. + * @retval PAL_HIGH high logical state. + * + * @notapi + */ +uint8_t _pal_lld_readpad(ioportid_t port, + uint8_t pad) { + + return (port->PDIR & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW; +} + +/** + * @brief Writes a logical state on an output pad. + * @note This function is not meant to be invoked directly by the + * application code. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH + * + * @notapi + */ +void _pal_lld_writepad(ioportid_t port, + uint8_t pad, + uint8_t bit) { + + if (bit == PAL_HIGH) + port->PDOR |= ((uint32_t) 1 << pad); + else + port->PDOR &= ~((uint32_t) 1 << pad); +} + +/** + * @brief Pad mode setup. + * @details This function programs a pad with the specified mode. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad mode + * + * @notapi + */ +void _pal_lld_setpadmode(ioportid_t port, + uint8_t pad, + iomode_t mode) { + + PORT_TypeDef *portcfg = NULL; + + osalDbgAssert(pad < PADS_PER_PORT, "pal_lld_setpadmode() #1, invalid pad"); + + if (mode == PAL_MODE_OUTPUT_PUSHPULL) + port->PDDR |= ((uint32_t) 1 << pad); + else + port->PDDR &= ~((uint32_t) 1 << pad); + + if (port == IOPORT1) + portcfg = PORTA; + else if (port == IOPORT2) + portcfg = PORTB; + else if (port == IOPORT3) + portcfg = PORTC; + else if (port == IOPORT4) + portcfg = PORTD; + else if (port == IOPORT5) + portcfg = PORTE; + + osalDbgAssert(portcfg != NULL, "pal_lld_setpadmode() #2, invalid port"); + + switch (mode) { + case PAL_MODE_RESET: + case PAL_MODE_INPUT: + case PAL_MODE_OUTPUT_PUSHPULL: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1); + break; +#if KINETIS_GPIO_HAS_OPENDRAIN + case PAL_MODE_OUTPUT_OPENDRAIN: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | + PORTx_PCRn_ODE; + break; +#else +#undef PAL_MODE_OUTPUT_OPENDRAIN +#endif + case PAL_MODE_INPUT_PULLUP: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | + PORTx_PCRn_PE | + PORTx_PCRn_PS; + break; + case PAL_MODE_INPUT_PULLDOWN: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | + PORTx_PCRn_PE; + break; + case PAL_MODE_UNCONNECTED: + case PAL_MODE_INPUT_ANALOG: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(0); + break; + case PAL_MODE_ALTERNATIVE_1: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1); + break; + case PAL_MODE_ALTERNATIVE_2: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(2); + break; + case PAL_MODE_ALTERNATIVE_3: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(3); + break; + case PAL_MODE_ALTERNATIVE_4: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(4); + break; + case PAL_MODE_ALTERNATIVE_5: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(5); + break; + case PAL_MODE_ALTERNATIVE_6: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(6); + break; + case PAL_MODE_ALTERNATIVE_7: + portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(7); + break; + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Kinetis I/O ports configuration. + * @details Ports A-E clocks enabled. + * + * @param[in] config the Kinetis ports configuration + * + * @notapi + */ +void _pal_lld_init(const PALConfig *config) { + + int i, j; + + /* Enable clocking on all Ports */ + SIM->SCGC5 |= SIM_SCGC5_PORTA | + SIM_SCGC5_PORTB | + SIM_SCGC5_PORTC | + SIM_SCGC5_PORTD | + SIM_SCGC5_PORTE; + + /* Initial PORT and GPIO setup */ + for (i = 0; i < TOTAL_PORTS; i++) { + for (j = 0; j < PADS_PER_PORT; j++) { + pal_lld_setpadmode(config->ports[i].port, + j, + config->ports[i].pads[j]); + } + } +} + +/** + * @brief Pads mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode + * + * @notapi + */ +void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode) { + + int i; + + (void)mask; + + for (i = 0; i < PADS_PER_PORT; i++) { + pal_lld_setpadmode(port, i, mode); + } +} + +#endif /* HAL_USE_PAL */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h new file mode 100644 index 0000000..17125b1 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h @@ -0,0 +1,423 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file GPIOv1/hal_pal_lld.h + * @brief PAL subsystem low level driver header. + * + * @addtogroup PAL + * @{ + */ + +#ifndef HAL_PAL_LLD_H_ +#define HAL_PAL_LLD_H_ + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Unsupported modes and specific modes */ +/*===========================================================================*/ + +#define PAL_MODE_ALTERNATIVE_1 0x10 +#define PAL_MODE_ALTERNATIVE_2 0x11 +#define PAL_MODE_ALTERNATIVE_3 0x12 +#define PAL_MODE_ALTERNATIVE_4 0x13 +#define PAL_MODE_ALTERNATIVE_5 0x14 +#define PAL_MODE_ALTERNATIVE_6 0x15 +#define PAL_MODE_ALTERNATIVE_7 0x16 + +#define PIN_MUX_ALTERNATIVE(x) PORTx_PCRn_MUX(x) + +/*===========================================================================*/ +/* I/O Ports Types and constants. */ +/*===========================================================================*/ + +#define TOTAL_PORTS 5 +#define PADS_PER_PORT 32 + +/** + * @brief Width, in bits, of an I/O port. + */ +#define PAL_IOPORTS_WIDTH 32 + +/** + * @brief Whole port mask. + * @brief This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF) + +/** + * @brief Digital I/O port sized unsigned type. + */ +typedef uint32_t ioportmask_t; + +/** + * @brief Digital I/O modes. + */ +typedef uint32_t iomode_t; + +/** + * @brief Type of an I/O line. + */ +typedef uint32_t ioline_t; + +/** + * @brief Port Identifier. + * @details This type can be a scalar or some kind of pointer, do not make + * any assumption about it, use the provided macros when populating + * variables of this type. + */ +typedef GPIO_TypeDef *ioportid_t; + +/** + * @brief Port Configuration. + * @details This structure stores the configuration parameters of all pads + * belonging to a port. + */ +typedef struct { + ioportid_t port; + iomode_t pads[PADS_PER_PORT]; +} PortConfig; + +/** + * @brief Generic I/O ports static initializer. + * @details An instance of this structure must be passed to @p palInit() at + * system startup time in order to initialized the digital I/O + * subsystem. This represents only the initial setup, specific pads + * or whole ports can be reprogrammed at later time. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ +typedef struct { + PortConfig ports[TOTAL_PORTS]; +} PALConfig; + +/*===========================================================================*/ +/* I/O Ports Identifiers. */ +/*===========================================================================*/ + +/** + * @brief GPIO port A identifier. + */ +#define IOPORT1 GPIOA + +/** + * @brief GPIO port B identifier. + */ +#define IOPORT2 GPIOB + +/** + * @brief GPIO port C identifier. + */ +#define IOPORT3 GPIOC + +/** + * @brief GPIO port D identifier. + */ +#define IOPORT4 GPIOD + +/** + * @brief GPIO port E identifier. + */ +#define IOPORT5 GPIOE + +/** + * @name Line handling macros + * @{ + */ +/** + * @brief Forms a line identifier. + * @details A port/pad pair are encoded into an @p ioline_t type. The encoding + * of this type is platform-dependent. + * @note In this driver the pad number is encoded in the byte of the GPIO + * address that's zero on all Kinetis devices. + */ +#define PAL_LINE(port, pad) \ + ((ioline_t)((uint32_t)(port) | ((uint32_t)(pad)<<20))) + +/** + * @brief Decodes a port identifier from a line identifier. + */ +#define PAL_PORT(line) \ + ((GPIO_TypeDef *)(((uint32_t)(line)) & 0xF00FFFFFU)) + +/** + * @brief Decodes a pad identifier from a line identifier. + */ +#define PAL_PAD(line) \ + ((uint32_t)((uint32_t)(line) & 0x0FF00000U)>>20) + +/** + * @brief Value identifying an invalid line. + */ +#define PAL_NOLINE 0U +/** @} */ + +/*===========================================================================*/ +/* Implementation, some of the following macros could be implemented as */ +/* functions, if so please put them in pal_lld.c. */ +/*===========================================================================*/ + +/** + * @brief Low level PAL subsystem initialization. + * + * @param[in] config architecture-dependent ports configuration + * + * @notapi + */ +#define pal_lld_init(config) _pal_lld_init(config) + +/** + * @brief Reads the physical I/O port states. + * + * @param[in] port port identifier + * @return The port bits. + * + * @notapi + */ +#define pal_lld_readport(port) \ + (port)->PDIR + +/** + * @brief Reads the output latch. + * @details The purpose of this function is to read back the latched output + * value. + * + * @param[in] port port identifier + * @return The latched logical states. + * + * @notapi + */ +#define pal_lld_readlatch(port) \ + (port)->PDOR + +/** + * @brief Writes a bits mask on a I/O port. + * + * @param[in] port port identifier + * @param[in] bits bits to be written on the specified port + * + * @notapi + */ +#define pal_lld_writeport(port, bits) \ + (port)->PDOR = (bits) + +/** + * @brief Sets a bits mask on a I/O port. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] bits bits to be ORed on the specified port + * + * @notapi + */ +#define pal_lld_setport(port, bits) \ + (port)->PSOR = (bits) + +/** + * @brief Clears a bits mask on a I/O port. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] bits bits to be cleared on the specified port + * + * @notapi + */ +#define pal_lld_clearport(port, bits) \ + (port)->PCOR = (bits) + +/** + * @brief Toggles a bits mask on a I/O port. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] bits bits to be toggled on the specified port + * + * @notapi + */ +#define pal_lld_toggleport(port, bits) \ + (port)->PTOR = (bits) + +/** + * @brief Reads a group of bits. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @return The group logical states. + * + * @notapi + */ +#define pal_lld_readgroup(port, mask, offset) 0 + +/** + * @brief Writes a group of bits. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @param[in] bits bits to be written. Values exceeding the group width + * are masked. + * + * @notapi + */ +#define pal_lld_writegroup(port, mask, offset, bits) (void)bits + +/** + * @brief Pads group mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @param[in] mode group mode + * + * @notapi + */ +#define pal_lld_setgroupmode(port, mask, offset, mode) \ + _pal_lld_setgroupmode(port, mask << offset, mode) + +/** + * @brief Reads a logical state from an I/O pad. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @return The logical state. + * @retval PAL_LOW low logical state. + * @retval PAL_HIGH high logical state. + * + * @notapi + */ +#define pal_lld_readpad(port, pad) _pal_lld_readpad(port, pad) + +/** + * @brief Writes a logical state on an output pad. + * @note This function is not meant to be invoked directly by the + * application code. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] bit logical value, the value must be @p PAL_LOW or + * @p PAL_HIGH + * + * @notapi + */ +#define pal_lld_writepad(port, pad, bit) _pal_lld_writepad(port, pad, bit) + +/** + * @brief Sets a pad logical state to @p PAL_HIGH. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_setpad(port, pad) (port)->PSOR = ((uint32_t) 1 << (pad)) + +/** + * @brief Clears a pad logical state to @p PAL_LOW. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_clearpad(port, pad) (port)->PCOR = ((uint32_t) 1 << (pad)) + +/** + * @brief Toggles a pad logical state. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_togglepad(port, pad) (port)->PTOR = ((uint32_t) 1 << (pad)) + +/** + * @brief Pad mode setup. + * @details This function programs a pad with the specified mode. + * @note The @ref PAL provides a default software implementation of this + * functionality, implement this function if can optimize it by using + * special hardware functionalities or special coding. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad mode + * + * @notapi + */ +#define pal_lld_setpadmode(port, pad, mode) \ + _pal_lld_setpadmode(port, pad, mode) + +#if !defined(__DOXYGEN__) +extern const PALConfig pal_default_config; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void _pal_lld_init(const PALConfig *config); + void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode); + void _pal_lld_setpadmode(ioportid_t port, + uint8_t pad, + iomode_t mode); + uint8_t _pal_lld_readpad(ioportid_t port, + uint8_t pad); + void _pal_lld_writepad(ioportid_t port, + uint8_t pad, + uint8_t bit); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PAL */ + +#endif /* HAL_PAL_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c new file mode 100644 index 0000000..aa47aa3 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c @@ -0,0 +1,589 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file I2Cv1/hal_i2c_lld.c + * @brief KINETIS I2C subsystem low level driver source. + * + * @addtogroup I2C + * @{ + */ + +#include "osal.h" +#include "hal.h" + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief I2C0 driver identifier. + */ +#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__) +I2CDriver I2CD1; +#endif + +/** + * @brief I2C1 driver identifier. + */ +#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__) +I2CDriver I2CD2; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +void config_frequency(I2CDriver *i2cp) { + + /* Each index in the table corresponds to a a frequency + * divider used to generate the SCL clock from the main + * system clock. + */ + const uint16_t icr_table[] = { + /* 0x00 - 0x0F */ + 20,22,24,26,28,30,34,40,28,32,36,40,44,48,56,68, + /* 0x10 - 0x1F */ + 48,56,64,72,80,88,104,128,80,96,112,128,144,160,192,240, + /* 0x20 - 0x2F */ + 160,192,224,256,288,320,384,480,320,384,448,512,576,640,768,960, + /* 0x30 - 0x3F */ + 640,768,896,1024,1152,1280,1536,1920,1280,1536,1792,2048,2304,2560,3072,3840, + }; + + int length = sizeof(icr_table) / sizeof(icr_table[0]); + uint16_t divisor; + uint8_t i = 0, index = 0; + uint16_t best, diff; + + if (i2cp->config != NULL) + divisor = KINETIS_BUSCLK_FREQUENCY / i2cp->config->clock; + else + divisor = KINETIS_BUSCLK_FREQUENCY / 100000; + + best = ~0; + index = 0; + /* Tries to find the SCL clock which is the closest + * approximation to the clock passed in config. To + * stay on the safe side, only values that generate + * lower frequency are used. + */ + for (i = 0; i < length; i++) { + if (icr_table[i] >= divisor) { + diff = icr_table[i] - divisor; + if (diff < best) { + best = diff; + index = i; + } + } + } + + i2cp->i2c->F = index; +} + +/** + * @brief Common IRQ handler. + * @note Tries hard to clear all the pending interrupt sources, we don't + * want to go through the whole ISR and have another interrupt soon + * after. + * + * @param[in] i2cp pointer to an I2CDriver + */ +static void serve_interrupt(I2CDriver *i2cp) { + + I2C_TypeDef *i2c = i2cp->i2c; + intstate_t state = i2cp->intstate; + + /* check if we're master or slave */ + if (i2c->C1 & I2Cx_C1_MST) { + /* master */ + + if (i2c->S & I2Cx_S_ARBL) { + /* check if we lost arbitration */ + i2cp->errors |= I2C_ARBITRATION_LOST; + i2c->S |= I2Cx_S_ARBL; + /* TODO: may need to do more here, reset bus? */ + /* Perhaps clear MST? */ + } + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + else if ((i2cp->rsta_workaround == RSTA_WORKAROUND_ON) && (i2cp->i2c->FLT & I2Cx_FLT_STARTF)) { + i2cp->rsta_workaround = RSTA_WORKAROUND_OFF; + /* clear+disable STARTF/STOPF interrupts and wake up the thread */ + i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; + i2cp->i2c->FLT &= ~I2Cx_FLT_SSIE; + i2c->S |= I2Cx_S_IICIF; + _i2c_wakeup_isr(i2cp); + } +#endif /* KL27Z RST workaround */ + + else if (i2c->S & I2Cx_S_TCF) { + /* just completed byte transfer */ + if (i2c->C1 & I2Cx_C1_TX) { + /* the byte was transmitted */ + + if (state == STATE_SEND) { + /* currently sending stuff */ + + if (i2c->S & I2Cx_S_RXAK) { + /* slave did not ACK */ + i2cp->errors |= I2C_ACK_FAILURE; + /* the thread will be woken up at the end of ISR and release the bus */ + + } else if (i2cp->txbuf != NULL && i2cp->txidx < i2cp->txbytes) { + /* slave ACK'd and we want to send more */ + i2c->D = i2cp->txbuf[i2cp->txidx++]; + } else { + /* slave ACK'd and we are done sending */ + i2cp->intstate = STATE_STOP; + /* this wakes up the waiting thread at the end of ISR */ + } + + } else if (state == STATE_RECV) { + /* should be receiving stuff, so we've just sent the address */ + + if (i2c->S & I2Cx_S_RXAK) { + /* slave did not ACK */ + i2cp->errors |= I2C_ACK_FAILURE; + /* the thread will be woken up and release the bus */ + + } else { + /* slave ACK'd, we should be receiving next */ + i2c->C1 &= ~I2Cx_C1_TX; + + if (i2cp->rxbytes > 1) { + /* multi-byte read, send ACK after next transfer */ + i2c->C1 &= ~I2Cx_C1_TXAK; + } else { + /* only 1 byte remaining, send NAK */ + i2c->C1 |= I2Cx_C1_TXAK; + } + + (void) i2c->D; /* dummy read; triggers next receive */ + } + + } /* possibly check other states here - should not happen! */ + + } else { + /* the byte was received */ + + if (state == STATE_RECV) { + /* currently receiving stuff */ + /* the received byte is now in D */ + + if (i2cp->rxbytes > 1) { + /* expecting at least one byte after this one */ + if (i2cp->rxidx == (i2cp->rxbytes - 2)) { + /* expecting exactly one byte after this one, NAK that one */ + i2c->C1 |= I2Cx_C1_TXAK; + } else { + /* expecting more than one after this one, respond with ACK */ + i2c->C1 &= ~I2Cx_C1_TXAK; + } + } + + if (i2cp->rxidx == i2cp->rxbytes - 1) { + /* D is the last byte we're expecting */ + /* release bus: switch to RX mode, send STOP */ + /* need to do it now otherwise the I2C module will wait for another byte */ + // delayMicroseconds(1); + i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); + i2cp->intstate = STATE_STOP; + /* this wakes up the waiting thread at the end of ISR */ + } + + /* get the data from D; this triggers the next receive */ + i2cp->rxbuf[i2cp->rxidx++] = i2c->D; + + // if (i2cp->rxidx == i2cp->rxbytes) { + /* done receiving */ + // } + } /* possibly check other states here - should not happen! */ + } + + } /* possibly check other interrupt flags here */ + } else { + /* slave */ + + /* Not implemented yet */ + } + + /* Reset other interrupt sources */ +#if defined(I2Cx_FLT_STOPF) /* extra flags on KL26Z and KL27Z */ + i2cp->i2c->FLT |= I2Cx_FLT_STOPF; +#endif +#if defined(I2Cx_FLT_STARTF) /* extra flags on KL27Z */ + i2cp->i2c->FLT |= I2Cx_FLT_STARTF; +#endif + /* Reset interrupt flag */ + i2c->S |= I2Cx_S_IICIF; + + if (i2cp->errors != I2C_NO_ERROR) + _i2c_wakeup_error_isr(i2cp); + + if (i2cp->intstate == STATE_STOP) + _i2c_wakeup_isr(i2cp); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(KINETIS_I2C0_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&I2CD1); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(KINETIS_I2C1_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&I2CD2); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level I2C driver initialization. + * + * @notapi + */ +void i2c_lld_init(void) { + +#if KINETIS_I2C_USE_I2C0 + i2cObjectInit(&I2CD1); + I2CD1.thread = NULL; + I2CD1.i2c = I2C0; +#endif + +#if KINETIS_I2C_USE_I2C1 + i2cObjectInit(&I2CD2); + I2CD2.thread = NULL; + I2CD2.i2c = I2C1; +#endif + +} + +/** + * @brief Configures and activates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_start(I2CDriver *i2cp) { + + if (i2cp->state == I2C_STOP) { + + /* TODO: + * The PORT must be enabled somewhere. The PIN multiplexer + * will map the I2C functionality to some PORT which must + * than be enabled. The easier way is enabling all PORTs at + * startup, which is currently being done in __early_init. + */ + +#if KINETIS_I2C_USE_I2C0 + if (&I2CD1 == i2cp) { + SIM->SCGC4 |= SIM_SCGC4_I2C0; + nvicEnableVector(I2C0_IRQn, KINETIS_I2C_I2C0_PRIORITY); + } +#endif + +#if KINETIS_I2C_USE_I2C1 + if (&I2CD2 == i2cp) { + SIM->SCGC4 |= SIM_SCGC4_I2C1; + nvicEnableVector(I2C1_IRQn, KINETIS_I2C_I2C1_PRIORITY); + } +#endif + + } + + config_frequency(i2cp); + i2cp->i2c->C1 = I2Cx_C1_IICEN | I2Cx_C1_IICIE; // reset I2C, enable interrupts + i2cp->i2c->S = I2Cx_S_IICIF | I2Cx_S_ARBL; // clear status flags just in case + i2cp->intstate = STATE_STOP; // internal state +} + +/** + * @brief Deactivates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_stop(I2CDriver *i2cp) { + + if (i2cp->state != I2C_STOP) { + + i2cp->i2c->C1 &= ~(I2Cx_C1_IICEN | I2Cx_C1_IICIE); + +#if KINETIS_I2C_USE_I2C0 + if (&I2CD1 == i2cp) { + SIM->SCGC4 &= ~SIM_SCGC4_I2C0; + nvicDisableVector(I2C0_IRQn); + } +#endif + +#if KINETIS_I2C_USE_I2C1 + if (&I2CD2 == i2cp) { + SIM->SCGC4 &= ~SIM_SCGC4_I2C1; + nvicDisableVector(I2C1_IRQn); + } +#endif + + } +} + +static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + msg_t msg; + systime_t start, end; + + uint8_t op = (i2cp->intstate == STATE_SEND) ? 0 : 1; + + i2cp->errors = I2C_NO_ERROR; + i2cp->addr = addr; + + i2cp->txbuf = txbuf; + i2cp->txbytes = txbytes; + i2cp->txidx = 0; + + i2cp->rxbuf = rxbuf; + i2cp->rxbytes = rxbytes; + i2cp->rxidx = 0; + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + i2cp->rsta_workaround = RSTA_WORKAROUND_OFF; +#endif /* KL27Z RST workaround */ + + /* clear status flags */ +#if defined(I2Cx_FLT_STOPF) /* extra flags on KL26Z and KL27Z */ + i2cp->i2c->FLT |= I2Cx_FLT_STOPF; +#endif +#if defined(I2Cx_FLT_STARTF) /* extra flags on KL27Z */ + i2cp->i2c->FLT |= I2Cx_FLT_STARTF; +#endif + i2cp->i2c->S = I2Cx_S_IICIF|I2Cx_S_ARBL; + + /* acquire the bus */ + /* check to see if we already have the bus */ + if(i2cp->i2c->C1 & I2Cx_C1_MST) { + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + /* need to wait for STARTF interrupt after issuing repeated start, + * otherwise the double buffering mechanism sends the last sent byte + * instead of the slave address. + * https://community.freescale.com/thread/377611 + */ + i2cp->rsta_workaround = RSTA_WORKAROUND_ON; + /* clear any interrupt bits and enable STARTF/STOPF interrupts */ + i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; + i2cp->i2c->S |= I2Cx_S_IICIF|I2Cx_S_ARBL; + i2cp->i2c->FLT |= I2Cx_FLT_SSIE; +#endif /* KL27Z RST workaround */ + + /* send repeated start */ + i2cp->i2c->C1 |= I2Cx_C1_RSTA | I2Cx_C1_TX; + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + /* wait for the STARTF interrupt */ + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + /* abort if this didn't go well (timed out) */ + if (msg != MSG_OK) { + /* release bus - RX mode, send STOP */ + i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); + return msg; + } +#endif /* KL27Z RST workaround */ + + } else { + /* unlock during the wait, so that tasks with + * higher priority can get attention */ + osalSysUnlock(); + + /* wait until the bus is released */ + /* Calculating the time window for the timeout on the busy bus condition.*/ + start = osalOsGetSystemTimeX(); +#if defined(OSAL_TIME_MS2I) + end = start + OSAL_TIME_MS2I(KINETIS_I2C_BUSY_TIMEOUT); +#elif defined(OSAL_TIME_MS2ST) + end = start + OSAL_TIME_MS2ST(KINETIS_I2C_BUSY_TIMEOUT); +#else + end = start + OSAL_MS2ST(KINETIS_I2C_BUSY_TIMEOUT); +#endif + + while(true) { + osalSysLock(); + /* If the bus is not busy then the operation can continue, note, the + loop is exited in the locked state.*/ + if(!(i2cp->i2c->S & I2Cx_S_BUSY)) + break; + /* If the system time went outside the allowed window then a timeout + condition is returned.*/ + if (!osalOsIsTimeWithinX(osalOsGetSystemTimeX(), start, end)) { + return MSG_TIMEOUT; + } + osalSysUnlock(); + } + + /* send START */ + i2cp->i2c->C1 |= I2Cx_C1_MST|I2Cx_C1_TX; + } + + /* send slave address */ + i2cp->i2c->D = addr << 1 | op; + + /* wait for the ISR to signal that the transmission (or receive if no transmission) phase is complete */ + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + + /* FIXME */ + //if (i2cp->i2c->S & I2Cx_S_RXAK) + // i2cp->errors |= I2C_ACK_FAILURE; + + /* the transmitting (or receiving if no transmission) phase has finished, + * do we expect to receive something? */ + if (msg == MSG_OK && rxbuf != NULL && rxbytes > 0 && i2cp->rxidx < rxbytes) { + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + /* the same KL27Z RST workaround as above */ + i2cp->rsta_workaround = RSTA_WORKAROUND_ON; + /* clear any interrupt bits and enable STARTF/STOPF interrupts */ + i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; + i2cp->i2c->S |= I2Cx_S_IICIF|I2Cx_S_ARBL; + i2cp->i2c->FLT |= I2Cx_FLT_SSIE; +#endif /* KL27Z RST workaround */ + + /* send repeated start */ + i2cp->i2c->C1 |= I2Cx_C1_RSTA; + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + /* wait for the STARTF interrupt */ + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + /* abort if this didn't go well (timed out) */ + if (msg != MSG_OK) { + /* release bus - RX mode, send STOP */ + i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); + return msg; + } +#endif /* KL27Z RST workaround */ + + /* FIXME */ + // while (!(i2cp->i2c->S & I2Cx_S_BUSY)); + + i2cp->intstate = STATE_RECV; + i2cp->i2c->D = i2cp->addr << 1 | 1; + + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + } + + /* release bus - RX mode, send STOP */ + // other kinetis I2C drivers wait here for 1us. is this needed? + i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); + /* FIXME */ + // while (i2cp->i2c->S & I2Cx_S_BUSY); + + return msg; +} + +/** + * @brief Receives data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + i2cp->intstate = STATE_RECV; + return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout); +} + +/** + * @brief Transmits data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[in] txbuf pointer to the transmit buffer + * @param[in] txbytes number of bytes to be transmitted + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + i2cp->intstate = STATE_SEND; + return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout); +} + +#endif /* HAL_USE_I2C */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.h b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.h new file mode 100644 index 0000000..e5c9974 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.h @@ -0,0 +1,247 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file I2Cv1/hal_i2c_lld.h + * @brief KINETIS I2C subsystem low level driver header. + * + * @addtogroup I2C + * @{ + */ + +#ifndef HAL_I2C_LLD_H_ +#define HAL_I2C_LLD_H_ + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#define STATE_STOP 0x00 +#define STATE_SEND 0x01 +#define STATE_RECV 0x02 + +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ +#define RSTA_WORKAROUND_OFF 0x00 +#define RSTA_WORKAROUND_ON 0x01 +#endif /* KL27Z RST workaround */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief I2C0 driver enable switch. + * @details If set to @p TRUE the support for I2C0 is included. + * @note The default is @p FALSE. + */ +#if !defined(KINETIS_I2C_USE_I2C0) || defined(__DOXYGEN__) +#define KINETIS_I2C_USE_I2C0 FALSE +#endif + +/** + * @brief I2C1 driver enable switch. + * @details If set to @p TRUE the support for I2C1 is included. + * @note The default is @p FALSE. + */ +#if !defined(KINETIS_I2C_USE_I2C1) || defined(__DOXYGEN__) +#define KINETIS_I2C_USE_I2C1 FALSE +#endif +/** @} */ + +/** + * @brief I2C0 interrupt priority level setting. + */ +#if !defined(KINETIS_I2C_I2C0_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_I2C_I2C0_PRIORITY 12 +#endif + +/** + * @brief I2C1 interrupt priority level setting. + */ +#if !defined(KINETIS_I2C_I2C1_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_I2C_I2C1_PRIORITY 12 +#endif + +/** + * @brief Timeout for external clearing BUSY bus (in ms). + */ +#if !defined(KINETIS_I2C_BUSY_TIMEOUT) || defined(__DOXYGEN__) +#define KINETIS_I2C_BUSY_TIMEOUT 50 +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/** @brief error checks */ +#if KINETIS_I2C_USE_I2C0 && !KINETIS_HAS_I2C0 +#error "I2C0 not present in the selected device" +#endif + +#if KINETIS_I2C_USE_I2C1 && !KINETIS_HAS_I2C1 +#error "I2C1 not present in the selected device" +#endif + + +#if !(KINETIS_I2C_USE_I2C0 || KINETIS_I2C_USE_I2C1) +#error "I2C driver activated but no I2C peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/* @brief Type representing I2C address. */ +typedef uint8_t i2caddr_t; + +/* @brief Type of I2C Driver condition flags. */ +typedef uint32_t i2cflags_t; + +/* @brief Type used to control the ISR state machine. */ +typedef uint8_t intstate_t; + +/** + * @brief Driver configuration structure. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ + +/** + * @brief Driver configuration structure. + */ +typedef struct { + + /* @brief Clock to be used for the I2C bus. */ + uint32_t clock; + +} I2CConfig; + +/** + * @brief Type of a structure representing an I2C driver. + */ +typedef struct I2CDriver I2CDriver; + +/** + * @brief Structure representing an I2C driver. + */ +struct I2CDriver { + /** + * @brief Driver state. + */ + i2cstate_t state; + /** + * @brief Current configuration data. + */ + const I2CConfig *config; + /** + * @brief Error flags. + */ + i2cflags_t errors; +#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the bus. + */ + mutex_t mutex; +#endif /* I2C_USE_MUTUAL_EXCLUSION */ +#if defined(I2C_DRIVER_EXT_FIELDS) + I2C_DRIVER_EXT_FIELDS +#endif + /* @brief Thread waiting for I/O completion. */ + thread_reference_t thread; + /* @brief Current slave address without R/W bit. */ + i2caddr_t addr; + + /* End of the mandatory fields.*/ + + /* @brief Pointer to the buffer with data to send. */ + const uint8_t *txbuf; + /* @brief Number of bytes of data to send. */ + size_t txbytes; + /* @brief Current index in buffer when sending data. */ + size_t txidx; + /* @brief Pointer to the buffer to put received data. */ + uint8_t *rxbuf; + /* @brief Number of bytes of data to receive. */ + size_t rxbytes; + /* @brief Current index in buffer when receiving data. */ + size_t rxidx; + /* @brief Tracks current ISR state. */ + intstate_t intstate; + /* @brief Low-level register access. */ + I2C_TypeDef *i2c; +#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ + /* @brief Auxiliary variable for KL27Z repeated start workaround. */ + intstate_t rsta_workaround; +#endif /* KL27Z RST workaround */ +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Get errors from I2C driver. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + +#if KINETIS_I2C_USE_I2C0 +extern I2CDriver I2CD1; +#endif + +#if KINETIS_I2C_USE_I2C1 +extern I2CDriver I2CD2; +#endif + +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void i2c_lld_init(void); + void i2c_lld_start(I2CDriver *i2cp); + void i2c_lld_stop(I2CDriver *i2cp); + msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); + msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_I2C */ + +#endif /* HAL_I2C_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c b/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c new file mode 100644 index 0000000..3669937 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c @@ -0,0 +1,391 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PITv1/hal_gpt_lld.c + * @brief KINETIS GPT subsystem low level driver source. + * + * @addtogroup GPT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief GPTD1 driver identifier. + * @note The driver GPTD1 allocates the complex timer PIT0 when enabled. + */ +#if KINETIS_GPT_USE_PIT0 || defined(__DOXYGEN__) +GPTDriver GPTD1; +#endif + +/** + * @brief GPTD2 driver identifier. + * @note The driver GPTD2 allocates the timer PIT1 when enabled. + */ +#if KINETIS_GPT_USE_PIT1 || defined(__DOXYGEN__) +GPTDriver GPTD2; +#endif + +/** + * @brief GPTD3 driver identifier. + * @note The driver GPTD3 allocates the timer PIT2 when enabled. + */ +#if KINETIS_GPT_USE_PIT2 || defined(__DOXYGEN__) +GPTDriver GPTD3; +#endif + +/** + * @brief GPTD4 driver identifier. + * @note The driver GPTD4 allocates the timer PIT3 when enabled. + */ +#if KINETIS_GPT_USE_PIT3 || defined(__DOXYGEN__) +GPTDriver GPTD4; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +#if KINETIS_HAS_PIT_COMMON_IRQ +static uint8_t active_channels = 0; +#endif /* KINETIS_HAS_PIT_COMMON_IRQ */ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Shared IRQ handler. + * + * @param[in] gptp pointer to a @p GPTDriver object + */ +static void gpt_lld_serve_interrupt(GPTDriver *gptp) { + + /* Clear the interrupt */ + gptp->channel->TFLG |= PIT_TFLGn_TIF; + + if (gptp->state == GPT_ONESHOT) { + gptp->state = GPT_READY; /* Back in GPT_READY state. */ + gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */ + } + gptp->config->callback(gptp); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if !KINETIS_HAS_PIT_COMMON_IRQ + +#if KINETIS_GPT_USE_PIT0 +/** + * @brief PIT1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_PIT0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD1); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_GPT_USE_PIT0 */ + +#if KINETIS_GPT_USE_PIT1 +/** + * @brief PIT1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_PIT1_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD2); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_GPT_USE_PIT1 */ + +#if KINETIS_GPT_USE_PIT2 +/** + * @brief PIT2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_PIT2_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD3); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_GPT_USE_PIT2 */ + +#if KINETIS_GPT_USE_PIT3 +/** + * @brief PIT3 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_PIT3_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD4); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_GPT_USE_PIT3 */ + +#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ +/** + * @brief Common PIT interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_PIT_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); +#if KINETIS_GPT_USE_PIT0 + if(GPTD1.channel->TFLG & PIT_TFLGn_TIF) + gpt_lld_serve_interrupt(&GPTD1); +#endif /* KINETIS_GPT_USE_PIT0 */ +#if KINETIS_GPT_USE_PIT1 + if(GPTD2.channel->TFLG & PIT_TFLGn_TIF) + gpt_lld_serve_interrupt(&GPTD2); +#endif /* KINETIS_GPT_USE_PIT1 */ +#if KINETIS_GPT_USE_PIT2 + if(GPTD3.channel->TFLG & PIT_TFLGn_TIF) + gpt_lld_serve_interrupt(&GPTD3); +#endif /* KINETIS_GPT_USE_PIT2 */ +#if KINETIS_GPT_USE_PIT3 + if(GPTD4.channel->TFLG & PIT_TFLGn_TIF) + gpt_lld_serve_interrupt(&GPTD4); +#endif /* KINETIS_GPT_USE_PIT3 */ + OSAL_IRQ_EPILOGUE(); +} + +#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level GPT driver initialization. + * + * @notapi + */ +void gpt_lld_init(void) { + +#if KINETIS_GPT_USE_PIT0 + /* Driver initialization.*/ + GPTD1.channel = &PIT->CHANNEL[0]; + gptObjectInit(&GPTD1); +#endif + +#if KINETIS_GPT_USE_PIT1 + /* Driver initialization.*/ + GPTD2.channel = &PIT->CHANNEL[1]; + gptObjectInit(&GPTD2); +#endif + +#if KINETIS_GPT_USE_PIT2 + /* Driver initialization.*/ + GPTD3.channel = &PIT->CHANNEL[2]; + gptObjectInit(&GPTD3); +#endif + +#if KINETIS_GPT_USE_PIT3 + /* Driver initialization.*/ + GPTD4.channel = &PIT->CHANNEL[3]; + gptObjectInit(&GPTD4); +#endif +} + +/** + * @brief Configures and activates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_start(GPTDriver *gptp) { + uint16_t psc; + + if (gptp->state == GPT_STOP) { + /* Clock activation.*/ + SIM->SCGC6 |= SIM_SCGC6_PIT; + gptp->clock = KINETIS_SYSCLK_FREQUENCY; + +#if !KINETIS_HAS_PIT_COMMON_IRQ + +#if KINETIS_GPT_USE_PIT0 + if (&GPTD1 == gptp) { + nvicEnableVector(PITChannel0_IRQn, KINETIS_GPT_PIT0_IRQ_PRIORITY); + } +#endif +#if KINETIS_GPT_USE_PIT1 + if (&GPTD2 == gptp) { + nvicEnableVector(PITChannel1_IRQn, KINETIS_GPT_PIT1_IRQ_PRIORITY); + } +#endif +#if KINETIS_GPT_USE_PIT2 + if (&GPTD3 == gptp) { + nvicEnableVector(PITChannel2_IRQn, KINETIS_GPT_PIT2_IRQ_PRIORITY); + } +#endif +#if KINETIS_GPT_USE_PIT3 + if (&GPTD4 == gptp) { + nvicEnableVector(PITChannel3_IRQn, KINETIS_GPT_PIT3_IRQ_PRIORITY); + } +#endif + +#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ + nvicEnableVector(PIT_IRQn, KINETIS_GPT_PIT_IRQ_PRIORITY); + active_channels++; +#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ + } + + /* Prescaler value calculation.*/ + psc = (uint16_t)((gptp->clock / gptp->config->frequency) - 1); + osalDbgAssert(((uint32_t)(psc + 1) * gptp->config->frequency) == gptp->clock, + "invalid frequency"); + + /* Enable the PIT */ + PIT->MCR = 0; +} + +/** + * @brief Deactivates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop(GPTDriver *gptp) { + + if (gptp->state == GPT_READY) { + SIM->SCGC6 &= ~SIM_SCGC6_PIT; + + /* Disable the channel */ + gptp->channel->TCTRL = 0; + + /* Clear pending interrupts */ + gptp->channel->TFLG |= PIT_TFLGn_TIF; + +#if !KINETIS_HAS_PIT_COMMON_IRQ + +#if KINETIS_GPT_USE_PIT0 + if (&GPTD1 == gptp) { + nvicDisableVector(PITChannel0_IRQn); + } +#endif +#if KINETIS_GPT_USE_PIT1 + if (&GPTD2 == gptp) { + nvicDisableVector(PITChannel1_IRQn); + } +#endif +#if KINETIS_GPT_USE_PIT2 + if (&GPTD3 == gptp) { + nvicDisableVector(PITChannel2_IRQn); + } +#endif +#if KINETIS_GPT_USE_PIT3 + if (&GPTD4 == gptp) { + nvicDisableVector(PITChannel3_IRQn); + } +#endif + +#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ + if(--active_channels == 0) + nvicDisableVector(PIT_IRQn); +#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ + } +} + +/** + * @brief Starts the timer in continuous mode. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval period in ticks + * + * @notapi + */ +void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { + + /* Clear pending interrupts */ + gptp->channel->TFLG |= PIT_TFLGn_TIF; + + /* Set the interval */ + gpt_lld_change_interval(gptp, interval); + + /* Start the timer */ + gptp->channel->TCTRL |= PIT_TCTRLn_TIE | PIT_TCTRLn_TEN; +} + +/** + * @brief Stops the timer. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop_timer(GPTDriver *gptp) { + + /* Stop the timer */ + gptp->channel->TCTRL = 0; +} + +/** + * @brief Starts the timer in one shot mode and waits for completion. + * @details This function specifically polls the timer waiting for completion + * in order to not have extra delays caused by interrupt servicing, + * this function is only recommended for short delays. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval time interval in ticks + * + * @notapi + */ +void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { + struct PIT_CHANNEL *channel = gptp->channel; + + /* Disable timer and disable interrupts */ + channel->TCTRL = 0; + + /* Clear the interrupt flag */ + channel->TFLG |= PIT_TFLGn_TIF; + + /* Set the interval */ + channel->LDVAL = (gptp->clock / gptp->config->frequency) * interval; + + /* Enable Timer but keep interrupts disabled */ + channel->TCTRL = PIT_TCTRLn_TEN; + + /* Wait for the interrupt flag to be set */ + while (!(channel->TFLG & PIT_TFLGn_TIF)) + ; + + /* Disable timer and disable interrupts */ + channel->TCTRL = 0; +} + +#endif /* HAL_USE_GPT */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.h b/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.h new file mode 100644 index 0000000..96c4c70 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.h @@ -0,0 +1,333 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PITv1/hal_gpt_lld.h + * @brief KINETIS GPT subsystem low level driver header. + * + * @addtogroup GPT + * @{ + */ + +#ifndef HAL_GPT_LLD_H_ +#define HAL_GPT_LLD_H_ + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief GPTD1 driver enable switch. + * @details If set to @p TRUE the support for GPTD1 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_GPT_USE_PIT0) || defined(__DOXYGEN__) +#define KINETIS_GPT_USE_PIT0 FALSE +#endif + +/** + * @brief GPTD2 driver enable switch. + * @details If set to @p TRUE the support for GPTD2 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_GPT_USE_PIT1) || defined(__DOXYGEN__) +#define KINETIS_GPT_USE_PIT1 FALSE +#endif + +/** + * @brief GPTD3 driver enable switch. + * @details If set to @p TRUE the support for GPTD3 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_GPT_USE_PIT2) || defined(__DOXYGEN__) +#define KINETIS_GPT_USE_PIT2 FALSE +#endif + +/** + * @brief GPTD4 driver enable switch. + * @details If set to @p TRUE the support for GPTD4 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_GPT_USE_PIT3) || defined(__DOXYGEN__) +#define KINETIS_GPT_USE_PIT3 FALSE +#endif + +/** + * @brief GPTD1 interrupt priority level setting. + */ +#if !defined(KINETIS_GPT_PIT0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_GPT_PIT0_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD2 interrupt priority level setting. + */ +#if !defined(KINETIS_GPT_PIT1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_GPT_PIT1_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD3 interrupt priority level setting. + */ +#if !defined(KINETIS_GPT_PIT2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_GPT_PIT2_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD4 interrupt priority level setting. + */ +#if !defined(KINETIS_GPT_PIT3_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_GPT_PIT3_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD* common interrupt priority level setting. + */ +#if (KINETIS_HAS_PIT_COMMON_IRQ && !defined(KINETIS_GPT_PIT_IRQ_PRIORITY)) \ + || defined(__DOXYGEN__) +#define KINETIS_GPT_PIT_IRQ_PRIORITY 2 +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if KINETIS_GPT_USE_PIT0 && !KINETIS_HAS_PIT0 +#error "PIT0 not present in the selected device" +#endif + +#if KINETIS_GPT_USE_PIT1 && !KINETIS_HAS_PIT1 +#error "PIT1 not present in the selected device" +#endif + +#if KINETIS_GPT_USE_PIT2 && !KINETIS_HAS_PIT2 +#error "PIT2 not present in the selected device" +#endif + +#if KINETIS_GPT_USE_PIT3 && !KINETIS_HAS_PIT3 +#error "PIT3 not present in the selected device" +#endif + +#if !KINETIS_GPT_USE_PIT0 && !KINETIS_GPT_USE_PIT1 && \ + !KINETIS_GPT_USE_PIT2 && !KINETIS_GPT_USE_PIT3 +#error "GPT driver activated but no PIT peripheral assigned" +#endif + +#if KINETIS_GPT_USE_PIT0 && !KINETIS_HAS_PIT_COMMON_IRQ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to PIT0" +#endif + +#if KINETIS_GPT_USE_PIT1 && !KINETIS_HAS_PIT_COMMON_IRQ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to PIT1" +#endif + +#if KINETIS_GPT_USE_PIT2 && !KINETIS_HAS_PIT_COMMON_IRQ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to PIT2" +#endif + +#if KINETIS_GPT_USE_PIT3 && !KINETIS_HAS_PIT_COMMON_IRQ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT3_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to PIT3" +#endif + +#if KINETIS_HAS_PIT_COMMON_IRQ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to PIT" +#endif + +#if KINETIS_GPT_USE_PIT0 && !defined(KINETIS_PIT0_IRQ_VECTOR) && \ + !KINETIS_HAS_PIT_COMMON_IRQ +#error "KINETIS_PIT0_IRQ_VECTOR not defined" +#endif + +#if KINETIS_GPT_USE_PIT1 && !defined(KINETIS_PIT1_IRQ_VECTOR) && \ + !KINETIS_HAS_PIT_COMMON_IRQ +#error "KINETIS_PIT1_IRQ_VECTOR not defined" +#endif + +#if KINETIS_GPT_USE_PIT2 && !defined(KINETIS_PIT2_IRQ_VECTOR) && \ + !KINETIS_HAS_PIT_COMMON_IRQ +#error "KINETIS_PIT2_IRQ_VECTOR not defined" +#endif + +#if KINETIS_GPT_USE_PIT3 && !defined(KINETIS_PIT3_IRQ_VECTOR) && \ + !KINETIS_HAS_PIT_COMMON_IRQ +#error "KINETIS_PIT3_IRQ_VECTOR not defined" +#endif + +#if KINETIS_HAS_PIT_COMMON_IRQ && !defined(KINETIS_PIT_IRQ_VECTOR) +#error "KINETIS_PIT_IRQ_VECTOR not defined" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief GPT frequency type. + */ +typedef uint32_t gptfreq_t; + +/** + * @brief GPT counter type. + */ +typedef uint32_t gptcnt_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + gptfreq_t frequency; + /** + * @brief Timer callback pointer. + * @note This callback is invoked on GPT counter events. + * @note This callback can be set to @p NULL but in that case the + * one-shot mode cannot be used. + */ + gptcallback_t callback; + /* End of the mandatory fields.*/ +} GPTConfig; + +/** + * @brief Structure representing a GPT driver. + */ +struct GPTDriver { + /** + * @brief Driver state. + */ + gptstate_t state; + /** + * @brief Current configuration data. + */ + const GPTConfig *config; +#if defined(GPT_DRIVER_EXT_FIELDS) + GPT_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Timer base clock. + */ + uint32_t clock; + /** + * @brief Channel structure in PIT registers block. + */ + struct PIT_CHANNEL *channel; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the interval of GPT peripheral. + * @details This function changes the interval of a running GPT unit. + * @pre The GPT unit must be running in continuous mode. + * @post The GPT unit interval is changed to the new value. + * @note The function has effect at the next cycle start. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @param[in] interval new cycle time in timer ticks + * + * @notapi + */ +#define gpt_lld_change_interval(gptp, interval) \ + ((gptp)->channel->LDVAL = (uint32_t)( \ + ( (gptp)->clock / (gptp)->config->frequency ) * \ + ( interval ) )) + +/** + * @brief Returns the interval of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current interval. + * + * @notapi + */ +#define gpt_lld_get_interval(gptp) \ + ((uint32_t)( ( (uint64_t)(gptp)->channel->LDVAL * (gptp)->config->frequency ) / \ + ( (uint32_t)(gptp)->clock ) )) + +/** + * @brief Returns the counter value of GPT peripheral. + * @pre The GPT unit must be running in continuous mode. + * @note The nature of the counter is not defined, it may count upward + * or downward, it could be continuously running or not. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @return The current counter value. + * + * @notapi + */ +#define gpt_lld_get_counter(gptp) ((gptcnt_t)(gptp)->pit->CHANNEL[gptp->channel].CVAL) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_GPT_USE_PIT0 && !defined(__DOXYGEN__) +extern GPTDriver GPTD1; +#endif + +#if KINETIS_GPT_USE_PIT1 && !defined(__DOXYGEN__) +extern GPTDriver GPTD2; +#endif + +#if KINETIS_GPT_USE_PIT2 && !defined(__DOXYGEN__) +extern GPTDriver GPTD3; +#endif + +#if KINETIS_GPT_USE_PIT3 && !defined(__DOXYGEN__) +extern GPTDriver GPTD4; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void gpt_lld_init(void); + void gpt_lld_start(GPTDriver *gptp); + void gpt_lld_stop(GPTDriver *gptp); + void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period); + void gpt_lld_stop_timer(GPTDriver *gptp); + void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_GPT */ + +#endif /* HAL_GPT_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c b/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c new file mode 100644 index 0000000..5930b76 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c @@ -0,0 +1,98 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PITv1/hal_st_lld.c + * @brief ST Driver subsystem low level driver code. + * + * @addtogroup ST + * @{ + */ + +#include "hal.h" + +#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) +/** + * @brief System Timer vector. + * @details This interrupt is used for system tick in periodic mode. + * + * @isr + */ +OSAL_IRQ_HANDLER(SysTick_Handler) { + + OSAL_IRQ_PROLOGUE(); + + osalSysLockFromISR(); + osalOsTimerHandlerI(); + osalSysUnlockFromISR(); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ST driver initialization. + * + * @notapi + */ +void st_lld_init(void) { +#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC + /* Periodic systick mode, the Cortex-Mx internal systick timer is used + in this mode.*/ + SysTick->LOAD = (KINETIS_SYSCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; + SysTick->VAL = 0; + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_ENABLE_Msk | + SysTick_CTRL_TICKINT_Msk; + + /* IRQ enabled.*/ + nvicSetSystemHandlerPriority(HANDLER_SYSTICK, KINETIS_ST_IRQ_PRIORITY); +#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ +} + +#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.h b/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.h new file mode 100644 index 0000000..0d75a54 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.h @@ -0,0 +1,156 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PITv1/hal_st_lld.h + * @brief ST Driver subsystem low level driver header. + * @details This header is designed to be include-able without having to + * include other files from the HAL. + * + * @addtogroup ST + * @{ + */ + +#ifndef HAL_ST_LLD_H_ +#define HAL_ST_LLD_H_ + +#include "mcuconf.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief SysTick timer IRQ priority. + */ +#if !defined(KINETIS_ST_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_ST_IRQ_PRIORITY 8 +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void st_lld_init(void); +#ifdef __cplusplus +} +#endif + +/*===========================================================================*/ +/* Driver inline functions. */ +/*===========================================================================*/ + +/** + * @brief Returns the time counter value. + * + * @return The counter value. + * + * @notapi + */ +static inline systime_t st_lld_get_counter(void) { + + return (systime_t)0; +} + +/** + * @brief Starts the alarm. + * @note Makes sure that no spurious alarms are triggered after + * this call. + * + * @param[in] time the time to be set for the first alarm + * + * @notapi + */ +static inline void st_lld_start_alarm(systime_t time) { + + (void)time; +} + +/** + * @brief Stops the alarm interrupt. + * + * @notapi + */ +static inline void st_lld_stop_alarm(void) { + +} + +/** + * @brief Sets the alarm time. + * + * @param[in] time the time to be set for the next alarm + * + * @notapi + */ +static inline void st_lld_set_alarm(systime_t time) { + + (void)time; +} + +/** + * @brief Returns the current alarm time. + * + * @return The currently set alarm time. + * + * @notapi + */ +static inline systime_t st_lld_get_alarm(void) { + + return (systime_t)0; +} + +/** + * @brief Determines if the alarm is active. + * + * @return The alarm status. + * @retval false if the alarm is not active. + * @retval true is the alarm is active + * + * @notapi + */ +static inline bool st_lld_is_alarm_active(void) { + + return false; +} + +#endif /* HAL_ST_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c b/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c new file mode 100644 index 0000000..c678d6a --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c @@ -0,0 +1,434 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PORTv1/hal_ext_lld.c + * @brief KINETIS EXT subsystem low level driver source. + * + * @addtogroup EXT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define PCR_IRQC_DISABLED 0x0 +#define PCR_IRQC_DMA_RISING_EDGE 0x1 +#define PCR_IRQC_DMA_FALLING_EDGE 0x2 +#define PCR_IRQC_DMA_EITHER_EDGE 0x3 + +#define PCR_IRQC_LOGIC_ZERO 0x8 +#define PCR_IRQC_RISING_EDGE 0x9 +#define PCR_IRQC_FALLING_EDGE 0xA +#define PCR_IRQC_EITHER_EDGE 0xB +#define PCR_IRQC_LOGIC_ONE 0xC + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief EXTD1 driver identifier. + */ +EXTDriver EXTD1; + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/* A channel map for each channel. + * + * The index is the pin number. + * The result is the channel for that pin. + */ +#if KINETIS_EXT_PORTA_WIDTH > 0 +uint8_t porta_channel_map[KINETIS_EXT_PORTA_WIDTH]; +#endif +#if KINETIS_EXT_PORTB_WIDTH > 0 +uint8_t portb_channel_map[KINETIS_EXT_PORTB_WIDTH]; +#endif +#if KINETIS_EXT_PORTC_WIDTH > 0 +uint8_t portc_channel_map[KINETIS_EXT_PORTC_WIDTH]; +#endif +#if KINETIS_EXT_PORTD_WIDTH > 0 +uint8_t portd_channel_map[KINETIS_EXT_PORTD_WIDTH]; +#endif +#if KINETIS_EXT_PORTE_WIDTH > 0 +uint8_t porte_channel_map[KINETIS_EXT_PORTE_WIDTH]; +#endif + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Enables EXTI IRQ sources. + * + * @notapi + */ +static void ext_lld_exti_irq_enable(void) { + +#if KINETIS_EXT_PORTA_WIDTH > 0 + nvicEnableVector(PINA_IRQn, KINETIS_EXT_PORTA_IRQ_PRIORITY); +#endif + +#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ +#if (KINETIS_EXT_PORTB_WIDTH > 0) || (KINETIS_EXT_PORTC_WIDTH > 0) \ + || (KINETIS_EXT_PORTD_WIDTH > 0) || (KINETIS_EXT_PORTE_WIDTH > 0) + nvicEnableVector(PINBCDE_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); +#endif + +#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ +#if (KINETIS_EXT_PORTC_WIDTH > 0) || (KINETIS_EXT_PORTD_WIDTH > 0) + nvicEnableVector(PINCD_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); +#endif + +#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ +#if KINETIS_EXT_PORTB_WIDTH > 0 + nvicEnableVector(PINB_IRQn, KINETIS_EXT_PORTB_IRQ_PRIORITY); +#endif +#if KINETIS_EXT_PORTC_WIDTH > 0 + nvicEnableVector(PINC_IRQn, KINETIS_EXT_PORTC_IRQ_PRIORITY); +#endif +#if KINETIS_EXT_PORTD_WIDTH > 0 + nvicEnableVector(PIND_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); +#endif +#if KINETIS_EXT_PORTE_WIDTH > 0 + nvicEnableVector(PINE_IRQn, KINETIS_EXT_PORTE_IRQ_PRIORITY); +#endif +#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ +} + +/** + * @brief Disables EXTI IRQ sources. + * + * @notapi + */ +static void ext_lld_exti_irq_disable(void) { + +#if KINETIS_EXT_PORTA_WIDTH > 0 + nvicDisableVector(PINA_IRQn); +#endif + +#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ +#if (KINETIS_EXT_PORTB_WIDTH > 0) || (KINETIS_EXT_PORTC_WIDTH > 0) \ + || (KINETIS_EXT_PORTD_WIDTH > 0) || (KINETIS_EXT_PORTE_WIDTH > 0) + nvicDisableVector(PINBCDE_IRQn); +#endif + +#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ +#if (KINETIS_EXT_PORTC_WIDTH > 0) || (KINETIS_EXT_PORTD_WIDTH > 0) + nvicDisableVector(PINCD_IRQn); +#endif + +#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ +#if KINETIS_EXT_PORTB_WIDTH > 0 + nvicDisableVector(PINB_IRQn); +#endif +#if KINETIS_EXT_PORTC_WIDTH > 0 + nvicDisableVector(PINC_IRQn); +#endif +#if KINETIS_EXT_PORTD_WIDTH > 0 + nvicDisableVector(PIND_IRQn); +#endif +#if KINETIS_EXT_PORTE_WIDTH > 0 + nvicDisableVector(PINE_IRQn); +#endif +#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/* + * Generic interrupt handler. + */ +static inline void irq_handler(PORT_TypeDef * const port, const unsigned port_width, const uint8_t *channel_map) { + unsigned pin; + uint32_t isfr = port->ISFR; + + /* Clear all pending interrupts on this port. */ + port->ISFR = 0xFFFFFFFF; + + for (pin = 0; pin < port_width; pin++) { + if (isfr & (1 << pin)) { + expchannel_t channel = channel_map[pin]; + EXTD1.config->channels[channel].cb(&EXTD1, channel); + } + } +} + +/** + * @brief PORTA interrupt handler. + * + * @isr + */ +#if defined(KINETIS_PORTA_IRQ_VECTOR) && KINETIS_EXT_PORTA_WIDTH > 0 +OSAL_IRQ_HANDLER(KINETIS_PORTA_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + irq_handler(PORTA, KINETIS_EXT_PORTA_WIDTH, porta_channel_map); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_EXT_PORTA_WIDTH > 0 */ + +#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ + +#if defined(KINETIS_PORTD_IRQ_VECTOR) +OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + +#if (KINETIS_EXT_PORTB_WIDTH > 0) + irq_handler(PORTB, KINETIS_EXT_PORTB_WIDTH, portb_channel_map); +#endif +#if (KINETIS_EXT_PORTC_WIDTH > 0) + irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); +#endif +#if (KINETIS_EXT_PORTD_WIDTH > 0) + irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); +#endif +#if (KINETIS_EXT_PORTE_WIDTH > 0) + irq_handler(PORTE, KINETIS_EXT_PORTE_WIDTH, porte_channel_map); +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif /* defined(KINETIS_PORTD_IRQ_VECTOR) */ + +#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ + +#if defined(KINETIS_PORTD_IRQ_VECTOR) +OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + +#if (KINETIS_EXT_PORTC_WIDTH > 0) + irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); +#endif +#if (KINETIS_EXT_PORTD_WIDTH > 0) + irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); +#endif + + OSAL_IRQ_EPILOGUE(); +} +#endif /* defined(KINETIS_PORTD_IRQ_VECTOR) */ + + +#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ + +/** + * @brief PORTB interrupt handler. + * + * @isr + */ +#if defined(KINETIS_PORTB_IRQ_VECTOR) && KINETIS_EXT_PORTB_WIDTH > 0 +OSAL_IRQ_HANDLER(KINETIS_PORTB_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + irq_handler(PORTB, KINETIS_EXT_PORTB_WIDTH, portb_channel_map); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_EXT_PORTB_WIDTH > 0 */ + +/** + * @brief PORTC interrupt handler. + * + * @isr + */ +#if defined(KINETIS_PORTC_IRQ_VECTOR) && KINETIS_EXT_PORTC_WIDTH > 0 +OSAL_IRQ_HANDLER(KINETIS_PORTC_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_EXT_PORTC_WIDTH > 0 */ + +/** + * @brief PORTD interrupt handler. + * + * @isr + */ +#if defined(KINETIS_PORTD_IRQ_VECTOR) && KINETIS_EXT_PORTD_WIDTH > 0 +OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_EXT_PORTD_WIDTH > 0 */ + +/** + * @brief PORTE interrupt handler. + * + * @isr + */ +#if defined(KINETIS_PORTE_IRQ_VECTOR) && KINETIS_EXT_PORTE_WIDTH > 0 +OSAL_IRQ_HANDLER(KINETIS_PORTE_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + irq_handler(PORTE, KINETIS_EXT_PORTE_WIDTH, porte_channel_map); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_EXT_PORTE_WIDTH > 0 */ + +#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level EXT driver initialization. + * + * @notapi + */ +void ext_lld_init(void) { + + /* Driver initialization.*/ + extObjectInit(&EXTD1); +} + +/** + * @brief Configures and activates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_start(EXTDriver *extp) { + expchannel_t channel; + + if (extp->state == EXT_STOP) + ext_lld_exti_irq_enable(); + + /* Configuration of automatic channels.*/ + for (channel = 0; channel < EXT_MAX_CHANNELS; channel++) { + + uint32_t mode = extp->config->channels[channel].mode; + PORT_TypeDef *port = extp->config->channels[channel].port; + uint32_t pin = extp->config->channels[channel].pin; + + /* Initialize the channel map */ +#if KINETIS_EXT_PORTA_WIDTH > 0 + if (port == PORTA) + porta_channel_map[pin] = channel; + else +#endif +#if KINETIS_EXT_PORTB_WIDTH > 0 + if (port == PORTB) + portb_channel_map[pin] = channel; + else +#endif +#if KINETIS_EXT_PORTC_WIDTH > 0 + if (port == PORTC) + portc_channel_map[pin] = channel; + else +#endif +#if KINETIS_EXT_PORTD_WIDTH > 0 + if (port == PORTD) + portd_channel_map[pin] = channel; + else +#endif +#if KINETIS_EXT_PORTE_WIDTH > 0 + if (port == PORTE) + porte_channel_map[pin] = channel; + else +#endif + {} + + if (mode & EXT_CH_MODE_AUTOSTART) + ext_lld_channel_enable(extp, channel); + else if (port != NULL) + ext_lld_channel_disable(extp, channel); + } +} + +/** + * @brief Deactivates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_stop(EXTDriver *extp) { + + if (extp->state == EXT_ACTIVE) + ext_lld_exti_irq_disable(); +} + +/** + * @brief Enables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be enabled + * + * @notapi + */ +void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { + + uint32_t irqc; + uint32_t mode = extp->config->channels[channel].mode; + if (mode & EXT_CH_MODE_RISING_EDGE) + irqc = PCR_IRQC_RISING_EDGE; + else if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE) + irqc = PCR_IRQC_FALLING_EDGE; + else if (extp->config->channels[channel].mode & EXT_CH_MODE_BOTH_EDGES) + irqc = PCR_IRQC_EITHER_EDGE; + else + irqc = PCR_IRQC_DISABLED; + + PORT_TypeDef *port = extp->config->channels[channel].port; + uint32_t pin = extp->config->channels[channel].pin; + + uint32_t pcr = port->PCR[pin]; + + /* Clear all the IRQC bits */ + pcr &= ~PORTx_PCRn_IRQC_MASK; + /* Set the required IRQC bits */ + pcr |= PORTx_PCRn_IRQC(irqc); + + port->PCR[pin] = pcr; +} + +/** + * @brief Disables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be disabled + * + * @notapi + */ +void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) { + + PORT_TypeDef *port = extp->config->channels[channel].port; + uint32_t pin = extp->config->channels[channel].pin; + port->PCR[pin] |= PORTx_PCRn_IRQC(PCR_IRQC_DISABLED); +} + +#endif /* HAL_USE_EXT */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.h b/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.h new file mode 100644 index 0000000..0b500a4 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.h @@ -0,0 +1,188 @@ +/* + ChibiOS - Copyright (C) 2014 Derek Mulcahy + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file PORTv1/hal_ext_lld.h + * @brief KINETIS EXT subsystem low level driver header. + * + * @addtogroup EXT + * @{ + */ + +#ifndef HAL_EXT_LLD_H_ +#define HAL_EXT_LLD_H_ + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Number of EXT channels required. + */ +#define EXT_MAX_CHANNELS KINETIS_EXTI_NUM_CHANNELS + +/** + * @name KINETIS-specific EXT channel modes + * @{ + */ +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief PORTA interrupt priority level setting. + */ +#if !defined(KINETIS_EXT_PORTA_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_EXT_PORTA_IRQ_PRIORITY 3 +#endif + +/** + * @brief PORTB interrupt priority level setting. + */ +#if !defined(KINETIS_EXT_PORTB_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_EXT_PORTB_IRQ_PRIORITY 3 +#endif + +/** + * @brief PORTC interrupt priority level setting. + */ +#if !defined(KINETIS_EXT_PORTC_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_EXT_PORTC_IRQ_PRIORITY 3 +#endif + +/** + * @brief PORTD interrupt priority level setting. + */ +#if !defined(KINETIS_EXT_PORTD_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_EXT_PORTD_IRQ_PRIORITY 3 +#endif + +/** + * @brief PORTE interrupt priority level setting. + */ +#if !defined(KINETIS_EXT_PORTE_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_EXT_PORTE_IRQ_PRIORITY 3 +#endif +/** @} */ +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief EXT channel identifier. + */ +typedef uint32_t expchannel_t; + +/** + * @brief Type of an EXT generic notification callback. + * + * @param[in] extp pointer to the @p EXPDriver object triggering the + * callback + */ +typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); + +/** + * @brief Channel configuration structure. + */ +typedef struct { + /** + * @brief Channel mode. + */ + uint32_t mode; + /** + * @brief Channel callback. + */ + extcallback_t cb; + + /** + * @brief Port. + */ + PORT_TypeDef *port; + + /** + * @brief Pin. + */ + uint32_t pin; +} EXTChannelConfig; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Channel configurations. + */ + EXTChannelConfig channels[EXT_MAX_CHANNELS]; + /* End of the mandatory fields.*/ +} EXTConfig; + +/** + * @brief Structure representing an EXT driver. + */ +struct EXTDriver { + /** + * @brief Driver state. + */ + extstate_t state; + /** + * @brief Current configuration data. + */ + const EXTConfig *config; + /* End of the mandatory fields.*/ +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) +extern EXTDriver EXTD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void ext_lld_init(void); + void ext_lld_start(EXTDriver *extp); + void ext_lld_stop(EXTDriver *extp); + void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); + void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_EXT */ + +#endif /* HAL_EXT_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c b/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c new file mode 100644 index 0000000..6d236eb --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c @@ -0,0 +1,993 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + Copyright (C) 2017..2018 Wim Lewis + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SDHCv1/hal_sdc_lld.h + * @brief Kinetis SDC subsystem low level driver. + * + * This driver provides a single SDC driver based on the Kinetis + * "Secured Digital Host Controller (SDHC)" peripheral. + * + * In order to use this driver, other peripherals must also be configured: + * + * The MPU must either be disabled (CESR=0), or it must be configured + * to allow the SDHC peripheral DMA access to any data buffers (read + * or write). + * + * The SDHC signals must be routed to the desired pins, and pullups/pulldowns + * configured. + * + * @addtogroup SDC + * @{ + */ + +#include "hal.h" + +#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__) + +#include "hal_mmcsd.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#if defined(MK66F18) +/* Configure SDHC block to use the IRC48M clock */ +#define KINETIS_SDHC_PERIPHERAL_FREQUENCY 48000000UL +#else +/* We configure the SDHC block to use the system clock */ +#define KINETIS_SDHC_PERIPHERAL_FREQUENCY KINETIS_SYSCLK_FREQUENCY +#endif + +#ifndef KINETIS_SDHC_PRIORITY +#define KINETIS_SDHC_PRIORITY 12 /* TODO? Default IRQ priority for SDHC */ +#endif + +/* The DTOC value (data timeout counter) controls how long the SDHC + will wait for a data transfer before indicating a timeout to + us. The card can tell us how long that should be, but various SDHC + documentation suggests that we should always allow around 500 msec + even if the card says it will finish sooner. This only comes into + play if there's a malfunction or something, so it's not critical to + get it exactly right. + + It controls the ratio between the SDCLK frequency and the + timeout, so we have a different DTOCV for each bus clock + frequency. +*/ +#define DTOCV_300ms_400kHz 4 /* 4 -> 2^17 -> 328 msec */ +#define DTOCV_700ms_25MHz 11 /* 11 -> 2^24 -> 671 msec */ +#define DTOCV_700ms_50MHz 12 /* 12 -> 2^25 -> 671 msec */ + +#if 0 +#define TRACE(t, val) chDbgWriteTrace ((void *)t, (void *)(uintptr_t)(val)) +#define TRACEI(t, val) chDbgWriteTraceI((void *)t, (void *)(uintptr_t)(val)) +#else +#define TRACE(t, val) +#define TRACEI(t, val) +#endif + +#define DIV_RND_UP(a, b) ( ((a)+(b)-1) / (b) ) + +/* Error bits from the SD / MMC Card Status response word. */ +/* TODO: These really belong in a HLD, not here. */ +#define MMC_ERR_OUT_OF_RANGE (1U << 31) +#define MMC_ERR_ADDRESS (1U << 30) +#define MMC_ERR_BLOCK_LEN (1U << 29) +#define MMC_ERR_ERASE_SEQ (1U << 28) +#define MMC_ERR_ERASE_PARAM (1U << 27) +#define MMC_ERR_WP (1U << 26) +#define MMC_ERR_CARD_IS_LOCKED (1U << 25) +#define MMC_ERR_LOCK_UNLOCK_FAILED (1U << 24) +#define MMC_ERR_COM_CRC_ERROR (1U << 23) +#define MMC_ERR_ILLEGAL_COMMAND (1U << 22) +#define MMC_ERR_CARD_ECC_FAILED (1U << 21) +#define MMC_ERR_CARD_CONTROLLER (1U << 20) +#define MMC_ERR_ERROR (1U << 19) +#define MMC_ERR_CSD_OVERWRITE (1U << 16) +#define MMC_ERR_AKE_SEQ (1U << 3) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief SDCD1 driver identifier. + */ +#if (PLATFORM_SDC_USE_SDC1 == TRUE) || defined(__DOXYGEN__) +SDCDriver SDCD1; +#else +#error HAL_USE_SDC is true but PLATFORM_SDC_USE_SDC1 is false +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void recover_after_botched_transfer(SDCDriver *); +static msg_t wait_interrupt(SDCDriver *, uint32_t); +static bool sdc_lld_transfer(SDCDriver *, uint32_t, uintptr_t, uint32_t, uint32_t); + +/** + * Compute the SDCLKFS and DVS values for a given SDCLK divisor. + * + * Note that in the current code, this function is always called with + * a constant argument (there are only a handful of valid SDCLK + * frequencies), and so GCC computes the results at compile time and + * does not actually emit this function into the output at all unless + * you're compiling with optimizations turned off. + * + * However if someone compiles with a KINETIS_SDHC_PERIPHERAL_FREQUENCY + * that is not a compile-time constant, this function would get emitted. + */ +static uint32_t divisor_settings(unsigned divisor) +{ + /* First, handle all the special cases */ + if (divisor <= 1) { + /* Pass through */ + return SDHC_SYSCTL_SDCLKFS(0) | SDHC_SYSCTL_DVS(0); + } + if (divisor <= 16 && (divisor & 0x01)) { + /* Disable the prescaler, just use the divider. */ + return SDHC_SYSCTL_SDCLKFS(0) | SDHC_SYSCTL_DVS(divisor - 1); + } + if (divisor <= 32 && !(divisor & 0x01)) { + /* Prescale by 2, but do the rest with the divider */ + return SDHC_SYSCTL_SDCLKFS(0x01) | SDHC_SYSCTL_DVS((divisor >> 1) - 1); + } + if (divisor >= 0x1000) { + /* It's not possible to divide by more than 2^12. If we're asked to, + just do the best we can. */ + return SDHC_SYSCTL_SDCLKFS(0x80) | SDHC_SYSCTL_DVS(0xF); + } + + /* The bit position in SDCLKFS provides a power-of-two prescale + factor, and the four bits in DVS allow division by up to 16 + (division by DVS+1). We want to approximate `divisor` using these + terms, but we want to round up --- it's OK to run the card a + little bit too slow, but not OK to run it a little bit too + fast. */ + + unsigned shift = (8 * sizeof(unsigned int) - 4) - __builtin_clz(divisor); + + /* Shift the divisor value right so that it only occupies the four + lowest bits. Subtract one because that's how the DVS circuit + works. Add one if we shifted any 1-bits off the bottom, so that + we always round up. */ + unsigned dvs = (divisor >> shift) - ((divisor & ((1 << shift)-1))? 0 : 1); + + return SDHC_SYSCTL_SDCLKFS(1 << (shift-1)) | SDHC_SYSCTL_DVS(dvs); +} + +/** + * @brief Enable the SDHC clock when stable. + * + * Waits for the clock divider in the SDHC block to stabilize, then + * enables the SD clock. + */ +static void enable_clock_when_stable(uint32_t new_sysctl) +{ + SDHC->SYSCTL = new_sysctl; + + /* Wait for clock divider to stabilize */ + while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) { + osalThreadSleepMilliseconds(1); + } + + /* Restart the clock */ + SDHC->SYSCTL = new_sysctl | SDHC_SYSCTL_SDCLKEN; + + /* Wait for clock to stabilize again */ + while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) { + osalThreadSleepMilliseconds(1); + } +} + +/** + * Translate error bits from a CMD transaction to the HAL's error flag set. + */ +static sdcflags_t translate_cmd_error(uint32_t status) { + /* Translate the failure into the flags understood by the top half */ + + sdcflags_t errors = 0; + + if (status & SDHC_IRQSTAT_CTOE || !(status & SDHC_IRQSTAT_CC)) { + errors |= SDC_COMMAND_TIMEOUT; + } + if (status & SDHC_IRQSTAT_CCE) { + errors |= SDC_CMD_CRC_ERROR; + } + + /* If CTOE and CCE are both set, this indicates that the Kinetis + SDHC peripheral has detected a CMD line conflict in a + multi-master scenario. There's no specific code for that, so just + pass it through as a combined timeout+CRC failure. */ + + /* Translate any other framing and protocol errors into CRC errors. */ + if (status & ~(SDHC_IRQSTAT_CCE|SDHC_IRQSTAT_CTOE|SDHC_IRQSTAT_CC)) { + errors |= SDC_CMD_CRC_ERROR; + } + + return errors; +} + +/** + * Translate error bits from a card's R1 response word into the HAL's + * error flag set. + * + * This function should probably be in the HLD, not here. + */ +static sdcflags_t translate_mmcsd_error(uint32_t cardstatus) { + sdcflags_t errors = 0; + + cardstatus &= MMCSD_R1_ERROR_MASK; + + if (cardstatus & MMC_ERR_COM_CRC_ERROR) + errors |= SDC_CMD_CRC_ERROR; + + if (cardstatus & MMC_ERR_CARD_ECC_FAILED) + errors |= SDC_DATA_CRC_ERROR; + + /* TODO: Extend the HLD error codes at least enough to distinguish + between invalid command/parameter errors (card is OK, but + retrying w/o change won't help) and other errors */ + if (cardstatus & ~(MMC_ERR_COM_CRC_ERROR|MMC_ERR_CARD_ECC_FAILED)) + errors |= SDC_UNHANDLED_ERROR; + + return errors; +} + +/** + * @brief Perform one CMD transaction on the SD bus. + */ +static bool send_and_wait_cmd(SDCDriver *sdcp, uint32_t cmd) { + /* SDCLKEN (CMD clock enabled) should be true; + * SDSTB (clock stable) should be true; + * CIHB (command inhibit / busy) should be false */ + osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_SDSTB|SDHC_PRSSTAT_CIHB)) == SDHC_PRSSTAT_SDSTB, "Not in expected state"); + osalDbgAssert(SDHC->SYSCTL & SDHC_SYSCTL_SDCLKEN, "Clock disabled"); + osalDbgCheck((cmd & SDHC_XFERTYP_DPSEL) == 0); + osalDbgCheck((SDHC->IRQSTAT & (SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | + SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC)) == 0); + + /* This initiates the CMD transaction */ + TRACE(1, cmd); + SDHC->XFERTYP = cmd; + + uint32_t events = + SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | + SDHC_IRQSTAT_CTOE | /* SDHC_IRQSTAT_CRM | */ SDHC_IRQSTAT_CC; + wait_interrupt(sdcp, SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC); + uint32_t status = SDHC->IRQSTAT & events; + + /* These bits are write-1-to-clear (w1c) */ + SDHC->IRQSTAT = status; + + /* In the normal case, the CC (command complete) bit is set but none + of the others are */ + if (status == SDHC_IRQSTAT_CC) + return HAL_SUCCESS; + + /* Translate the failure into the flags understood by the top half */ + sdcp->errors |= translate_cmd_error(status); + + TRACE(9, SDHC->PRSSTAT); + + /* Issue a reset to the CMD portion of the SDHC peripheral to clear the + error bits and enable subsequent commands */ + SDHC->SYSCTL |= SDHC_SYSCTL_RSTC; + + return HAL_FAILED; +} + +/** + * @brief Perform one data transaction on the SD bus. + */ +static bool send_and_wait_transfer(SDCDriver *sdcp, uint32_t cmd) { + + osalDbgCheck(cmd & SDHC_XFERTYP_DPSEL); + osalDbgCheck(cmd & SDHC_XFERTYP_DMAEN); + + const uint32_t cmd_end_bits = + SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | + SDHC_IRQSTAT_CTOE | /* SDHC_IRQSTAT_CRM | */ SDHC_IRQSTAT_CC; + + const uint32_t transfer_end_bits = + SDHC_IRQSTAT_DMAE | SDHC_IRQSTAT_AC12E | SDHC_IRQSTAT_DEBE | + SDHC_IRQSTAT_DCE | SDHC_IRQSTAT_DTOE | SDHC_IRQSTAT_TC; + + TRACE(3, cmd); + + osalSysLock(); + osalDbgCheck(sdcp->thread == NULL); + + /* Clear anything pending from an earlier transfer */ + SDHC->IRQSTAT = cmd_end_bits | transfer_end_bits | SDHC_IRQSTAT_DINT; + + /* Enable interrupts on completions or failures */ + uint32_t old_staten = SDHC->IRQSTATEN; + SDHC->IRQSTATEN = (old_staten & ~(SDHC_IRQSTAT_BRR|SDHC_IRQSTAT_BWR)) | (cmd_end_bits | transfer_end_bits | SDHC_IRQSTAT_DINT); + SDHC->IRQSIGEN = SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC; + + /* Start the transfer */ + SDHC->XFERTYP = cmd; + + /* Await an interrupt */ + osalThreadSuspendS(&sdcp->thread); + osalSysUnlock(); + + /* Retrieve the flags and clear them */ + uint32_t cmdstat = SDHC->IRQSTAT & cmd_end_bits; + SDHC->IRQSTAT = cmdstat; + TRACE(2, cmdstat); + + /* If the command failed, the transfer won't happen */ + if (cmdstat != SDHC_IRQSTAT_CC) { + /* The command couldn't be sent, or wasn't acknowledged */ + sdcp->errors |= translate_cmd_error(cmdstat); + + /* Clear the error status */ + SDHC->SYSCTL |= SDHC_SYSCTL_RSTC; + + if (cmdstat == (SDHC_IRQSTAT_CCE|SDHC_IRQSTAT_CTOE)) { + /* A CMD-line conflict is unlikely, but doesn't require further recovery */ + } else { + /* For most error situations, we don't know whether the command + failed to send or we got line noise while receiving. Make sure + we're in a sane state by resetting the connection. */ + recover_after_botched_transfer(sdcp); + } + + return HAL_FAILED; + } + + uint32_t cmdresp = SDHC->CMDRSP[0]; + TRACE(11, cmdresp); + if (cmdresp & MMCSD_R1_ERROR_MASK) { + /* The command was sent, and the card responded with an error indication */ + sdcp->errors |= translate_mmcsd_error(cmdresp); + return HAL_FAILED; + } + + /* Check for end of data transfer phase */ + uint32_t datastat; + for (;;) { + datastat = SDHC->IRQSTAT & (transfer_end_bits | SDHC_IRQSTAT_DINT); + if (datastat & transfer_end_bits) + break; + wait_interrupt(sdcp, transfer_end_bits); + } + TRACE(6, datastat); + SDHC->IRQSTAT = datastat; + + /* Handle data transfer errors */ + if ((datastat & ~(SDHC_IRQSTAT_DINT)) != SDHC_IRQSTAT_TC) { + bool should_cancel = false; + + /* Data phase errors */ + if (datastat & (SDHC_IRQSTAT_DCE|SDHC_IRQSTAT_DEBE)) { + sdcp->errors |= SDC_DATA_CRC_ERROR; + should_cancel = true; + } + if (datastat & SDHC_IRQSTAT_DTOE) { + sdcp->errors |= SDC_DATA_TIMEOUT; + should_cancel = true; + } + + /* Internal DMA error */ + if (datastat & SDHC_IRQSTAT_DMAE) { + sdcp->errors |= SDC_UNHANDLED_ERROR; + if (!(datastat & SDHC_IRQSTAT_TC)) + should_cancel = true; + } + + if (datastat & SDHC_IRQSTAT_AC12E) { + uint32_t cmd12error = SDHC->AC12ERR; + + /* We don't know if CMD12 was successfully executed */ + should_cancel = true; + + if (cmd12error & SDHC_AC12ERR_AC12NE) { + sdcp->errors |= SDC_UNHANDLED_ERROR; + } else { + if (cmd12error & SDHC_AC12ERR_AC12TOE) + sdcp->errors |= SDC_COMMAND_TIMEOUT; + if (cmd12error & (SDHC_AC12ERR_AC12CE|SDHC_AC12ERR_AC12EBE)) + sdcp->errors |= SDC_CMD_CRC_ERROR; + } + } + + if (should_cancel) { + recover_after_botched_transfer(sdcp); + } + + return HAL_FAILED; + } + + /* For a read transfer, make sure the DMA has finished transferring + * to host memory. (For a write transfer, the DMA necessarily finishes + * before the transfer does, so we don't need to wait for it + * specially.) */ + if (!(datastat & SDHC_IRQSTAT_DINT)) { + for(;;) { + datastat = SDHC->IRQSTAT & (SDHC_IRQSTAT_DINT|SDHC_IRQSTAT_DMAE); + if (datastat) { + SDHC->IRQSTAT = datastat; + TRACE(7, datastat); + break; + } + /* ...?? */ + } + } + + SDHC->IRQSTATEN = old_staten; + + return HAL_SUCCESS; +} + +/** + * @brief Wait for an interrupt from the SDHC peripheral. + * + * @param[in] mask Bits to enable in IRQSIGEN. + * + * @return MSG_OK + */ +static msg_t wait_interrupt(SDCDriver *sdcp, uint32_t mask) { + osalSysLock(); + SDHC->IRQSIGEN = mask; + msg_t wakeup = osalThreadSuspendS(&sdcp->thread); + osalSysUnlock(); + return wakeup; +} + +static void recover_after_botched_transfer(SDCDriver *sdcp) { + + /* Query the card state */ + uint32_t cardstatus; + if (sdc_lld_send_cmd_short_crc(sdcp, + MMCSD_CMD_SEND_STATUS, + sdcp->rca, &cardstatus) == HAL_SUCCESS) { + sdcp->errors |= translate_mmcsd_error(cardstatus); + uint32_t state = MMCSD_R1_STS(cardstatus); + if (state == MMCSD_STS_DATA) { + + /* Send a CMD12 to make sure the card isn't still transferring anything */ + SDHC->CMDARG = 0; + send_and_wait_cmd(sdcp, + SDHC_XFERTYP_CMDINX(MMCSD_CMD_STOP_TRANSMISSION) | + SDHC_XFERTYP_CMDTYP_ABORT | + /* TODO: Should we set CICEN and CCCEN here? */ + SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_48b); + } + } + + /* And reset the data block of the SDHC peripheral */ + SDHC->SYSCTL |= SDHC_SYSCTL_RSTD; +} + +/** + * @brief Perform one data transfer command + * + * Sends a command to the card and waits for the corresponding data transfer + * (either a read or write) to complete. + */ +static bool sdc_lld_transfer(SDCDriver *sdcp, uint32_t startblk, + uintptr_t buf, uint32_t n, + uint32_t cmdx) { + + osalDbgCheck(n > 0); + osalDbgCheck((buf & 0x03) == 0); /* Must be 32-bit aligned */ + + osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_DLA|SDHC_PRSSTAT_CDIHB|SDHC_PRSSTAT_CIHB)) == 0, + "SDHC interface not ready"); + + /* We always operate in terms of 512-byte blocks; the upper-layer + driver doesn't change the block size. The SDHC spec suggests that + only low-capacity cards support block sizes other than 512 bytes + anyway (SDHC "Physical Layer Simplified Specification" ver 6.0) */ + + if (sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) { + SDHC->CMDARG = startblk; + } else { + SDHC->CMDARG = startblk * MMCSD_BLOCK_SIZE; + } + + /* Store the DMA start address */ + SDHC->DSADDR = buf; + + uint32_t xfer; + /* For data transfers, we need to set some extra bits in XFERTYP according to the + transfer we're starting: + DPSEL -> enable data transfer + DTDSEL -> 1 for a read (card-to-host) transfer + MSBSEL, BCEN -> multiple block transfer using BLKATTR_BLKCNT + AC12EN -> Automatically issue MMCSD_CMD_STOP_TRANSMISSION at end of transfer + + Setting BLKCOUNT to 1 seems to be necessary even if MSBSEL+BCEN + is not set, despite the datasheet suggesting otherwise. I'm not + sure if this is a silicon bug or if I'm misunderstanding the + datasheet. + */ + SDHC->BLKATTR = + SDHC_BLKATTR_BLKCNT(n) | + SDHC_BLKATTR_BLKSIZE(MMCSD_BLOCK_SIZE); + if (n == 1) { + xfer = + cmdx | + SDHC_XFERTYP_CMDTYP_NORMAL | + SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_48b | + SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; + } else { + xfer = + cmdx | + SDHC_XFERTYP_CMDTYP_NORMAL | + SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_48b | + SDHC_XFERTYP_MSBSEL | SDHC_XFERTYP_BCEN | SDHC_XFERTYP_AC12EN | + SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; + } + + return send_and_wait_transfer(sdcp, xfer); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if (PLATFORM_SDC_USE_SDC1 == TRUE) || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SDHC_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + osalSysLockFromISR(); + + TRACEI(4, SDHC->IRQSTAT); + + /* We disable the interrupts, and wake up the usermode task to read + * the flags from IRQSTAT. + */ + SDHC->IRQSIGEN = 0; + + osalThreadResumeI(&SDCD1.thread, MSG_OK); + + osalSysUnlockFromISR(); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level SDC driver initialization. + * + * @notapi + */ +void sdc_lld_init(void) { +#if PLATFORM_SDC_USE_SDC1 == TRUE + sdcObjectInit(&SDCD1); +#endif +} + + +/** + * @brief Configures and activates the SDC peripheral. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * + * @notapi + */ +void sdc_lld_start(SDCDriver *sdcp) { + + if (sdcp->state == BLK_STOP) { +#if defined(MK66F18) + /* Use IRC48M clock for SDHC */ + SIM->SOPT2 |= SIM_SOPT2_SDHCSRC(1); + SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3); +#else + SIM->SOPT2 = + (SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | + SIM_SOPT2_SDHCSRC(0); /* SDHC clock source 0: Core/system clock. */ +#endif + SIM->SCGC3 |= SIM_SCGC3_SDHC; /* Enable clock to SDHC peripheral */ + + /* Reset the SDHC block */ + SDHC->SYSCTL |= SDHC_SYSCTL_RSTA; + while(SDHC->SYSCTL & SDHC_SYSCTL_RSTA) { + osalThreadSleepMilliseconds(1); + } + + SDHC->IRQSIGEN = 0; + nvicEnableVector(SDHC_IRQn, KINETIS_SDHC_PRIORITY); + } +} + +/** + * @brief Deactivates the SDC peripheral. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * + * @notapi + */ +void sdc_lld_stop(SDCDriver *sdcp) { + + if (sdcp->state != BLK_STOP) { + /* TODO: Should we perform a reset (RSTA) before putting the + peripheral to sleep? */ + + /* Disable the card clock */ + SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); + + /* Turn off interrupts */ + nvicDisableVector(SDHC_IRQn); + SDHC->IRQSIGEN = 0; + SDHC->IRQSTATEN &= ~( SDHC_IRQSTATEN_CINTSEN | + SDHC_IRQSTATEN_CINSEN | + SDHC_IRQSTATEN_CRMSEN ); + + /* Disable the clock to the SDHC peripheral block */ + SIM->SCGC3 &= ~( SIM_SCGC3_SDHC ); + } +} + +/** + * @brief Starts the SDIO clock and sets it to init mode (400kHz or less). + * + * @param[in] sdcp pointer to the @p SDCDriver object + * + * @notapi + */ +void sdc_lld_start_clk(SDCDriver *sdcp) { + + (void)sdcp; + + /* Stop the card clock (it should already be stopped) */ + SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); + + /* Change the divisor and DTOCV for a 400kHz card closk */ + uint32_t sysctl = + SDHC_SYSCTL_DTOCV(DTOCV_300ms_400kHz) | + divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 400000)); + + /* Restart the clock */ + enable_clock_when_stable(sysctl); + + /* Reset any protocol machinery; this also runs the clock for 80 + cycles without any data bits to help initalize the card's state + (the Kinetis peripheral docs say that this is required after card + insertion or power-on, but the abridged SDHC specifications I + have don't seem to mention it) */ + SDHC->SYSCTL |= SDHC_SYSCTL_INITA; + + TRACE(9, SDHC->PRSSTAT); +} + +/** + * @brief Sets the SDIO clock to data mode (25MHz or less). + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] clk the clock mode + * + * @notapi + */ +void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { + + (void)sdcp; + + /* Stop the card clock */ + SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); + + /* Change the divisor */ + uint32_t ctl; + switch (clk) { + default: + case SDC_CLK_25MHz: + ctl = + SDHC_SYSCTL_DTOCV(DTOCV_700ms_25MHz) | + divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 25000000)); + break; + case SDC_CLK_50MHz: + ctl = + SDHC_SYSCTL_DTOCV(DTOCV_700ms_50MHz) | + divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 50000000)); + break; + } + + /* Restart the clock */ + enable_clock_when_stable(ctl); +} + +/** + * @brief Stops the SDIO clock. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * + * @notapi + */ +void sdc_lld_stop_clk(SDCDriver *sdcp) { + (void)sdcp; + SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); +} + +/** + * @brief Switches the bus to 4 bit or 8 bit mode. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] mode bus mode + * + * @notapi + */ +void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode) { + (void)sdcp; + uint32_t proctl = SDHC->PROCTL & ~( SDHC_PROCTL_DTW_MASK ); + + switch (mode) { + case SDC_MODE_1BIT: + proctl |= SDHC_PROCTL_DTW_1BIT; + break; + case SDC_MODE_4BIT: + proctl |= SDHC_PROCTL_DTW_4BIT; + break; + case SDC_MODE_8BIT: + proctl |= SDHC_PROCTL_DTW_8BIT; + break; + default: + osalDbgAssert(false, "invalid bus mode"); + break; + } + + SDHC->PROCTL = proctl; +} + +/** + * @brief Sends an SDIO command with no response expected. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] cmd card command + * @param[in] arg command argument + * + * @notapi + */ +void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) { + SDHC->CMDARG = arg; + uint32_t xfer = + SDHC_XFERTYP_CMDINX(cmd) | + SDHC_XFERTYP_CMDTYP_NORMAL | + /* DPSEL=0, CICEN=0, CCCEN=0 */ + SDHC_XFERTYP_RSPTYP_NONE; + + send_and_wait_cmd(sdcp, xfer); +} + +/** + * @brief Sends an SDIO command with a short response expected. + * @note The CRC is not verified. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] cmd card command + * @param[in] arg command argument + * @param[out] resp pointer to the response buffer (one word) + * + * @return The operation status. + * @retval HAL_SUCCESS operation succeeded. + * @retval HAL_FAILED operation failed. + * + * @notapi + */ +bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp) { + SDHC->CMDARG = arg; + uint32_t xfer = + SDHC_XFERTYP_CMDINX(cmd) | + SDHC_XFERTYP_CMDTYP_NORMAL | + /* DPSEL=0, CICEN=0, CCCEN=0 */ + SDHC_XFERTYP_RSPTYP_48; + + bool waited = send_and_wait_cmd(sdcp, xfer); + + *resp = SDHC->CMDRSP[0]; + + return waited; +} + +/** + * @brief Sends an SDIO command with a short response expected and CRC. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] cmd card command + * @param[in] arg command argument + * @param[out] resp pointer to the response buffer (one word) + * + * @return The operation status. + * @retval HAL_SUCCESS operation succeeded. + * @retval HAL_FAILED operation failed. + * + * @notapi + */ +bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp) { + SDHC->CMDARG = arg; + uint32_t xfer = + SDHC_XFERTYP_CMDINX(cmd) | + SDHC_XFERTYP_CMDTYP_NORMAL | + /* DPSEL=0, CICEN=1, CCCEN=1 */ + SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_48; + + bool waited = send_and_wait_cmd(sdcp, xfer); + + *resp = SDHC->CMDRSP[0]; + TRACE(11, *resp); + + return waited; +} + +/** + * @brief Sends an SDIO command with a long response expected and CRC. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] cmd card command + * @param[in] arg command argument + * @param[out] resp pointer to the response buffer (four words) + * + * @return The operation status. + * @retval HAL_SUCCESS operation succeeded. + * @retval HAL_FAILED operation failed. + * + * @notapi + */ +bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp) { + + /* In response format R2 (the 136-bit or "long" response) the CRC7 + field is valid, but the command index field is set to all 1s, so + we need to disable the command index check function (CICEN=0). */ + + SDHC->CMDARG = arg; + uint32_t xfer = + SDHC_XFERTYP_CMDINX(cmd) | + SDHC_XFERTYP_CMDTYP_NORMAL | + /* DPSEL=0, CICEN=0, CCCEN=1 */ + SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_136; + + bool waited = send_and_wait_cmd(sdcp, xfer); + + resp[0] = SDHC->CMDRSP[0]; + resp[1] = SDHC->CMDRSP[1]; + resp[2] = SDHC->CMDRSP[2]; + resp[3] = SDHC->CMDRSP[3]; + + return waited; +} + +/** + * @brief Reads one or more blocks. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] startblk first block to read + * @param[out] buf pointer to the read buffer + * @param[in] n number of blocks to read + * + * @return The operation status. + * @retval HAL_SUCCESS operation succeeded. + * @retval HAL_FAILED operation failed. + * + * @notapi + */ + +bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, + uint8_t *buf, uint32_t n) { + uint32_t cmdx = (n == 1)? + SDHC_XFERTYP_CMDINX(MMCSD_CMD_READ_SINGLE_BLOCK) : + SDHC_XFERTYP_CMDINX(MMCSD_CMD_READ_MULTIPLE_BLOCK); + cmdx |= SDHC_XFERTYP_DTDSEL; + + return sdc_lld_transfer(sdcp, startblk, (uintptr_t)buf, n, cmdx); +} + +/** + * @brief Writes one or more blocks. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * @param[in] startblk first block to write + * @param[out] buf pointer to the write buffer + * @param[in] n number of blocks to write + * + * @return The operation status. + * @retval HAL_SUCCESS operation succeeded. + * @retval HAL_FAILED operation failed. + * + * @notapi + */ +bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, + const uint8_t *buf, uint32_t n) { + uint32_t cmdx = (n == 1)? + SDHC_XFERTYP_CMDINX(MMCSD_CMD_WRITE_BLOCK) : + SDHC_XFERTYP_CMDINX(MMCSD_CMD_WRITE_MULTIPLE_BLOCK); + + return sdc_lld_transfer(sdcp, startblk, (uintptr_t)buf, n, cmdx); +} + +/** + * @brief Waits for card idle condition. + * + * @param[in] sdcp pointer to the @p SDCDriver object + * + * @return The operation status. + * @retval HAL_SUCCESS the operation succeeded. + * @retval HAL_FAILED the operation failed. + * + * @api + */ +bool sdc_lld_sync(SDCDriver *sdcp) { + + (void)sdcp; + + return HAL_SUCCESS; +} + +bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes, + uint8_t cmd, uint32_t argument) { + uintptr_t bufaddr = (uintptr_t)buf; + + osalDbgCheck((bufaddr & 0x03) == 0); /* Must be 32-bit aligned */ + osalDbgCheck(bytes > 0); + osalDbgCheck(bytes < 4096); + + osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_DLA|SDHC_PRSSTAT_CDIHB|SDHC_PRSSTAT_CIHB)) == 0, + "SDHC interface not ready"); + + TRACE(5, argument); + + /* Store the cmd argument and DMA start address */ + SDHC->CMDARG = argument; + SDHC->DSADDR = bufaddr; + + /* We're reading one block, of a (possibly) nonstandard size */ + SDHC->BLKATTR = SDHC_BLKATTR_BLKSIZE(bytes); + + uint32_t xfer = + SDHC_XFERTYP_CMDINX(cmd) | /* the command */ + SDHC_XFERTYP_DTDSEL | /* read transfer (card -> host) */ + SDHC_XFERTYP_CMDTYP_NORMAL | + SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | + SDHC_XFERTYP_RSPTYP_48 | + SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; /* DMA-assisted data transfer */ + + return send_and_wait_transfer(sdcp, xfer); +} + +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { + (void)sdcp; + + return ( SDHC->PRSSTAT & SDHC_PRSSTAT_CLSL )? true : false; +} + +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { + (void)sdcp; + return false; +} + +#endif /* HAL_USE_SDC == TRUE */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.h b/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.h new file mode 100644 index 0000000..cfa23cb --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.h @@ -0,0 +1,202 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + Copyright (C) 2017 Wim Lewis + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SDHCv1/hal_sdc_lld.h + * @brief PLATFORM SDC subsystem low level driver header. + * + * @addtogroup SDC + * @{ + */ + +#ifndef HAL_SDC_LLD_H +#define HAL_SDC_LLD_H + +#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#define SDHC_XFERTYP_CMDTYP_NORMAL SDHC_XFERTYP_CMDTYP(0) +#define SDHC_XFERTYP_CMDTYP_SUSPEND SDHC_XFERTYP_CMDTYP(1) +#define SDHC_XFERTYP_CMDTYP_RESUME SDHC_XFERTYP_CMDTYP(2) +#define SDHC_XFERTYP_CMDTYP_ABORT SDHC_XFERTYP_CMDTYP(3) + +#define SDHC_XFERTYP_RSPTYP_NONE SDHC_XFERTYP_RSPTYP(0) /* no response */ +#define SDHC_XFERTYP_RSPTYP_136 SDHC_XFERTYP_RSPTYP(1) /* 136-bit response */ +#define SDHC_XFERTYP_RSPTYP_48 SDHC_XFERTYP_RSPTYP(2) /* 48-bit response */ +#define SDHC_XFERTYP_RSPTYP_48b SDHC_XFERTYP_RSPTYP(3) /* 48-bit plus busy */ + +#define SDHC_PROCTL_DTW_1BIT SDHC_PROCTL_DTW(0) +#define SDHC_PROCTL_DTW_4BIT SDHC_PROCTL_DTW(1) +#define SDHC_PROCTL_DTW_8BIT SDHC_PROCTL_DTW(2) + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name PLATFORM configuration options + * @{ + */ +/** + * @brief SDC1 driver enable switch. + * @details If set to @p TRUE the support for SDC1 is included. + * @note The default is @p TRUE if HAL_USE_SDC is set. + */ +#if !defined(PLATFORM_SDC_USE_SDC1) || defined(__DOXYGEN__) +#define PLATFORM_SDC_USE_SDC1 TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of card flags. + */ +typedef uint32_t sdcmode_t; + +/** + * @brief SDC Driver condition flags type. + */ +typedef uint32_t sdcflags_t; + +/** + * @brief Type of a structure representing an SDC driver. + */ +typedef struct SDCDriver SDCDriver; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Working area for memory consuming operations. + * @note It is mandatory for detecting MMC cards bigger than 2GB else it + * can be @p NULL. + * @note Memory pointed by this buffer is only used by @p sdcConnect(), + * afterward it can be reused for other purposes. + */ + uint8_t *scratchpad; + /** + * @brief Bus width. + */ + sdcbusmode_t bus_width; + /* End of the mandatory fields.*/ +} SDCConfig; + +/** + * @brief @p SDCDriver specific methods. + */ +#define _sdc_driver_methods \ + _mmcsd_block_device_methods + +/** + * @extends MMCSDBlockDeviceVMT + * + * @brief @p SDCDriver virtual methods table. + */ +struct SDCDriverVMT { + _sdc_driver_methods +}; + +/** + * @brief Structure representing an SDC driver. + */ +struct SDCDriver { + /** + * @brief Virtual Methods Table. + */ + const struct SDCDriverVMT *vmt; + _mmcsd_block_device_data + /** + * @brief Current configuration data. + */ + const SDCConfig *config; + /** + * @brief Various flags regarding the mounted card. + */ + sdcmode_t cardmode; + /** + * @brief Errors flags. + */ + sdcflags_t errors; + /** + * @brief Card RCA. + */ + uint32_t rca; + /* End of the mandatory fields.*/ + + /* Platform specific fields */ + thread_reference_t thread; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if (PLATFORM_SDC_USE_SDC1 == TRUE) && !defined(__DOXYGEN__) +extern SDCDriver SDCD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void sdc_lld_init(void); + void sdc_lld_start(SDCDriver *sdcp); + void sdc_lld_stop(SDCDriver *sdcp); + void sdc_lld_start_clk(SDCDriver *sdcp); + void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk); + void sdc_lld_stop_clk(SDCDriver *sdcp); + void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode); + void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg); + bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp); + bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp); + bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, + uint32_t *resp); + bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes, + uint8_t cmd, uint32_t argument); + bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, + uint8_t *buf, uint32_t n); + bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, + const uint8_t *buf, uint32_t n); + bool sdc_lld_sync(SDCDriver *sdcp); + bool sdc_lld_is_card_inserted(SDCDriver *sdcp); + bool sdc_lld_is_write_protected(SDCDriver *sdcp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SDC == TRUE */ + +#endif /* HAL_SDC_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c b/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c new file mode 100644 index 0000000..443ec5f --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c @@ -0,0 +1,692 @@ +/* + ChibiOS - Copyright (C) 2013-2015 Fabio Utzig + Copyright (C) 2017 Wim Lewis + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file UARTv1/hal_serial_lld.c + * @brief Kinetis KL2x Serial Driver subsystem low level driver source. + * + * @addtogroup SERIAL + * @{ + */ + +#include "osal.h" +#include "hal.h" + +#if HAL_USE_SERIAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief SD1 driver identifier. + */ +#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) +SerialDriver SD1; +#endif + +#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) +SerialDriver SD2; +#endif + +#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) +SerialDriver SD3; +#endif + +#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) +SerialDriver SD4; +#endif + +#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) +SerialDriver SD5; +#endif + +#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) +SerialDriver SD6; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Driver default configuration. + */ +static const SerialConfig default_config = { + 38400 +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ +/** + * @brief Error handling routine. + * + * @param[in] sdp pointer to a @p SerialDriver object + * @param[in] isr UART s1 register value + */ +static void set_error(SerialDriver *sdp, uint8_t s1) { + eventflags_t sts = 0; + + if (s1 & UARTx_S1_OR) + sts |= SD_OVERRUN_ERROR; + if (s1 & UARTx_S1_PF) + sts |= SD_PARITY_ERROR; + if (s1 & UARTx_S1_FE) + sts |= SD_FRAMING_ERROR; + if (s1 & UARTx_S1_NF) + sts |= SD_NOISE_ERROR; + osalSysLockFromISR(); + chnAddFlagsI(sdp, sts); + osalSysUnlockFromISR(); +} + +/** + * @brief Common error IRQ handler. + * + * @param[in] sdp communication channel associated to the UART + */ +static void serve_error_interrupt(SerialDriver *sdp) { + UART_w_TypeDef *u = &(sdp->uart); + uint8_t s1 = *(u->s1_p); + + /* Clearing on K20x, K60x, and KL2x/UART>0 is done by reading S1 and + * then reading D.*/ + + if(s1 & UARTx_S1_IDLE) { + (void)*(u->d_p); + } + + if(s1 & (UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF)) { + set_error(sdp, s1); + (void)*(u->d_p); + } +} + +#if defined(KL2x) && KINETIS_SERIAL_USE_UART0 +static void serve_error_interrupt_uart0(void) { + SerialDriver *sdp = &SD1; + UART_w_TypeDef *u = &(sdp->uart); + uint8_t s1 = *(u->s1_p); + + /* S1 bits are write-1-to-clear for UART0 on KL2x. */ + + if(s1 & UARTx_S1_IDLE) { + *(u->s1_p) |= UARTx_S1_IDLE; + } + + if(s1 & (UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF)) { + set_error(sdp, s1); + *(u->s1_p) |= UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF; + } +} +#endif /* KL2x && KINETIS_SERIAL_USE_UART0 */ + +/** + * @brief Common IRQ handler. + * @note Tries hard to clear all the pending interrupt sources, we don't + * want to go through the whole ISR and have another interrupt soon + * after. + * + * @param[in] sdp communication channel associated to the UART + */ +static void serve_interrupt(SerialDriver *sdp) { + UART_w_TypeDef *u = &(sdp->uart); + uint8_t s1 = *(u->s1_p); + + if (s1 & UARTx_S1_RDRF) { + osalSysLockFromISR(); + if (iqIsEmptyI(&sdp->iqueue)) + chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE); + if (iqPutI(&sdp->iqueue, *(u->d_p)) < Q_OK) + chnAddFlagsI(sdp, SD_OVERRUN_ERROR); + osalSysUnlockFromISR(); + } + + if (s1 & UARTx_S1_TDRE) { + msg_t b; + + osalSysLockFromISR(); + b = oqGetI(&sdp->oqueue); + osalSysUnlockFromISR(); + + if (b < Q_OK) { + osalSysLockFromISR(); + chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); + osalSysUnlockFromISR(); + *(u->c2_p) &= ~UARTx_C2_TIE; + } else { + *(u->d_p) = b; + } + } + +#if defined(KL2x) && KINETIS_SERIAL_USE_UART0 + if (sdp == &SD1) { + serve_error_interrupt_uart0(); + return; + } +#endif + serve_error_interrupt(sdp); +} + +/** + * @brief Attempts a TX preload + */ +static void preload(SerialDriver *sdp) { + UART_w_TypeDef *u = &(sdp->uart); + + if (*(u->s1_p) & UARTx_S1_TDRE) { + msg_t b = oqGetI(&sdp->oqueue); + if (b < Q_OK) { + chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); + return; + } + *(u->d_p) = b; + *(u->c2_p) |= UARTx_C2_TIE; + } +} + +/** + * @brief Driver output notification. + */ +static void notify(io_queue_t *qp) +{ + preload(qp->q_link); +} + +/** + * @brief Common driver initialization, except LP. + */ +static void sd_lld_init_driver(SerialDriver *SDn, UART_TypeDef *UARTn) { + /* Driver initialization.*/ + sdObjectInit(SDn, NULL, notify); + SDn->uart.bdh_p = &(UARTn->BDH); + SDn->uart.bdl_p = &(UARTn->BDL); + SDn->uart.c1_p = &(UARTn->C1); + SDn->uart.c2_p = &(UARTn->C2); + SDn->uart.c3_p = &(UARTn->C3); + SDn->uart.c4_p = &(UARTn->C4); + SDn->uart.s1_p = (volatile uint8_t *)&(UARTn->S1); + SDn->uart.s2_p = &(UARTn->S2); + SDn->uart.d_p = &(UARTn->D); + SDn->uart.uart_p = UARTn; +} + +/** + * @brief Common UART configuration. + * + */ +static void configure_uart(SerialDriver *sdp, const SerialConfig *config) { + + UART_w_TypeDef *uart = &(sdp->uart); + uint32_t divisor; + + /* Discard any incoming data. */ + while (*(uart->s1_p) & UARTx_S1_RDRF) { + (void)*(uart->d_p); + } + + /* Disable UART while configuring */ + *(uart->c2_p) &= ~(UARTx_C2_RE | UARTx_C2_TE); + + /* The clock sources for various UARTs can be different. */ + divisor=KINETIS_BUSCLK_FREQUENCY; + +#if defined(KL2x) + +#if KINETIS_SERIAL_USE_UART0 + if (sdp == &SD1) { + /* UART0 can be clocked from several sources on KL2x. */ + divisor = KINETIS_UART0_CLOCK_FREQ; + /* FIXME: change fixed OSR = 16 to dynamic value based on baud */ + /* Note: OSR only works on KL2x/UART0; further UARTs have fixed 16. */ + *(uart->c4_p) = UARTx_C4_OSR(16 - 1); + } +#endif /* KINETIS_SERIAL_USE_UART0 */ + +#elif defined(K20x) || defined(K60x) || defined(MK66F18) /* KL2x */ + + /* UARTs 0 and 1 are clocked from SYSCLK, others from BUSCLK on K20x and K60x. */ +#if KINETIS_SERIAL_USE_UART0 + if(sdp == &SD1) + divisor = KINETIS_SYSCLK_FREQUENCY; +#endif /* KINETIS_SERIAL_USE_UART0 */ +#if KINETIS_SERIAL_USE_UART1 + if(sdp == &SD2) + divisor = KINETIS_SYSCLK_FREQUENCY; +#endif /* KINETIS_SERIAL_USE_UART1 */ + +#else /* K20x */ +#error Baud rate selection not implemented for this MCU type +#endif /* K20x */ + + divisor = (divisor * 2 + 1) / config->sc_speed; + + *(uart->bdh_p) = UARTx_BDH_SBR(divisor >> 13) | (*(uart->bdh_p) & ~UARTx_BDH_SBR_MASK); + *(uart->bdl_p) = UARTx_BDL_SBR(divisor >> 5); +#if defined(K20x) || defined(K60x) + *(uart->c4_p) = UARTx_C4_BRFA(divisor) | (*(uart->c4_p) & ~UARTx_C4_BRFA_MASK); +#endif /* K20x, K60x */ + + /* Line settings. */ + *(uart->c1_p) = 0; + /* Enable error event interrupts (overrun, noise, framing, parity) */ + *(uart->c3_p) = UARTx_C3_ORIE | UARTx_C3_NEIE | UARTx_C3_FEIE | UARTx_C3_PEIE; + /* Enable the peripheral; including receive interrupts. */ + *(uart->c2_p) |= UARTx_C2_RE | UARTx_C2_RIE | UARTx_C2_TE; +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD1); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL1_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD2); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL2_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD3); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL3_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD4); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL4_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD5); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL5_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_interrupt(&SD6); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_HAS_SERIAL_ERROR_IRQ + +#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL0_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); +#if defined(KL2x) + serve_error_interrupt_uart0(); +#else + serve_error_interrupt(&SD1); +#endif + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL1_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_error_interrupt(&SD2); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL2_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_error_interrupt(&SD3); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL3_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_error_interrupt(&SD4); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL4_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_error_interrupt(&SD5); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(KINETIS_SERIAL5_ERROR_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + serve_error_interrupt(&SD6); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level serial driver initialization. + * + * @notapi + */ +void sd_lld_init(void) { + +#if KINETIS_SERIAL_USE_UART0 + /* Driver initialization.*/ +#if ! KINETIS_SERIAL0_IS_LPUART + sd_lld_init_driver(&SD1, UART0); +#else /* ! KINETIS_SERIAL0_IS_LPUART */ + /* little endian! */ + sdObjectInit(&SD1, NULL, notify); + SD1.uart.bdh_p = ((uint8_t *)&(LPUART0->BAUD)) + 1; /* BDH: BAUD, byte 3 */ + SD1.uart.bdl_p = ((uint8_t *)&(LPUART0->BAUD)) + 0; /* BDL: BAUD, byte 4 */ + SD1.uart.c1_p = ((uint8_t *)&(LPUART0->CTRL)) + 0; /* C1: CTRL, byte 4 */ + SD1.uart.c2_p = ((uint8_t *)&(LPUART0->CTRL)) + 2; /* C2: CTRL, byte 2 */ + SD1.uart.c3_p = ((uint8_t *)&(LPUART0->CTRL)) + 3; /* C3: CTRL, byte 1 */ + SD1.uart.c4_p = ((uint8_t *)&(LPUART0->BAUD)) + 3; /* C4: BAUD, byte 1 */ + SD1.uart.s1_p = ((uint8_t *)&(LPUART0->STAT)) + 2; /* S1: STAT, byte 2 */ + SD1.uart.s2_p = ((uint8_t *)&(LPUART0->STAT)) + 3; /* S2: STAT, byte 1 */ + SD1.uart.d_p = ((uint8_t *)&(LPUART0->DATA)) + 0; /* D: DATA, byte 4 */ +#endif /* ! KINETIS_SERIAL0_IS_LPUART */ +#if KINETIS_SERIAL0_IS_UARTLP + SD1.uart.uartlp_p = UART0; + SD1.uart.uart_p = NULL; +#elif KINETIS_SERIAL0_IS_LPUART + SD1.uart.lpuart_p = LPUART0; + SD1.uart.uart_p = NULL; +#else /* KINETIS_SERIAL0_IS_LPUART */ + SD1.uart.uart_p = UART0; +#endif /* KINETIS_SERIAL0_IS_LPUART */ +#endif /* KINETIS_SERIAL_USE_UART0 */ + +#if KINETIS_SERIAL_USE_UART1 + /* Driver initialization.*/ +#if ! KINETIS_SERIAL1_IS_LPUART + sd_lld_init_driver(&SD2, UART1); +#else /* ! KINETIS_SERIAL1_IS_LPUART */ + /* little endian! */ + sdObjectInit(&SD2, NULL, notify); + SD2.uart.bdh_p = ((uint8_t *)&(LPUART1->BAUD)) + 1; /* BDH: BAUD, byte 3 */ + SD2.uart.bdl_p = ((uint8_t *)&(LPUART1->BAUD)) + 0; /* BDL: BAUD, byte 4 */ + SD2.uart.c1_p = ((uint8_t *)&(LPUART1->CTRL)) + 0; /* C1: CTRL, byte 4 */ + SD2.uart.c2_p = ((uint8_t *)&(LPUART1->CTRL)) + 2; /* C2: CTRL, byte 2 */ + SD2.uart.c3_p = ((uint8_t *)&(LPUART1->CTRL)) + 3; /* C3: CTRL, byte 1 */ + SD2.uart.c4_p = ((uint8_t *)&(LPUART1->BAUD)) + 3; /* C4: BAUD, byte 1 */ + SD2.uart.s1_p = ((uint8_t *)&(LPUART1->STAT)) + 2; /* S1: STAT, byte 2 */ + SD2.uart.s2_p = ((uint8_t *)&(LPUART1->STAT)) + 3; /* S2: STAT, byte 1 */ + SD2.uart.d_p = ((uint8_t *)&(LPUART1->DATA)) + 0; /* D: DATA, byte 4 */ + SD2.uart.lpuart_p = LPUART1; + SD2.uart.uart_p = NULL; +#endif /* ! KINETIS_SERIAL1_IS_LPUART */ +#endif /* KINETIS_SERIAL_USE_UART1 */ + +#if KINETIS_SERIAL_USE_UART2 + sd_lld_init_driver(&SD3, UART2); +#endif /* KINETIS_SERIAL_USE_UART2 */ + +#if KINETIS_SERIAL_USE_UART3 + sd_lld_init_driver(&SD4, UART3); +#endif /* KINETIS_SERIAL_USE_UART3 */ + +#if KINETIS_SERIAL_USE_UART4 + sd_lld_init_driver(&SD5, UART4); +#endif /* KINETIS_SERIAL_USE_UART4 */ + +#if KINETIS_SERIAL_USE_UART5 + sd_lld_init_driver(&SD6, UART5); +#endif /* KINETIS_SERIAL_USE_UART5 */ +} + +/** + * @brief Low level serial driver configuration and (re)start. + * + * @param[in] sdp pointer to a @p SerialDriver object + * @param[in] config the architecture-dependent serial driver configuration. + * If this parameter is set to @p NULL then a default + * configuration is used. + * + * @notapi + */ +void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { + + if (config == NULL) + config = &default_config; + + if (sdp->state == SD_STOP) { + /* Enables the peripheral.*/ + +#if KINETIS_SERIAL_USE_UART0 + if (sdp == &SD1) { +#if KINETIS_SERIAL0_IS_LPUART + SIM->SCGC5 |= SIM_SCGC5_LPUART0; + SIM->SOPT2 = + (SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | + SIM_SOPT2_LPUART0SRC(KINETIS_UART0_CLOCK_SRC); +#else /* KINETIS_SERIAL0_IS_LPUART */ + SIM->SCGC4 |= SIM_SCGC4_UART0; +#endif /* KINETIS_SERIAL0_IS_LPUART */ +#if KINETIS_SERIAL0_IS_UARTLP + SIM->SOPT2 = + (SIM->SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | + SIM_SOPT2_UART0SRC(KINETIS_UART0_CLOCK_SRC); +#endif /* KINETIS_SERIAL0_IS_UARTLP */ + configure_uart(sdp, config); +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicEnableVector(UART0Status_IRQn, KINETIS_SERIAL_UART0_PRIORITY); + nvicEnableVector(UART0Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL0_IS_LPUART + nvicEnableVector(LPUART0_IRQn, KINETIS_SERIAL_UART0_PRIORITY); +#else /* KINETIS_SERIAL0_IS_LPUART */ + nvicEnableVector(UART0_IRQn, KINETIS_SERIAL_UART0_PRIORITY); +#endif /* KINETIS_SERIAL0_IS_LPUART */ +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + } +#endif /* KINETIS_SERIAL_USE_UART0 */ + +#if KINETIS_SERIAL_USE_UART1 + if (sdp == &SD2) { +#if KINETIS_SERIAL1_IS_LPUART + SIM->SCGC5 |= SIM_SCGC5_LPUART1; + SIM->SOPT2 = + (SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | + SIM_SOPT2_LPUART1SRC(KINETIS_UART1_CLOCK_SRC); +#else /* KINETIS_SERIAL1_IS_LPUART */ + SIM->SCGC4 |= SIM_SCGC4_UART1; +#endif /* KINETIS_SERIAL1_IS_LPUART */ + configure_uart(sdp, config); +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicEnableVector(UART1Status_IRQn, KINETIS_SERIAL_UART1_PRIORITY); + nvicEnableVector(UART1Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL1_IS_LPUART + nvicEnableVector(LPUART1_IRQn, KINETIS_SERIAL_UART1_PRIORITY); +#else /* KINETIS_SERIAL1_IS_LPUART */ + nvicEnableVector(UART1_IRQn, KINETIS_SERIAL_UART1_PRIORITY); +#endif /* KINETIS_SERIAL1_IS_LPUART */ +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + } +#endif /* KINETIS_SERIAL_USE_UART1 */ + +#if KINETIS_SERIAL_USE_UART2 + if (sdp == &SD3) { + SIM->SCGC4 |= SIM_SCGC4_UART2; + configure_uart(sdp, config); +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicEnableVector(UART2Status_IRQn, KINETIS_SERIAL_UART2_PRIORITY); + nvicEnableVector(UART2Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + nvicEnableVector(UART2_IRQn, KINETIS_SERIAL_UART2_PRIORITY); +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + } +#endif /* KINETIS_SERIAL_USE_UART2 */ + +#if KINETIS_SERIAL_USE_UART3 + if (sdp == &SD4) { + SIM->SCGC4 |= SIM_SCGC4_UART3; + configure_uart(sdp, config); + nvicEnableVector(UART3Status_IRQn, KINETIS_SERIAL_UART3_PRIORITY); + nvicEnableVector(UART3Error_IRQn, KINETIS_SERIAL_UART3_PRIORITY); + } +#endif /* KINETIS_SERIAL_USE_UART3 */ + +#if KINETIS_SERIAL_USE_UART4 + if (sdp == &SD5) { + SIM->SCGC1 |= SIM_SCGC1_UART4; + configure_uart(sdp, config); + nvicEnableVector(UART4Status_IRQn, KINETIS_SERIAL_UART4_PRIORITY); + nvicEnableVector(UART4Error_IRQn, KINETIS_SERIAL_UART4_PRIORITY); + } +#endif /* KINETIS_SERIAL_USE_UART4 */ + +#if KINETIS_SERIAL_USE_UART5 + if (sdp == &SD6) { + SIM->SCGC1 |= SIM_SCGC1_UART5; + configure_uart(sdp, config); + nvicEnableVector(UART5Status_IRQn, KINETIS_SERIAL_UART5_PRIORITY); + nvicEnableVector(UART5Error_IRQn, KINETIS_SERIAL_UART5_PRIORITY); + } +#endif /* KINETIS_SERIAL_USE_UART5 */ + + } + /* Configures the peripheral.*/ + +} + +/** + * @brief Low level serial driver stop. + * @details De-initializes the USART, stops the associated clock, resets the + * interrupt vector. + * + * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi + */ +void sd_lld_stop(SerialDriver *sdp) { + + if (sdp->state == SD_READY) { + /* TODO: Resets the peripheral.*/ + +#if KINETIS_SERIAL_USE_UART0 + if (sdp == &SD1) { +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicDisableVector(UART0Status_IRQn); + nvicDisableVector(UART0Error_IRQn); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL0_IS_LPUART + nvicDisableVector(LPUART0_IRQn); +#else /* KINETIS_SERIAL0_IS_LPUART */ + nvicDisableVector(UART0_IRQn); +#endif /* KINETIS_SERIAL0_IS_LPUART */ +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL0_IS_LPUART + SIM->SCGC5 &= ~SIM_SCGC5_LPUART0; +#else /* KINETIS_SERIAL0_IS_LPUART */ + SIM->SCGC4 &= ~SIM_SCGC4_UART0; +#endif /* KINETIS_SERIAL0_IS_LPUART */ + } +#endif + +#if KINETIS_SERIAL_USE_UART1 + if (sdp == &SD2) { +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicDisableVector(UART1Status_IRQn); + nvicDisableVector(UART1Error_IRQn); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL1_IS_LPUART + nvicDisableVector(LPUART1_IRQn); +#else /* KINETIS_SERIAL1_IS_LPUART */ + nvicDisableVector(UART1_IRQn); +#endif /* KINETIS_SERIAL1_IS_LPUART */ +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ +#if KINETIS_SERIAL1_IS_LPUART + SIM->SCGC5 &= ~SIM_SCGC5_LPUART1; +#else /* KINETIS_SERIAL1_IS_LPUART */ + SIM->SCGC4 &= ~SIM_SCGC4_UART1; +#endif /* KINETIS_SERIAL1_IS_LPUART */ + } +#endif + +#if KINETIS_SERIAL_USE_UART2 + if (sdp == &SD3) { +#if KINETIS_HAS_SERIAL_ERROR_IRQ + nvicDisableVector(UART2Status_IRQn); + nvicDisableVector(UART2Error_IRQn); +#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + nvicDisableVector(UART2_IRQn); +#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ + SIM->SCGC4 &= ~SIM_SCGC4_UART2; + } +#endif + +#if KINETIS_SERIAL_USE_UART3 + if (sdp == &SD4) { + nvicDisableVector(UART3Status_IRQn); + nvicDisableVector(UART3Error_IRQn); + SIM->SCGC4 &= ~SIM_SCGC4_UART3; + } +#endif + +#if KINETIS_SERIAL_USE_UART4 + if (sdp == &SD5) { + nvicDisableVector(UART4Status_IRQn); + nvicDisableVector(UART4Error_IRQn); + SIM->SCGC1 &= ~SIM_SCGC1_UART4; + } +#endif + +#if KINETIS_SERIAL_USE_UART5 + if (sdp == &SD6) { + nvicDisableVector(UART5Status_IRQn); + nvicDisableVector(UART5Error_IRQn); + SIM->SCGC1 &= ~SIM_SCGC1_UART5; + } +#endif + } +} + +#endif /* HAL_USE_SERIAL */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.h b/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.h new file mode 100644 index 0000000..df7045b --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.h @@ -0,0 +1,287 @@ +/* + ChibiOS - Copyright (C) 2013-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file UARTv1/hal_serial_lld.h + * @brief Kinetis KL2x Serial Driver subsystem low level driver header. + * + * @addtogroup SERIAL + * @{ + */ + +#ifndef HAL_SERIAL_LLD_H_ +#define HAL_SERIAL_LLD_H_ + +#if HAL_USE_SERIAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief SD1 driver enable switch. + * @details If set to @p TRUE the support for SD1 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART0) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART0 FALSE +#endif +/** + * @brief SD2 driver enable switch. + * @details If set to @p TRUE the support for SD2 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART1) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART1 FALSE +#endif +/** + * @brief SD3 driver enable switch. + * @details If set to @p TRUE the support for SD3 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART2) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART2 FALSE +#endif +/** + * @brief SD4 driver enable switch. + * @details If set to @p TRUE the support for SD4 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART3) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART3 FALSE +#endif +/** + * @brief SD5 driver enable switch. + * @details If set to @p TRUE the support for SD5 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART4) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART4 FALSE +#endif +/** + * @brief SD6 driver enable switch. + * @details If set to @p TRUE the support for SD6 is included. + */ +#if !defined(KINETIS_SERIAL_USE_UART5) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_USE_UART5 FALSE +#endif + +/** + * @brief UART0 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART0_PRIORITY 12 +#endif + +/** + * @brief UART1 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART1_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART1_PRIORITY 12 +#endif + +/** + * @brief UART2 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART2_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART2_PRIORITY 12 +#endif + +/** + * @brief UART3 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART3_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART3_PRIORITY 12 +#endif + +/** + * @brief UART4 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART4_PRIORITY 12 +#endif + +/** + * @brief UART5 interrupt priority level setting. + */ +#if !defined(KINETIS_SERIAL_UART5_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SERIAL_UART5_PRIORITY 12 +#endif + +/** + * @brief UART0 clock source. + */ +#if !defined(KINETIS_UART0_CLOCK_SRC) || defined(__DOXYGEN__) +#define KINETIS_UART0_CLOCK_SRC 1 /* MCGFLLCLK clock, or MCGPLLCLK/2; or IRC48M */ +#endif + +/** + * @brief UART1 clock source. + */ +#if !defined(KINETIS_UART1_CLOCK_SRC) || defined(__DOXYGEN__) +#define KINETIS_UART1_CLOCK_SRC 1 /* IRC48M */ +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/** @brief error checks */ +#if KINETIS_SERIAL_USE_UART0 && !KINETIS_HAS_SERIAL0 +#error "UART0 not present in the selected device" +#endif + +#if KINETIS_SERIAL_USE_UART1 && !KINETIS_HAS_SERIAL1 +#error "UART1 not present in the selected device" +#endif + +#if KINETIS_SERIAL_USE_UART2 && !KINETIS_HAS_SERIAL2 +#error "UART2 not present in the selected device" +#endif + +#if KINETIS_SERIAL_USE_UART3 && !KINETIS_HAS_SERIAL3 +#error "UART3 not present in the selected device" +#endif + +#if KINETIS_SERIAL_USE_UART4 && !KINETIS_HAS_SERIAL4 +#error "UART4 not present in the selected device" +#endif + +#if KINETIS_SERIAL_USE_UART5 && !KINETIS_HAS_SERIAL5 +#error "UART5 not present in the selected device" +#endif + +#if !(KINETIS_SERIAL_USE_UART0 || KINETIS_SERIAL_USE_UART1 || \ + KINETIS_SERIAL_USE_UART2 || KINETIS_SERIAL_USE_UART3 || \ + KINETIS_SERIAL_USE_UART4 || KINETIS_SERIAL_USE_UART5) +#error "Serial driver activated but no UART peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Generic Serial Driver configuration structure. + * @details An instance of this structure must be passed to @p sdStart() + * in order to configure and start a serial driver operations. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ +typedef struct { + /** + * @brief Bit rate. + */ + uint32_t sc_speed; + /* End of the mandatory fields.*/ +} SerialConfig; + +/** + * @brief Generic UART register structure. + * @note Individual UART register blocks (even within the same chip) can differ. + */ + +typedef struct { + volatile uint8_t* bdh_p; + volatile uint8_t* bdl_p; + volatile uint8_t* c1_p; + volatile uint8_t* c2_p; + volatile uint8_t* c3_p; + volatile uint8_t* c4_p; + volatile uint8_t* s1_p; + volatile uint8_t* s2_p; + volatile uint8_t* d_p; + UART_TypeDef *uart_p; +#if KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_UARTLP + UARTLP_TypeDef *uartlp_p; +#endif /* KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_UARTLP */ +#if (KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_LPUART) \ + || (KINETIS_SERIAL_USE_UART1 && KINETIS_SERIAL1_IS_LPUART) + LPUART_TypeDef *lpuart_p; +#endif /* KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_LPUART */ +} UART_w_TypeDef; + +/** + * @brief @p SerialDriver specific data. + */ +#define _serial_driver_data \ + _base_asynchronous_channel_data \ + /* Driver state.*/ \ + sdstate_t state; \ + /* Input queue.*/ \ + input_queue_t iqueue; \ + /* Output queue.*/ \ + output_queue_t oqueue; \ + /* Input circular buffer.*/ \ + uint8_t ib[SERIAL_BUFFERS_SIZE]; \ + /* Output circular buffer.*/ \ + uint8_t ob[SERIAL_BUFFERS_SIZE]; \ + /* End of the mandatory fields.*/ \ + /* Pointer to the UART registers block.*/ \ + UART_w_TypeDef uart; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_SERIAL_USE_UART0 && !defined(__DOXYGEN__) +extern SerialDriver SD1; +#endif + +#if KINETIS_SERIAL_USE_UART1 && !defined(__DOXYGEN__) +extern SerialDriver SD2; +#endif + +#if KINETIS_SERIAL_USE_UART2 && !defined(__DOXYGEN__) +extern SerialDriver SD3; +#endif + +#if KINETIS_SERIAL_USE_UART3 && !defined(__DOXYGEN__) +extern SerialDriver SD4; +#endif + +#if KINETIS_SERIAL_USE_UART4 && !defined(__DOXYGEN__) +extern SerialDriver SD5; +#endif + +#if KINETIS_SERIAL_USE_UART5 && !defined(__DOXYGEN__) +extern SerialDriver SD6; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void sd_lld_init(void); + void sd_lld_start(SerialDriver *sdp, const SerialConfig *config); + void sd_lld_stop(SerialDriver *sdp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SERIAL */ + +#endif /* HAL_SERIAL_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c b/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c new file mode 100644 index 0000000..dc1fca9 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c @@ -0,0 +1,873 @@ +/* + ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde/ + (C) 2015-2016 flabbergast + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file USBHSv1/hal_usb_lld.c + * @brief KINETIS USB subsystem low level driver source. + * + * @addtogroup USB + * @{ + */ + +#include + +#include "hal.h" + +#if HAL_USE_USB || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief USB0 driver identifier.*/ +#if KINETIS_USB_USE_USB0 || defined(__DOXYGEN__) +USBDriver USBD1; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief IN EP0 state. + */ +USBInEndpointState ep0in; + +/** + * @brief OUT EP0 state. + */ +USBOutEndpointState ep0out; + +/** + * @brief Buffer for the EP0 setup packets. + */ +static uint8_t ep0setup_buffer[8]; + +/** + * @brief EP0 initialization structure. + */ +static const USBEndpointConfig ep0config = { + USB_EP_MODE_TYPE_CTRL, + _usb_ep0setup, + _usb_ep0in, + _usb_ep0out, + 64, + 64, + &ep0in, + &ep0out, + 1, + ep0setup_buffer +}; + +/* + * Buffer Descriptor Table (BDT) + */ + +/* + * Buffer Descriptor (BD) + * */ +typedef struct { + uint32_t desc; + uint8_t* addr; +} bd_t; + +/* + * Buffer Descriptor fields - p.889 + */ +#define BDT_OWN 0x80 +#define BDT_DATA 0x40 +#define BDT_KEEP 0x20 +#define BDT_NINC 0x10 +#define BDT_DTS 0x08 +#define BDT_STALL 0x04 + +#define BDT_DESC(bc, data) (BDT_OWN | BDT_DTS | ((data&0x1)<<6) | ((bc) << 16)) + +/* + * BDT PID - p.891 + */ +#define BDT_PID_OUT 0x01 +#define BDT_PID_IN 0x09 +#define BDT_PID_SETUP 0x0D +#define BDT_TOK_PID(n) (((n)>>2)&0xF) + +/* + * BDT index fields + */ +#define DATA0 0 +#define DATA1 1 + +#define RX 0 +#define TX 1 + +#define EVEN 0 +#define ODD 1 + +#define BDT_INDEX(endpoint, tx, odd) (((endpoint)<<2) | ((tx)<<1) | (odd)) +/* + * Get RX-ed/TX-ed bytes count from BDT entry + */ +#define BDT_BC(n) (((n)>>16)&0x3FF) + +/* The USB-FS needs 2 BDT entry per endpoint direction + * that adds to: 2*2*16 BDT entries for 16 bi-directional EP + */ +static volatile bd_t _bdt[(KINETIS_USB_ENDPOINTS)*2*2] __attribute__((aligned(512))); + +/* FIXME later with dyn alloc + * 16 EP + * 2 directions per EP + * 2 buffer per direction + * => 64 buffers + */ +static uint8_t _usbb[KINETIS_USB_ENDPOINTS*4][64] __attribute__((aligned(4))); +static volatile uint8_t _usbbn=0; +uint8_t* usb_alloc(uint8_t size) +{ + (void)size; + if(_usbbn < (KINETIS_USB_ENDPOINTS)*4) + return _usbb[_usbbn++]; + while(1); /* Should not happen, ever */ +} +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/* Called from locked ISR. */ +void usb_packet_transmit(USBDriver *usbp, usbep_t ep, size_t n) +{ + const USBEndpointConfig *epc = usbp->epc[ep]; + USBInEndpointState *isp = epc->in_state; + + bd_t *bd = (bd_t *)&_bdt[BDT_INDEX(ep, TX, isp->odd_even)]; + + if (n > (size_t)epc->in_maxsize) + n = (size_t)epc->in_maxsize; + + /* Copy from buf to _usbb[] */ + size_t i=0; + for(i=0;iaddr[i] = isp->txbuf[i]; + + /* Update the Buffer status */ + bd->desc = BDT_DESC(n, isp->data_bank); + /* Toggle the odd and data bits for next TX */ + isp->data_bank ^= DATA1; + isp->odd_even ^= ODD; +} + +/* Called from locked ISR. */ +void usb_packet_receive(USBDriver *usbp, usbep_t ep, size_t n) +{ + const USBEndpointConfig *epc = usbp->epc[ep]; + USBOutEndpointState *osp = epc->out_state; + + bd_t *bd = (bd_t *)&_bdt[BDT_INDEX(ep, RX, osp->odd_even)]; + + if (n > (size_t)epc->out_maxsize) + n = (size_t)epc->out_maxsize; + + /* Copy from _usbb[] to buf */ + size_t i=0; + for(i=0;irxbuf[i] = bd->addr[i]; + + /* Update the Buffer status + * Set current buffer to same DATA bank and then toggle. + * Since even/odd buffers are ping-pong and setup re-initialized them + * this should work correctly */ + bd->desc = BDT_DESC(epc->out_maxsize, osp->data_bank); + osp->data_bank ^= DATA1; + usb_lld_start_out(usbp, ep); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*============================================================================*/ + +#if KINETIS_USB_USE_USB0 || defined(__DOXYGEN__) +/** + * @brief USB interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_USB_IRQ_VECTOR) { + USBDriver *usbp = &USBD1; + uint8_t istat = USB0->ISTAT; + + OSAL_IRQ_PROLOGUE(); + + /* 04 - Bit2 - Start Of Frame token received */ + if(istat & USBx_ISTAT_SOFTOK) { + _usb_isr_invoke_sof_cb(usbp); + USB0->ISTAT = USBx_ISTAT_SOFTOK; + } + + /* 08 - Bit3 - Token processing completed */ + while(istat & USBx_ISTAT_TOKDNE) { + uint8_t stat = USB0->STAT; + uint8_t ep = stat >> 4; + if(ep > KINETIS_USB_ENDPOINTS) { + OSAL_IRQ_EPILOGUE(); + return; + } + const USBEndpointConfig *epc = usbp->epc[ep]; + + /* Get the correct BDT entry */ + uint8_t odd_even = (stat & USBx_STAT_ODD_MASK) >> USBx_STAT_ODD_SHIFT; + uint8_t tx_rx = (stat & USBx_STAT_TX_MASK) >> USBx_STAT_TX_SHIFT; + bd_t *bd = (bd_t*)&_bdt[BDT_INDEX(ep,tx_rx,odd_even)]; + + /* Update the ODD/EVEN state for RX */ + if(tx_rx == RX && epc->out_state != NULL) + epc->out_state->odd_even = odd_even; + + switch(BDT_TOK_PID(bd->desc)) + { + case BDT_PID_SETUP: // SETUP + { + /* Clear receiving in the chibios state machine */ + (usbp)->receiving &= ~1; + /* Call SETUP function (ChibiOS core), which prepares + * for send or receive and releases the buffer + */ + _usb_isr_invoke_setup_cb(usbp, ep); + /* When a setup packet is received, tx is suspended, + * so it needs to be resumed here. + */ + USB0->CTL &= ~USBx_CTL_TXSUSPENDTOKENBUSY; + } break; + case BDT_PID_IN: // IN + { + if(epc->in_state == NULL) + break; + /* Special case for SetAddress for EP0 */ + if(ep == 0 && (((uint16_t)usbp->setup[0]<<8)|usbp->setup[1]) == 0x0500) + { + usbp->address = usbp->setup[2]; + usb_lld_set_address(usbp); + _usb_isr_invoke_event_cb(usbp, USB_EVENT_ADDRESS); + usbp->state = USB_SELECTED; + } + uint16_t txed = BDT_BC(bd->desc); + epc->in_state->txcnt += txed; + if(epc->in_state->txcnt < epc->in_state->txsize) + { + epc->in_state->txbuf += txed; + osalSysLockFromISR(); + usb_packet_transmit(usbp,ep,epc->in_state->txsize - epc->in_state->txcnt); + osalSysUnlockFromISR(); + } + else + { + if(epc->in_cb != NULL) + _usb_isr_invoke_in_cb(usbp,ep); + } + } break; + case BDT_PID_OUT: // OUT + { + if(epc->out_state == NULL) + break; + uint16_t rxed = BDT_BC(bd->desc); + + osalSysLockFromISR(); + usb_packet_receive(usbp,ep,rxed); + osalSysUnlockFromISR(); + if(rxed) + { + epc->out_state->rxbuf += rxed; + + /* Update transaction data */ + epc->out_state->rxcnt += rxed; + epc->out_state->rxsize -= rxed; + epc->out_state->rxpkts -= 1; + + /* The transaction is completed if the specified number of packets + has been received or the current packet is a short packet.*/ + if ((rxed < epc->out_maxsize) || (epc->out_state->rxpkts == 0)) + { + if(epc->out_cb != NULL) + _usb_isr_invoke_out_cb(usbp, ep); + } + } + } break; + default: + break; + } + USB0->ISTAT = USBx_ISTAT_TOKDNE; + istat = USB0->ISTAT; + } + + /* 01 - Bit0 - Valid USB Reset received */ + if(istat & USBx_ISTAT_USBRST) { + _usb_reset(usbp); + USB0->ISTAT = USBx_ISTAT_USBRST; + OSAL_IRQ_EPILOGUE(); + return; + } + + /* 80 - Bit7 - STALL handshake received */ + if(istat & USBx_ISTAT_STALL) { + USB0->ISTAT = USBx_ISTAT_STALL; + } + + /* 02 - Bit1 - ERRSTAT condition triggered */ + if(istat & USBx_ISTAT_ERROR) { + uint8_t err = USB0->ERRSTAT; + USB0->ERRSTAT = err; + USB0->ISTAT = USBx_ISTAT_ERROR; + } + + /* 10 - Bit4 - Constant IDLE on USB bus detected */ + if(istat & USBx_ISTAT_SLEEP) { + /* This seems to fire a few times before the device is + * configured - need to ignore those occurences somehow. */ + /* The other option would be to only activate INTEN_SLEEPEN + * on CONFIGURED event, but that would need to be done in + * user firmware. */ + if(usbp->state == USB_ACTIVE) { + _usb_suspend(usbp); + /* Enable interrupt on resume */ + USB0->INTEN |= USBx_INTEN_RESUMEEN; + } + + // low-power version (check!): + // enable wakeup interrupt on resume USB signaling + // (check that it was a wakeup int with USBx_USBTRC0_USB_RESUME_INT) + //? USB0->USBTRC0 |= USBx_USBTRC0_USBRESMEN + // suspend the USB module + //? USB0->USBCTRL |= USBx_USBCTRL_SUSP; + + USB0->ISTAT = USBx_ISTAT_SLEEP; + } + + /* 20 - Bit5 - Resume - Only allowed in sleep=suspend mode */ + if(istat & USBx_ISTAT_RESUME) { + /* Disable interrupt on resume (should be disabled + * during normal operation according to datasheet). */ + USB0->INTEN &= ~USBx_INTEN_RESUMEEN; + + // low power version (check!): + // desuspend the USB module + //? USB0->USBCTRL &= ~USBx_USBCTRL_SUSP; + // maybe also + //? USB0->CTL = USBx_CTL_USBENSOFEN; + _usb_wakeup(usbp); + USB0->ISTAT = USBx_ISTAT_RESUME; + } + + /* 40 - Bit6 - ATTACH - used */ + + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_USB_USE_USB0 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level USB driver initialization. + * + * @notapi + */ +void usb_lld_init(void) { + /* Driver initialization.*/ + usbObjectInit(&USBD1); + +#if KINETIS_USB_USE_USB0 + + /* Set USB clock source to MCGPLLCLK, MCGFLLCLK, USB1 PFD, or IRC48M */ + SIM->SOPT2 |= SIM_SOPT2_USBSRC; + +#if defined(K20x5) || defined(K20x7) || defined(MK66F18) + +#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEI + + /* MCGOUTCLK is the SYSCLK frequency, so don't divide for USB clock */ + SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0); + +#elif KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE + +#if !defined(MK66F18) + /* Note: We don't need this for MK66F18, we can use IRC48M clock for USB */ + #define KINETIS_USBCLK_FREQUENCY 48000000UL + uint32_t i,j; + for(i=0; i < 2; i++) { + for(j=0; j < 8; j++) { + if((KINETIS_PLLCLK_FREQUENCY * (i+1)) == (KINETIS_USBCLK_FREQUENCY*(j+1))) { + SIM->CLKDIV2 = i | SIM_CLKDIV2_USBDIV(j); + goto usbfrac_match_found; + } + } + } + usbfrac_match_found: + osalDbgAssert(i<2 && j <8,"USB Init error"); +#endif + +#else /* KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE */ +#error USB clock setting not implemented for this KINETIS_MCG_MODE +#endif /* KINETIS_MCG_MODE == ... */ + +#if defined(MK66F18) + /* Switch from default MCGPLLCLK to IRC48M for USB */ + SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0); + SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3); +#endif + +#elif defined(KL25) || defined (KL26) || defined(KL27) + + /* No extra clock dividers for USB clock */ + +#else /* defined(KL25) || defined (KL26) || defined(KL27) */ +#error USB driver not implemented for your MCU type +#endif + +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Configures and activates the USB peripheral. + * + * @param[in] usbp pointer to the @p USBDriver object + * + * @notapi + */ +void usb_lld_start(USBDriver *usbp) { + if (usbp->state == USB_STOP) { +#if KINETIS_USB_USE_USB0 + if (&USBD1 == usbp) { + /* Clear BDT */ + uint8_t i; + for(i=0;iUSBPHYCTL |= SIM_USBPHYCTL_USBDISILIM; +#endif + + /* Enable Clock */ +#if KINETIS_USB0_IS_USBOTG + SIM->SCGC4 |= SIM_SCGC4_USBOTG; + +#else /* KINETIS_USB0_IS_USBOTG */ + SIM->SCGC4 |= SIM_SCGC4_USBFS; +#endif /* KINETIS_USB0_IS_USBOTG */ + +#if KINETIS_HAS_USB_CLOCK_RECOVERY + USB0->CLK_RECOVER_IRC_EN |= USBx_CLK_RECOVER_IRC_EN_IRC_EN; + USB0->CLK_RECOVER_CTRL |= USBx_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN; +#endif /* KINETIS_HAS_USB_CLOCK_RECOVERY */ + + /* Reset USB module, wait for completion */ + USB0->USBTRC0 |= USBx_USBTRC0_USBRESET; + while ((USB0->USBTRC0 & USBx_USBTRC0_USBRESET)); + + /* Set BDT Address */ + USB0->BDTPAGE1 = ((uint32_t)_bdt) >> 8; + USB0->BDTPAGE2 = ((uint32_t)_bdt) >> 16; + USB0->BDTPAGE3 = ((uint32_t)_bdt) >> 24; + + /* Clear all ISR flags */ + USB0->ISTAT = 0xFF; + USB0->ERRSTAT = 0xFF; +#if KINETIS_USB0_IS_USBOTG + USB0->OTGISTAT = 0xFF; +#endif /* KINETIS_USB0_IS_USBOTG */ + USB0->USBTRC0 |= 0x40; //a hint was given that this is an undocumented interrupt bit + + /* Enable USB */ + USB0->CTL = USBx_CTL_ODDRST | USBx_CTL_USBENSOFEN; + USB0->USBCTRL = 0; + + /* Enable reset interrupt */ + USB0->INTEN |= USBx_INTEN_USBRSTEN; + + /* Enable interrupt in NVIC */ +#if KINETIS_USB0_IS_USBOTG + nvicEnableVector(USB_OTG_IRQn, KINETIS_USB_USB0_IRQ_PRIORITY); +#else /* KINETIS_USB0_IS_USBOTG */ + nvicEnableVector(USB_IRQn, KINETIS_USB_USB0_IRQ_PRIORITY); +#endif /* KINETIS_USB0_IS_USBOTG */ + } +#endif /* KINETIS_USB_USE_USB0 */ + } +} + +/** + * @brief Deactivates the USB peripheral. + * + * @param[in] usbp pointer to the @p USBDriver object + * + * @notapi + */ +void usb_lld_stop(USBDriver *usbp) { + /* TODO: If in ready state then disables the USB clock.*/ + if (usbp->state == USB_STOP) { +#if KINETIS_USB_USE_USB0 + if (&USBD1 == usbp) { +#if KINETIS_USB0_IS_USBOTG + nvicDisableVector(USB_OTG_IRQn); +#else /* KINETIS_USB0_IS_USBOTG */ + nvicDisableVector(USB_IRQn); +#endif /* KINETIS_USB0_IS_USBOTG */ + } +#endif /* KINETIS_USB_USE_USB0 */ + } +} + +/** + * @brief USB low level reset routine. + * + * @param[in] usbp pointer to the @p USBDriver object + * + * @notapi + */ +void usb_lld_reset(USBDriver *usbp) { + // FIXME, dyn alloc + _usbbn = 0; + +#if KINETIS_USB_USE_USB0 + + /* Reset BDT ODD/EVEN bits */ + USB0->CTL = USBx_CTL_ODDRST; + + /* EP0 initialization.*/ + usbp->epc[0] = &ep0config; + usb_lld_init_endpoint(usbp, 0); + + /* Clear all pending interrupts */ + USB0->ERRSTAT = 0xFF; + USB0->ISTAT = 0xFF; + + /* Set the address to zero during enumeration */ + usbp->address = 0; + USB0->ADDR = 0; + + /* Enable other interrupts */ + USB0->ERREN = 0xFF; + USB0->INTEN = USBx_INTEN_TOKDNEEN | + USBx_INTEN_SOFTOKEN | + USBx_INTEN_STALLEN | + USBx_INTEN_ERROREN | + USBx_INTEN_USBRSTEN | + USBx_INTEN_SLEEPEN; + + /* "is this necessary?", Paul from PJRC */ + USB0->CTL = USBx_CTL_USBENSOFEN; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Sets the USB address. + * + * @param[in] usbp pointer to the @p USBDriver object + * + * @notapi + */ +void usb_lld_set_address(USBDriver *usbp) { + +#if KINETIS_USB_USE_USB0 + USB0->ADDR = usbp->address&0x7F; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Enables an endpoint. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) { + + if(ep > KINETIS_USB_ENDPOINTS) + return; + + const USBEndpointConfig *epc = usbp->epc[ep]; + uint8_t mask=0; + + if(epc->out_state != NULL) + { + /* OUT Endpoint */ + epc->out_state->odd_even = EVEN; + epc->out_state->data_bank = DATA0; + /* RXe */ + _bdt[BDT_INDEX(ep, RX, EVEN)].desc = BDT_DESC(epc->out_maxsize, DATA0); + _bdt[BDT_INDEX(ep, RX, EVEN)].addr = usb_alloc(epc->out_maxsize); + /* RXo */ + _bdt[BDT_INDEX(ep, RX, ODD)].desc = BDT_DESC(epc->out_maxsize, DATA1); + _bdt[BDT_INDEX(ep, RX, ODD)].addr = usb_alloc(epc->out_maxsize); + /* Enable OUT direction */ + mask |= USBx_ENDPTn_EPRXEN; + } + if(epc->in_state != NULL) + { + /* IN Endpoint */ + epc->in_state->odd_even = EVEN; + epc->in_state->data_bank = DATA0; + /* TXe, not used yet */ + _bdt[BDT_INDEX(ep, TX, EVEN)].desc = 0; + _bdt[BDT_INDEX(ep, TX, EVEN)].addr = usb_alloc(epc->in_maxsize); + /* TXo, not used yet */ + _bdt[BDT_INDEX(ep, TX, ODD)].desc = 0; + _bdt[BDT_INDEX(ep, TX, ODD)].addr = usb_alloc(epc->in_maxsize); + /* Enable IN direction */ + mask |= USBx_ENDPTn_EPTXEN; + } + + /* EPHSHK should be set for CTRL, BULK, INTR not for ISOC*/ + if((epc->ep_mode & USB_EP_MODE_TYPE) != USB_EP_MODE_TYPE_ISOC) + mask |= USBx_ENDPTn_EPHSHK; + /* Endpoint is not a CTRL endpoint, disable SETUP transfers */ + if((epc->ep_mode & USB_EP_MODE_TYPE) != USB_EP_MODE_TYPE_CTRL) + mask |= USBx_ENDPTn_EPCTLDIS; + +#if KINETIS_USB_USE_USB0 + USB0->ENDPT[ep].V = mask; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Disables all the active endpoints except the endpoint zero. + * + * @param[in] usbp pointer to the @p USBDriver object + * + * @notapi + */ +void usb_lld_disable_endpoints(USBDriver *usbp) { + (void)usbp; + uint8_t i; +#if KINETIS_USB_USE_USB0 + for(i=1;iENDPT[i].V = 0; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Returns the status of an OUT endpoint. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * @return The endpoint status. + * @retval EP_STATUS_DISABLED The endpoint is not active. + * @retval EP_STATUS_STALLED The endpoint is stalled. + * @retval EP_STATUS_ACTIVE The endpoint is active. + * + * @notapi + */ +usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) { + (void)usbp; +#if KINETIS_USB_USE_USB0 + if(ep > USB_MAX_ENDPOINTS) + return EP_STATUS_DISABLED; + if(!(USB0->ENDPT[ep].V & (USBx_ENDPTn_EPRXEN))) + return EP_STATUS_DISABLED; + else if(USB0->ENDPT[ep].V & USBx_ENDPTn_EPSTALL) + return EP_STATUS_STALLED; + return EP_STATUS_ACTIVE; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Returns the status of an IN endpoint. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * @return The endpoint status. + * @retval EP_STATUS_DISABLED The endpoint is not active. + * @retval EP_STATUS_STALLED The endpoint is stalled. + * @retval EP_STATUS_ACTIVE The endpoint is active. + * + * @notapi + */ +usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) { + (void)usbp; + if(ep > USB_MAX_ENDPOINTS) + return EP_STATUS_DISABLED; +#if KINETIS_USB_USE_USB0 + if(!(USB0->ENDPT[ep].V & (USBx_ENDPTn_EPTXEN))) + return EP_STATUS_DISABLED; + else if(USB0->ENDPT[ep].V & USBx_ENDPTn_EPSTALL) + return EP_STATUS_STALLED; + return EP_STATUS_ACTIVE; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Reads a setup packet from the dedicated packet buffer. + * @details This function must be invoked in the context of the @p setup_cb + * callback in order to read the received setup packet. + * @pre In order to use this function the endpoint must have been + * initialized as a control endpoint. + * @post The endpoint is ready to accept another packet. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * @param[out] buf buffer where to copy the packet data + * + * @notapi + */ +void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf) { + /* Get the BDT entry */ + USBOutEndpointState *os = usbp->epc[ep]->out_state; + bd_t *bd = (bd_t*)&_bdt[BDT_INDEX(ep, RX, os->odd_even)]; + /* Copy the 8 bytes of data */ + uint8_t n; + for (n = 0; n < 8; n++) { + buf[n] = bd->addr[n]; + } + /* Release the buffer + * Setup packet is always DATA0 + * Release the current DATA0 buffer + */ + bd->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA0); + /* If DATA1 was expected, then the states are out of sync. + * So reset the other buffer too, and set it as DATA1. + * This should not happen in normal cases, but is possible in + * error situations. NOTE: it's possible that this is too late + * and the next packet has already been received and dropped, but + * there's nothing that we can do about that anymore at this point. + */ + if (os->data_bank == DATA1) + { + bd_t *bd_next = (bd_t*)&_bdt[BDT_INDEX(ep, RX, os->odd_even^ODD)]; + bd_next->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA1); + } + /* After a SETUP, both in and out are always DATA1 */ + usbp->epc[ep]->in_state->data_bank = DATA1; + os->data_bank = DATA1; +} + +/** + * @brief Starts a receive operation on an OUT endpoint. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_start_out(USBDriver *usbp, usbep_t ep) { + USBOutEndpointState *osp = usbp->epc[ep]->out_state; + /* Transfer initialization.*/ + if (osp->rxsize == 0) /* Special case for zero sized packets.*/ + osp->rxpkts = 1; + else + osp->rxpkts = (uint16_t)((osp->rxsize + usbp->epc[ep]->out_maxsize - 1) / + usbp->epc[ep]->out_maxsize); +} + +/** + * @brief Starts a transmit operation on an IN endpoint. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @note Called from ISR and locked zone. + * @notapi + */ +void usb_lld_start_in(USBDriver *usbp, usbep_t ep) { + if (ep == 0 && usbp->ep0state == USB_EP0_IN_SENDING_STS) { + /* When a status packet is about to be sent on endpoint 0 the + * next packet will be a setup packet, which means that the + * buffer we expect after this should be DATA0, and the following + * DATA1. Since no out packets should be in flight at this time + * it's safe to initialize the buffers according to the expectations + * here. + */ + const USBEndpointConfig* epc = usbp->epc[ep]; + bd_t * bd = (bd_t*)&_bdt[BDT_INDEX(ep, RX, epc->out_state->odd_even)]; + bd_t *bd_next = (bd_t*)&_bdt[BDT_INDEX(ep, RX, epc->out_state->odd_even^ODD)]; + + bd->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA1); + bd_next->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA0); + epc->out_state->data_bank = DATA0; + } + usb_packet_transmit(usbp,ep,usbp->epc[ep]->in_state->txsize); +} + +/** + * @brief Brings an OUT endpoint in the stalled state. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_stall_out(USBDriver *usbp, usbep_t ep) { + (void)usbp; +#if KINETIS_USB_USE_USB0 + USB0->ENDPT[ep].V |= USBx_ENDPTn_EPSTALL; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Brings an IN endpoint in the stalled state. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_stall_in(USBDriver *usbp, usbep_t ep) { + (void)usbp; +#if KINETIS_USB_USE_USB0 + USB0->ENDPT[ep].V |= USBx_ENDPTn_EPSTALL; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Brings an OUT endpoint in the active state. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_clear_out(USBDriver *usbp, usbep_t ep) { + (void)usbp; +#if KINETIS_USB_USE_USB0 + USB0->ENDPT[ep].V &= ~USBx_ENDPTn_EPSTALL; +#endif /* KINETIS_USB_USE_USB0 */ +} + +/** + * @brief Brings an IN endpoint in the active state. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * + * @notapi + */ +void usb_lld_clear_in(USBDriver *usbp, usbep_t ep) { + (void)usbp; +#if KINETIS_USB_USE_USB0 + USB0->ENDPT[ep].V &= ~USBx_ENDPTn_EPSTALL; +#endif /* KINETIS_USB_USE_USB0 */ +} + +#endif /* HAL_USE_USB */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.h b/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.h new file mode 100644 index 0000000..05dd9c8 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.h @@ -0,0 +1,455 @@ +/* + ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde/ + (C) 2015-2016 flabbergast + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file USBHSv1/hal_usb_lld.h + * @brief KINETIS USB subsystem low level driver header. + * + * @addtogroup USB + * @{ + */ + +#ifndef HAL_USB_LLD_H_ +#define HAL_USB_LLD_H_ + +#if HAL_USE_USB || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Maximum endpoint address. + */ +#define USB_MAX_ENDPOINTS 15 + +/** + * @brief Status stage handling method. + */ +#define USB_EP0_STATUS_STAGE USB_EP0_STATUS_STAGE_SW + +/** + * @brief Address ack handling + */ +#define USB_SET_ADDRESS_ACK_HANDLING USB_SET_ADDRESS_ACK_SW + +/** + * @brief This device requires the address change after the status packet. + */ +#define USB_SET_ADDRESS_MODE USB_LATE_SET_ADDRESS + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief USB1 driver enable switch. + * @details If set to @p TRUE the support for USB1 is included. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_USB_USE_USB0) || defined(__DOXYGEN__) +#define KINETIS_USB_USE_USB0 FALSE +#endif + +/** + * @brief USB1 interrupt priority level setting. + */ +#if !defined(KINETIS_USB_USB0_IRQ_PRIORITY)|| defined(__DOXYGEN__) +#define KINETIS_USB_USB0_IRQ_PRIORITY 5 +#endif + +#if !defined(KINETIS_USB_ENDPOINTS) || defined(__DOXYGEN__) + #define KINETIS_USB_ENDPOINTS USB_MAX_ENDPOINTS+1 +#endif + +/** + * @brief Host wake-up procedure duration. + */ +#if !defined(USB_HOST_WAKEUP_DURATION) || defined(__DOXYGEN__) +#define USB_HOST_WAKEUP_DURATION 2 +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if KINETIS_USB_USE_USB0 && !KINETIS_HAS_USB +#error "USB not present in the selected device" +#endif + +#if !KINETIS_USB_USE_USB0 +#error "USB driver activated but no USB peripheral assigned" +#endif + +#if KINETIS_USB_USE_USB0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_USB_USB0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to KINETIS_USB_USB0_IRQ_PRIORITY" +#endif + +#if !defined(KINETIS_USB_IRQ_VECTOR) +#error "KINETIS_USB_IRQ_VECTOR not defined" +#endif + +#if (USB_HOST_WAKEUP_DURATION < 2) || (USB_HOST_WAKEUP_DURATION > 15) +#error "invalid USB_HOST_WAKEUP_DURATION setting, it must be between 2 and 15" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of an IN endpoint state structure. + */ +typedef struct { + /** + * @brief Requested transmit transfer size. + */ + size_t txsize; + /** + * @brief Transmitted bytes so far. + */ + size_t txcnt; + /** + * @brief Pointer to the transmission linear buffer. + */ + const uint8_t *txbuf; +#if (USB_USE_WAIT == TRUE) || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif + /* End of the mandatory fields.*/ + /* */ + bool odd_even; /* ODD / EVEN */ + /* */ + bool data_bank; /* DATA0 / DATA1 */ +} USBInEndpointState; + +/** + * @brief Type of an OUT endpoint state structure. + */ +typedef struct { + /** + * @brief Requested receive transfer size. + */ + size_t rxsize; + /** + * @brief Received bytes so far. + */ + size_t rxcnt; + /** + * @brief Pointer to the receive linear buffer. + */ + uint8_t *rxbuf; +#if (USB_USE_WAIT == TRUE) || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif + /* End of the mandatory fields.*/ + /** + * @brief Number of packets to receive. + */ + uint16_t rxpkts; + /* */ + bool odd_even; /* ODD / EVEN */ + /* */ + bool data_bank; /* DATA0 / DATA1 */ +} USBOutEndpointState; + +/** + * @brief Type of an USB endpoint configuration structure. + * @note Platform specific restrictions may apply to endpoints. + */ +typedef struct { + /** + * @brief Type and mode of the endpoint. + */ + uint32_t ep_mode; + /** + * @brief Setup packet notification callback. + * @details This callback is invoked when a setup packet has been + * received. + * @post The application must immediately call @p usbReadPacket() in + * order to access the received packet. + * @note This field is only valid for @p USB_EP_MODE_TYPE_CTRL + * endpoints, it should be set to @p NULL for other endpoint + * types. + */ + usbepcallback_t setup_cb; + /** + * @brief IN endpoint notification callback. + * @details This field must be set to @p NULL if callback is not required. + */ + usbepcallback_t in_cb; + /** + * @brief OUT endpoint notification callback. + * @details This field must be set to @p NULL if callback is not required. + */ + usbepcallback_t out_cb; + /** + * @brief IN endpoint maximum packet size. + * @details This field must be set to zero if the IN endpoint is not used. + */ + uint16_t in_maxsize; + /** + * @brief OUT endpoint maximum packet size. + * @details This field must be set to zero if the OUT endpoint is not used. + */ + uint16_t out_maxsize; + /** + * @brief @p USBEndpointState associated to the IN endpoint. + * @details This field must be set to @p NULL if the IN endpoint is not + * used. + */ + USBInEndpointState *in_state; + /** + * @brief @p USBEndpointState associated to the OUT endpoint. + * @details This field must be set to @p NULL if the OUT endpoint is not + * used. + */ + USBOutEndpointState *out_state; + /* End of the mandatory fields.*/ + /** + * @brief Reserved field, not currently used. + * @note Initialize this field to 1 in order to be forward compatible. + */ + uint16_t ep_buffers; + /** + * @brief Pointer to a buffer for setup packets. + * @details Setup packets require a dedicated 8-bytes buffer, set this + * field to @p NULL for non-control endpoints. + */ + uint8_t *setup_buf; +} USBEndpointConfig; + +/** + * @brief Type of an USB driver configuration structure. + */ +typedef struct { + /** + * @brief USB events callback. + * @details This callback is invoked when an USB driver event is registered. + */ + usbeventcb_t event_cb; + /** + * @brief Device GET_DESCRIPTOR request callback. + * @note This callback is mandatory and cannot be set to @p NULL. + */ + usbgetdescriptor_t get_descriptor_cb; + /** + * @brief Requests hook callback. + * @details This hook allows to be notified of standard requests or to + * handle non standard requests. + */ + usbreqhandler_t requests_hook_cb; + /** + * @brief Start Of Frame callback. + */ + usbcallback_t sof_cb; + /* End of the mandatory fields.*/ +} USBConfig; + +/** + * @brief Structure representing an USB driver. + */ +struct USBDriver { + /** + * @brief Driver state. + */ + usbstate_t state; + /** + * @brief Current configuration data. + */ + const USBConfig *config; + /** + * @brief Bit map of the transmitting IN endpoints. + */ + uint16_t transmitting; + /** + * @brief Bit map of the receiving OUT endpoints. + */ + uint16_t receiving; + /** + * @brief Active endpoints configurations. + */ + const USBEndpointConfig *epc[USB_MAX_ENDPOINTS + 1]; + /** + * @brief Fields available to user, it can be used to associate an + * application-defined handler to an IN endpoint. + * @note The base index is one, the endpoint zero does not have a + * reserved element in this array. + */ + void *in_params[USB_MAX_ENDPOINTS]; + /** + * @brief Fields available to user, it can be used to associate an + * application-defined handler to an OUT endpoint. + * @note The base index is one, the endpoint zero does not have a + * reserved element in this array. + */ + void *out_params[USB_MAX_ENDPOINTS]; + /** + * @brief Endpoint 0 state. + */ + usbep0state_t ep0state; + /** + * @brief Next position in the buffer to be transferred through endpoint 0. + */ + uint8_t *ep0next; + /** + * @brief Number of bytes yet to be transferred through endpoint 0. + */ + size_t ep0n; + /** + * @brief Endpoint 0 end transaction callback. + */ + usbcallback_t ep0endcb; + /** + * @brief Setup packet buffer. + */ + uint8_t setup[8]; + /** + * @brief Current USB device status. + */ + uint16_t status; + /** + * @brief Assigned USB address. + */ + uint8_t address; + /** + * @brief Current USB device configuration. + */ + uint8_t configuration; + /** + * @brief State of the driver when a suspend happened. + */ + usbstate_t saved_state; +#if defined(USB_DRIVER_EXT_FIELDS) + USB_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the next address in the packet memory. + */ + uint32_t pmnext; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Returns the current frame number. + * + * @param[in] usbp pointer to the @p USBDriver object + * @return The current frame number. + * + * @notapi + */ +#define usb_lld_get_frame_number(usbp) ((USB0->FRMNUMH<<8)|USB0->FRMNUML) + +/** + * @brief Returns the exact size of a receive transaction. + * @details The received size can be different from the size specified in + * @p usbStartReceiveI() because the last packet could have a size + * different from the expected one. + * @pre The OUT endpoint must have been configured in transaction mode + * in order to use this function. + * + * @param[in] usbp pointer to the @p USBDriver object + * @param[in] ep endpoint number + * @return Received data size. + * + * @notapi + */ +#define usb_lld_get_transaction_size(usbp, ep) \ + ((usbp)->epc[ep]->out_state->rxcnt) + +/** + * @brief Connects the USB device. + * + * @api + */ +#if !defined(usb_lld_connect_bus) +#define usb_lld_connect_bus(usbp) (USB0->CONTROL |= USBx_CONTROL_DPPULLUPNONOTG) +#endif + +/** + * @brief Disconnect the USB device. + * + * @api + */ +#if !defined(usb_lld_disconnect_bus) +/* Writing to USB0->CONTROL causes an unhandled exception when USB module is not clocked. */ +#if KINETIS_USB0_IS_USBOTG +#define usb_lld_disconnect_bus(usbp) if(SIM->SCGC4 & SIM_SCGC4_USBOTG) {USB0->CONTROL &= ~USBx_CONTROL_DPPULLUPNONOTG;} else {} +#else /* KINETIS_USB0_IS_USBOTG */ +#define usb_lld_disconnect_bus(usbp) if(SIM->SCGC4 & SIM_SCGC4_USBFS) {USB0->CONTROL &= ~USBx_CONTROL_DPPULLUPNONOTG;} else {} +#endif /* KINETIS_USB0_IS_USBOTG */ +#endif + +/** + * @brief Start of host wake-up procedure. + * + * @notapi + */ +#define usb_lld_wakeup_host(usbp) \ + do{ \ + USB0->CTL |= USBx_CTL_RESUME; \ + osalThreadSleepMilliseconds(USB_HOST_WAKEUP_DURATION); \ + USB0->CTL &= ~USBx_CTL_RESUME; \ + } while (false) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_USB_USE_USB0 && !defined(__DOXYGEN__) +extern USBDriver USBD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void usb_lld_init(void); + void usb_lld_start(USBDriver *usbp); + void usb_lld_stop(USBDriver *usbp); + void usb_lld_reset(USBDriver *usbp); + void usb_lld_set_address(USBDriver *usbp); + void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep); + void usb_lld_disable_endpoints(USBDriver *usbp); + usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep); + usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep); + void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf); + void usb_lld_start_out(USBDriver *usbp, usbep_t ep); + void usb_lld_start_in(USBDriver *usbp, usbep_t ep); + void usb_lld_stall_out(USBDriver *usbp, usbep_t ep); + void usb_lld_stall_in(USBDriver *usbp, usbep_t ep); + void usb_lld_clear_out(USBDriver *usbp, usbep_t ep); + void usb_lld_clear_in(USBDriver *usbp, usbep_t ep); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_USB */ + +#endif /* HAL_USB_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_adc_lld.c b/os/hal/ports/KINETIS/LLD/hal_adc_lld.c deleted file mode 100644 index 56ae4c3..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_adc_lld.c +++ /dev/null @@ -1,259 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/adc_lld.c - * @brief KINETIS ADC subsystem low level driver source. - * - * @addtogroup ADC - * @{ - */ - -#include "hal.h" - -#if HAL_USE_ADC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define ADC_CHANNEL_MASK 0x1f - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief ADC1 driver identifier.*/ -#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__) -ADCDriver ADCD1; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void calibrate(ADCDriver *adcp) { - - /* Clock Divide by 8, Use Bus Clock Div 2 */ - /* At 48MHz this results in ADCCLK of 48/8/2 == 3MHz */ - adcp->adc->CFG1 = ADCx_CFG1_ADIV(ADCx_CFG1_ADIV_DIV_8) | - ADCx_CFG1_ADICLK(ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2); - - /* Use software trigger and disable DMA etc. */ - adcp->adc->SC2 = 0; - - /* Enable Hardware Average, Average 32 Samples, Calibrate */ - adcp->adc->SC3 = ADCx_SC3_AVGE | - ADCx_SC3_AVGS(ADCx_SC3_AVGS_AVERAGE_32_SAMPLES) | - ADCx_SC3_CAL; - - /* FIXME: May take several ms. Use an interrupt instead of busy wait */ - /* Wait for calibration completion */ - while (!(adcp->adc->SC1A & ADCx_SC1n_COCO)) - ; - - uint16_t gain = ((adcp->adc->CLP0 + adcp->adc->CLP1 + adcp->adc->CLP2 + - adcp->adc->CLP3 + adcp->adc->CLP4 + adcp->adc->CLPS) / 2) | 0x8000; - adcp->adc->PG = gain; - - gain = ((adcp->adc->CLM0 + adcp->adc->CLM1 + adcp->adc->CLM2 + - adcp->adc->CLM3 + adcp->adc->CLM4 + adcp->adc->CLMS) / 2) | 0x8000; - adcp->adc->MG = gain; - -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_ADC_USE_ADC0 || defined(__DOXYGEN__) -/** - * @brief ADC interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_ADC0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - ADCDriver *adcp = &ADCD1; - - /* Disable Interrupt, Disable Channel */ - adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED); - - /* Read the sample into the buffer */ - adcp->samples[adcp->current_index++] = adcp->adc->RA; - - bool more = true; - - /* At the end of the buffer then we may be finished */ - if (adcp->current_index == adcp->number_of_samples) { - /* We are never finished in circular mode */ - more = ADCD1.grpp->circular; - - _adc_isr_full_code(&ADCD1); - - adcp->current_index = 0; - - } - - if (more) { - - /* Signal half completion in circular mode. */ - if (ADCD1.grpp->circular && - (adcp->current_index == (adcp->number_of_samples / 2))) { - - _adc_isr_half_code(&ADCD1); - } - - /* Skip to the next channel */ - do { - adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; - } while (((1 << adcp->current_channel) & adcp->grpp->channel_mask) == 0); - - /* Enable Interrupt, Select the Channel */ - adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel); - } - - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level ADC driver initialization. - * - * @notapi - */ -void adc_lld_init(void) { - -#if KINETIS_ADC_USE_ADC0 - /* Driver initialization.*/ - adcObjectInit(&ADCD1); -#endif - - /* The shared vector is initialized on driver initialization and never - disabled.*/ - nvicEnableVector(ADC0_IRQn, KINETIS_ADC_IRQ_PRIORITY); -} - -/** - * @brief Configures and activates the ADC peripheral. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_start(ADCDriver *adcp) { - - /* If in stopped state then enables the ADC clock.*/ - if (adcp->state == ADC_STOP) { - SIM->SCGC6 |= SIM_SCGC6_ADC0; - -#if KINETIS_ADC_USE_ADC0 - if (&ADCD1 == adcp) { - adcp->adc = ADC0; - if (adcp->config->calibrate) { - calibrate(adcp); - } - } -#endif /* KINETIS_ADC_USE_ADC0 */ - } -} - -/** - * @brief Deactivates the ADC peripheral. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_stop(ADCDriver *adcp) { - - /* If in ready state then disables the ADC clock.*/ - if (adcp->state == ADC_READY) { - SIM->SCGC6 &= ~SIM_SCGC6_ADC0; - -#if KINETIS_ADC_USE_ADC0 - if (&ADCD1 == adcp) { - /* Disable Interrupt, Disable Channel */ - adcp->adc->SC1A = ADCx_SC1n_ADCH(ADCx_SC1n_ADCH_DISABLED); - } -#endif - } -} - -/** - * @brief Starts an ADC conversion. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_start_conversion(ADCDriver *adcp) { - const ADCConversionGroup *grpp = adcp->grpp; - - /* Enable the Bandgap Buffer if channel mask includes BANDGAP */ - if (grpp->channel_mask & ADC_BANDGAP) { - PMC->REGSC |= PMC_REGSC_BGBE; - } - - adcp->number_of_samples = adcp->depth * grpp->num_channels; - adcp->current_index = 0; - - /* Skip to the next channel */ - adcp->current_channel = 0; - while (((1 << adcp->current_channel) & grpp->channel_mask) == 0) { - adcp->current_channel = (adcp->current_channel + 1) & ADC_CHANNEL_MASK; - } - - /* Set clock speed and conversion size */ - adcp->adc->CFG1 = grpp->cfg1; - - /* Set averaging */ - adcp->adc->SC3 = grpp->sc3; - - /* Enable Interrupt, Select Channel */ - adcp->adc->SC1A = ADCx_SC1n_AIEN | ADCx_SC1n_ADCH(adcp->current_channel); -} - -/** - * @brief Stops an ongoing conversion. - * - * @param[in] adcp pointer to the @p ADCDriver object - * - * @notapi - */ -void adc_lld_stop_conversion(ADCDriver *adcp) { - const ADCConversionGroup *grpp = adcp->grpp; - - /* Disable the Bandgap buffer if channel mask includes BANDGAP */ - if (grpp->channel_mask & ADC_BANDGAP) { - /* Clear BGBE, ACKISO is w1c, avoid setting */ - PMC->REGSC &= ~(PMC_REGSC_BGBE | PMC_REGSC_ACKISO); - } - -} - -#endif /* HAL_USE_ADC */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_adc_lld.h b/os/hal/ports/KINETIS/LLD/hal_adc_lld.h deleted file mode 100644 index c4edbd6..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_adc_lld.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/adc_lld.h - * @brief KINETIS ADC subsystem low level driver header. - * - * @addtogroup ADC - * @{ - */ - -#ifndef HAL_ADC_LLD_H_ -#define HAL_ADC_LLD_H_ - -#if HAL_USE_ADC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @name Absolute Maximum Ratings - * @{ - */ -/** - * @brief Minimum ADC clock frequency. - */ -#define KINETIS_ADCCLK_MIN 600000 - -/** - * @brief Maximum ADC clock frequency. - */ -#define KINETIS_ADCCLK_MAX 36000000 - -#define ADCx_SC3_AVGS_AVERAGE_4_SAMPLES 0 -#define ADCx_SC3_AVGS_AVERAGE_8_SAMPLES 1 -#define ADCx_SC3_AVGS_AVERAGE_16_SAMPLES 2 -#define ADCx_SC3_AVGS_AVERAGE_32_SAMPLES 3 - -#define ADCx_CFG1_ADIV_DIV_1 0 -#define ADCx_CFG1_ADIV_DIV_2 1 -#define ADCx_CFG1_ADIV_DIV_4 2 -#define ADCx_CFG1_ADIV_DIV_8 3 - -#define ADCx_CFG1_ADIVCLK_BUS_CLOCK 0 -#define ADCx_CFG1_ADIVCLK_BUS_CLOCK_DIV_2 1 -#define ADCx_CFG1_ADIVCLK_BUS_ALTCLK 2 -#define ADCx_CFG1_ADIVCLK_BUS_ADACK 3 - -#define ADCx_CFG1_MODE_8_OR_9_BITS 0 -#define ADCx_CFG1_MODE_12_OR_13_BITS 1 -#define ADCx_CFG1_MODE_10_OR_11_BITS 2 -#define ADCx_CFG1_MODE_16_BITS 3 - -#define ADCx_SC1n_ADCH_DAD0 0 -#define ADCx_SC1n_ADCH_DAD1 1 -#define ADCx_SC1n_ADCH_DAD2 2 -#define ADCx_SC1n_ADCH_DAD3 3 -#define ADCx_SC1n_ADCH_DADP0 0 -#define ADCx_SC1n_ADCH_DADP1 1 -#define ADCx_SC1n_ADCH_DADP2 2 -#define ADCx_SC1n_ADCH_DADP3 3 -#define ADCx_SC1n_ADCH_AD4 4 -#define ADCx_SC1n_ADCH_AD5 5 -#define ADCx_SC1n_ADCH_AD6 6 -#define ADCx_SC1n_ADCH_AD7 7 -#define ADCx_SC1n_ADCH_AD8 8 -#define ADCx_SC1n_ADCH_AD9 9 -#define ADCx_SC1n_ADCH_AD10 10 -#define ADCx_SC1n_ADCH_AD11 11 -#define ADCx_SC1n_ADCH_AD12 12 -#define ADCx_SC1n_ADCH_AD13 13 -#define ADCx_SC1n_ADCH_AD14 14 -#define ADCx_SC1n_ADCH_AD15 15 -#define ADCx_SC1n_ADCH_AD16 16 -#define ADCx_SC1n_ADCH_AD17 17 -#define ADCx_SC1n_ADCH_AD18 18 -#define ADCx_SC1n_ADCH_AD19 19 -#define ADCx_SC1n_ADCH_AD20 20 -#define ADCx_SC1n_ADCH_AD21 21 -#define ADCx_SC1n_ADCH_AD22 22 -#define ADCx_SC1n_ADCH_AD23 23 -#define ADCx_SC1n_ADCH_TEMP_SENSOR 26 -#define ADCx_SC1n_ADCH_BANDGAP 27 -#define ADCx_SC1n_ADCH_VREFSH 29 -#define ADCx_SC1n_ADCH_VREFSL 30 -#define ADCx_SC1n_ADCH_DISABLED 31 - -#define ADC_DAD0 (1 << ADCx_SC1n_ADCH_DAD0) -#define ADC_DAD1 (1 << ADCx_SC1n_ADCH_DAD1) -#define ADC_DAD2 (1 << ADCx_SC1n_ADCH_DAD2) -#define ADC_DAD3 (1 << ADCx_SC1n_ADCH_DAD3) -#define ADC_DADP0 (1 << ADCx_SC1n_ADCH_DADP0) -#define ADC_DADP1 (1 << ADCx_SC1n_ADCH_DADP1) -#define ADC_DADP2 (1 << ADCx_SC1n_ADCH_DADP2) -#define ADC_DADP3 (1 << ADCx_SC1n_ADCH_DADP3) -#define ADC_AD4 (1 << ADCx_SC1n_ADCH_AD4) -#define ADC_AD5 (1 << ADCx_SC1n_ADCH_AD5) -#define ADC_AD6 (1 << ADCx_SC1n_ADCH_AD6) -#define ADC_AD7 (1 << ADCx_SC1n_ADCH_AD7) -#define ADC_AD8 (1 << ADCx_SC1n_ADCH_AD8) -#define ADC_AD9 (1 << ADCx_SC1n_ADCH_AD9) -#define ADC_AD10 (1 << ADCx_SC1n_ADCH_AD10) -#define ADC_AD11 (1 << ADCx_SC1n_ADCH_AD11) -#define ADC_AD12 (1 << ADCx_SC1n_ADCH_AD12) -#define ADC_AD13 (1 << ADCx_SC1n_ADCH_AD13) -#define ADC_AD14 (1 << ADCx_SC1n_ADCH_AD14) -#define ADC_AD15 (1 << ADCx_SC1n_ADCH_AD15) -#define ADC_AD16 (1 << ADCx_SC1n_ADCH_AD16) -#define ADC_AD17 (1 << ADCx_SC1n_ADCH_AD17) -#define ADC_AD18 (1 << ADCx_SC1n_ADCH_AD18) -#define ADC_AD19 (1 << ADCx_SC1n_ADCH_AD19) -#define ADC_AD20 (1 << ADCx_SC1n_ADCH_AD20) -#define ADC_AD21 (1 << ADCx_SC1n_ADCH_AD21) -#define ADC_AD22 (1 << ADCx_SC1n_ADCH_AD22) -#define ADC_AD23 (1 << ADCx_SC1n_ADCH_AD23) -#define ADC_TEMP_SENSOR (1 << ADCx_SC1n_ADCH_TEMP_SENSOR) -#define ADC_BANDGAP (1 << ADCx_SC1n_ADCH_BANDGAP) -#define ADC_VREFSH (1 << ADCx_SC1n_ADCH_VREFSH) -#define ADC_VREFSL (1 << ADCx_SC1n_ADCH_VREFSL) -#define ADC_DISABLED (1 << ADCx_SC1n_ADCH_DISABLED) - -/** @} */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ - -/** - * @brief ADC1 driver enable switch. - * @details If set to @p TRUE the support for ADC1 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_ADC_USE_ADC0) || defined(__DOXYGEN__) -#define KINETIS_ADC_USE_ADC0 FALSE -#endif - -/** - * @brief ADC interrupt priority level setting. - */ -#if !defined(KINETIS_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_ADC_IRQ_PRIORITY 5 -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if KINETIS_ADC_USE_ADC0 && !KINETIS_HAS_ADC0 -#error "ADC1 not present in the selected device" -#endif - -#if !KINETIS_ADC_USE_ADC0 -#error "ADC driver activated but no ADC peripheral assigned" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief ADC sample data type. - */ -typedef uint16_t adcsample_t; - -/** - * @brief Channels number in a conversion group. - */ -typedef uint16_t adc_channels_num_t; - -/** - * @brief Possible ADC failure causes. - * @note Error codes are architecture dependent and should not relied - * upon. - */ -typedef enum { - ADC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */ - ADC_ERR_OVERFLOW = 1 /**< ADC overflow condition. */ -} adcerror_t; - -/** - * @brief Type of a structure representing an ADC driver. - */ -typedef struct ADCDriver ADCDriver; - -/** - * @brief ADC notification callback type. - * - * @param[in] adcp pointer to the @p ADCDriver object triggering the - * callback - * @param[in] buffer pointer to the most recent samples data - * @param[in] n number of buffer rows available starting from @p buffer - */ -typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); - -/** - * @brief ADC error callback type. - * - * @param[in] adcp pointer to the @p ADCDriver object triggering the - * callback - * @param[in] err ADC error code - */ -typedef void (*adcerrorcallback_t)(ADCDriver *adcp, adcerror_t err); - -/** - * @brief Conversion group configuration structure. - * @details This implementation-dependent structure describes a conversion - * operation. - */ -typedef struct { - /** - * @brief Enables the circular buffer mode for the group. - */ - bool circular; - /** - * @brief Number of the analog channels belonging to the conversion group. - */ - adc_channels_num_t num_channels; - /** - * @brief Callback function associated to the group or @p NULL. - */ - adccallback_t end_cb; - /** - * @brief Error callback or @p NULL. - */ - adcerrorcallback_t error_cb; - /* End of the mandatory fields.*/ - /** - * @brief Bitmask of channels for ADC conversion. - */ - uint32_t channel_mask; - /** - * @brief ADC CFG1 register initialization data. - * @note All the required bits must be defined into this field. - */ - uint32_t cfg1; - /** - * @brief ADC SC3 register initialization data. - * @note All the required bits must be defined into this field. - */ - uint32_t sc3; -} ADCConversionGroup; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /* Perform first time calibration */ - bool calibrate; -} ADCConfig; - -/** - * @brief Structure representing an ADC driver. - */ -struct ADCDriver { - /** - * @brief Driver state. - */ - adcstate_t state; - /** - * @brief Current configuration data. - */ - const ADCConfig *config; - /** - * @brief Current samples buffer pointer or @p NULL. - */ - adcsample_t *samples; - /** - * @brief Current samples buffer depth or @p 0. - */ - size_t depth; - /** - * @brief Current conversion group pointer or @p NULL. - */ - const ADCConversionGroup *grpp; -#if ADC_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif -#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the peripheral. - */ - mutex_t mutex; -#endif /* ADC_USE_MUTUAL_EXCLUSION */ -#if defined(ADC_DRIVER_EXT_FIELDS) - ADC_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the ADCx registers block. - */ - ADC_TypeDef *adc; - /** - * @brief Number of samples expected. - */ - size_t number_of_samples; - /** - * @brief Current position in the buffer. - */ - size_t current_index; - /** - * @brief Current channel index into group channel_mask. - */ - size_t current_channel; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_ADC_USE_ADC0 && !defined(__DOXYGEN__) -extern ADCDriver ADCD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void adc_lld_init(void); - void adc_lld_start(ADCDriver *adcp); - void adc_lld_stop(ADCDriver *adcp); - void adc_lld_start_conversion(ADCDriver *adcp); - void adc_lld_stop_conversion(ADCDriver *adcp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_ADC */ - -#endif /* HAL_ADC_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_ext_lld.c b/os/hal/ports/KINETIS/LLD/hal_ext_lld.c deleted file mode 100644 index 21bb6e0..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_ext_lld.c +++ /dev/null @@ -1,434 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/ext_lld.c - * @brief KINETIS EXT subsystem low level driver source. - * - * @addtogroup EXT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#define PCR_IRQC_DISABLED 0x0 -#define PCR_IRQC_DMA_RISING_EDGE 0x1 -#define PCR_IRQC_DMA_FALLING_EDGE 0x2 -#define PCR_IRQC_DMA_EITHER_EDGE 0x3 - -#define PCR_IRQC_LOGIC_ZERO 0x8 -#define PCR_IRQC_RISING_EDGE 0x9 -#define PCR_IRQC_FALLING_EDGE 0xA -#define PCR_IRQC_EITHER_EDGE 0xB -#define PCR_IRQC_LOGIC_ONE 0xC - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief EXTD1 driver identifier. - */ -EXTDriver EXTD1; - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/* A channel map for each channel. - * - * The index is the pin number. - * The result is the channel for that pin. - */ -#if KINETIS_EXT_PORTA_WIDTH > 0 -uint8_t porta_channel_map[KINETIS_EXT_PORTA_WIDTH]; -#endif -#if KINETIS_EXT_PORTB_WIDTH > 0 -uint8_t portb_channel_map[KINETIS_EXT_PORTB_WIDTH]; -#endif -#if KINETIS_EXT_PORTC_WIDTH > 0 -uint8_t portc_channel_map[KINETIS_EXT_PORTC_WIDTH]; -#endif -#if KINETIS_EXT_PORTD_WIDTH > 0 -uint8_t portd_channel_map[KINETIS_EXT_PORTD_WIDTH]; -#endif -#if KINETIS_EXT_PORTE_WIDTH > 0 -uint8_t porte_channel_map[KINETIS_EXT_PORTE_WIDTH]; -#endif - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Enables EXTI IRQ sources. - * - * @notapi - */ -static void ext_lld_exti_irq_enable(void) { - -#if KINETIS_EXT_PORTA_WIDTH > 0 - nvicEnableVector(PINA_IRQn, KINETIS_EXT_PORTA_IRQ_PRIORITY); -#endif - -#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ -#if (KINETIS_EXT_PORTB_WIDTH > 0) || (KINETIS_EXT_PORTC_WIDTH > 0) \ - || (KINETIS_EXT_PORTD_WIDTH > 0) || (KINETIS_EXT_PORTE_WIDTH > 0) - nvicEnableVector(PINBCDE_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); -#endif - -#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ -#if (KINETIS_EXT_PORTC_WIDTH > 0) || (KINETIS_EXT_PORTD_WIDTH > 0) - nvicEnableVector(PINCD_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); -#endif - -#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ -#if KINETIS_EXT_PORTB_WIDTH > 0 - nvicEnableVector(PINB_IRQn, KINETIS_EXT_PORTB_IRQ_PRIORITY); -#endif -#if KINETIS_EXT_PORTC_WIDTH > 0 - nvicEnableVector(PINC_IRQn, KINETIS_EXT_PORTC_IRQ_PRIORITY); -#endif -#if KINETIS_EXT_PORTD_WIDTH > 0 - nvicEnableVector(PIND_IRQn, KINETIS_EXT_PORTD_IRQ_PRIORITY); -#endif -#if KINETIS_EXT_PORTE_WIDTH > 0 - nvicEnableVector(PINE_IRQn, KINETIS_EXT_PORTE_IRQ_PRIORITY); -#endif -#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ -} - -/** - * @brief Disables EXTI IRQ sources. - * - * @notapi - */ -static void ext_lld_exti_irq_disable(void) { - -#if KINETIS_EXT_PORTA_WIDTH > 0 - nvicDisableVector(PINA_IRQn); -#endif - -#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ -#if (KINETIS_EXT_PORTB_WIDTH > 0) || (KINETIS_EXT_PORTC_WIDTH > 0) \ - || (KINETIS_EXT_PORTD_WIDTH > 0) || (KINETIS_EXT_PORTE_WIDTH > 0) - nvicDisableVector(PINBCDE_IRQn); -#endif - -#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ -#if (KINETIS_EXT_PORTC_WIDTH > 0) || (KINETIS_EXT_PORTD_WIDTH > 0) - nvicDisableVector(PINCD_IRQn); -#endif - -#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ -#if KINETIS_EXT_PORTB_WIDTH > 0 - nvicDisableVector(PINB_IRQn); -#endif -#if KINETIS_EXT_PORTC_WIDTH > 0 - nvicDisableVector(PINC_IRQn); -#endif -#if KINETIS_EXT_PORTD_WIDTH > 0 - nvicDisableVector(PIND_IRQn); -#endif -#if KINETIS_EXT_PORTE_WIDTH > 0 - nvicDisableVector(PINE_IRQn); -#endif -#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/* - * Generic interrupt handler. - */ -static inline void irq_handler(PORT_TypeDef * const port, const unsigned port_width, const uint8_t *channel_map) { - unsigned pin; - uint32_t isfr = port->ISFR; - - /* Clear all pending interrupts on this port. */ - port->ISFR = 0xFFFFFFFF; - - for (pin = 0; pin < port_width; pin++) { - if (isfr & (1 << pin)) { - expchannel_t channel = channel_map[pin]; - EXTD1.config->channels[channel].cb(&EXTD1, channel); - } - } -} - -/** - * @brief PORTA interrupt handler. - * - * @isr - */ -#if defined(KINETIS_PORTA_IRQ_VECTOR) && KINETIS_EXT_PORTA_WIDTH > 0 -OSAL_IRQ_HANDLER(KINETIS_PORTA_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - irq_handler(PORTA, KINETIS_EXT_PORTA_WIDTH, porta_channel_map); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_EXT_PORTA_WIDTH > 0 */ - -#if KINETIS_EXT_HAS_COMMON_BCDE_IRQ - -#if defined(KINETIS_PORTD_IRQ_VECTOR) -OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - -#if (KINETIS_EXT_PORTB_WIDTH > 0) - irq_handler(PORTB, KINETIS_EXT_PORTB_WIDTH, portb_channel_map); -#endif -#if (KINETIS_EXT_PORTC_WIDTH > 0) - irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); -#endif -#if (KINETIS_EXT_PORTD_WIDTH > 0) - irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); -#endif -#if (KINETIS_EXT_PORTE_WIDTH > 0) - irq_handler(PORTE, KINETIS_EXT_PORTE_WIDTH, porte_channel_map); -#endif - - OSAL_IRQ_EPILOGUE(); -} -#endif /* defined(KINETIS_PORTD_IRQ_VECTOR) */ - -#elif KINETIS_EXT_HAS_COMMON_CD_IRQ /* KINETIS_EXT_HAS_COMMON_BCDE_IRQ */ - -#if defined(KINETIS_PORTD_IRQ_VECTOR) -OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - -#if (KINETIS_EXT_PORTC_WIDTH > 0) - irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); -#endif -#if (KINETIS_EXT_PORTD_WIDTH > 0) - irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); -#endif - - OSAL_IRQ_EPILOGUE(); -} -#endif /* defined(KINETIS_PORTD_IRQ_VECTOR) */ - - -#else /* KINETIS_EXT_HAS_COMMON_CD_IRQ */ - -/** - * @brief PORTB interrupt handler. - * - * @isr - */ -#if defined(KINETIS_PORTB_IRQ_VECTOR) && KINETIS_EXT_PORTB_WIDTH > 0 -OSAL_IRQ_HANDLER(KINETIS_PORTB_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - irq_handler(PORTB, KINETIS_EXT_PORTB_WIDTH, portb_channel_map); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_EXT_PORTB_WIDTH > 0 */ - -/** - * @brief PORTC interrupt handler. - * - * @isr - */ -#if defined(KINETIS_PORTC_IRQ_VECTOR) && KINETIS_EXT_PORTC_WIDTH > 0 -OSAL_IRQ_HANDLER(KINETIS_PORTC_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - irq_handler(PORTC, KINETIS_EXT_PORTC_WIDTH, portc_channel_map); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_EXT_PORTC_WIDTH > 0 */ - -/** - * @brief PORTD interrupt handler. - * - * @isr - */ -#if defined(KINETIS_PORTD_IRQ_VECTOR) && KINETIS_EXT_PORTD_WIDTH > 0 -OSAL_IRQ_HANDLER(KINETIS_PORTD_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - irq_handler(PORTD, KINETIS_EXT_PORTD_WIDTH, portd_channel_map); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_EXT_PORTD_WIDTH > 0 */ - -/** - * @brief PORTE interrupt handler. - * - * @isr - */ -#if defined(KINETIS_PORTE_IRQ_VECTOR) && KINETIS_EXT_PORTE_WIDTH > 0 -OSAL_IRQ_HANDLER(KINETIS_PORTE_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - irq_handler(PORTE, KINETIS_EXT_PORTE_WIDTH, porte_channel_map); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_EXT_PORTE_WIDTH > 0 */ - -#endif /* !KINETIS_EXT_HAS_COMMON_CD_IRQ */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level EXT driver initialization. - * - * @notapi - */ -void ext_lld_init(void) { - - /* Driver initialization.*/ - extObjectInit(&EXTD1); -} - -/** - * @brief Configures and activates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_start(EXTDriver *extp) { - expchannel_t channel; - - if (extp->state == EXT_STOP) - ext_lld_exti_irq_enable(); - - /* Configuration of automatic channels.*/ - for (channel = 0; channel < EXT_MAX_CHANNELS; channel++) { - - uint32_t mode = extp->config->channels[channel].mode; - PORT_TypeDef *port = extp->config->channels[channel].port; - uint32_t pin = extp->config->channels[channel].pin; - - /* Initialize the channel map */ -#if KINETIS_EXT_PORTA_WIDTH > 0 - if (port == PORTA) - porta_channel_map[pin] = channel; - else -#endif -#if KINETIS_EXT_PORTB_WIDTH > 0 - if (port == PORTB) - portb_channel_map[pin] = channel; - else -#endif -#if KINETIS_EXT_PORTC_WIDTH > 0 - if (port == PORTC) - portc_channel_map[pin] = channel; - else -#endif -#if KINETIS_EXT_PORTD_WIDTH > 0 - if (port == PORTD) - portd_channel_map[pin] = channel; - else -#endif -#if KINETIS_EXT_PORTE_WIDTH > 0 - if (port == PORTE) - porte_channel_map[pin] = channel; - else -#endif - {} - - if (mode & EXT_CH_MODE_AUTOSTART) - ext_lld_channel_enable(extp, channel); - else if (port != NULL) - ext_lld_channel_disable(extp, channel); - } -} - -/** - * @brief Deactivates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_stop(EXTDriver *extp) { - - if (extp->state == EXT_ACTIVE) - ext_lld_exti_irq_disable(); -} - -/** - * @brief Enables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be enabled - * - * @notapi - */ -void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { - - uint32_t irqc; - uint32_t mode = extp->config->channels[channel].mode; - if (mode & EXT_CH_MODE_RISING_EDGE) - irqc = PCR_IRQC_RISING_EDGE; - else if (extp->config->channels[channel].mode & EXT_CH_MODE_FALLING_EDGE) - irqc = PCR_IRQC_FALLING_EDGE; - else if (extp->config->channels[channel].mode & EXT_CH_MODE_BOTH_EDGES) - irqc = PCR_IRQC_EITHER_EDGE; - else - irqc = PCR_IRQC_DISABLED; - - PORT_TypeDef *port = extp->config->channels[channel].port; - uint32_t pin = extp->config->channels[channel].pin; - - uint32_t pcr = port->PCR[pin]; - - /* Clear all the IRQC bits */ - pcr &= ~PORTx_PCRn_IRQC_MASK; - /* Set the required IRQC bits */ - pcr |= PORTx_PCRn_IRQC(irqc); - - port->PCR[pin] = pcr; -} - -/** - * @brief Disables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be disabled - * - * @notapi - */ -void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) { - - PORT_TypeDef *port = extp->config->channels[channel].port; - uint32_t pin = extp->config->channels[channel].pin; - port->PCR[pin] |= PORTx_PCRn_IRQC(PCR_IRQC_DISABLED); -} - -#endif /* HAL_USE_EXT */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_ext_lld.h b/os/hal/ports/KINETIS/LLD/hal_ext_lld.h deleted file mode 100644 index bcd9cb0..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_ext_lld.h +++ /dev/null @@ -1,188 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/ext_lld.h - * @brief KINETIS EXT subsystem low level driver header. - * - * @addtogroup EXT - * @{ - */ - -#ifndef HAL_EXT_LLD_H_ -#define HAL_EXT_LLD_H_ - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Number of EXT channels required. - */ -#define EXT_MAX_CHANNELS KINETIS_EXTI_NUM_CHANNELS - -/** - * @name KINETIS-specific EXT channel modes - * @{ - */ -/** @} */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief PORTA interrupt priority level setting. - */ -#if !defined(KINETIS_EXT_PORTA_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_EXT_PORTA_IRQ_PRIORITY 3 -#endif - -/** - * @brief PORTB interrupt priority level setting. - */ -#if !defined(KINETIS_EXT_PORTB_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_EXT_PORTB_IRQ_PRIORITY 3 -#endif - -/** - * @brief PORTC interrupt priority level setting. - */ -#if !defined(KINETIS_EXT_PORTC_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_EXT_PORTC_IRQ_PRIORITY 3 -#endif - -/** - * @brief PORTD interrupt priority level setting. - */ -#if !defined(KINETIS_EXT_PORTD_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_EXT_PORTD_IRQ_PRIORITY 3 -#endif - -/** - * @brief PORTE interrupt priority level setting. - */ -#if !defined(KINETIS_EXT_PORTE_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_EXT_PORTE_IRQ_PRIORITY 3 -#endif -/** @} */ -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief EXT channel identifier. - */ -typedef uint32_t expchannel_t; - -/** - * @brief Type of an EXT generic notification callback. - * - * @param[in] extp pointer to the @p EXPDriver object triggering the - * callback - */ -typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); - -/** - * @brief Channel configuration structure. - */ -typedef struct { - /** - * @brief Channel mode. - */ - uint32_t mode; - /** - * @brief Channel callback. - */ - extcallback_t cb; - - /** - * @brief Port. - */ - PORT_TypeDef *port; - - /** - * @brief Pin. - */ - uint32_t pin; -} EXTChannelConfig; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Channel configurations. - */ - EXTChannelConfig channels[EXT_MAX_CHANNELS]; - /* End of the mandatory fields.*/ -} EXTConfig; - -/** - * @brief Structure representing an EXT driver. - */ -struct EXTDriver { - /** - * @brief Driver state. - */ - extstate_t state; - /** - * @brief Current configuration data. - */ - const EXTConfig *config; - /* End of the mandatory fields.*/ -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) -extern EXTDriver EXTD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void ext_lld_init(void); - void ext_lld_start(EXTDriver *extp); - void ext_lld_stop(EXTDriver *extp); - void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); - void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_EXT */ - -#endif /* HAL_EXT_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c b/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c deleted file mode 100644 index 6e88f88..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c +++ /dev/null @@ -1,391 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/gpt_lld.c - * @brief KINETIS GPT subsystem low level driver source. - * - * @addtogroup GPT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_GPT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief GPTD1 driver identifier. - * @note The driver GPTD1 allocates the complex timer PIT0 when enabled. - */ -#if KINETIS_GPT_USE_PIT0 || defined(__DOXYGEN__) -GPTDriver GPTD1; -#endif - -/** - * @brief GPTD2 driver identifier. - * @note The driver GPTD2 allocates the timer PIT1 when enabled. - */ -#if KINETIS_GPT_USE_PIT1 || defined(__DOXYGEN__) -GPTDriver GPTD2; -#endif - -/** - * @brief GPTD3 driver identifier. - * @note The driver GPTD3 allocates the timer PIT2 when enabled. - */ -#if KINETIS_GPT_USE_PIT2 || defined(__DOXYGEN__) -GPTDriver GPTD3; -#endif - -/** - * @brief GPTD4 driver identifier. - * @note The driver GPTD4 allocates the timer PIT3 when enabled. - */ -#if KINETIS_GPT_USE_PIT3 || defined(__DOXYGEN__) -GPTDriver GPTD4; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -#if KINETIS_HAS_PIT_COMMON_IRQ -static uint8_t active_channels = 0; -#endif /* KINETIS_HAS_PIT_COMMON_IRQ */ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Shared IRQ handler. - * - * @param[in] gptp pointer to a @p GPTDriver object - */ -static void gpt_lld_serve_interrupt(GPTDriver *gptp) { - - /* Clear the interrupt */ - gptp->channel->TFLG |= PIT_TFLGn_TIF; - - if (gptp->state == GPT_ONESHOT) { - gptp->state = GPT_READY; /* Back in GPT_READY state. */ - gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */ - } - gptp->config->callback(gptp); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if !KINETIS_HAS_PIT_COMMON_IRQ - -#if KINETIS_GPT_USE_PIT0 -/** - * @brief PIT1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_PIT0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD1); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_GPT_USE_PIT0 */ - -#if KINETIS_GPT_USE_PIT1 -/** - * @brief PIT1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_PIT1_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD2); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_GPT_USE_PIT1 */ - -#if KINETIS_GPT_USE_PIT2 -/** - * @brief PIT2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_PIT2_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD3); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_GPT_USE_PIT2 */ - -#if KINETIS_GPT_USE_PIT3 -/** - * @brief PIT3 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_PIT3_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - gpt_lld_serve_interrupt(&GPTD4); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_GPT_USE_PIT3 */ - -#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ -/** - * @brief Common PIT interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_PIT_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); -#if KINETIS_GPT_USE_PIT0 - if(GPTD1.channel->TFLG & PIT_TFLGn_TIF) - gpt_lld_serve_interrupt(&GPTD1); -#endif /* KINETIS_GPT_USE_PIT0 */ -#if KINETIS_GPT_USE_PIT1 - if(GPTD2.channel->TFLG & PIT_TFLGn_TIF) - gpt_lld_serve_interrupt(&GPTD2); -#endif /* KINETIS_GPT_USE_PIT1 */ -#if KINETIS_GPT_USE_PIT2 - if(GPTD3.channel->TFLG & PIT_TFLGn_TIF) - gpt_lld_serve_interrupt(&GPTD3); -#endif /* KINETIS_GPT_USE_PIT2 */ -#if KINETIS_GPT_USE_PIT3 - if(GPTD4.channel->TFLG & PIT_TFLGn_TIF) - gpt_lld_serve_interrupt(&GPTD4); -#endif /* KINETIS_GPT_USE_PIT3 */ - OSAL_IRQ_EPILOGUE(); -} - -#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level GPT driver initialization. - * - * @notapi - */ -void gpt_lld_init(void) { - -#if KINETIS_GPT_USE_PIT0 - /* Driver initialization.*/ - GPTD1.channel = &PIT->CHANNEL[0]; - gptObjectInit(&GPTD1); -#endif - -#if KINETIS_GPT_USE_PIT1 - /* Driver initialization.*/ - GPTD2.channel = &PIT->CHANNEL[1]; - gptObjectInit(&GPTD2); -#endif - -#if KINETIS_GPT_USE_PIT2 - /* Driver initialization.*/ - GPTD3.channel = &PIT->CHANNEL[2]; - gptObjectInit(&GPTD3); -#endif - -#if KINETIS_GPT_USE_PIT3 - /* Driver initialization.*/ - GPTD4.channel = &PIT->CHANNEL[3]; - gptObjectInit(&GPTD4); -#endif -} - -/** - * @brief Configures and activates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_start(GPTDriver *gptp) { - uint16_t psc; - - if (gptp->state == GPT_STOP) { - /* Clock activation.*/ - SIM->SCGC6 |= SIM_SCGC6_PIT; - gptp->clock = KINETIS_SYSCLK_FREQUENCY; - -#if !KINETIS_HAS_PIT_COMMON_IRQ - -#if KINETIS_GPT_USE_PIT0 - if (&GPTD1 == gptp) { - nvicEnableVector(PITChannel0_IRQn, KINETIS_GPT_PIT0_IRQ_PRIORITY); - } -#endif -#if KINETIS_GPT_USE_PIT1 - if (&GPTD2 == gptp) { - nvicEnableVector(PITChannel1_IRQn, KINETIS_GPT_PIT1_IRQ_PRIORITY); - } -#endif -#if KINETIS_GPT_USE_PIT2 - if (&GPTD3 == gptp) { - nvicEnableVector(PITChannel2_IRQn, KINETIS_GPT_PIT2_IRQ_PRIORITY); - } -#endif -#if KINETIS_GPT_USE_PIT3 - if (&GPTD4 == gptp) { - nvicEnableVector(PITChannel3_IRQn, KINETIS_GPT_PIT3_IRQ_PRIORITY); - } -#endif - -#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ - nvicEnableVector(PIT_IRQn, KINETIS_GPT_PIT_IRQ_PRIORITY); - active_channels++; -#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ - } - - /* Prescaler value calculation.*/ - psc = (uint16_t)((gptp->clock / gptp->config->frequency) - 1); - osalDbgAssert(((uint32_t)(psc + 1) * gptp->config->frequency) == gptp->clock, - "invalid frequency"); - - /* Enable the PIT */ - PIT->MCR = 0; -} - -/** - * @brief Deactivates the GPT peripheral. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop(GPTDriver *gptp) { - - if (gptp->state == GPT_READY) { - SIM->SCGC6 &= ~SIM_SCGC6_PIT; - - /* Disable the channel */ - gptp->channel->TCTRL = 0; - - /* Clear pending interrupts */ - gptp->channel->TFLG |= PIT_TFLGn_TIF; - -#if !KINETIS_HAS_PIT_COMMON_IRQ - -#if KINETIS_GPT_USE_PIT0 - if (&GPTD1 == gptp) { - nvicDisableVector(PITChannel0_IRQn); - } -#endif -#if KINETIS_GPT_USE_PIT1 - if (&GPTD2 == gptp) { - nvicDisableVector(PITChannel1_IRQn); - } -#endif -#if KINETIS_GPT_USE_PIT2 - if (&GPTD3 == gptp) { - nvicDisableVector(PITChannel2_IRQn); - } -#endif -#if KINETIS_GPT_USE_PIT3 - if (&GPTD4 == gptp) { - nvicDisableVector(PITChannel3_IRQn); - } -#endif - -#else /* !KINETIS_HAS_PIT_COMMON_IRQ */ - if(--active_channels == 0) - nvicDisableVector(PIT_IRQn); -#endif /* !KINETIS_HAS_PIT_COMMON_IRQ */ - } -} - -/** - * @brief Starts the timer in continuous mode. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] interval period in ticks - * - * @notapi - */ -void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { - - /* Clear pending interrupts */ - gptp->channel->TFLG |= PIT_TFLGn_TIF; - - /* Set the interval */ - gpt_lld_change_interval(gptp, interval); - - /* Start the timer */ - gptp->channel->TCTRL |= PIT_TCTRLn_TIE | PIT_TCTRLn_TEN; -} - -/** - * @brief Stops the timer. - * - * @param[in] gptp pointer to the @p GPTDriver object - * - * @notapi - */ -void gpt_lld_stop_timer(GPTDriver *gptp) { - - /* Stop the timer */ - gptp->channel->TCTRL = 0; -} - -/** - * @brief Starts the timer in one shot mode and waits for completion. - * @details This function specifically polls the timer waiting for completion - * in order to not have extra delays caused by interrupt servicing, - * this function is only recommended for short delays. - * - * @param[in] gptp pointer to the @p GPTDriver object - * @param[in] interval time interval in ticks - * - * @notapi - */ -void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { - struct PIT_CHANNEL *channel = gptp->channel; - - /* Disable timer and disable interrupts */ - channel->TCTRL = 0; - - /* Clear the interrupt flag */ - channel->TFLG |= PIT_TFLGn_TIF; - - /* Set the interval */ - channel->LDVAL = (gptp->clock / gptp->config->frequency) * interval; - - /* Enable Timer but keep interrupts disabled */ - channel->TCTRL = PIT_TCTRLn_TEN; - - /* Wait for the interrupt flag to be set */ - while (!(channel->TFLG & PIT_TFLGn_TIF)) - ; - - /* Disable timer and disable interrupts */ - channel->TCTRL = 0; -} - -#endif /* HAL_USE_GPT */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_gpt_lld.h b/os/hal/ports/KINETIS/LLD/hal_gpt_lld.h deleted file mode 100644 index 1b9e5ef..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_gpt_lld.h +++ /dev/null @@ -1,333 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Derek Mulcahy - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/gpt_lld.h - * @brief KINETIS GPT subsystem low level driver header. - * - * @addtogroup GPT - * @{ - */ - -#ifndef HAL_GPT_LLD_H_ -#define HAL_GPT_LLD_H_ - -#if HAL_USE_GPT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief GPTD1 driver enable switch. - * @details If set to @p TRUE the support for GPTD1 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_GPT_USE_PIT0) || defined(__DOXYGEN__) -#define KINETIS_GPT_USE_PIT0 FALSE -#endif - -/** - * @brief GPTD2 driver enable switch. - * @details If set to @p TRUE the support for GPTD2 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_GPT_USE_PIT1) || defined(__DOXYGEN__) -#define KINETIS_GPT_USE_PIT1 FALSE -#endif - -/** - * @brief GPTD3 driver enable switch. - * @details If set to @p TRUE the support for GPTD3 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_GPT_USE_PIT2) || defined(__DOXYGEN__) -#define KINETIS_GPT_USE_PIT2 FALSE -#endif - -/** - * @brief GPTD4 driver enable switch. - * @details If set to @p TRUE the support for GPTD4 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_GPT_USE_PIT3) || defined(__DOXYGEN__) -#define KINETIS_GPT_USE_PIT3 FALSE -#endif - -/** - * @brief GPTD1 interrupt priority level setting. - */ -#if !defined(KINETIS_GPT_PIT0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_GPT_PIT0_IRQ_PRIORITY 7 -#endif - -/** - * @brief GPTD2 interrupt priority level setting. - */ -#if !defined(KINETIS_GPT_PIT1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_GPT_PIT1_IRQ_PRIORITY 7 -#endif - -/** - * @brief GPTD3 interrupt priority level setting. - */ -#if !defined(KINETIS_GPT_PIT2_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_GPT_PIT2_IRQ_PRIORITY 7 -#endif - -/** - * @brief GPTD4 interrupt priority level setting. - */ -#if !defined(KINETIS_GPT_PIT3_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_GPT_PIT3_IRQ_PRIORITY 7 -#endif - -/** - * @brief GPTD* common interrupt priority level setting. - */ -#if (KINETIS_HAS_PIT_COMMON_IRQ && !defined(KINETIS_GPT_PIT_IRQ_PRIORITY)) \ - || defined(__DOXYGEN__) -#define KINETIS_GPT_PIT_IRQ_PRIORITY 2 -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if KINETIS_GPT_USE_PIT0 && !KINETIS_HAS_PIT0 -#error "PIT0 not present in the selected device" -#endif - -#if KINETIS_GPT_USE_PIT1 && !KINETIS_HAS_PIT1 -#error "PIT1 not present in the selected device" -#endif - -#if KINETIS_GPT_USE_PIT2 && !KINETIS_HAS_PIT2 -#error "PIT2 not present in the selected device" -#endif - -#if KINETIS_GPT_USE_PIT3 && !KINETIS_HAS_PIT3 -#error "PIT3 not present in the selected device" -#endif - -#if !KINETIS_GPT_USE_PIT0 && !KINETIS_GPT_USE_PIT1 && \ - !KINETIS_GPT_USE_PIT2 && !KINETIS_GPT_USE_PIT3 -#error "GPT driver activated but no PIT peripheral assigned" -#endif - -#if KINETIS_GPT_USE_PIT0 && !KINETIS_HAS_PIT_COMMON_IRQ && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to PIT0" -#endif - -#if KINETIS_GPT_USE_PIT1 && !KINETIS_HAS_PIT_COMMON_IRQ && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to PIT1" -#endif - -#if KINETIS_GPT_USE_PIT2 && !KINETIS_HAS_PIT_COMMON_IRQ && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT2_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to PIT2" -#endif - -#if KINETIS_GPT_USE_PIT3 && !KINETIS_HAS_PIT_COMMON_IRQ && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT3_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to PIT3" -#endif - -#if KINETIS_HAS_PIT_COMMON_IRQ && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_GPT_PIT_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to PIT" -#endif - -#if KINETIS_GPT_USE_PIT0 && !defined(KINETIS_PIT0_IRQ_VECTOR) && \ - !KINETIS_HAS_PIT_COMMON_IRQ -#error "KINETIS_PIT0_IRQ_VECTOR not defined" -#endif - -#if KINETIS_GPT_USE_PIT1 && !defined(KINETIS_PIT1_IRQ_VECTOR) && \ - !KINETIS_HAS_PIT_COMMON_IRQ -#error "KINETIS_PIT1_IRQ_VECTOR not defined" -#endif - -#if KINETIS_GPT_USE_PIT2 && !defined(KINETIS_PIT2_IRQ_VECTOR) && \ - !KINETIS_HAS_PIT_COMMON_IRQ -#error "KINETIS_PIT2_IRQ_VECTOR not defined" -#endif - -#if KINETIS_GPT_USE_PIT3 && !defined(KINETIS_PIT3_IRQ_VECTOR) && \ - !KINETIS_HAS_PIT_COMMON_IRQ -#error "KINETIS_PIT3_IRQ_VECTOR not defined" -#endif - -#if KINETIS_HAS_PIT_COMMON_IRQ && !defined(KINETIS_PIT_IRQ_VECTOR) -#error "KINETIS_PIT_IRQ_VECTOR not defined" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief GPT frequency type. - */ -typedef uint32_t gptfreq_t; - -/** - * @brief GPT counter type. - */ -typedef uint32_t gptcnt_t; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - gptfreq_t frequency; - /** - * @brief Timer callback pointer. - * @note This callback is invoked on GPT counter events. - * @note This callback can be set to @p NULL but in that case the - * one-shot mode cannot be used. - */ - gptcallback_t callback; - /* End of the mandatory fields.*/ -} GPTConfig; - -/** - * @brief Structure representing a GPT driver. - */ -struct GPTDriver { - /** - * @brief Driver state. - */ - gptstate_t state; - /** - * @brief Current configuration data. - */ - const GPTConfig *config; -#if defined(GPT_DRIVER_EXT_FIELDS) - GPT_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Timer base clock. - */ - uint32_t clock; - /** - * @brief Channel structure in PIT registers block. - */ - struct PIT_CHANNEL *channel; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the interval of GPT peripheral. - * @details This function changes the interval of a running GPT unit. - * @pre The GPT unit must be running in continuous mode. - * @post The GPT unit interval is changed to the new value. - * @note The function has effect at the next cycle start. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @param[in] interval new cycle time in timer ticks - * - * @notapi - */ -#define gpt_lld_change_interval(gptp, interval) \ - ((gptp)->channel->LDVAL = (uint32_t)( \ - ( (gptp)->clock / (gptp)->config->frequency ) * \ - ( interval ) )) - -/** - * @brief Returns the interval of GPT peripheral. - * @pre The GPT unit must be running in continuous mode. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @return The current interval. - * - * @notapi - */ -#define gpt_lld_get_interval(gptp) \ - ((uint32_t)( ( (uint64_t)(gptp)->channel->LDVAL * (gptp)->config->frequency ) / \ - ( (uint32_t)(gptp)->clock ) )) - -/** - * @brief Returns the counter value of GPT peripheral. - * @pre The GPT unit must be running in continuous mode. - * @note The nature of the counter is not defined, it may count upward - * or downward, it could be continuously running or not. - * - * @param[in] gptp pointer to a @p GPTDriver object - * @return The current counter value. - * - * @notapi - */ -#define gpt_lld_get_counter(gptp) ((gptcnt_t)(gptp)->pit->CHANNEL[gptp->channel].CVAL) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_GPT_USE_PIT0 && !defined(__DOXYGEN__) -extern GPTDriver GPTD1; -#endif - -#if KINETIS_GPT_USE_PIT1 && !defined(__DOXYGEN__) -extern GPTDriver GPTD2; -#endif - -#if KINETIS_GPT_USE_PIT2 && !defined(__DOXYGEN__) -extern GPTDriver GPTD3; -#endif - -#if KINETIS_GPT_USE_PIT3 && !defined(__DOXYGEN__) -extern GPTDriver GPTD4; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void gpt_lld_init(void); - void gpt_lld_start(GPTDriver *gptp); - void gpt_lld_stop(GPTDriver *gptp); - void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period); - void gpt_lld_stop_timer(GPTDriver *gptp); - void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_GPT */ - -#endif /* HAL_GPT_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c b/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c deleted file mode 100644 index f615dd5..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c +++ /dev/null @@ -1,589 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/i2c_lld.c - * @brief KINETIS I2C subsystem low level driver source. - * - * @addtogroup I2C - * @{ - */ - -#include "osal.h" -#include "hal.h" - -#if HAL_USE_I2C || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief I2C0 driver identifier. - */ -#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__) -I2CDriver I2CD1; -#endif - -/** - * @brief I2C1 driver identifier. - */ -#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__) -I2CDriver I2CD2; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -void config_frequency(I2CDriver *i2cp) { - - /* Each index in the table corresponds to a a frequency - * divider used to generate the SCL clock from the main - * system clock. - */ - const uint16_t icr_table[] = { - /* 0x00 - 0x0F */ - 20,22,24,26,28,30,34,40,28,32,36,40,44,48,56,68, - /* 0x10 - 0x1F */ - 48,56,64,72,80,88,104,128,80,96,112,128,144,160,192,240, - /* 0x20 - 0x2F */ - 160,192,224,256,288,320,384,480,320,384,448,512,576,640,768,960, - /* 0x30 - 0x3F */ - 640,768,896,1024,1152,1280,1536,1920,1280,1536,1792,2048,2304,2560,3072,3840, - }; - - int length = sizeof(icr_table) / sizeof(icr_table[0]); - uint16_t divisor; - uint8_t i = 0, index = 0; - uint16_t best, diff; - - if (i2cp->config != NULL) - divisor = KINETIS_BUSCLK_FREQUENCY / i2cp->config->clock; - else - divisor = KINETIS_BUSCLK_FREQUENCY / 100000; - - best = ~0; - index = 0; - /* Tries to find the SCL clock which is the closest - * approximation to the clock passed in config. To - * stay on the safe side, only values that generate - * lower frequency are used. - */ - for (i = 0; i < length; i++) { - if (icr_table[i] >= divisor) { - diff = icr_table[i] - divisor; - if (diff < best) { - best = diff; - index = i; - } - } - } - - i2cp->i2c->F = index; -} - -/** - * @brief Common IRQ handler. - * @note Tries hard to clear all the pending interrupt sources, we don't - * want to go through the whole ISR and have another interrupt soon - * after. - * - * @param[in] i2cp pointer to an I2CDriver - */ -static void serve_interrupt(I2CDriver *i2cp) { - - I2C_TypeDef *i2c = i2cp->i2c; - intstate_t state = i2cp->intstate; - - /* check if we're master or slave */ - if (i2c->C1 & I2Cx_C1_MST) { - /* master */ - - if (i2c->S & I2Cx_S_ARBL) { - /* check if we lost arbitration */ - i2cp->errors |= I2C_ARBITRATION_LOST; - i2c->S |= I2Cx_S_ARBL; - /* TODO: may need to do more here, reset bus? */ - /* Perhaps clear MST? */ - } - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - else if ((i2cp->rsta_workaround == RSTA_WORKAROUND_ON) && (i2cp->i2c->FLT & I2Cx_FLT_STARTF)) { - i2cp->rsta_workaround = RSTA_WORKAROUND_OFF; - /* clear+disable STARTF/STOPF interrupts and wake up the thread */ - i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; - i2cp->i2c->FLT &= ~I2Cx_FLT_SSIE; - i2c->S |= I2Cx_S_IICIF; - _i2c_wakeup_isr(i2cp); - } -#endif /* KL27Z RST workaround */ - - else if (i2c->S & I2Cx_S_TCF) { - /* just completed byte transfer */ - if (i2c->C1 & I2Cx_C1_TX) { - /* the byte was transmitted */ - - if (state == STATE_SEND) { - /* currently sending stuff */ - - if (i2c->S & I2Cx_S_RXAK) { - /* slave did not ACK */ - i2cp->errors |= I2C_ACK_FAILURE; - /* the thread will be woken up at the end of ISR and release the bus */ - - } else if (i2cp->txbuf != NULL && i2cp->txidx < i2cp->txbytes) { - /* slave ACK'd and we want to send more */ - i2c->D = i2cp->txbuf[i2cp->txidx++]; - } else { - /* slave ACK'd and we are done sending */ - i2cp->intstate = STATE_STOP; - /* this wakes up the waiting thread at the end of ISR */ - } - - } else if (state == STATE_RECV) { - /* should be receiving stuff, so we've just sent the address */ - - if (i2c->S & I2Cx_S_RXAK) { - /* slave did not ACK */ - i2cp->errors |= I2C_ACK_FAILURE; - /* the thread will be woken up and release the bus */ - - } else { - /* slave ACK'd, we should be receiving next */ - i2c->C1 &= ~I2Cx_C1_TX; - - if (i2cp->rxbytes > 1) { - /* multi-byte read, send ACK after next transfer */ - i2c->C1 &= ~I2Cx_C1_TXAK; - } else { - /* only 1 byte remaining, send NAK */ - i2c->C1 |= I2Cx_C1_TXAK; - } - - (void) i2c->D; /* dummy read; triggers next receive */ - } - - } /* possibly check other states here - should not happen! */ - - } else { - /* the byte was received */ - - if (state == STATE_RECV) { - /* currently receiving stuff */ - /* the received byte is now in D */ - - if (i2cp->rxbytes > 1) { - /* expecting at least one byte after this one */ - if (i2cp->rxidx == (i2cp->rxbytes - 2)) { - /* expecting exactly one byte after this one, NAK that one */ - i2c->C1 |= I2Cx_C1_TXAK; - } else { - /* expecting more than one after this one, respond with ACK */ - i2c->C1 &= ~I2Cx_C1_TXAK; - } - } - - if (i2cp->rxidx == i2cp->rxbytes - 1) { - /* D is the last byte we're expecting */ - /* release bus: switch to RX mode, send STOP */ - /* need to do it now otherwise the I2C module will wait for another byte */ - // delayMicroseconds(1); - i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); - i2cp->intstate = STATE_STOP; - /* this wakes up the waiting thread at the end of ISR */ - } - - /* get the data from D; this triggers the next receive */ - i2cp->rxbuf[i2cp->rxidx++] = i2c->D; - - // if (i2cp->rxidx == i2cp->rxbytes) { - /* done receiving */ - // } - } /* possibly check other states here - should not happen! */ - } - - } /* possibly check other interrupt flags here */ - } else { - /* slave */ - - /* Not implemented yet */ - } - - /* Reset other interrupt sources */ -#if defined(I2Cx_FLT_STOPF) /* extra flags on KL26Z and KL27Z */ - i2cp->i2c->FLT |= I2Cx_FLT_STOPF; -#endif -#if defined(I2Cx_FLT_STARTF) /* extra flags on KL27Z */ - i2cp->i2c->FLT |= I2Cx_FLT_STARTF; -#endif - /* Reset interrupt flag */ - i2c->S |= I2Cx_S_IICIF; - - if (i2cp->errors != I2C_NO_ERROR) - _i2c_wakeup_error_isr(i2cp); - - if (i2cp->intstate == STATE_STOP) - _i2c_wakeup_isr(i2cp); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_I2C_USE_I2C0 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_I2C0_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&I2CD1); - OSAL_IRQ_EPILOGUE(); -} - -#endif - -#if KINETIS_I2C_USE_I2C1 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_I2C1_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&I2CD2); - OSAL_IRQ_EPILOGUE(); -} - -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level I2C driver initialization. - * - * @notapi - */ -void i2c_lld_init(void) { - -#if KINETIS_I2C_USE_I2C0 - i2cObjectInit(&I2CD1); - I2CD1.thread = NULL; - I2CD1.i2c = I2C0; -#endif - -#if KINETIS_I2C_USE_I2C1 - i2cObjectInit(&I2CD2); - I2CD2.thread = NULL; - I2CD2.i2c = I2C1; -#endif - -} - -/** - * @brief Configures and activates the I2C peripheral. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -void i2c_lld_start(I2CDriver *i2cp) { - - if (i2cp->state == I2C_STOP) { - - /* TODO: - * The PORT must be enabled somewhere. The PIN multiplexer - * will map the I2C functionality to some PORT which must - * than be enabled. The easier way is enabling all PORTs at - * startup, which is currently being done in __early_init. - */ - -#if KINETIS_I2C_USE_I2C0 - if (&I2CD1 == i2cp) { - SIM->SCGC4 |= SIM_SCGC4_I2C0; - nvicEnableVector(I2C0_IRQn, KINETIS_I2C_I2C0_PRIORITY); - } -#endif - -#if KINETIS_I2C_USE_I2C1 - if (&I2CD2 == i2cp) { - SIM->SCGC4 |= SIM_SCGC4_I2C1; - nvicEnableVector(I2C1_IRQn, KINETIS_I2C_I2C1_PRIORITY); - } -#endif - - } - - config_frequency(i2cp); - i2cp->i2c->C1 = I2Cx_C1_IICEN | I2Cx_C1_IICIE; // reset I2C, enable interrupts - i2cp->i2c->S = I2Cx_S_IICIF | I2Cx_S_ARBL; // clear status flags just in case - i2cp->intstate = STATE_STOP; // internal state -} - -/** - * @brief Deactivates the I2C peripheral. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -void i2c_lld_stop(I2CDriver *i2cp) { - - if (i2cp->state != I2C_STOP) { - - i2cp->i2c->C1 &= ~(I2Cx_C1_IICEN | I2Cx_C1_IICIE); - -#if KINETIS_I2C_USE_I2C0 - if (&I2CD1 == i2cp) { - SIM->SCGC4 &= ~SIM_SCGC4_I2C0; - nvicDisableVector(I2C0_IRQn); - } -#endif - -#if KINETIS_I2C_USE_I2C1 - if (&I2CD2 == i2cp) { - SIM->SCGC4 &= ~SIM_SCGC4_I2C1; - nvicDisableVector(I2C1_IRQn); - } -#endif - - } -} - -static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - msg_t msg; - systime_t start, end; - - uint8_t op = (i2cp->intstate == STATE_SEND) ? 0 : 1; - - i2cp->errors = I2C_NO_ERROR; - i2cp->addr = addr; - - i2cp->txbuf = txbuf; - i2cp->txbytes = txbytes; - i2cp->txidx = 0; - - i2cp->rxbuf = rxbuf; - i2cp->rxbytes = rxbytes; - i2cp->rxidx = 0; - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - i2cp->rsta_workaround = RSTA_WORKAROUND_OFF; -#endif /* KL27Z RST workaround */ - - /* clear status flags */ -#if defined(I2Cx_FLT_STOPF) /* extra flags on KL26Z and KL27Z */ - i2cp->i2c->FLT |= I2Cx_FLT_STOPF; -#endif -#if defined(I2Cx_FLT_STARTF) /* extra flags on KL27Z */ - i2cp->i2c->FLT |= I2Cx_FLT_STARTF; -#endif - i2cp->i2c->S = I2Cx_S_IICIF|I2Cx_S_ARBL; - - /* acquire the bus */ - /* check to see if we already have the bus */ - if(i2cp->i2c->C1 & I2Cx_C1_MST) { - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - /* need to wait for STARTF interrupt after issuing repeated start, - * otherwise the double buffering mechanism sends the last sent byte - * instead of the slave address. - * https://community.freescale.com/thread/377611 - */ - i2cp->rsta_workaround = RSTA_WORKAROUND_ON; - /* clear any interrupt bits and enable STARTF/STOPF interrupts */ - i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; - i2cp->i2c->S |= I2Cx_S_IICIF|I2Cx_S_ARBL; - i2cp->i2c->FLT |= I2Cx_FLT_SSIE; -#endif /* KL27Z RST workaround */ - - /* send repeated start */ - i2cp->i2c->C1 |= I2Cx_C1_RSTA | I2Cx_C1_TX; - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - /* wait for the STARTF interrupt */ - msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); - /* abort if this didn't go well (timed out) */ - if (msg != MSG_OK) { - /* release bus - RX mode, send STOP */ - i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); - return msg; - } -#endif /* KL27Z RST workaround */ - - } else { - /* unlock during the wait, so that tasks with - * higher priority can get attention */ - osalSysUnlock(); - - /* wait until the bus is released */ - /* Calculating the time window for the timeout on the busy bus condition.*/ - start = osalOsGetSystemTimeX(); -#if defined(OSAL_TIME_MS2I) - end = start + OSAL_TIME_MS2I(KINETIS_I2C_BUSY_TIMEOUT); -#elif defined(OSAL_TIME_MS2ST) - end = start + OSAL_TIME_MS2ST(KINETIS_I2C_BUSY_TIMEOUT); -#else - end = start + OSAL_MS2ST(KINETIS_I2C_BUSY_TIMEOUT); -#endif - - while(true) { - osalSysLock(); - /* If the bus is not busy then the operation can continue, note, the - loop is exited in the locked state.*/ - if(!(i2cp->i2c->S & I2Cx_S_BUSY)) - break; - /* If the system time went outside the allowed window then a timeout - condition is returned.*/ - if (!osalOsIsTimeWithinX(osalOsGetSystemTimeX(), start, end)) { - return MSG_TIMEOUT; - } - osalSysUnlock(); - } - - /* send START */ - i2cp->i2c->C1 |= I2Cx_C1_MST|I2Cx_C1_TX; - } - - /* send slave address */ - i2cp->i2c->D = addr << 1 | op; - - /* wait for the ISR to signal that the transmission (or receive if no transmission) phase is complete */ - msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); - - /* FIXME */ - //if (i2cp->i2c->S & I2Cx_S_RXAK) - // i2cp->errors |= I2C_ACK_FAILURE; - - /* the transmitting (or receiving if no transmission) phase has finished, - * do we expect to receive something? */ - if (msg == MSG_OK && rxbuf != NULL && rxbytes > 0 && i2cp->rxidx < rxbytes) { - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - /* the same KL27Z RST workaround as above */ - i2cp->rsta_workaround = RSTA_WORKAROUND_ON; - /* clear any interrupt bits and enable STARTF/STOPF interrupts */ - i2cp->i2c->FLT |= I2Cx_FLT_STOPF|I2Cx_FLT_STARTF; - i2cp->i2c->S |= I2Cx_S_IICIF|I2Cx_S_ARBL; - i2cp->i2c->FLT |= I2Cx_FLT_SSIE; -#endif /* KL27Z RST workaround */ - - /* send repeated start */ - i2cp->i2c->C1 |= I2Cx_C1_RSTA; - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - /* wait for the STARTF interrupt */ - msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); - /* abort if this didn't go well (timed out) */ - if (msg != MSG_OK) { - /* release bus - RX mode, send STOP */ - i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); - return msg; - } -#endif /* KL27Z RST workaround */ - - /* FIXME */ - // while (!(i2cp->i2c->S & I2Cx_S_BUSY)); - - i2cp->intstate = STATE_RECV; - i2cp->i2c->D = i2cp->addr << 1 | 1; - - msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); - } - - /* release bus - RX mode, send STOP */ - // other kinetis I2C drivers wait here for 1us. is this needed? - i2cp->i2c->C1 &= ~(I2Cx_C1_TX | I2Cx_C1_MST); - /* FIXME */ - // while (i2cp->i2c->S & I2Cx_S_BUSY); - - return msg; -} - -/** - * @brief Receives data via the I2C bus as master. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * @param[in] addr slave device address - * @param[out] rxbuf pointer to the receive buffer - * @param[in] rxbytes number of bytes to be received - * @param[in] timeout the number of ticks before the operation timeouts, - * the following special values are allowed: - * - @a TIME_INFINITE no timeout. - * . - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET if one or more I2C errors occurred, the errors can - * be retrieved using @p i2cGetErrors(). - * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a - * timeout the driver must be stopped and restarted - * because the bus is in an uncertain state. - * - * @notapi - */ -msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - i2cp->intstate = STATE_RECV; - return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout); -} - -/** - * @brief Transmits data via the I2C bus as master. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * @param[in] addr slave device address - * @param[in] txbuf pointer to the transmit buffer - * @param[in] txbytes number of bytes to be transmitted - * @param[out] rxbuf pointer to the receive buffer - * @param[in] rxbytes number of bytes to be received - * @param[in] timeout the number of ticks before the operation timeouts, - * the following special values are allowed: - * - @a TIME_INFINITE no timeout. - * . - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET if one or more I2C errors occurred, the errors can - * be retrieved using @p i2cGetErrors(). - * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a - * timeout the driver must be stopped and restarted - * because the bus is in an uncertain state. - * - * @notapi - */ -msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout) { - - i2cp->intstate = STATE_SEND; - return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout); -} - -#endif /* HAL_USE_I2C */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.h b/os/hal/ports/KINETIS/LLD/hal_i2c_lld.h deleted file mode 100644 index bfc5008..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.h +++ /dev/null @@ -1,247 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/i2c_lld.h - * @brief KINETIS I2C subsystem low level driver header. - * - * @addtogroup I2C - * @{ - */ - -#ifndef HAL_I2C_LLD_H_ -#define HAL_I2C_LLD_H_ - -#if HAL_USE_I2C || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#define STATE_STOP 0x00 -#define STATE_SEND 0x01 -#define STATE_RECV 0x02 - -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ -#define RSTA_WORKAROUND_OFF 0x00 -#define RSTA_WORKAROUND_ON 0x01 -#endif /* KL27Z RST workaround */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief I2C0 driver enable switch. - * @details If set to @p TRUE the support for I2C0 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_I2C_USE_I2C0) || defined(__DOXYGEN__) -#define KINETIS_I2C_USE_I2C0 FALSE -#endif - -/** - * @brief I2C1 driver enable switch. - * @details If set to @p TRUE the support for I2C1 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_I2C_USE_I2C1) || defined(__DOXYGEN__) -#define KINETIS_I2C_USE_I2C1 FALSE -#endif -/** @} */ - -/** - * @brief I2C0 interrupt priority level setting. - */ -#if !defined(KINETIS_I2C_I2C0_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_I2C_I2C0_PRIORITY 12 -#endif - -/** - * @brief I2C1 interrupt priority level setting. - */ -#if !defined(KINETIS_I2C_I2C1_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_I2C_I2C1_PRIORITY 12 -#endif - -/** - * @brief Timeout for external clearing BUSY bus (in ms). - */ -#if !defined(KINETIS_I2C_BUSY_TIMEOUT) || defined(__DOXYGEN__) -#define KINETIS_I2C_BUSY_TIMEOUT 50 -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/** @brief error checks */ -#if KINETIS_I2C_USE_I2C0 && !KINETIS_HAS_I2C0 -#error "I2C0 not present in the selected device" -#endif - -#if KINETIS_I2C_USE_I2C1 && !KINETIS_HAS_I2C1 -#error "I2C1 not present in the selected device" -#endif - - -#if !(KINETIS_I2C_USE_I2C0 || KINETIS_I2C_USE_I2C1) -#error "I2C driver activated but no I2C peripheral assigned" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/* @brief Type representing I2C address. */ -typedef uint8_t i2caddr_t; - -/* @brief Type of I2C Driver condition flags. */ -typedef uint32_t i2cflags_t; - -/* @brief Type used to control the ISR state machine. */ -typedef uint8_t intstate_t; - -/** - * @brief Driver configuration structure. - * @note Implementations may extend this structure to contain more, - * architecture dependent, fields. - */ - -/** - * @brief Driver configuration structure. - */ -typedef struct { - - /* @brief Clock to be used for the I2C bus. */ - uint32_t clock; - -} I2CConfig; - -/** - * @brief Type of a structure representing an I2C driver. - */ -typedef struct I2CDriver I2CDriver; - -/** - * @brief Structure representing an I2C driver. - */ -struct I2CDriver { - /** - * @brief Driver state. - */ - i2cstate_t state; - /** - * @brief Current configuration data. - */ - const I2CConfig *config; - /** - * @brief Error flags. - */ - i2cflags_t errors; -#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#endif /* I2C_USE_MUTUAL_EXCLUSION */ -#if defined(I2C_DRIVER_EXT_FIELDS) - I2C_DRIVER_EXT_FIELDS -#endif - /* @brief Thread waiting for I/O completion. */ - thread_reference_t thread; - /* @brief Current slave address without R/W bit. */ - i2caddr_t addr; - - /* End of the mandatory fields.*/ - - /* @brief Pointer to the buffer with data to send. */ - const uint8_t *txbuf; - /* @brief Number of bytes of data to send. */ - size_t txbytes; - /* @brief Current index in buffer when sending data. */ - size_t txidx; - /* @brief Pointer to the buffer to put received data. */ - uint8_t *rxbuf; - /* @brief Number of bytes of data to receive. */ - size_t rxbytes; - /* @brief Current index in buffer when receiving data. */ - size_t rxidx; - /* @brief Tracks current ISR state. */ - intstate_t intstate; - /* @brief Low-level register access. */ - I2C_TypeDef *i2c; -#if defined(KL27Zxxx) || defined(KL27Zxx) /* KL27Z RST workaround */ - /* @brief Auxiliary variable for KL27Z repeated start workaround. */ - intstate_t rsta_workaround; -#endif /* KL27Z RST workaround */ -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Get errors from I2C driver. - * - * @param[in] i2cp pointer to the @p I2CDriver object - * - * @notapi - */ -#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) - -#if KINETIS_I2C_USE_I2C0 -extern I2CDriver I2CD1; -#endif - -#if KINETIS_I2C_USE_I2C1 -extern I2CDriver I2CD2; -#endif - -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void i2c_lld_init(void); - void i2c_lld_start(I2CDriver *i2cp); - void i2c_lld_stop(I2CDriver *i2cp); - msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, - const uint8_t *txbuf, size_t txbytes, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout); - msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, - uint8_t *rxbuf, size_t rxbytes, - systime_t timeout); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_I2C */ - -#endif /* HAL_I2C_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_pal_lld.c b/os/hal/ports/KINETIS/LLD/hal_pal_lld.c deleted file mode 100644 index 51f8a2e..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_pal_lld.c +++ /dev/null @@ -1,245 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/pal_lld.c - * @brief PAL subsystem low level driver. - * - * @addtogroup PAL - * @{ - */ - -#include "osal.h" -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Reads a logical state from an I/O pad. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @return The logical state. - * @retval PAL_LOW low logical state. - * @retval PAL_HIGH high logical state. - * - * @notapi - */ -uint8_t _pal_lld_readpad(ioportid_t port, - uint8_t pad) { - - return (port->PDIR & ((uint32_t) 1 << pad)) ? PAL_HIGH : PAL_LOW; -} - -/** - * @brief Writes a logical state on an output pad. - * @note This function is not meant to be invoked directly by the - * application code. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] bit logical value, the value must be @p PAL_LOW or - * @p PAL_HIGH - * - * @notapi - */ -void _pal_lld_writepad(ioportid_t port, - uint8_t pad, - uint8_t bit) { - - if (bit == PAL_HIGH) - port->PDOR |= ((uint32_t) 1 << pad); - else - port->PDOR &= ~((uint32_t) 1 << pad); -} - -/** - * @brief Pad mode setup. - * @details This function programs a pad with the specified mode. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * @note Programming an unknown or unsupported mode is silently ignored. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] mode pad mode - * - * @notapi - */ -void _pal_lld_setpadmode(ioportid_t port, - uint8_t pad, - iomode_t mode) { - - PORT_TypeDef *portcfg = NULL; - - osalDbgAssert(pad < PADS_PER_PORT, "pal_lld_setpadmode() #1, invalid pad"); - - if (mode == PAL_MODE_OUTPUT_PUSHPULL) - port->PDDR |= ((uint32_t) 1 << pad); - else - port->PDDR &= ~((uint32_t) 1 << pad); - - if (port == IOPORT1) - portcfg = PORTA; - else if (port == IOPORT2) - portcfg = PORTB; - else if (port == IOPORT3) - portcfg = PORTC; - else if (port == IOPORT4) - portcfg = PORTD; - else if (port == IOPORT5) - portcfg = PORTE; - - osalDbgAssert(portcfg != NULL, "pal_lld_setpadmode() #2, invalid port"); - - switch (mode) { - case PAL_MODE_RESET: - case PAL_MODE_INPUT: - case PAL_MODE_OUTPUT_PUSHPULL: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1); - break; -#if KINETIS_GPIO_HAS_OPENDRAIN - case PAL_MODE_OUTPUT_OPENDRAIN: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | - PORTx_PCRn_ODE; - break; -#else -#undef PAL_MODE_OUTPUT_OPENDRAIN -#endif - case PAL_MODE_INPUT_PULLUP: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | - PORTx_PCRn_PE | - PORTx_PCRn_PS; - break; - case PAL_MODE_INPUT_PULLDOWN: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1) | - PORTx_PCRn_PE; - break; - case PAL_MODE_UNCONNECTED: - case PAL_MODE_INPUT_ANALOG: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(0); - break; - case PAL_MODE_ALTERNATIVE_1: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(1); - break; - case PAL_MODE_ALTERNATIVE_2: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(2); - break; - case PAL_MODE_ALTERNATIVE_3: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(3); - break; - case PAL_MODE_ALTERNATIVE_4: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(4); - break; - case PAL_MODE_ALTERNATIVE_5: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(5); - break; - case PAL_MODE_ALTERNATIVE_6: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(6); - break; - case PAL_MODE_ALTERNATIVE_7: - portcfg->PCR[pad] = PIN_MUX_ALTERNATIVE(7); - break; - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Kinetis I/O ports configuration. - * @details Ports A-E clocks enabled. - * - * @param[in] config the Kinetis ports configuration - * - * @notapi - */ -void _pal_lld_init(const PALConfig *config) { - - int i, j; - - /* Enable clocking on all Ports */ - SIM->SCGC5 |= SIM_SCGC5_PORTA | - SIM_SCGC5_PORTB | - SIM_SCGC5_PORTC | - SIM_SCGC5_PORTD | - SIM_SCGC5_PORTE; - - /* Initial PORT and GPIO setup */ - for (i = 0; i < TOTAL_PORTS; i++) { - for (j = 0; j < PADS_PER_PORT; j++) { - pal_lld_setpadmode(config->ports[i].port, - j, - config->ports[i].pads[j]); - } - } -} - -/** - * @brief Pads mode setup. - * @details This function programs a pads group belonging to the same port - * with the specified mode. - * - * @param[in] port the port identifier - * @param[in] mask the group mask - * @param[in] mode the mode - * - * @notapi - */ -void _pal_lld_setgroupmode(ioportid_t port, - ioportmask_t mask, - iomode_t mode) { - - int i; - - (void)mask; - - for (i = 0; i < PADS_PER_PORT; i++) { - pal_lld_setpadmode(port, i, mode); - } -} - -#endif /* HAL_USE_PAL */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_pal_lld.h b/os/hal/ports/KINETIS/LLD/hal_pal_lld.h deleted file mode 100644 index 833d95e..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_pal_lld.h +++ /dev/null @@ -1,423 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/pal_lld.h - * @brief PAL subsystem low level driver header. - * - * @addtogroup PAL - * @{ - */ - -#ifndef HAL_PAL_LLD_H_ -#define HAL_PAL_LLD_H_ - -#if HAL_USE_PAL || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Unsupported modes and specific modes */ -/*===========================================================================*/ - -#define PAL_MODE_ALTERNATIVE_1 0x10 -#define PAL_MODE_ALTERNATIVE_2 0x11 -#define PAL_MODE_ALTERNATIVE_3 0x12 -#define PAL_MODE_ALTERNATIVE_4 0x13 -#define PAL_MODE_ALTERNATIVE_5 0x14 -#define PAL_MODE_ALTERNATIVE_6 0x15 -#define PAL_MODE_ALTERNATIVE_7 0x16 - -#define PIN_MUX_ALTERNATIVE(x) PORTx_PCRn_MUX(x) - -/*===========================================================================*/ -/* I/O Ports Types and constants. */ -/*===========================================================================*/ - -#define TOTAL_PORTS 5 -#define PADS_PER_PORT 32 - -/** - * @brief Width, in bits, of an I/O port. - */ -#define PAL_IOPORTS_WIDTH 32 - -/** - * @brief Whole port mask. - * @brief This macro specifies all the valid bits into a port. - */ -#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF) - -/** - * @brief Digital I/O port sized unsigned type. - */ -typedef uint32_t ioportmask_t; - -/** - * @brief Digital I/O modes. - */ -typedef uint32_t iomode_t; - -/** - * @brief Type of an I/O line. - */ -typedef uint32_t ioline_t; - -/** - * @brief Port Identifier. - * @details This type can be a scalar or some kind of pointer, do not make - * any assumption about it, use the provided macros when populating - * variables of this type. - */ -typedef GPIO_TypeDef *ioportid_t; - -/** - * @brief Port Configuration. - * @details This structure stores the configuration parameters of all pads - * belonging to a port. - */ -typedef struct { - ioportid_t port; - iomode_t pads[PADS_PER_PORT]; -} PortConfig; - -/** - * @brief Generic I/O ports static initializer. - * @details An instance of this structure must be passed to @p palInit() at - * system startup time in order to initialized the digital I/O - * subsystem. This represents only the initial setup, specific pads - * or whole ports can be reprogrammed at later time. - * @note Implementations may extend this structure to contain more, - * architecture dependent, fields. - */ -typedef struct { - PortConfig ports[TOTAL_PORTS]; -} PALConfig; - -/*===========================================================================*/ -/* I/O Ports Identifiers. */ -/*===========================================================================*/ - -/** - * @brief GPIO port A identifier. - */ -#define IOPORT1 GPIOA - -/** - * @brief GPIO port B identifier. - */ -#define IOPORT2 GPIOB - -/** - * @brief GPIO port C identifier. - */ -#define IOPORT3 GPIOC - -/** - * @brief GPIO port D identifier. - */ -#define IOPORT4 GPIOD - -/** - * @brief GPIO port E identifier. - */ -#define IOPORT5 GPIOE - -/** - * @name Line handling macros - * @{ - */ -/** - * @brief Forms a line identifier. - * @details A port/pad pair are encoded into an @p ioline_t type. The encoding - * of this type is platform-dependent. - * @note In this driver the pad number is encoded in the byte of the GPIO - * address that's zero on all Kinetis devices. - */ -#define PAL_LINE(port, pad) \ - ((ioline_t)((uint32_t)(port) | ((uint32_t)(pad)<<20))) - -/** - * @brief Decodes a port identifier from a line identifier. - */ -#define PAL_PORT(line) \ - ((GPIO_TypeDef *)(((uint32_t)(line)) & 0xF00FFFFFU)) - -/** - * @brief Decodes a pad identifier from a line identifier. - */ -#define PAL_PAD(line) \ - ((uint32_t)((uint32_t)(line) & 0x0FF00000U)>>20) - -/** - * @brief Value identifying an invalid line. - */ -#define PAL_NOLINE 0U -/** @} */ - -/*===========================================================================*/ -/* Implementation, some of the following macros could be implemented as */ -/* functions, if so please put them in pal_lld.c. */ -/*===========================================================================*/ - -/** - * @brief Low level PAL subsystem initialization. - * - * @param[in] config architecture-dependent ports configuration - * - * @notapi - */ -#define pal_lld_init(config) _pal_lld_init(config) - -/** - * @brief Reads the physical I/O port states. - * - * @param[in] port port identifier - * @return The port bits. - * - * @notapi - */ -#define pal_lld_readport(port) \ - (port)->PDIR - -/** - * @brief Reads the output latch. - * @details The purpose of this function is to read back the latched output - * value. - * - * @param[in] port port identifier - * @return The latched logical states. - * - * @notapi - */ -#define pal_lld_readlatch(port) \ - (port)->PDOR - -/** - * @brief Writes a bits mask on a I/O port. - * - * @param[in] port port identifier - * @param[in] bits bits to be written on the specified port - * - * @notapi - */ -#define pal_lld_writeport(port, bits) \ - (port)->PDOR = (bits) - -/** - * @brief Sets a bits mask on a I/O port. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] bits bits to be ORed on the specified port - * - * @notapi - */ -#define pal_lld_setport(port, bits) \ - (port)->PSOR = (bits) - -/** - * @brief Clears a bits mask on a I/O port. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] bits bits to be cleared on the specified port - * - * @notapi - */ -#define pal_lld_clearport(port, bits) \ - (port)->PCOR = (bits) - -/** - * @brief Toggles a bits mask on a I/O port. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] bits bits to be toggled on the specified port - * - * @notapi - */ -#define pal_lld_toggleport(port, bits) \ - (port)->PTOR = (bits) - -/** - * @brief Reads a group of bits. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] mask group mask - * @param[in] offset group bit offset within the port - * @return The group logical states. - * - * @notapi - */ -#define pal_lld_readgroup(port, mask, offset) 0 - -/** - * @brief Writes a group of bits. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] mask group mask - * @param[in] offset group bit offset within the port - * @param[in] bits bits to be written. Values exceeding the group width - * are masked. - * - * @notapi - */ -#define pal_lld_writegroup(port, mask, offset, bits) (void)bits - -/** - * @brief Pads group mode setup. - * @details This function programs a pads group belonging to the same port - * with the specified mode. - * @note Programming an unknown or unsupported mode is silently ignored. - * - * @param[in] port port identifier - * @param[in] mask group mask - * @param[in] offset group bit offset within the port - * @param[in] mode group mode - * - * @notapi - */ -#define pal_lld_setgroupmode(port, mask, offset, mode) \ - _pal_lld_setgroupmode(port, mask << offset, mode) - -/** - * @brief Reads a logical state from an I/O pad. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @return The logical state. - * @retval PAL_LOW low logical state. - * @retval PAL_HIGH high logical state. - * - * @notapi - */ -#define pal_lld_readpad(port, pad) _pal_lld_readpad(port, pad) - -/** - * @brief Writes a logical state on an output pad. - * @note This function is not meant to be invoked directly by the - * application code. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] bit logical value, the value must be @p PAL_LOW or - * @p PAL_HIGH - * - * @notapi - */ -#define pal_lld_writepad(port, pad, bit) _pal_lld_writepad(port, pad, bit) - -/** - * @brief Sets a pad logical state to @p PAL_HIGH. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_setpad(port, pad) (port)->PSOR = ((uint32_t) 1 << (pad)) - -/** - * @brief Clears a pad logical state to @p PAL_LOW. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_clearpad(port, pad) (port)->PCOR = ((uint32_t) 1 << (pad)) - -/** - * @brief Toggles a pad logical state. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * - * @notapi - */ -#define pal_lld_togglepad(port, pad) (port)->PTOR = ((uint32_t) 1 << (pad)) - -/** - * @brief Pad mode setup. - * @details This function programs a pad with the specified mode. - * @note The @ref PAL provides a default software implementation of this - * functionality, implement this function if can optimize it by using - * special hardware functionalities or special coding. - * @note Programming an unknown or unsupported mode is silently ignored. - * - * @param[in] port port identifier - * @param[in] pad pad number within the port - * @param[in] mode pad mode - * - * @notapi - */ -#define pal_lld_setpadmode(port, pad, mode) \ - _pal_lld_setpadmode(port, pad, mode) - -#if !defined(__DOXYGEN__) -extern const PALConfig pal_default_config; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void _pal_lld_init(const PALConfig *config); - void _pal_lld_setgroupmode(ioportid_t port, - ioportmask_t mask, - iomode_t mode); - void _pal_lld_setpadmode(ioportid_t port, - uint8_t pad, - iomode_t mode); - uint8_t _pal_lld_readpad(ioportid_t port, - uint8_t pad); - void _pal_lld_writepad(ioportid_t port, - uint8_t pad, - uint8_t bit); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PAL */ - -#endif /* HAL_PAL_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c b/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c deleted file mode 100644 index 6ba932e..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c +++ /dev/null @@ -1,993 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - Copyright (C) 2017..2018 Wim Lewis - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file hal_sdc_lld.c - * @brief Kinetis SDC subsystem low level driver. - * - * This driver provides a single SDC driver based on the Kinetis - * "Secured Digital Host Controller (SDHC)" peripheral. - * - * In order to use this driver, other peripherals must also be configured: - * - * The MPU must either be disabled (CESR=0), or it must be configured - * to allow the SDHC peripheral DMA access to any data buffers (read - * or write). - * - * The SDHC signals must be routed to the desired pins, and pullups/pulldowns - * configured. - * - * @addtogroup SDC - * @{ - */ - -#include "hal.h" - -#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__) - -#include "hal_mmcsd.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#if defined(MK66F18) -/* Configure SDHC block to use the IRC48M clock */ -#define KINETIS_SDHC_PERIPHERAL_FREQUENCY 48000000UL -#else -/* We configure the SDHC block to use the system clock */ -#define KINETIS_SDHC_PERIPHERAL_FREQUENCY KINETIS_SYSCLK_FREQUENCY -#endif - -#ifndef KINETIS_SDHC_PRIORITY -#define KINETIS_SDHC_PRIORITY 12 /* TODO? Default IRQ priority for SDHC */ -#endif - -/* The DTOC value (data timeout counter) controls how long the SDHC - will wait for a data transfer before indicating a timeout to - us. The card can tell us how long that should be, but various SDHC - documentation suggests that we should always allow around 500 msec - even if the card says it will finish sooner. This only comes into - play if there's a malfunction or something, so it's not critical to - get it exactly right. - - It controls the ratio between the SDCLK frequency and the - timeout, so we have a different DTOCV for each bus clock - frequency. -*/ -#define DTOCV_300ms_400kHz 4 /* 4 -> 2^17 -> 328 msec */ -#define DTOCV_700ms_25MHz 11 /* 11 -> 2^24 -> 671 msec */ -#define DTOCV_700ms_50MHz 12 /* 12 -> 2^25 -> 671 msec */ - -#if 0 -#define TRACE(t, val) chDbgWriteTrace ((void *)t, (void *)(uintptr_t)(val)) -#define TRACEI(t, val) chDbgWriteTraceI((void *)t, (void *)(uintptr_t)(val)) -#else -#define TRACE(t, val) -#define TRACEI(t, val) -#endif - -#define DIV_RND_UP(a, b) ( ((a)+(b)-1) / (b) ) - -/* Error bits from the SD / MMC Card Status response word. */ -/* TODO: These really belong in a HLD, not here. */ -#define MMC_ERR_OUT_OF_RANGE (1U << 31) -#define MMC_ERR_ADDRESS (1U << 30) -#define MMC_ERR_BLOCK_LEN (1U << 29) -#define MMC_ERR_ERASE_SEQ (1U << 28) -#define MMC_ERR_ERASE_PARAM (1U << 27) -#define MMC_ERR_WP (1U << 26) -#define MMC_ERR_CARD_IS_LOCKED (1U << 25) -#define MMC_ERR_LOCK_UNLOCK_FAILED (1U << 24) -#define MMC_ERR_COM_CRC_ERROR (1U << 23) -#define MMC_ERR_ILLEGAL_COMMAND (1U << 22) -#define MMC_ERR_CARD_ECC_FAILED (1U << 21) -#define MMC_ERR_CARD_CONTROLLER (1U << 20) -#define MMC_ERR_ERROR (1U << 19) -#define MMC_ERR_CSD_OVERWRITE (1U << 16) -#define MMC_ERR_AKE_SEQ (1U << 3) - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief SDCD1 driver identifier. - */ -#if (PLATFORM_SDC_USE_SDC1 == TRUE) || defined(__DOXYGEN__) -SDCDriver SDCD1; -#else -#error HAL_USE_SDC is true but PLATFORM_SDC_USE_SDC1 is false -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void recover_after_botched_transfer(SDCDriver *); -static msg_t wait_interrupt(SDCDriver *, uint32_t); -static bool sdc_lld_transfer(SDCDriver *, uint32_t, uintptr_t, uint32_t, uint32_t); - -/** - * Compute the SDCLKFS and DVS values for a given SDCLK divisor. - * - * Note that in the current code, this function is always called with - * a constant argument (there are only a handful of valid SDCLK - * frequencies), and so GCC computes the results at compile time and - * does not actually emit this function into the output at all unless - * you're compiling with optimizations turned off. - * - * However if someone compiles with a KINETIS_SDHC_PERIPHERAL_FREQUENCY - * that is not a compile-time constant, this function would get emitted. - */ -static uint32_t divisor_settings(unsigned divisor) -{ - /* First, handle all the special cases */ - if (divisor <= 1) { - /* Pass through */ - return SDHC_SYSCTL_SDCLKFS(0) | SDHC_SYSCTL_DVS(0); - } - if (divisor <= 16 && (divisor & 0x01)) { - /* Disable the prescaler, just use the divider. */ - return SDHC_SYSCTL_SDCLKFS(0) | SDHC_SYSCTL_DVS(divisor - 1); - } - if (divisor <= 32 && !(divisor & 0x01)) { - /* Prescale by 2, but do the rest with the divider */ - return SDHC_SYSCTL_SDCLKFS(0x01) | SDHC_SYSCTL_DVS((divisor >> 1) - 1); - } - if (divisor >= 0x1000) { - /* It's not possible to divide by more than 2^12. If we're asked to, - just do the best we can. */ - return SDHC_SYSCTL_SDCLKFS(0x80) | SDHC_SYSCTL_DVS(0xF); - } - - /* The bit position in SDCLKFS provides a power-of-two prescale - factor, and the four bits in DVS allow division by up to 16 - (division by DVS+1). We want to approximate `divisor` using these - terms, but we want to round up --- it's OK to run the card a - little bit too slow, but not OK to run it a little bit too - fast. */ - - unsigned shift = (8 * sizeof(unsigned int) - 4) - __builtin_clz(divisor); - - /* Shift the divisor value right so that it only occupies the four - lowest bits. Subtract one because that's how the DVS circuit - works. Add one if we shifted any 1-bits off the bottom, so that - we always round up. */ - unsigned dvs = (divisor >> shift) - ((divisor & ((1 << shift)-1))? 0 : 1); - - return SDHC_SYSCTL_SDCLKFS(1 << (shift-1)) | SDHC_SYSCTL_DVS(dvs); -} - -/** - * @brief Enable the SDHC clock when stable. - * - * Waits for the clock divider in the SDHC block to stabilize, then - * enables the SD clock. - */ -static void enable_clock_when_stable(uint32_t new_sysctl) -{ - SDHC->SYSCTL = new_sysctl; - - /* Wait for clock divider to stabilize */ - while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) { - osalThreadSleepMilliseconds(1); - } - - /* Restart the clock */ - SDHC->SYSCTL = new_sysctl | SDHC_SYSCTL_SDCLKEN; - - /* Wait for clock to stabilize again */ - while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) { - osalThreadSleepMilliseconds(1); - } -} - -/** - * Translate error bits from a CMD transaction to the HAL's error flag set. - */ -static sdcflags_t translate_cmd_error(uint32_t status) { - /* Translate the failure into the flags understood by the top half */ - - sdcflags_t errors = 0; - - if (status & SDHC_IRQSTAT_CTOE || !(status & SDHC_IRQSTAT_CC)) { - errors |= SDC_COMMAND_TIMEOUT; - } - if (status & SDHC_IRQSTAT_CCE) { - errors |= SDC_CMD_CRC_ERROR; - } - - /* If CTOE and CCE are both set, this indicates that the Kinetis - SDHC peripheral has detected a CMD line conflict in a - multi-master scenario. There's no specific code for that, so just - pass it through as a combined timeout+CRC failure. */ - - /* Translate any other framing and protocol errors into CRC errors. */ - if (status & ~(SDHC_IRQSTAT_CCE|SDHC_IRQSTAT_CTOE|SDHC_IRQSTAT_CC)) { - errors |= SDC_CMD_CRC_ERROR; - } - - return errors; -} - -/** - * Translate error bits from a card's R1 response word into the HAL's - * error flag set. - * - * This function should probably be in the HLD, not here. - */ -static sdcflags_t translate_mmcsd_error(uint32_t cardstatus) { - sdcflags_t errors = 0; - - cardstatus &= MMCSD_R1_ERROR_MASK; - - if (cardstatus & MMC_ERR_COM_CRC_ERROR) - errors |= SDC_CMD_CRC_ERROR; - - if (cardstatus & MMC_ERR_CARD_ECC_FAILED) - errors |= SDC_DATA_CRC_ERROR; - - /* TODO: Extend the HLD error codes at least enough to distinguish - between invalid command/parameter errors (card is OK, but - retrying w/o change won't help) and other errors */ - if (cardstatus & ~(MMC_ERR_COM_CRC_ERROR|MMC_ERR_CARD_ECC_FAILED)) - errors |= SDC_UNHANDLED_ERROR; - - return errors; -} - -/** - * @brief Perform one CMD transaction on the SD bus. - */ -static bool send_and_wait_cmd(SDCDriver *sdcp, uint32_t cmd) { - /* SDCLKEN (CMD clock enabled) should be true; - * SDSTB (clock stable) should be true; - * CIHB (command inhibit / busy) should be false */ - osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_SDSTB|SDHC_PRSSTAT_CIHB)) == SDHC_PRSSTAT_SDSTB, "Not in expected state"); - osalDbgAssert(SDHC->SYSCTL & SDHC_SYSCTL_SDCLKEN, "Clock disabled"); - osalDbgCheck((cmd & SDHC_XFERTYP_DPSEL) == 0); - osalDbgCheck((SDHC->IRQSTAT & (SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | - SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC)) == 0); - - /* This initiates the CMD transaction */ - TRACE(1, cmd); - SDHC->XFERTYP = cmd; - - uint32_t events = - SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | - SDHC_IRQSTAT_CTOE | /* SDHC_IRQSTAT_CRM | */ SDHC_IRQSTAT_CC; - wait_interrupt(sdcp, SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC); - uint32_t status = SDHC->IRQSTAT & events; - - /* These bits are write-1-to-clear (w1c) */ - SDHC->IRQSTAT = status; - - /* In the normal case, the CC (command complete) bit is set but none - of the others are */ - if (status == SDHC_IRQSTAT_CC) - return HAL_SUCCESS; - - /* Translate the failure into the flags understood by the top half */ - sdcp->errors |= translate_cmd_error(status); - - TRACE(9, SDHC->PRSSTAT); - - /* Issue a reset to the CMD portion of the SDHC peripheral to clear the - error bits and enable subsequent commands */ - SDHC->SYSCTL |= SDHC_SYSCTL_RSTC; - - return HAL_FAILED; -} - -/** - * @brief Perform one data transaction on the SD bus. - */ -static bool send_and_wait_transfer(SDCDriver *sdcp, uint32_t cmd) { - - osalDbgCheck(cmd & SDHC_XFERTYP_DPSEL); - osalDbgCheck(cmd & SDHC_XFERTYP_DMAEN); - - const uint32_t cmd_end_bits = - SDHC_IRQSTAT_CIE | SDHC_IRQSTAT_CEBE | SDHC_IRQSTAT_CCE | - SDHC_IRQSTAT_CTOE | /* SDHC_IRQSTAT_CRM | */ SDHC_IRQSTAT_CC; - - const uint32_t transfer_end_bits = - SDHC_IRQSTAT_DMAE | SDHC_IRQSTAT_AC12E | SDHC_IRQSTAT_DEBE | - SDHC_IRQSTAT_DCE | SDHC_IRQSTAT_DTOE | SDHC_IRQSTAT_TC; - - TRACE(3, cmd); - - osalSysLock(); - osalDbgCheck(sdcp->thread == NULL); - - /* Clear anything pending from an earlier transfer */ - SDHC->IRQSTAT = cmd_end_bits | transfer_end_bits | SDHC_IRQSTAT_DINT; - - /* Enable interrupts on completions or failures */ - uint32_t old_staten = SDHC->IRQSTATEN; - SDHC->IRQSTATEN = (old_staten & ~(SDHC_IRQSTAT_BRR|SDHC_IRQSTAT_BWR)) | (cmd_end_bits | transfer_end_bits | SDHC_IRQSTAT_DINT); - SDHC->IRQSIGEN = SDHC_IRQSTAT_CTOE | SDHC_IRQSTAT_CC; - - /* Start the transfer */ - SDHC->XFERTYP = cmd; - - /* Await an interrupt */ - osalThreadSuspendS(&sdcp->thread); - osalSysUnlock(); - - /* Retrieve the flags and clear them */ - uint32_t cmdstat = SDHC->IRQSTAT & cmd_end_bits; - SDHC->IRQSTAT = cmdstat; - TRACE(2, cmdstat); - - /* If the command failed, the transfer won't happen */ - if (cmdstat != SDHC_IRQSTAT_CC) { - /* The command couldn't be sent, or wasn't acknowledged */ - sdcp->errors |= translate_cmd_error(cmdstat); - - /* Clear the error status */ - SDHC->SYSCTL |= SDHC_SYSCTL_RSTC; - - if (cmdstat == (SDHC_IRQSTAT_CCE|SDHC_IRQSTAT_CTOE)) { - /* A CMD-line conflict is unlikely, but doesn't require further recovery */ - } else { - /* For most error situations, we don't know whether the command - failed to send or we got line noise while receiving. Make sure - we're in a sane state by resetting the connection. */ - recover_after_botched_transfer(sdcp); - } - - return HAL_FAILED; - } - - uint32_t cmdresp = SDHC->CMDRSP[0]; - TRACE(11, cmdresp); - if (cmdresp & MMCSD_R1_ERROR_MASK) { - /* The command was sent, and the card responded with an error indication */ - sdcp->errors |= translate_mmcsd_error(cmdresp); - return HAL_FAILED; - } - - /* Check for end of data transfer phase */ - uint32_t datastat; - for (;;) { - datastat = SDHC->IRQSTAT & (transfer_end_bits | SDHC_IRQSTAT_DINT); - if (datastat & transfer_end_bits) - break; - wait_interrupt(sdcp, transfer_end_bits); - } - TRACE(6, datastat); - SDHC->IRQSTAT = datastat; - - /* Handle data transfer errors */ - if ((datastat & ~(SDHC_IRQSTAT_DINT)) != SDHC_IRQSTAT_TC) { - bool should_cancel = false; - - /* Data phase errors */ - if (datastat & (SDHC_IRQSTAT_DCE|SDHC_IRQSTAT_DEBE)) { - sdcp->errors |= SDC_DATA_CRC_ERROR; - should_cancel = true; - } - if (datastat & SDHC_IRQSTAT_DTOE) { - sdcp->errors |= SDC_DATA_TIMEOUT; - should_cancel = true; - } - - /* Internal DMA error */ - if (datastat & SDHC_IRQSTAT_DMAE) { - sdcp->errors |= SDC_UNHANDLED_ERROR; - if (!(datastat & SDHC_IRQSTAT_TC)) - should_cancel = true; - } - - if (datastat & SDHC_IRQSTAT_AC12E) { - uint32_t cmd12error = SDHC->AC12ERR; - - /* We don't know if CMD12 was successfully executed */ - should_cancel = true; - - if (cmd12error & SDHC_AC12ERR_AC12NE) { - sdcp->errors |= SDC_UNHANDLED_ERROR; - } else { - if (cmd12error & SDHC_AC12ERR_AC12TOE) - sdcp->errors |= SDC_COMMAND_TIMEOUT; - if (cmd12error & (SDHC_AC12ERR_AC12CE|SDHC_AC12ERR_AC12EBE)) - sdcp->errors |= SDC_CMD_CRC_ERROR; - } - } - - if (should_cancel) { - recover_after_botched_transfer(sdcp); - } - - return HAL_FAILED; - } - - /* For a read transfer, make sure the DMA has finished transferring - * to host memory. (For a write transfer, the DMA necessarily finishes - * before the transfer does, so we don't need to wait for it - * specially.) */ - if (!(datastat & SDHC_IRQSTAT_DINT)) { - for(;;) { - datastat = SDHC->IRQSTAT & (SDHC_IRQSTAT_DINT|SDHC_IRQSTAT_DMAE); - if (datastat) { - SDHC->IRQSTAT = datastat; - TRACE(7, datastat); - break; - } - /* ...?? */ - } - } - - SDHC->IRQSTATEN = old_staten; - - return HAL_SUCCESS; -} - -/** - * @brief Wait for an interrupt from the SDHC peripheral. - * - * @param[in] mask Bits to enable in IRQSIGEN. - * - * @return MSG_OK - */ -static msg_t wait_interrupt(SDCDriver *sdcp, uint32_t mask) { - osalSysLock(); - SDHC->IRQSIGEN = mask; - msg_t wakeup = osalThreadSuspendS(&sdcp->thread); - osalSysUnlock(); - return wakeup; -} - -static void recover_after_botched_transfer(SDCDriver *sdcp) { - - /* Query the card state */ - uint32_t cardstatus; - if (sdc_lld_send_cmd_short_crc(sdcp, - MMCSD_CMD_SEND_STATUS, - sdcp->rca, &cardstatus) == HAL_SUCCESS) { - sdcp->errors |= translate_mmcsd_error(cardstatus); - uint32_t state = MMCSD_R1_STS(cardstatus); - if (state == MMCSD_STS_DATA) { - - /* Send a CMD12 to make sure the card isn't still transferring anything */ - SDHC->CMDARG = 0; - send_and_wait_cmd(sdcp, - SDHC_XFERTYP_CMDINX(MMCSD_CMD_STOP_TRANSMISSION) | - SDHC_XFERTYP_CMDTYP_ABORT | - /* TODO: Should we set CICEN and CCCEN here? */ - SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_48b); - } - } - - /* And reset the data block of the SDHC peripheral */ - SDHC->SYSCTL |= SDHC_SYSCTL_RSTD; -} - -/** - * @brief Perform one data transfer command - * - * Sends a command to the card and waits for the corresponding data transfer - * (either a read or write) to complete. - */ -static bool sdc_lld_transfer(SDCDriver *sdcp, uint32_t startblk, - uintptr_t buf, uint32_t n, - uint32_t cmdx) { - - osalDbgCheck(n > 0); - osalDbgCheck((buf & 0x03) == 0); /* Must be 32-bit aligned */ - - osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_DLA|SDHC_PRSSTAT_CDIHB|SDHC_PRSSTAT_CIHB)) == 0, - "SDHC interface not ready"); - - /* We always operate in terms of 512-byte blocks; the upper-layer - driver doesn't change the block size. The SDHC spec suggests that - only low-capacity cards support block sizes other than 512 bytes - anyway (SDHC "Physical Layer Simplified Specification" ver 6.0) */ - - if (sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) { - SDHC->CMDARG = startblk; - } else { - SDHC->CMDARG = startblk * MMCSD_BLOCK_SIZE; - } - - /* Store the DMA start address */ - SDHC->DSADDR = buf; - - uint32_t xfer; - /* For data transfers, we need to set some extra bits in XFERTYP according to the - transfer we're starting: - DPSEL -> enable data transfer - DTDSEL -> 1 for a read (card-to-host) transfer - MSBSEL, BCEN -> multiple block transfer using BLKATTR_BLKCNT - AC12EN -> Automatically issue MMCSD_CMD_STOP_TRANSMISSION at end of transfer - - Setting BLKCOUNT to 1 seems to be necessary even if MSBSEL+BCEN - is not set, despite the datasheet suggesting otherwise. I'm not - sure if this is a silicon bug or if I'm misunderstanding the - datasheet. - */ - SDHC->BLKATTR = - SDHC_BLKATTR_BLKCNT(n) | - SDHC_BLKATTR_BLKSIZE(MMCSD_BLOCK_SIZE); - if (n == 1) { - xfer = - cmdx | - SDHC_XFERTYP_CMDTYP_NORMAL | - SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_48b | - SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; - } else { - xfer = - cmdx | - SDHC_XFERTYP_CMDTYP_NORMAL | - SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_48b | - SDHC_XFERTYP_MSBSEL | SDHC_XFERTYP_BCEN | SDHC_XFERTYP_AC12EN | - SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; - } - - return send_and_wait_transfer(sdcp, xfer); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if (PLATFORM_SDC_USE_SDC1 == TRUE) || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SDHC_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - osalSysLockFromISR(); - - TRACEI(4, SDHC->IRQSTAT); - - /* We disable the interrupts, and wake up the usermode task to read - * the flags from IRQSTAT. - */ - SDHC->IRQSIGEN = 0; - - osalThreadResumeI(&SDCD1.thread, MSG_OK); - - osalSysUnlockFromISR(); - OSAL_IRQ_EPILOGUE(); -} -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level SDC driver initialization. - * - * @notapi - */ -void sdc_lld_init(void) { -#if PLATFORM_SDC_USE_SDC1 == TRUE - sdcObjectInit(&SDCD1); -#endif -} - - -/** - * @brief Configures and activates the SDC peripheral. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * - * @notapi - */ -void sdc_lld_start(SDCDriver *sdcp) { - - if (sdcp->state == BLK_STOP) { -#if defined(MK66F18) - /* Use IRC48M clock for SDHC */ - SIM->SOPT2 |= SIM_SOPT2_SDHCSRC(1); - SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3); -#else - SIM->SOPT2 = - (SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | - SIM_SOPT2_SDHCSRC(0); /* SDHC clock source 0: Core/system clock. */ -#endif - SIM->SCGC3 |= SIM_SCGC3_SDHC; /* Enable clock to SDHC peripheral */ - - /* Reset the SDHC block */ - SDHC->SYSCTL |= SDHC_SYSCTL_RSTA; - while(SDHC->SYSCTL & SDHC_SYSCTL_RSTA) { - osalThreadSleepMilliseconds(1); - } - - SDHC->IRQSIGEN = 0; - nvicEnableVector(SDHC_IRQn, KINETIS_SDHC_PRIORITY); - } -} - -/** - * @brief Deactivates the SDC peripheral. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * - * @notapi - */ -void sdc_lld_stop(SDCDriver *sdcp) { - - if (sdcp->state != BLK_STOP) { - /* TODO: Should we perform a reset (RSTA) before putting the - peripheral to sleep? */ - - /* Disable the card clock */ - SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); - - /* Turn off interrupts */ - nvicDisableVector(SDHC_IRQn); - SDHC->IRQSIGEN = 0; - SDHC->IRQSTATEN &= ~( SDHC_IRQSTATEN_CINTSEN | - SDHC_IRQSTATEN_CINSEN | - SDHC_IRQSTATEN_CRMSEN ); - - /* Disable the clock to the SDHC peripheral block */ - SIM->SCGC3 &= ~( SIM_SCGC3_SDHC ); - } -} - -/** - * @brief Starts the SDIO clock and sets it to init mode (400kHz or less). - * - * @param[in] sdcp pointer to the @p SDCDriver object - * - * @notapi - */ -void sdc_lld_start_clk(SDCDriver *sdcp) { - - (void)sdcp; - - /* Stop the card clock (it should already be stopped) */ - SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); - - /* Change the divisor and DTOCV for a 400kHz card closk */ - uint32_t sysctl = - SDHC_SYSCTL_DTOCV(DTOCV_300ms_400kHz) | - divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 400000)); - - /* Restart the clock */ - enable_clock_when_stable(sysctl); - - /* Reset any protocol machinery; this also runs the clock for 80 - cycles without any data bits to help initalize the card's state - (the Kinetis peripheral docs say that this is required after card - insertion or power-on, but the abridged SDHC specifications I - have don't seem to mention it) */ - SDHC->SYSCTL |= SDHC_SYSCTL_INITA; - - TRACE(9, SDHC->PRSSTAT); -} - -/** - * @brief Sets the SDIO clock to data mode (25MHz or less). - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] clk the clock mode - * - * @notapi - */ -void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) { - - (void)sdcp; - - /* Stop the card clock */ - SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); - - /* Change the divisor */ - uint32_t ctl; - switch (clk) { - default: - case SDC_CLK_25MHz: - ctl = - SDHC_SYSCTL_DTOCV(DTOCV_700ms_25MHz) | - divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 25000000)); - break; - case SDC_CLK_50MHz: - ctl = - SDHC_SYSCTL_DTOCV(DTOCV_700ms_50MHz) | - divisor_settings(DIV_RND_UP(KINETIS_SDHC_PERIPHERAL_FREQUENCY, 50000000)); - break; - } - - /* Restart the clock */ - enable_clock_when_stable(ctl); -} - -/** - * @brief Stops the SDIO clock. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * - * @notapi - */ -void sdc_lld_stop_clk(SDCDriver *sdcp) { - (void)sdcp; - SDHC->SYSCTL &= ~( SDHC_SYSCTL_SDCLKEN ); -} - -/** - * @brief Switches the bus to 4 bit or 8 bit mode. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] mode bus mode - * - * @notapi - */ -void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode) { - (void)sdcp; - uint32_t proctl = SDHC->PROCTL & ~( SDHC_PROCTL_DTW_MASK ); - - switch (mode) { - case SDC_MODE_1BIT: - proctl |= SDHC_PROCTL_DTW_1BIT; - break; - case SDC_MODE_4BIT: - proctl |= SDHC_PROCTL_DTW_4BIT; - break; - case SDC_MODE_8BIT: - proctl |= SDHC_PROCTL_DTW_8BIT; - break; - default: - osalDbgAssert(false, "invalid bus mode"); - break; - } - - SDHC->PROCTL = proctl; -} - -/** - * @brief Sends an SDIO command with no response expected. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] cmd card command - * @param[in] arg command argument - * - * @notapi - */ -void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) { - SDHC->CMDARG = arg; - uint32_t xfer = - SDHC_XFERTYP_CMDINX(cmd) | - SDHC_XFERTYP_CMDTYP_NORMAL | - /* DPSEL=0, CICEN=0, CCCEN=0 */ - SDHC_XFERTYP_RSPTYP_NONE; - - send_and_wait_cmd(sdcp, xfer); -} - -/** - * @brief Sends an SDIO command with a short response expected. - * @note The CRC is not verified. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] cmd card command - * @param[in] arg command argument - * @param[out] resp pointer to the response buffer (one word) - * - * @return The operation status. - * @retval HAL_SUCCESS operation succeeded. - * @retval HAL_FAILED operation failed. - * - * @notapi - */ -bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp) { - SDHC->CMDARG = arg; - uint32_t xfer = - SDHC_XFERTYP_CMDINX(cmd) | - SDHC_XFERTYP_CMDTYP_NORMAL | - /* DPSEL=0, CICEN=0, CCCEN=0 */ - SDHC_XFERTYP_RSPTYP_48; - - bool waited = send_and_wait_cmd(sdcp, xfer); - - *resp = SDHC->CMDRSP[0]; - - return waited; -} - -/** - * @brief Sends an SDIO command with a short response expected and CRC. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] cmd card command - * @param[in] arg command argument - * @param[out] resp pointer to the response buffer (one word) - * - * @return The operation status. - * @retval HAL_SUCCESS operation succeeded. - * @retval HAL_FAILED operation failed. - * - * @notapi - */ -bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp) { - SDHC->CMDARG = arg; - uint32_t xfer = - SDHC_XFERTYP_CMDINX(cmd) | - SDHC_XFERTYP_CMDTYP_NORMAL | - /* DPSEL=0, CICEN=1, CCCEN=1 */ - SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_48; - - bool waited = send_and_wait_cmd(sdcp, xfer); - - *resp = SDHC->CMDRSP[0]; - TRACE(11, *resp); - - return waited; -} - -/** - * @brief Sends an SDIO command with a long response expected and CRC. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] cmd card command - * @param[in] arg command argument - * @param[out] resp pointer to the response buffer (four words) - * - * @return The operation status. - * @retval HAL_SUCCESS operation succeeded. - * @retval HAL_FAILED operation failed. - * - * @notapi - */ -bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp) { - - /* In response format R2 (the 136-bit or "long" response) the CRC7 - field is valid, but the command index field is set to all 1s, so - we need to disable the command index check function (CICEN=0). */ - - SDHC->CMDARG = arg; - uint32_t xfer = - SDHC_XFERTYP_CMDINX(cmd) | - SDHC_XFERTYP_CMDTYP_NORMAL | - /* DPSEL=0, CICEN=0, CCCEN=1 */ - SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_136; - - bool waited = send_and_wait_cmd(sdcp, xfer); - - resp[0] = SDHC->CMDRSP[0]; - resp[1] = SDHC->CMDRSP[1]; - resp[2] = SDHC->CMDRSP[2]; - resp[3] = SDHC->CMDRSP[3]; - - return waited; -} - -/** - * @brief Reads one or more blocks. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] startblk first block to read - * @param[out] buf pointer to the read buffer - * @param[in] n number of blocks to read - * - * @return The operation status. - * @retval HAL_SUCCESS operation succeeded. - * @retval HAL_FAILED operation failed. - * - * @notapi - */ - -bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, - uint8_t *buf, uint32_t n) { - uint32_t cmdx = (n == 1)? - SDHC_XFERTYP_CMDINX(MMCSD_CMD_READ_SINGLE_BLOCK) : - SDHC_XFERTYP_CMDINX(MMCSD_CMD_READ_MULTIPLE_BLOCK); - cmdx |= SDHC_XFERTYP_DTDSEL; - - return sdc_lld_transfer(sdcp, startblk, (uintptr_t)buf, n, cmdx); -} - -/** - * @brief Writes one or more blocks. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * @param[in] startblk first block to write - * @param[out] buf pointer to the write buffer - * @param[in] n number of blocks to write - * - * @return The operation status. - * @retval HAL_SUCCESS operation succeeded. - * @retval HAL_FAILED operation failed. - * - * @notapi - */ -bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, - const uint8_t *buf, uint32_t n) { - uint32_t cmdx = (n == 1)? - SDHC_XFERTYP_CMDINX(MMCSD_CMD_WRITE_BLOCK) : - SDHC_XFERTYP_CMDINX(MMCSD_CMD_WRITE_MULTIPLE_BLOCK); - - return sdc_lld_transfer(sdcp, startblk, (uintptr_t)buf, n, cmdx); -} - -/** - * @brief Waits for card idle condition. - * - * @param[in] sdcp pointer to the @p SDCDriver object - * - * @return The operation status. - * @retval HAL_SUCCESS the operation succeeded. - * @retval HAL_FAILED the operation failed. - * - * @api - */ -bool sdc_lld_sync(SDCDriver *sdcp) { - - (void)sdcp; - - return HAL_SUCCESS; -} - -bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes, - uint8_t cmd, uint32_t argument) { - uintptr_t bufaddr = (uintptr_t)buf; - - osalDbgCheck((bufaddr & 0x03) == 0); /* Must be 32-bit aligned */ - osalDbgCheck(bytes > 0); - osalDbgCheck(bytes < 4096); - - osalDbgAssert((SDHC->PRSSTAT & (SDHC_PRSSTAT_DLA|SDHC_PRSSTAT_CDIHB|SDHC_PRSSTAT_CIHB)) == 0, - "SDHC interface not ready"); - - TRACE(5, argument); - - /* Store the cmd argument and DMA start address */ - SDHC->CMDARG = argument; - SDHC->DSADDR = bufaddr; - - /* We're reading one block, of a (possibly) nonstandard size */ - SDHC->BLKATTR = SDHC_BLKATTR_BLKSIZE(bytes); - - uint32_t xfer = - SDHC_XFERTYP_CMDINX(cmd) | /* the command */ - SDHC_XFERTYP_DTDSEL | /* read transfer (card -> host) */ - SDHC_XFERTYP_CMDTYP_NORMAL | - SDHC_XFERTYP_CICEN | SDHC_XFERTYP_CCCEN | - SDHC_XFERTYP_RSPTYP_48 | - SDHC_XFERTYP_DPSEL | SDHC_XFERTYP_DMAEN; /* DMA-assisted data transfer */ - - return send_and_wait_transfer(sdcp, xfer); -} - -bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - - return ( SDHC->PRSSTAT & SDHC_PRSSTAT_CLSL )? true : false; -} - -bool sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - return false; -} - -#endif /* HAL_USE_SDC == TRUE */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.h b/os/hal/ports/KINETIS/LLD/hal_sdc_lld.h deleted file mode 100644 index 9f77bf6..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.h +++ /dev/null @@ -1,202 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio - Copyright (C) 2017 Wim Lewis - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file hal_sdc_lld.h - * @brief PLATFORM SDC subsystem low level driver header. - * - * @addtogroup SDC - * @{ - */ - -#ifndef HAL_SDC_LLD_H -#define HAL_SDC_LLD_H - -#if (HAL_USE_SDC == TRUE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#define SDHC_XFERTYP_CMDTYP_NORMAL SDHC_XFERTYP_CMDTYP(0) -#define SDHC_XFERTYP_CMDTYP_SUSPEND SDHC_XFERTYP_CMDTYP(1) -#define SDHC_XFERTYP_CMDTYP_RESUME SDHC_XFERTYP_CMDTYP(2) -#define SDHC_XFERTYP_CMDTYP_ABORT SDHC_XFERTYP_CMDTYP(3) - -#define SDHC_XFERTYP_RSPTYP_NONE SDHC_XFERTYP_RSPTYP(0) /* no response */ -#define SDHC_XFERTYP_RSPTYP_136 SDHC_XFERTYP_RSPTYP(1) /* 136-bit response */ -#define SDHC_XFERTYP_RSPTYP_48 SDHC_XFERTYP_RSPTYP(2) /* 48-bit response */ -#define SDHC_XFERTYP_RSPTYP_48b SDHC_XFERTYP_RSPTYP(3) /* 48-bit plus busy */ - -#define SDHC_PROCTL_DTW_1BIT SDHC_PROCTL_DTW(0) -#define SDHC_PROCTL_DTW_4BIT SDHC_PROCTL_DTW(1) -#define SDHC_PROCTL_DTW_8BIT SDHC_PROCTL_DTW(2) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name PLATFORM configuration options - * @{ - */ -/** - * @brief SDC1 driver enable switch. - * @details If set to @p TRUE the support for SDC1 is included. - * @note The default is @p TRUE if HAL_USE_SDC is set. - */ -#if !defined(PLATFORM_SDC_USE_SDC1) || defined(__DOXYGEN__) -#define PLATFORM_SDC_USE_SDC1 TRUE -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of card flags. - */ -typedef uint32_t sdcmode_t; - -/** - * @brief SDC Driver condition flags type. - */ -typedef uint32_t sdcflags_t; - -/** - * @brief Type of a structure representing an SDC driver. - */ -typedef struct SDCDriver SDCDriver; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Working area for memory consuming operations. - * @note It is mandatory for detecting MMC cards bigger than 2GB else it - * can be @p NULL. - * @note Memory pointed by this buffer is only used by @p sdcConnect(), - * afterward it can be reused for other purposes. - */ - uint8_t *scratchpad; - /** - * @brief Bus width. - */ - sdcbusmode_t bus_width; - /* End of the mandatory fields.*/ -} SDCConfig; - -/** - * @brief @p SDCDriver specific methods. - */ -#define _sdc_driver_methods \ - _mmcsd_block_device_methods - -/** - * @extends MMCSDBlockDeviceVMT - * - * @brief @p SDCDriver virtual methods table. - */ -struct SDCDriverVMT { - _sdc_driver_methods -}; - -/** - * @brief Structure representing an SDC driver. - */ -struct SDCDriver { - /** - * @brief Virtual Methods Table. - */ - const struct SDCDriverVMT *vmt; - _mmcsd_block_device_data - /** - * @brief Current configuration data. - */ - const SDCConfig *config; - /** - * @brief Various flags regarding the mounted card. - */ - sdcmode_t cardmode; - /** - * @brief Errors flags. - */ - sdcflags_t errors; - /** - * @brief Card RCA. - */ - uint32_t rca; - /* End of the mandatory fields.*/ - - /* Platform specific fields */ - thread_reference_t thread; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if (PLATFORM_SDC_USE_SDC1 == TRUE) && !defined(__DOXYGEN__) -extern SDCDriver SDCD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void sdc_lld_init(void); - void sdc_lld_start(SDCDriver *sdcp); - void sdc_lld_stop(SDCDriver *sdcp); - void sdc_lld_start_clk(SDCDriver *sdcp); - void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk); - void sdc_lld_stop_clk(SDCDriver *sdcp); - void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode); - void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg); - bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp); - bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp); - bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, - uint32_t *resp); - bool sdc_lld_read_special(SDCDriver *sdcp, uint8_t *buf, size_t bytes, - uint8_t cmd, uint32_t argument); - bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, - uint8_t *buf, uint32_t n); - bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, - const uint8_t *buf, uint32_t n); - bool sdc_lld_sync(SDCDriver *sdcp); - bool sdc_lld_is_card_inserted(SDCDriver *sdcp); - bool sdc_lld_is_write_protected(SDCDriver *sdcp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SDC == TRUE */ - -#endif /* HAL_SDC_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_serial_lld.c b/os/hal/ports/KINETIS/LLD/hal_serial_lld.c deleted file mode 100644 index a1b6632..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_serial_lld.c +++ /dev/null @@ -1,692 +0,0 @@ -/* - ChibiOS - Copyright (C) 2013-2015 Fabio Utzig - Copyright (C) 2017 Wim Lewis - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KL2x/serial_lld.c - * @brief Kinetis KL2x Serial Driver subsystem low level driver source. - * - * @addtogroup SERIAL - * @{ - */ - -#include "osal.h" -#include "hal.h" - -#if HAL_USE_SERIAL || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief SD1 driver identifier. - */ -#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) -SerialDriver SD1; -#endif - -#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) -SerialDriver SD2; -#endif - -#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) -SerialDriver SD3; -#endif - -#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) -SerialDriver SD4; -#endif - -#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) -SerialDriver SD5; -#endif - -#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) -SerialDriver SD6; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief Driver default configuration. - */ -static const SerialConfig default_config = { - 38400 -}; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ -/** - * @brief Error handling routine. - * - * @param[in] sdp pointer to a @p SerialDriver object - * @param[in] isr UART s1 register value - */ -static void set_error(SerialDriver *sdp, uint8_t s1) { - eventflags_t sts = 0; - - if (s1 & UARTx_S1_OR) - sts |= SD_OVERRUN_ERROR; - if (s1 & UARTx_S1_PF) - sts |= SD_PARITY_ERROR; - if (s1 & UARTx_S1_FE) - sts |= SD_FRAMING_ERROR; - if (s1 & UARTx_S1_NF) - sts |= SD_NOISE_ERROR; - osalSysLockFromISR(); - chnAddFlagsI(sdp, sts); - osalSysUnlockFromISR(); -} - -/** - * @brief Common error IRQ handler. - * - * @param[in] sdp communication channel associated to the UART - */ -static void serve_error_interrupt(SerialDriver *sdp) { - UART_w_TypeDef *u = &(sdp->uart); - uint8_t s1 = *(u->s1_p); - - /* Clearing on K20x, K60x, and KL2x/UART>0 is done by reading S1 and - * then reading D.*/ - - if(s1 & UARTx_S1_IDLE) { - (void)*(u->d_p); - } - - if(s1 & (UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF)) { - set_error(sdp, s1); - (void)*(u->d_p); - } -} - -#if defined(KL2x) && KINETIS_SERIAL_USE_UART0 -static void serve_error_interrupt_uart0(void) { - SerialDriver *sdp = &SD1; - UART_w_TypeDef *u = &(sdp->uart); - uint8_t s1 = *(u->s1_p); - - /* S1 bits are write-1-to-clear for UART0 on KL2x. */ - - if(s1 & UARTx_S1_IDLE) { - *(u->s1_p) |= UARTx_S1_IDLE; - } - - if(s1 & (UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF)) { - set_error(sdp, s1); - *(u->s1_p) |= UARTx_S1_OR | UARTx_S1_NF | UARTx_S1_FE | UARTx_S1_PF; - } -} -#endif /* KL2x && KINETIS_SERIAL_USE_UART0 */ - -/** - * @brief Common IRQ handler. - * @note Tries hard to clear all the pending interrupt sources, we don't - * want to go through the whole ISR and have another interrupt soon - * after. - * - * @param[in] sdp communication channel associated to the UART - */ -static void serve_interrupt(SerialDriver *sdp) { - UART_w_TypeDef *u = &(sdp->uart); - uint8_t s1 = *(u->s1_p); - - if (s1 & UARTx_S1_RDRF) { - osalSysLockFromISR(); - if (iqIsEmptyI(&sdp->iqueue)) - chnAddFlagsI(sdp, CHN_INPUT_AVAILABLE); - if (iqPutI(&sdp->iqueue, *(u->d_p)) < Q_OK) - chnAddFlagsI(sdp, SD_OVERRUN_ERROR); - osalSysUnlockFromISR(); - } - - if (s1 & UARTx_S1_TDRE) { - msg_t b; - - osalSysLockFromISR(); - b = oqGetI(&sdp->oqueue); - osalSysUnlockFromISR(); - - if (b < Q_OK) { - osalSysLockFromISR(); - chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); - osalSysUnlockFromISR(); - *(u->c2_p) &= ~UARTx_C2_TIE; - } else { - *(u->d_p) = b; - } - } - -#if defined(KL2x) && KINETIS_SERIAL_USE_UART0 - if (sdp == &SD1) { - serve_error_interrupt_uart0(); - return; - } -#endif - serve_error_interrupt(sdp); -} - -/** - * @brief Attempts a TX preload - */ -static void preload(SerialDriver *sdp) { - UART_w_TypeDef *u = &(sdp->uart); - - if (*(u->s1_p) & UARTx_S1_TDRE) { - msg_t b = oqGetI(&sdp->oqueue); - if (b < Q_OK) { - chnAddFlagsI(sdp, CHN_OUTPUT_EMPTY); - return; - } - *(u->d_p) = b; - *(u->c2_p) |= UARTx_C2_TIE; - } -} - -/** - * @brief Driver output notification. - */ -static void notify(io_queue_t *qp) -{ - preload(qp->q_link); -} - -/** - * @brief Common driver initialization, except LP. - */ -static void sd_lld_init_driver(SerialDriver *SDn, UART_TypeDef *UARTn) { - /* Driver initialization.*/ - sdObjectInit(SDn, NULL, notify); - SDn->uart.bdh_p = &(UARTn->BDH); - SDn->uart.bdl_p = &(UARTn->BDL); - SDn->uart.c1_p = &(UARTn->C1); - SDn->uart.c2_p = &(UARTn->C2); - SDn->uart.c3_p = &(UARTn->C3); - SDn->uart.c4_p = &(UARTn->C4); - SDn->uart.s1_p = (volatile uint8_t *)&(UARTn->S1); - SDn->uart.s2_p = &(UARTn->S2); - SDn->uart.d_p = &(UARTn->D); - SDn->uart.uart_p = UARTn; -} - -/** - * @brief Common UART configuration. - * - */ -static void configure_uart(SerialDriver *sdp, const SerialConfig *config) { - - UART_w_TypeDef *uart = &(sdp->uart); - uint32_t divisor; - - /* Discard any incoming data. */ - while (*(uart->s1_p) & UARTx_S1_RDRF) { - (void)*(uart->d_p); - } - - /* Disable UART while configuring */ - *(uart->c2_p) &= ~(UARTx_C2_RE | UARTx_C2_TE); - - /* The clock sources for various UARTs can be different. */ - divisor=KINETIS_BUSCLK_FREQUENCY; - -#if defined(KL2x) - -#if KINETIS_SERIAL_USE_UART0 - if (sdp == &SD1) { - /* UART0 can be clocked from several sources on KL2x. */ - divisor = KINETIS_UART0_CLOCK_FREQ; - /* FIXME: change fixed OSR = 16 to dynamic value based on baud */ - /* Note: OSR only works on KL2x/UART0; further UARTs have fixed 16. */ - *(uart->c4_p) = UARTx_C4_OSR(16 - 1); - } -#endif /* KINETIS_SERIAL_USE_UART0 */ - -#elif defined(K20x) || defined(K60x) || defined(MK66F18) /* KL2x */ - - /* UARTs 0 and 1 are clocked from SYSCLK, others from BUSCLK on K20x and K60x. */ -#if KINETIS_SERIAL_USE_UART0 - if(sdp == &SD1) - divisor = KINETIS_SYSCLK_FREQUENCY; -#endif /* KINETIS_SERIAL_USE_UART0 */ -#if KINETIS_SERIAL_USE_UART1 - if(sdp == &SD2) - divisor = KINETIS_SYSCLK_FREQUENCY; -#endif /* KINETIS_SERIAL_USE_UART1 */ - -#else /* K20x */ -#error Baud rate selection not implemented for this MCU type -#endif /* K20x */ - - divisor = (divisor * 2 + 1) / config->sc_speed; - - *(uart->bdh_p) = UARTx_BDH_SBR(divisor >> 13) | (*(uart->bdh_p) & ~UARTx_BDH_SBR_MASK); - *(uart->bdl_p) = UARTx_BDL_SBR(divisor >> 5); -#if defined(K20x) || defined(K60x) - *(uart->c4_p) = UARTx_C4_BRFA(divisor) | (*(uart->c4_p) & ~UARTx_C4_BRFA_MASK); -#endif /* K20x, K60x */ - - /* Line settings. */ - *(uart->c1_p) = 0; - /* Enable error event interrupts (overrun, noise, framing, parity) */ - *(uart->c3_p) = UARTx_C3_ORIE | UARTx_C3_NEIE | UARTx_C3_FEIE | UARTx_C3_PEIE; - /* Enable the peripheral; including receive interrupts. */ - *(uart->c2_p) |= UARTx_C2_RE | UARTx_C2_RIE | UARTx_C2_TE; -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD1); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL1_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD2); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL2_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD3); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL3_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD4); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL4_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD5); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL5_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_interrupt(&SD6); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_HAS_SERIAL_ERROR_IRQ - -#if KINETIS_SERIAL_USE_UART0 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL0_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); -#if defined(KL2x) - serve_error_interrupt_uart0(); -#else - serve_error_interrupt(&SD1); -#endif - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART1 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL1_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_error_interrupt(&SD2); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART2 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL2_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_error_interrupt(&SD3); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART3 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL3_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_error_interrupt(&SD4); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART4 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL4_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_error_interrupt(&SD5); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#if KINETIS_SERIAL_USE_UART5 || defined(__DOXYGEN__) -OSAL_IRQ_HANDLER(KINETIS_SERIAL5_ERROR_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - serve_error_interrupt(&SD6); - OSAL_IRQ_EPILOGUE(); -} -#endif - -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level serial driver initialization. - * - * @notapi - */ -void sd_lld_init(void) { - -#if KINETIS_SERIAL_USE_UART0 - /* Driver initialization.*/ -#if ! KINETIS_SERIAL0_IS_LPUART - sd_lld_init_driver(&SD1, UART0); -#else /* ! KINETIS_SERIAL0_IS_LPUART */ - /* little endian! */ - sdObjectInit(&SD1, NULL, notify); - SD1.uart.bdh_p = ((uint8_t *)&(LPUART0->BAUD)) + 1; /* BDH: BAUD, byte 3 */ - SD1.uart.bdl_p = ((uint8_t *)&(LPUART0->BAUD)) + 0; /* BDL: BAUD, byte 4 */ - SD1.uart.c1_p = ((uint8_t *)&(LPUART0->CTRL)) + 0; /* C1: CTRL, byte 4 */ - SD1.uart.c2_p = ((uint8_t *)&(LPUART0->CTRL)) + 2; /* C2: CTRL, byte 2 */ - SD1.uart.c3_p = ((uint8_t *)&(LPUART0->CTRL)) + 3; /* C3: CTRL, byte 1 */ - SD1.uart.c4_p = ((uint8_t *)&(LPUART0->BAUD)) + 3; /* C4: BAUD, byte 1 */ - SD1.uart.s1_p = ((uint8_t *)&(LPUART0->STAT)) + 2; /* S1: STAT, byte 2 */ - SD1.uart.s2_p = ((uint8_t *)&(LPUART0->STAT)) + 3; /* S2: STAT, byte 1 */ - SD1.uart.d_p = ((uint8_t *)&(LPUART0->DATA)) + 0; /* D: DATA, byte 4 */ -#endif /* ! KINETIS_SERIAL0_IS_LPUART */ -#if KINETIS_SERIAL0_IS_UARTLP - SD1.uart.uartlp_p = UART0; - SD1.uart.uart_p = NULL; -#elif KINETIS_SERIAL0_IS_LPUART - SD1.uart.lpuart_p = LPUART0; - SD1.uart.uart_p = NULL; -#else /* KINETIS_SERIAL0_IS_LPUART */ - SD1.uart.uart_p = UART0; -#endif /* KINETIS_SERIAL0_IS_LPUART */ -#endif /* KINETIS_SERIAL_USE_UART0 */ - -#if KINETIS_SERIAL_USE_UART1 - /* Driver initialization.*/ -#if ! KINETIS_SERIAL1_IS_LPUART - sd_lld_init_driver(&SD2, UART1); -#else /* ! KINETIS_SERIAL1_IS_LPUART */ - /* little endian! */ - sdObjectInit(&SD2, NULL, notify); - SD2.uart.bdh_p = ((uint8_t *)&(LPUART1->BAUD)) + 1; /* BDH: BAUD, byte 3 */ - SD2.uart.bdl_p = ((uint8_t *)&(LPUART1->BAUD)) + 0; /* BDL: BAUD, byte 4 */ - SD2.uart.c1_p = ((uint8_t *)&(LPUART1->CTRL)) + 0; /* C1: CTRL, byte 4 */ - SD2.uart.c2_p = ((uint8_t *)&(LPUART1->CTRL)) + 2; /* C2: CTRL, byte 2 */ - SD2.uart.c3_p = ((uint8_t *)&(LPUART1->CTRL)) + 3; /* C3: CTRL, byte 1 */ - SD2.uart.c4_p = ((uint8_t *)&(LPUART1->BAUD)) + 3; /* C4: BAUD, byte 1 */ - SD2.uart.s1_p = ((uint8_t *)&(LPUART1->STAT)) + 2; /* S1: STAT, byte 2 */ - SD2.uart.s2_p = ((uint8_t *)&(LPUART1->STAT)) + 3; /* S2: STAT, byte 1 */ - SD2.uart.d_p = ((uint8_t *)&(LPUART1->DATA)) + 0; /* D: DATA, byte 4 */ - SD2.uart.lpuart_p = LPUART1; - SD2.uart.uart_p = NULL; -#endif /* ! KINETIS_SERIAL1_IS_LPUART */ -#endif /* KINETIS_SERIAL_USE_UART1 */ - -#if KINETIS_SERIAL_USE_UART2 - sd_lld_init_driver(&SD3, UART2); -#endif /* KINETIS_SERIAL_USE_UART2 */ - -#if KINETIS_SERIAL_USE_UART3 - sd_lld_init_driver(&SD4, UART3); -#endif /* KINETIS_SERIAL_USE_UART3 */ - -#if KINETIS_SERIAL_USE_UART4 - sd_lld_init_driver(&SD5, UART4); -#endif /* KINETIS_SERIAL_USE_UART4 */ - -#if KINETIS_SERIAL_USE_UART5 - sd_lld_init_driver(&SD6, UART5); -#endif /* KINETIS_SERIAL_USE_UART5 */ -} - -/** - * @brief Low level serial driver configuration and (re)start. - * - * @param[in] sdp pointer to a @p SerialDriver object - * @param[in] config the architecture-dependent serial driver configuration. - * If this parameter is set to @p NULL then a default - * configuration is used. - * - * @notapi - */ -void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { - - if (config == NULL) - config = &default_config; - - if (sdp->state == SD_STOP) { - /* Enables the peripheral.*/ - -#if KINETIS_SERIAL_USE_UART0 - if (sdp == &SD1) { -#if KINETIS_SERIAL0_IS_LPUART - SIM->SCGC5 |= SIM_SCGC5_LPUART0; - SIM->SOPT2 = - (SIM->SOPT2 & ~SIM_SOPT2_LPUART0SRC_MASK) | - SIM_SOPT2_LPUART0SRC(KINETIS_UART0_CLOCK_SRC); -#else /* KINETIS_SERIAL0_IS_LPUART */ - SIM->SCGC4 |= SIM_SCGC4_UART0; -#endif /* KINETIS_SERIAL0_IS_LPUART */ -#if KINETIS_SERIAL0_IS_UARTLP - SIM->SOPT2 = - (SIM->SOPT2 & ~SIM_SOPT2_UART0SRC_MASK) | - SIM_SOPT2_UART0SRC(KINETIS_UART0_CLOCK_SRC); -#endif /* KINETIS_SERIAL0_IS_UARTLP */ - configure_uart(sdp, config); -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicEnableVector(UART0Status_IRQn, KINETIS_SERIAL_UART0_PRIORITY); - nvicEnableVector(UART0Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL0_IS_LPUART - nvicEnableVector(LPUART0_IRQn, KINETIS_SERIAL_UART0_PRIORITY); -#else /* KINETIS_SERIAL0_IS_LPUART */ - nvicEnableVector(UART0_IRQn, KINETIS_SERIAL_UART0_PRIORITY); -#endif /* KINETIS_SERIAL0_IS_LPUART */ -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - } -#endif /* KINETIS_SERIAL_USE_UART0 */ - -#if KINETIS_SERIAL_USE_UART1 - if (sdp == &SD2) { -#if KINETIS_SERIAL1_IS_LPUART - SIM->SCGC5 |= SIM_SCGC5_LPUART1; - SIM->SOPT2 = - (SIM->SOPT2 & ~SIM_SOPT2_LPUART1SRC_MASK) | - SIM_SOPT2_LPUART1SRC(KINETIS_UART1_CLOCK_SRC); -#else /* KINETIS_SERIAL1_IS_LPUART */ - SIM->SCGC4 |= SIM_SCGC4_UART1; -#endif /* KINETIS_SERIAL1_IS_LPUART */ - configure_uart(sdp, config); -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicEnableVector(UART1Status_IRQn, KINETIS_SERIAL_UART1_PRIORITY); - nvicEnableVector(UART1Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL1_IS_LPUART - nvicEnableVector(LPUART1_IRQn, KINETIS_SERIAL_UART1_PRIORITY); -#else /* KINETIS_SERIAL1_IS_LPUART */ - nvicEnableVector(UART1_IRQn, KINETIS_SERIAL_UART1_PRIORITY); -#endif /* KINETIS_SERIAL1_IS_LPUART */ -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - } -#endif /* KINETIS_SERIAL_USE_UART1 */ - -#if KINETIS_SERIAL_USE_UART2 - if (sdp == &SD3) { - SIM->SCGC4 |= SIM_SCGC4_UART2; - configure_uart(sdp, config); -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicEnableVector(UART2Status_IRQn, KINETIS_SERIAL_UART2_PRIORITY); - nvicEnableVector(UART2Error_IRQn, KINETIS_SERIAL_UART0_PRIORITY); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - nvicEnableVector(UART2_IRQn, KINETIS_SERIAL_UART2_PRIORITY); -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - } -#endif /* KINETIS_SERIAL_USE_UART2 */ - -#if KINETIS_SERIAL_USE_UART3 - if (sdp == &SD4) { - SIM->SCGC4 |= SIM_SCGC4_UART3; - configure_uart(sdp, config); - nvicEnableVector(UART3Status_IRQn, KINETIS_SERIAL_UART3_PRIORITY); - nvicEnableVector(UART3Error_IRQn, KINETIS_SERIAL_UART3_PRIORITY); - } -#endif /* KINETIS_SERIAL_USE_UART3 */ - -#if KINETIS_SERIAL_USE_UART4 - if (sdp == &SD5) { - SIM->SCGC1 |= SIM_SCGC1_UART4; - configure_uart(sdp, config); - nvicEnableVector(UART4Status_IRQn, KINETIS_SERIAL_UART4_PRIORITY); - nvicEnableVector(UART4Error_IRQn, KINETIS_SERIAL_UART4_PRIORITY); - } -#endif /* KINETIS_SERIAL_USE_UART4 */ - -#if KINETIS_SERIAL_USE_UART5 - if (sdp == &SD6) { - SIM->SCGC1 |= SIM_SCGC1_UART5; - configure_uart(sdp, config); - nvicEnableVector(UART5Status_IRQn, KINETIS_SERIAL_UART5_PRIORITY); - nvicEnableVector(UART5Error_IRQn, KINETIS_SERIAL_UART5_PRIORITY); - } -#endif /* KINETIS_SERIAL_USE_UART5 */ - - } - /* Configures the peripheral.*/ - -} - -/** - * @brief Low level serial driver stop. - * @details De-initializes the USART, stops the associated clock, resets the - * interrupt vector. - * - * @param[in] sdp pointer to a @p SerialDriver object - * - * @notapi - */ -void sd_lld_stop(SerialDriver *sdp) { - - if (sdp->state == SD_READY) { - /* TODO: Resets the peripheral.*/ - -#if KINETIS_SERIAL_USE_UART0 - if (sdp == &SD1) { -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicDisableVector(UART0Status_IRQn); - nvicDisableVector(UART0Error_IRQn); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL0_IS_LPUART - nvicDisableVector(LPUART0_IRQn); -#else /* KINETIS_SERIAL0_IS_LPUART */ - nvicDisableVector(UART0_IRQn); -#endif /* KINETIS_SERIAL0_IS_LPUART */ -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL0_IS_LPUART - SIM->SCGC5 &= ~SIM_SCGC5_LPUART0; -#else /* KINETIS_SERIAL0_IS_LPUART */ - SIM->SCGC4 &= ~SIM_SCGC4_UART0; -#endif /* KINETIS_SERIAL0_IS_LPUART */ - } -#endif - -#if KINETIS_SERIAL_USE_UART1 - if (sdp == &SD2) { -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicDisableVector(UART1Status_IRQn); - nvicDisableVector(UART1Error_IRQn); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL1_IS_LPUART - nvicDisableVector(LPUART1_IRQn); -#else /* KINETIS_SERIAL1_IS_LPUART */ - nvicDisableVector(UART1_IRQn); -#endif /* KINETIS_SERIAL1_IS_LPUART */ -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ -#if KINETIS_SERIAL1_IS_LPUART - SIM->SCGC5 &= ~SIM_SCGC5_LPUART1; -#else /* KINETIS_SERIAL1_IS_LPUART */ - SIM->SCGC4 &= ~SIM_SCGC4_UART1; -#endif /* KINETIS_SERIAL1_IS_LPUART */ - } -#endif - -#if KINETIS_SERIAL_USE_UART2 - if (sdp == &SD3) { -#if KINETIS_HAS_SERIAL_ERROR_IRQ - nvicDisableVector(UART2Status_IRQn); - nvicDisableVector(UART2Error_IRQn); -#else /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - nvicDisableVector(UART2_IRQn); -#endif /* KINETIS_HAS_SERIAL_ERROR_IRQ */ - SIM->SCGC4 &= ~SIM_SCGC4_UART2; - } -#endif - -#if KINETIS_SERIAL_USE_UART3 - if (sdp == &SD4) { - nvicDisableVector(UART3Status_IRQn); - nvicDisableVector(UART3Error_IRQn); - SIM->SCGC4 &= ~SIM_SCGC4_UART3; - } -#endif - -#if KINETIS_SERIAL_USE_UART4 - if (sdp == &SD5) { - nvicDisableVector(UART4Status_IRQn); - nvicDisableVector(UART4Error_IRQn); - SIM->SCGC1 &= ~SIM_SCGC1_UART4; - } -#endif - -#if KINETIS_SERIAL_USE_UART5 - if (sdp == &SD6) { - nvicDisableVector(UART5Status_IRQn); - nvicDisableVector(UART5Error_IRQn); - SIM->SCGC1 &= ~SIM_SCGC1_UART5; - } -#endif - } -} - -#endif /* HAL_USE_SERIAL */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_serial_lld.h b/os/hal/ports/KINETIS/LLD/hal_serial_lld.h deleted file mode 100644 index 3cb6d2b..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_serial_lld.h +++ /dev/null @@ -1,287 +0,0 @@ -/* - ChibiOS - Copyright (C) 2013-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KL2x/serial_lld.h - * @brief Kinetis KL2x Serial Driver subsystem low level driver header. - * - * @addtogroup SERIAL - * @{ - */ - -#ifndef HAL_SERIAL_LLD_H_ -#define HAL_SERIAL_LLD_H_ - -#if HAL_USE_SERIAL || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief SD1 driver enable switch. - * @details If set to @p TRUE the support for SD1 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART0) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART0 FALSE -#endif -/** - * @brief SD2 driver enable switch. - * @details If set to @p TRUE the support for SD2 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART1) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART1 FALSE -#endif -/** - * @brief SD3 driver enable switch. - * @details If set to @p TRUE the support for SD3 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART2) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART2 FALSE -#endif -/** - * @brief SD4 driver enable switch. - * @details If set to @p TRUE the support for SD4 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART3) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART3 FALSE -#endif -/** - * @brief SD5 driver enable switch. - * @details If set to @p TRUE the support for SD5 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART4) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART4 FALSE -#endif -/** - * @brief SD6 driver enable switch. - * @details If set to @p TRUE the support for SD6 is included. - */ -#if !defined(KINETIS_SERIAL_USE_UART5) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_USE_UART5 FALSE -#endif - -/** - * @brief UART0 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART0_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART0_PRIORITY 12 -#endif - -/** - * @brief UART1 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART1_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART1_PRIORITY 12 -#endif - -/** - * @brief UART2 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART2_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART2_PRIORITY 12 -#endif - -/** - * @brief UART3 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART3_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART3_PRIORITY 12 -#endif - -/** - * @brief UART4 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART4_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART4_PRIORITY 12 -#endif - -/** - * @brief UART5 interrupt priority level setting. - */ -#if !defined(KINETIS_SERIAL_UART5_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SERIAL_UART5_PRIORITY 12 -#endif - -/** - * @brief UART0 clock source. - */ -#if !defined(KINETIS_UART0_CLOCK_SRC) || defined(__DOXYGEN__) -#define KINETIS_UART0_CLOCK_SRC 1 /* MCGFLLCLK clock, or MCGPLLCLK/2; or IRC48M */ -#endif - -/** - * @brief UART1 clock source. - */ -#if !defined(KINETIS_UART1_CLOCK_SRC) || defined(__DOXYGEN__) -#define KINETIS_UART1_CLOCK_SRC 1 /* IRC48M */ -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/** @brief error checks */ -#if KINETIS_SERIAL_USE_UART0 && !KINETIS_HAS_SERIAL0 -#error "UART0 not present in the selected device" -#endif - -#if KINETIS_SERIAL_USE_UART1 && !KINETIS_HAS_SERIAL1 -#error "UART1 not present in the selected device" -#endif - -#if KINETIS_SERIAL_USE_UART2 && !KINETIS_HAS_SERIAL2 -#error "UART2 not present in the selected device" -#endif - -#if KINETIS_SERIAL_USE_UART3 && !KINETIS_HAS_SERIAL3 -#error "UART3 not present in the selected device" -#endif - -#if KINETIS_SERIAL_USE_UART4 && !KINETIS_HAS_SERIAL4 -#error "UART4 not present in the selected device" -#endif - -#if KINETIS_SERIAL_USE_UART5 && !KINETIS_HAS_SERIAL5 -#error "UART5 not present in the selected device" -#endif - -#if !(KINETIS_SERIAL_USE_UART0 || KINETIS_SERIAL_USE_UART1 || \ - KINETIS_SERIAL_USE_UART2 || KINETIS_SERIAL_USE_UART3 || \ - KINETIS_SERIAL_USE_UART4 || KINETIS_SERIAL_USE_UART5) -#error "Serial driver activated but no UART peripheral assigned" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Generic Serial Driver configuration structure. - * @details An instance of this structure must be passed to @p sdStart() - * in order to configure and start a serial driver operations. - * @note Implementations may extend this structure to contain more, - * architecture dependent, fields. - */ -typedef struct { - /** - * @brief Bit rate. - */ - uint32_t sc_speed; - /* End of the mandatory fields.*/ -} SerialConfig; - -/** - * @brief Generic UART register structure. - * @note Individual UART register blocks (even within the same chip) can differ. - */ - -typedef struct { - volatile uint8_t* bdh_p; - volatile uint8_t* bdl_p; - volatile uint8_t* c1_p; - volatile uint8_t* c2_p; - volatile uint8_t* c3_p; - volatile uint8_t* c4_p; - volatile uint8_t* s1_p; - volatile uint8_t* s2_p; - volatile uint8_t* d_p; - UART_TypeDef *uart_p; -#if KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_UARTLP - UARTLP_TypeDef *uartlp_p; -#endif /* KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_UARTLP */ -#if (KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_LPUART) \ - || (KINETIS_SERIAL_USE_UART1 && KINETIS_SERIAL1_IS_LPUART) - LPUART_TypeDef *lpuart_p; -#endif /* KINETIS_SERIAL_USE_UART0 && KINETIS_SERIAL0_IS_LPUART */ -} UART_w_TypeDef; - -/** - * @brief @p SerialDriver specific data. - */ -#define _serial_driver_data \ - _base_asynchronous_channel_data \ - /* Driver state.*/ \ - sdstate_t state; \ - /* Input queue.*/ \ - input_queue_t iqueue; \ - /* Output queue.*/ \ - output_queue_t oqueue; \ - /* Input circular buffer.*/ \ - uint8_t ib[SERIAL_BUFFERS_SIZE]; \ - /* Output circular buffer.*/ \ - uint8_t ob[SERIAL_BUFFERS_SIZE]; \ - /* End of the mandatory fields.*/ \ - /* Pointer to the UART registers block.*/ \ - UART_w_TypeDef uart; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_SERIAL_USE_UART0 && !defined(__DOXYGEN__) -extern SerialDriver SD1; -#endif - -#if KINETIS_SERIAL_USE_UART1 && !defined(__DOXYGEN__) -extern SerialDriver SD2; -#endif - -#if KINETIS_SERIAL_USE_UART2 && !defined(__DOXYGEN__) -extern SerialDriver SD3; -#endif - -#if KINETIS_SERIAL_USE_UART3 && !defined(__DOXYGEN__) -extern SerialDriver SD4; -#endif - -#if KINETIS_SERIAL_USE_UART4 && !defined(__DOXYGEN__) -extern SerialDriver SD5; -#endif - -#if KINETIS_SERIAL_USE_UART5 && !defined(__DOXYGEN__) -extern SerialDriver SD6; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void sd_lld_init(void); - void sd_lld_start(SerialDriver *sdp, const SerialConfig *config); - void sd_lld_stop(SerialDriver *sdp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SERIAL */ - -#endif /* HAL_SERIAL_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_st_lld.c b/os/hal/ports/KINETIS/LLD/hal_st_lld.c deleted file mode 100644 index e6ed9e5..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_st_lld.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/st_lld.c - * @brief ST Driver subsystem low level driver code. - * - * @addtogroup ST - * @{ - */ - -#include "hal.h" - -#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) -/** - * @brief System Timer vector. - * @details This interrupt is used for system tick in periodic mode. - * - * @isr - */ -OSAL_IRQ_HANDLER(SysTick_Handler) { - - OSAL_IRQ_PROLOGUE(); - - osalSysLockFromISR(); - osalOsTimerHandlerI(); - osalSysUnlockFromISR(); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level ST driver initialization. - * - * @notapi - */ -void st_lld_init(void) { -#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC - /* Periodic systick mode, the Cortex-Mx internal systick timer is used - in this mode.*/ - SysTick->LOAD = (KINETIS_SYSCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; - SysTick->VAL = 0; - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_ENABLE_Msk | - SysTick_CTRL_TICKINT_Msk; - - /* IRQ enabled.*/ - nvicSetSystemHandlerPriority(HANDLER_SYSTICK, KINETIS_ST_IRQ_PRIORITY); -#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */ -} - -#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_st_lld.h b/os/hal/ports/KINETIS/LLD/hal_st_lld.h deleted file mode 100644 index 29c7035..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_st_lld.h +++ /dev/null @@ -1,156 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/st_lld.h - * @brief ST Driver subsystem low level driver header. - * @details This header is designed to be include-able without having to - * include other files from the HAL. - * - * @addtogroup ST - * @{ - */ - -#ifndef HAL_ST_LLD_H_ -#define HAL_ST_LLD_H_ - -#include "mcuconf.h" - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief SysTick timer IRQ priority. - */ -#if !defined(KINETIS_ST_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_ST_IRQ_PRIORITY 8 -#endif - -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#ifdef __cplusplus -extern "C" { -#endif - void st_lld_init(void); -#ifdef __cplusplus -} -#endif - -/*===========================================================================*/ -/* Driver inline functions. */ -/*===========================================================================*/ - -/** - * @brief Returns the time counter value. - * - * @return The counter value. - * - * @notapi - */ -static inline systime_t st_lld_get_counter(void) { - - return (systime_t)0; -} - -/** - * @brief Starts the alarm. - * @note Makes sure that no spurious alarms are triggered after - * this call. - * - * @param[in] time the time to be set for the first alarm - * - * @notapi - */ -static inline void st_lld_start_alarm(systime_t time) { - - (void)time; -} - -/** - * @brief Stops the alarm interrupt. - * - * @notapi - */ -static inline void st_lld_stop_alarm(void) { - -} - -/** - * @brief Sets the alarm time. - * - * @param[in] time the time to be set for the next alarm - * - * @notapi - */ -static inline void st_lld_set_alarm(systime_t time) { - - (void)time; -} - -/** - * @brief Returns the current alarm time. - * - * @return The currently set alarm time. - * - * @notapi - */ -static inline systime_t st_lld_get_alarm(void) { - - return (systime_t)0; -} - -/** - * @brief Determines if the alarm is active. - * - * @return The alarm status. - * @retval false if the alarm is not active. - * @retval true is the alarm is active - * - * @notapi - */ -static inline bool st_lld_is_alarm_active(void) { - - return false; -} - -#endif /* HAL_ST_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_usb_lld.c b/os/hal/ports/KINETIS/LLD/hal_usb_lld.c deleted file mode 100644 index a01b92e..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_usb_lld.c +++ /dev/null @@ -1,873 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde/ - (C) 2015-2016 flabbergast - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/usb_lld.c - * @brief KINETIS USB subsystem low level driver source. - * - * @addtogroup USB - * @{ - */ - -#include - -#include "hal.h" - -#if HAL_USE_USB || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief USB0 driver identifier.*/ -#if KINETIS_USB_USE_USB0 || defined(__DOXYGEN__) -USBDriver USBD1; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/** - * @brief IN EP0 state. - */ -USBInEndpointState ep0in; - -/** - * @brief OUT EP0 state. - */ -USBOutEndpointState ep0out; - -/** - * @brief Buffer for the EP0 setup packets. - */ -static uint8_t ep0setup_buffer[8]; - -/** - * @brief EP0 initialization structure. - */ -static const USBEndpointConfig ep0config = { - USB_EP_MODE_TYPE_CTRL, - _usb_ep0setup, - _usb_ep0in, - _usb_ep0out, - 64, - 64, - &ep0in, - &ep0out, - 1, - ep0setup_buffer -}; - -/* - * Buffer Descriptor Table (BDT) - */ - -/* - * Buffer Descriptor (BD) - * */ -typedef struct { - uint32_t desc; - uint8_t* addr; -} bd_t; - -/* - * Buffer Descriptor fields - p.889 - */ -#define BDT_OWN 0x80 -#define BDT_DATA 0x40 -#define BDT_KEEP 0x20 -#define BDT_NINC 0x10 -#define BDT_DTS 0x08 -#define BDT_STALL 0x04 - -#define BDT_DESC(bc, data) (BDT_OWN | BDT_DTS | ((data&0x1)<<6) | ((bc) << 16)) - -/* - * BDT PID - p.891 - */ -#define BDT_PID_OUT 0x01 -#define BDT_PID_IN 0x09 -#define BDT_PID_SETUP 0x0D -#define BDT_TOK_PID(n) (((n)>>2)&0xF) - -/* - * BDT index fields - */ -#define DATA0 0 -#define DATA1 1 - -#define RX 0 -#define TX 1 - -#define EVEN 0 -#define ODD 1 - -#define BDT_INDEX(endpoint, tx, odd) (((endpoint)<<2) | ((tx)<<1) | (odd)) -/* - * Get RX-ed/TX-ed bytes count from BDT entry - */ -#define BDT_BC(n) (((n)>>16)&0x3FF) - -/* The USB-FS needs 2 BDT entry per endpoint direction - * that adds to: 2*2*16 BDT entries for 16 bi-directional EP - */ -static volatile bd_t _bdt[(KINETIS_USB_ENDPOINTS)*2*2] __attribute__((aligned(512))); - -/* FIXME later with dyn alloc - * 16 EP - * 2 directions per EP - * 2 buffer per direction - * => 64 buffers - */ -static uint8_t _usbb[KINETIS_USB_ENDPOINTS*4][64] __attribute__((aligned(4))); -static volatile uint8_t _usbbn=0; -uint8_t* usb_alloc(uint8_t size) -{ - (void)size; - if(_usbbn < (KINETIS_USB_ENDPOINTS)*4) - return _usbb[_usbbn++]; - while(1); /* Should not happen, ever */ -} -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/* Called from locked ISR. */ -void usb_packet_transmit(USBDriver *usbp, usbep_t ep, size_t n) -{ - const USBEndpointConfig *epc = usbp->epc[ep]; - USBInEndpointState *isp = epc->in_state; - - bd_t *bd = (bd_t *)&_bdt[BDT_INDEX(ep, TX, isp->odd_even)]; - - if (n > (size_t)epc->in_maxsize) - n = (size_t)epc->in_maxsize; - - /* Copy from buf to _usbb[] */ - size_t i=0; - for(i=0;iaddr[i] = isp->txbuf[i]; - - /* Update the Buffer status */ - bd->desc = BDT_DESC(n, isp->data_bank); - /* Toggle the odd and data bits for next TX */ - isp->data_bank ^= DATA1; - isp->odd_even ^= ODD; -} - -/* Called from locked ISR. */ -void usb_packet_receive(USBDriver *usbp, usbep_t ep, size_t n) -{ - const USBEndpointConfig *epc = usbp->epc[ep]; - USBOutEndpointState *osp = epc->out_state; - - bd_t *bd = (bd_t *)&_bdt[BDT_INDEX(ep, RX, osp->odd_even)]; - - if (n > (size_t)epc->out_maxsize) - n = (size_t)epc->out_maxsize; - - /* Copy from _usbb[] to buf */ - size_t i=0; - for(i=0;irxbuf[i] = bd->addr[i]; - - /* Update the Buffer status - * Set current buffer to same DATA bank and then toggle. - * Since even/odd buffers are ping-pong and setup re-initialized them - * this should work correctly */ - bd->desc = BDT_DESC(epc->out_maxsize, osp->data_bank); - osp->data_bank ^= DATA1; - usb_lld_start_out(usbp, ep); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*============================================================================*/ - -#if KINETIS_USB_USE_USB0 || defined(__DOXYGEN__) -/** - * @brief USB interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_USB_IRQ_VECTOR) { - USBDriver *usbp = &USBD1; - uint8_t istat = USB0->ISTAT; - - OSAL_IRQ_PROLOGUE(); - - /* 04 - Bit2 - Start Of Frame token received */ - if(istat & USBx_ISTAT_SOFTOK) { - _usb_isr_invoke_sof_cb(usbp); - USB0->ISTAT = USBx_ISTAT_SOFTOK; - } - - /* 08 - Bit3 - Token processing completed */ - while(istat & USBx_ISTAT_TOKDNE) { - uint8_t stat = USB0->STAT; - uint8_t ep = stat >> 4; - if(ep > KINETIS_USB_ENDPOINTS) { - OSAL_IRQ_EPILOGUE(); - return; - } - const USBEndpointConfig *epc = usbp->epc[ep]; - - /* Get the correct BDT entry */ - uint8_t odd_even = (stat & USBx_STAT_ODD_MASK) >> USBx_STAT_ODD_SHIFT; - uint8_t tx_rx = (stat & USBx_STAT_TX_MASK) >> USBx_STAT_TX_SHIFT; - bd_t *bd = (bd_t*)&_bdt[BDT_INDEX(ep,tx_rx,odd_even)]; - - /* Update the ODD/EVEN state for RX */ - if(tx_rx == RX && epc->out_state != NULL) - epc->out_state->odd_even = odd_even; - - switch(BDT_TOK_PID(bd->desc)) - { - case BDT_PID_SETUP: // SETUP - { - /* Clear receiving in the chibios state machine */ - (usbp)->receiving &= ~1; - /* Call SETUP function (ChibiOS core), which prepares - * for send or receive and releases the buffer - */ - _usb_isr_invoke_setup_cb(usbp, ep); - /* When a setup packet is received, tx is suspended, - * so it needs to be resumed here. - */ - USB0->CTL &= ~USBx_CTL_TXSUSPENDTOKENBUSY; - } break; - case BDT_PID_IN: // IN - { - if(epc->in_state == NULL) - break; - /* Special case for SetAddress for EP0 */ - if(ep == 0 && (((uint16_t)usbp->setup[0]<<8)|usbp->setup[1]) == 0x0500) - { - usbp->address = usbp->setup[2]; - usb_lld_set_address(usbp); - _usb_isr_invoke_event_cb(usbp, USB_EVENT_ADDRESS); - usbp->state = USB_SELECTED; - } - uint16_t txed = BDT_BC(bd->desc); - epc->in_state->txcnt += txed; - if(epc->in_state->txcnt < epc->in_state->txsize) - { - epc->in_state->txbuf += txed; - osalSysLockFromISR(); - usb_packet_transmit(usbp,ep,epc->in_state->txsize - epc->in_state->txcnt); - osalSysUnlockFromISR(); - } - else - { - if(epc->in_cb != NULL) - _usb_isr_invoke_in_cb(usbp,ep); - } - } break; - case BDT_PID_OUT: // OUT - { - if(epc->out_state == NULL) - break; - uint16_t rxed = BDT_BC(bd->desc); - - osalSysLockFromISR(); - usb_packet_receive(usbp,ep,rxed); - osalSysUnlockFromISR(); - if(rxed) - { - epc->out_state->rxbuf += rxed; - - /* Update transaction data */ - epc->out_state->rxcnt += rxed; - epc->out_state->rxsize -= rxed; - epc->out_state->rxpkts -= 1; - - /* The transaction is completed if the specified number of packets - has been received or the current packet is a short packet.*/ - if ((rxed < epc->out_maxsize) || (epc->out_state->rxpkts == 0)) - { - if(epc->out_cb != NULL) - _usb_isr_invoke_out_cb(usbp, ep); - } - } - } break; - default: - break; - } - USB0->ISTAT = USBx_ISTAT_TOKDNE; - istat = USB0->ISTAT; - } - - /* 01 - Bit0 - Valid USB Reset received */ - if(istat & USBx_ISTAT_USBRST) { - _usb_reset(usbp); - USB0->ISTAT = USBx_ISTAT_USBRST; - OSAL_IRQ_EPILOGUE(); - return; - } - - /* 80 - Bit7 - STALL handshake received */ - if(istat & USBx_ISTAT_STALL) { - USB0->ISTAT = USBx_ISTAT_STALL; - } - - /* 02 - Bit1 - ERRSTAT condition triggered */ - if(istat & USBx_ISTAT_ERROR) { - uint8_t err = USB0->ERRSTAT; - USB0->ERRSTAT = err; - USB0->ISTAT = USBx_ISTAT_ERROR; - } - - /* 10 - Bit4 - Constant IDLE on USB bus detected */ - if(istat & USBx_ISTAT_SLEEP) { - /* This seems to fire a few times before the device is - * configured - need to ignore those occurences somehow. */ - /* The other option would be to only activate INTEN_SLEEPEN - * on CONFIGURED event, but that would need to be done in - * user firmware. */ - if(usbp->state == USB_ACTIVE) { - _usb_suspend(usbp); - /* Enable interrupt on resume */ - USB0->INTEN |= USBx_INTEN_RESUMEEN; - } - - // low-power version (check!): - // enable wakeup interrupt on resume USB signaling - // (check that it was a wakeup int with USBx_USBTRC0_USB_RESUME_INT) - //? USB0->USBTRC0 |= USBx_USBTRC0_USBRESMEN - // suspend the USB module - //? USB0->USBCTRL |= USBx_USBCTRL_SUSP; - - USB0->ISTAT = USBx_ISTAT_SLEEP; - } - - /* 20 - Bit5 - Resume - Only allowed in sleep=suspend mode */ - if(istat & USBx_ISTAT_RESUME) { - /* Disable interrupt on resume (should be disabled - * during normal operation according to datasheet). */ - USB0->INTEN &= ~USBx_INTEN_RESUMEEN; - - // low power version (check!): - // desuspend the USB module - //? USB0->USBCTRL &= ~USBx_USBCTRL_SUSP; - // maybe also - //? USB0->CTL = USBx_CTL_USBENSOFEN; - _usb_wakeup(usbp); - USB0->ISTAT = USBx_ISTAT_RESUME; - } - - /* 40 - Bit6 - ATTACH - used */ - - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_USB_USE_USB0 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level USB driver initialization. - * - * @notapi - */ -void usb_lld_init(void) { - /* Driver initialization.*/ - usbObjectInit(&USBD1); - -#if KINETIS_USB_USE_USB0 - - /* Set USB clock source to MCGPLLCLK, MCGFLLCLK, USB1 PFD, or IRC48M */ - SIM->SOPT2 |= SIM_SOPT2_USBSRC; - -#if defined(K20x5) || defined(K20x7) || defined(MK66F18) - -#if KINETIS_MCG_MODE == KINETIS_MCG_MODE_FEI - - /* MCGOUTCLK is the SYSCLK frequency, so don't divide for USB clock */ - SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0); - -#elif KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE - -#if !defined(MK66F18) - /* Note: We don't need this for MK66F18, we can use IRC48M clock for USB */ - #define KINETIS_USBCLK_FREQUENCY 48000000UL - uint32_t i,j; - for(i=0; i < 2; i++) { - for(j=0; j < 8; j++) { - if((KINETIS_PLLCLK_FREQUENCY * (i+1)) == (KINETIS_USBCLK_FREQUENCY*(j+1))) { - SIM->CLKDIV2 = i | SIM_CLKDIV2_USBDIV(j); - goto usbfrac_match_found; - } - } - } - usbfrac_match_found: - osalDbgAssert(i<2 && j <8,"USB Init error"); -#endif - -#else /* KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE */ -#error USB clock setting not implemented for this KINETIS_MCG_MODE -#endif /* KINETIS_MCG_MODE == ... */ - -#if defined(MK66F18) - /* Switch from default MCGPLLCLK to IRC48M for USB */ - SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0); - SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3); -#endif - -#elif defined(KL25) || defined (KL26) || defined(KL27) - - /* No extra clock dividers for USB clock */ - -#else /* defined(KL25) || defined (KL26) || defined(KL27) */ -#error USB driver not implemented for your MCU type -#endif - -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Configures and activates the USB peripheral. - * - * @param[in] usbp pointer to the @p USBDriver object - * - * @notapi - */ -void usb_lld_start(USBDriver *usbp) { - if (usbp->state == USB_STOP) { -#if KINETIS_USB_USE_USB0 - if (&USBD1 == usbp) { - /* Clear BDT */ - uint8_t i; - for(i=0;iUSBPHYCTL |= SIM_USBPHYCTL_USBDISILIM; -#endif - - /* Enable Clock */ -#if KINETIS_USB0_IS_USBOTG - SIM->SCGC4 |= SIM_SCGC4_USBOTG; - -#else /* KINETIS_USB0_IS_USBOTG */ - SIM->SCGC4 |= SIM_SCGC4_USBFS; -#endif /* KINETIS_USB0_IS_USBOTG */ - -#if KINETIS_HAS_USB_CLOCK_RECOVERY - USB0->CLK_RECOVER_IRC_EN |= USBx_CLK_RECOVER_IRC_EN_IRC_EN; - USB0->CLK_RECOVER_CTRL |= USBx_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN; -#endif /* KINETIS_HAS_USB_CLOCK_RECOVERY */ - - /* Reset USB module, wait for completion */ - USB0->USBTRC0 |= USBx_USBTRC0_USBRESET; - while ((USB0->USBTRC0 & USBx_USBTRC0_USBRESET)); - - /* Set BDT Address */ - USB0->BDTPAGE1 = ((uint32_t)_bdt) >> 8; - USB0->BDTPAGE2 = ((uint32_t)_bdt) >> 16; - USB0->BDTPAGE3 = ((uint32_t)_bdt) >> 24; - - /* Clear all ISR flags */ - USB0->ISTAT = 0xFF; - USB0->ERRSTAT = 0xFF; -#if KINETIS_USB0_IS_USBOTG - USB0->OTGISTAT = 0xFF; -#endif /* KINETIS_USB0_IS_USBOTG */ - USB0->USBTRC0 |= 0x40; //a hint was given that this is an undocumented interrupt bit - - /* Enable USB */ - USB0->CTL = USBx_CTL_ODDRST | USBx_CTL_USBENSOFEN; - USB0->USBCTRL = 0; - - /* Enable reset interrupt */ - USB0->INTEN |= USBx_INTEN_USBRSTEN; - - /* Enable interrupt in NVIC */ -#if KINETIS_USB0_IS_USBOTG - nvicEnableVector(USB_OTG_IRQn, KINETIS_USB_USB0_IRQ_PRIORITY); -#else /* KINETIS_USB0_IS_USBOTG */ - nvicEnableVector(USB_IRQn, KINETIS_USB_USB0_IRQ_PRIORITY); -#endif /* KINETIS_USB0_IS_USBOTG */ - } -#endif /* KINETIS_USB_USE_USB0 */ - } -} - -/** - * @brief Deactivates the USB peripheral. - * - * @param[in] usbp pointer to the @p USBDriver object - * - * @notapi - */ -void usb_lld_stop(USBDriver *usbp) { - /* TODO: If in ready state then disables the USB clock.*/ - if (usbp->state == USB_STOP) { -#if KINETIS_USB_USE_USB0 - if (&USBD1 == usbp) { -#if KINETIS_USB0_IS_USBOTG - nvicDisableVector(USB_OTG_IRQn); -#else /* KINETIS_USB0_IS_USBOTG */ - nvicDisableVector(USB_IRQn); -#endif /* KINETIS_USB0_IS_USBOTG */ - } -#endif /* KINETIS_USB_USE_USB0 */ - } -} - -/** - * @brief USB low level reset routine. - * - * @param[in] usbp pointer to the @p USBDriver object - * - * @notapi - */ -void usb_lld_reset(USBDriver *usbp) { - // FIXME, dyn alloc - _usbbn = 0; - -#if KINETIS_USB_USE_USB0 - - /* Reset BDT ODD/EVEN bits */ - USB0->CTL = USBx_CTL_ODDRST; - - /* EP0 initialization.*/ - usbp->epc[0] = &ep0config; - usb_lld_init_endpoint(usbp, 0); - - /* Clear all pending interrupts */ - USB0->ERRSTAT = 0xFF; - USB0->ISTAT = 0xFF; - - /* Set the address to zero during enumeration */ - usbp->address = 0; - USB0->ADDR = 0; - - /* Enable other interrupts */ - USB0->ERREN = 0xFF; - USB0->INTEN = USBx_INTEN_TOKDNEEN | - USBx_INTEN_SOFTOKEN | - USBx_INTEN_STALLEN | - USBx_INTEN_ERROREN | - USBx_INTEN_USBRSTEN | - USBx_INTEN_SLEEPEN; - - /* "is this necessary?", Paul from PJRC */ - USB0->CTL = USBx_CTL_USBENSOFEN; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Sets the USB address. - * - * @param[in] usbp pointer to the @p USBDriver object - * - * @notapi - */ -void usb_lld_set_address(USBDriver *usbp) { - -#if KINETIS_USB_USE_USB0 - USB0->ADDR = usbp->address&0x7F; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Enables an endpoint. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep) { - - if(ep > KINETIS_USB_ENDPOINTS) - return; - - const USBEndpointConfig *epc = usbp->epc[ep]; - uint8_t mask=0; - - if(epc->out_state != NULL) - { - /* OUT Endpoint */ - epc->out_state->odd_even = EVEN; - epc->out_state->data_bank = DATA0; - /* RXe */ - _bdt[BDT_INDEX(ep, RX, EVEN)].desc = BDT_DESC(epc->out_maxsize, DATA0); - _bdt[BDT_INDEX(ep, RX, EVEN)].addr = usb_alloc(epc->out_maxsize); - /* RXo */ - _bdt[BDT_INDEX(ep, RX, ODD)].desc = BDT_DESC(epc->out_maxsize, DATA1); - _bdt[BDT_INDEX(ep, RX, ODD)].addr = usb_alloc(epc->out_maxsize); - /* Enable OUT direction */ - mask |= USBx_ENDPTn_EPRXEN; - } - if(epc->in_state != NULL) - { - /* IN Endpoint */ - epc->in_state->odd_even = EVEN; - epc->in_state->data_bank = DATA0; - /* TXe, not used yet */ - _bdt[BDT_INDEX(ep, TX, EVEN)].desc = 0; - _bdt[BDT_INDEX(ep, TX, EVEN)].addr = usb_alloc(epc->in_maxsize); - /* TXo, not used yet */ - _bdt[BDT_INDEX(ep, TX, ODD)].desc = 0; - _bdt[BDT_INDEX(ep, TX, ODD)].addr = usb_alloc(epc->in_maxsize); - /* Enable IN direction */ - mask |= USBx_ENDPTn_EPTXEN; - } - - /* EPHSHK should be set for CTRL, BULK, INTR not for ISOC*/ - if((epc->ep_mode & USB_EP_MODE_TYPE) != USB_EP_MODE_TYPE_ISOC) - mask |= USBx_ENDPTn_EPHSHK; - /* Endpoint is not a CTRL endpoint, disable SETUP transfers */ - if((epc->ep_mode & USB_EP_MODE_TYPE) != USB_EP_MODE_TYPE_CTRL) - mask |= USBx_ENDPTn_EPCTLDIS; - -#if KINETIS_USB_USE_USB0 - USB0->ENDPT[ep].V = mask; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Disables all the active endpoints except the endpoint zero. - * - * @param[in] usbp pointer to the @p USBDriver object - * - * @notapi - */ -void usb_lld_disable_endpoints(USBDriver *usbp) { - (void)usbp; - uint8_t i; -#if KINETIS_USB_USE_USB0 - for(i=1;iENDPT[i].V = 0; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Returns the status of an OUT endpoint. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * @return The endpoint status. - * @retval EP_STATUS_DISABLED The endpoint is not active. - * @retval EP_STATUS_STALLED The endpoint is stalled. - * @retval EP_STATUS_ACTIVE The endpoint is active. - * - * @notapi - */ -usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) { - (void)usbp; -#if KINETIS_USB_USE_USB0 - if(ep > USB_MAX_ENDPOINTS) - return EP_STATUS_DISABLED; - if(!(USB0->ENDPT[ep].V & (USBx_ENDPTn_EPRXEN))) - return EP_STATUS_DISABLED; - else if(USB0->ENDPT[ep].V & USBx_ENDPTn_EPSTALL) - return EP_STATUS_STALLED; - return EP_STATUS_ACTIVE; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Returns the status of an IN endpoint. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * @return The endpoint status. - * @retval EP_STATUS_DISABLED The endpoint is not active. - * @retval EP_STATUS_STALLED The endpoint is stalled. - * @retval EP_STATUS_ACTIVE The endpoint is active. - * - * @notapi - */ -usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) { - (void)usbp; - if(ep > USB_MAX_ENDPOINTS) - return EP_STATUS_DISABLED; -#if KINETIS_USB_USE_USB0 - if(!(USB0->ENDPT[ep].V & (USBx_ENDPTn_EPTXEN))) - return EP_STATUS_DISABLED; - else if(USB0->ENDPT[ep].V & USBx_ENDPTn_EPSTALL) - return EP_STATUS_STALLED; - return EP_STATUS_ACTIVE; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Reads a setup packet from the dedicated packet buffer. - * @details This function must be invoked in the context of the @p setup_cb - * callback in order to read the received setup packet. - * @pre In order to use this function the endpoint must have been - * initialized as a control endpoint. - * @post The endpoint is ready to accept another packet. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * @param[out] buf buffer where to copy the packet data - * - * @notapi - */ -void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf) { - /* Get the BDT entry */ - USBOutEndpointState *os = usbp->epc[ep]->out_state; - bd_t *bd = (bd_t*)&_bdt[BDT_INDEX(ep, RX, os->odd_even)]; - /* Copy the 8 bytes of data */ - uint8_t n; - for (n = 0; n < 8; n++) { - buf[n] = bd->addr[n]; - } - /* Release the buffer - * Setup packet is always DATA0 - * Release the current DATA0 buffer - */ - bd->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA0); - /* If DATA1 was expected, then the states are out of sync. - * So reset the other buffer too, and set it as DATA1. - * This should not happen in normal cases, but is possible in - * error situations. NOTE: it's possible that this is too late - * and the next packet has already been received and dropped, but - * there's nothing that we can do about that anymore at this point. - */ - if (os->data_bank == DATA1) - { - bd_t *bd_next = (bd_t*)&_bdt[BDT_INDEX(ep, RX, os->odd_even^ODD)]; - bd_next->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA1); - } - /* After a SETUP, both in and out are always DATA1 */ - usbp->epc[ep]->in_state->data_bank = DATA1; - os->data_bank = DATA1; -} - -/** - * @brief Starts a receive operation on an OUT endpoint. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_start_out(USBDriver *usbp, usbep_t ep) { - USBOutEndpointState *osp = usbp->epc[ep]->out_state; - /* Transfer initialization.*/ - if (osp->rxsize == 0) /* Special case for zero sized packets.*/ - osp->rxpkts = 1; - else - osp->rxpkts = (uint16_t)((osp->rxsize + usbp->epc[ep]->out_maxsize - 1) / - usbp->epc[ep]->out_maxsize); -} - -/** - * @brief Starts a transmit operation on an IN endpoint. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @note Called from ISR and locked zone. - * @notapi - */ -void usb_lld_start_in(USBDriver *usbp, usbep_t ep) { - if (ep == 0 && usbp->ep0state == USB_EP0_IN_SENDING_STS) { - /* When a status packet is about to be sent on endpoint 0 the - * next packet will be a setup packet, which means that the - * buffer we expect after this should be DATA0, and the following - * DATA1. Since no out packets should be in flight at this time - * it's safe to initialize the buffers according to the expectations - * here. - */ - const USBEndpointConfig* epc = usbp->epc[ep]; - bd_t * bd = (bd_t*)&_bdt[BDT_INDEX(ep, RX, epc->out_state->odd_even)]; - bd_t *bd_next = (bd_t*)&_bdt[BDT_INDEX(ep, RX, epc->out_state->odd_even^ODD)]; - - bd->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA1); - bd_next->desc = BDT_DESC(usbp->epc[ep]->out_maxsize,DATA0); - epc->out_state->data_bank = DATA0; - } - usb_packet_transmit(usbp,ep,usbp->epc[ep]->in_state->txsize); -} - -/** - * @brief Brings an OUT endpoint in the stalled state. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_stall_out(USBDriver *usbp, usbep_t ep) { - (void)usbp; -#if KINETIS_USB_USE_USB0 - USB0->ENDPT[ep].V |= USBx_ENDPTn_EPSTALL; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Brings an IN endpoint in the stalled state. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_stall_in(USBDriver *usbp, usbep_t ep) { - (void)usbp; -#if KINETIS_USB_USE_USB0 - USB0->ENDPT[ep].V |= USBx_ENDPTn_EPSTALL; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Brings an OUT endpoint in the active state. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_clear_out(USBDriver *usbp, usbep_t ep) { - (void)usbp; -#if KINETIS_USB_USE_USB0 - USB0->ENDPT[ep].V &= ~USBx_ENDPTn_EPSTALL; -#endif /* KINETIS_USB_USE_USB0 */ -} - -/** - * @brief Brings an IN endpoint in the active state. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * - * @notapi - */ -void usb_lld_clear_in(USBDriver *usbp, usbep_t ep) { - (void)usbp; -#if KINETIS_USB_USE_USB0 - USB0->ENDPT[ep].V &= ~USBx_ENDPTn_EPSTALL; -#endif /* KINETIS_USB_USE_USB0 */ -} - -#endif /* HAL_USE_USB */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/hal_usb_lld.h b/os/hal/ports/KINETIS/LLD/hal_usb_lld.h deleted file mode 100644 index bd4eb39..0000000 --- a/os/hal/ports/KINETIS/LLD/hal_usb_lld.h +++ /dev/null @@ -1,455 +0,0 @@ -/* - ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde/ - (C) 2015-2016 flabbergast - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/LLD/usb_lld.h - * @brief KINETIS USB subsystem low level driver header. - * - * @addtogroup USB - * @{ - */ - -#ifndef HAL_USB_LLD_H_ -#define HAL_USB_LLD_H_ - -#if HAL_USE_USB || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Maximum endpoint address. - */ -#define USB_MAX_ENDPOINTS 15 - -/** - * @brief Status stage handling method. - */ -#define USB_EP0_STATUS_STAGE USB_EP0_STATUS_STAGE_SW - -/** - * @brief Address ack handling - */ -#define USB_SET_ADDRESS_ACK_HANDLING USB_SET_ADDRESS_ACK_SW - -/** - * @brief This device requires the address change after the status packet. - */ -#define USB_SET_ADDRESS_MODE USB_LATE_SET_ADDRESS - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief USB1 driver enable switch. - * @details If set to @p TRUE the support for USB1 is included. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_USB_USE_USB0) || defined(__DOXYGEN__) -#define KINETIS_USB_USE_USB0 FALSE -#endif - -/** - * @brief USB1 interrupt priority level setting. - */ -#if !defined(KINETIS_USB_USB0_IRQ_PRIORITY)|| defined(__DOXYGEN__) -#define KINETIS_USB_USB0_IRQ_PRIORITY 5 -#endif - -#if !defined(KINETIS_USB_ENDPOINTS) || defined(__DOXYGEN__) - #define KINETIS_USB_ENDPOINTS USB_MAX_ENDPOINTS+1 -#endif - -/** - * @brief Host wake-up procedure duration. - */ -#if !defined(USB_HOST_WAKEUP_DURATION) || defined(__DOXYGEN__) -#define USB_HOST_WAKEUP_DURATION 2 -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if KINETIS_USB_USE_USB0 && !KINETIS_HAS_USB -#error "USB not present in the selected device" -#endif - -#if !KINETIS_USB_USE_USB0 -#error "USB driver activated but no USB peripheral assigned" -#endif - -#if KINETIS_USB_USE_USB0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_USB_USB0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to KINETIS_USB_USB0_IRQ_PRIORITY" -#endif - -#if !defined(KINETIS_USB_IRQ_VECTOR) -#error "KINETIS_USB_IRQ_VECTOR not defined" -#endif - -#if (USB_HOST_WAKEUP_DURATION < 2) || (USB_HOST_WAKEUP_DURATION > 15) -#error "invalid USB_HOST_WAKEUP_DURATION setting, it must be between 2 and 15" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of an IN endpoint state structure. - */ -typedef struct { - /** - * @brief Requested transmit transfer size. - */ - size_t txsize; - /** - * @brief Transmitted bytes so far. - */ - size_t txcnt; - /** - * @brief Pointer to the transmission linear buffer. - */ - const uint8_t *txbuf; -#if (USB_USE_WAIT == TRUE) || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif - /* End of the mandatory fields.*/ - /* */ - bool odd_even; /* ODD / EVEN */ - /* */ - bool data_bank; /* DATA0 / DATA1 */ -} USBInEndpointState; - -/** - * @brief Type of an OUT endpoint state structure. - */ -typedef struct { - /** - * @brief Requested receive transfer size. - */ - size_t rxsize; - /** - * @brief Received bytes so far. - */ - size_t rxcnt; - /** - * @brief Pointer to the receive linear buffer. - */ - uint8_t *rxbuf; -#if (USB_USE_WAIT == TRUE) || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif - /* End of the mandatory fields.*/ - /** - * @brief Number of packets to receive. - */ - uint16_t rxpkts; - /* */ - bool odd_even; /* ODD / EVEN */ - /* */ - bool data_bank; /* DATA0 / DATA1 */ -} USBOutEndpointState; - -/** - * @brief Type of an USB endpoint configuration structure. - * @note Platform specific restrictions may apply to endpoints. - */ -typedef struct { - /** - * @brief Type and mode of the endpoint. - */ - uint32_t ep_mode; - /** - * @brief Setup packet notification callback. - * @details This callback is invoked when a setup packet has been - * received. - * @post The application must immediately call @p usbReadPacket() in - * order to access the received packet. - * @note This field is only valid for @p USB_EP_MODE_TYPE_CTRL - * endpoints, it should be set to @p NULL for other endpoint - * types. - */ - usbepcallback_t setup_cb; - /** - * @brief IN endpoint notification callback. - * @details This field must be set to @p NULL if callback is not required. - */ - usbepcallback_t in_cb; - /** - * @brief OUT endpoint notification callback. - * @details This field must be set to @p NULL if callback is not required. - */ - usbepcallback_t out_cb; - /** - * @brief IN endpoint maximum packet size. - * @details This field must be set to zero if the IN endpoint is not used. - */ - uint16_t in_maxsize; - /** - * @brief OUT endpoint maximum packet size. - * @details This field must be set to zero if the OUT endpoint is not used. - */ - uint16_t out_maxsize; - /** - * @brief @p USBEndpointState associated to the IN endpoint. - * @details This field must be set to @p NULL if the IN endpoint is not - * used. - */ - USBInEndpointState *in_state; - /** - * @brief @p USBEndpointState associated to the OUT endpoint. - * @details This field must be set to @p NULL if the OUT endpoint is not - * used. - */ - USBOutEndpointState *out_state; - /* End of the mandatory fields.*/ - /** - * @brief Reserved field, not currently used. - * @note Initialize this field to 1 in order to be forward compatible. - */ - uint16_t ep_buffers; - /** - * @brief Pointer to a buffer for setup packets. - * @details Setup packets require a dedicated 8-bytes buffer, set this - * field to @p NULL for non-control endpoints. - */ - uint8_t *setup_buf; -} USBEndpointConfig; - -/** - * @brief Type of an USB driver configuration structure. - */ -typedef struct { - /** - * @brief USB events callback. - * @details This callback is invoked when an USB driver event is registered. - */ - usbeventcb_t event_cb; - /** - * @brief Device GET_DESCRIPTOR request callback. - * @note This callback is mandatory and cannot be set to @p NULL. - */ - usbgetdescriptor_t get_descriptor_cb; - /** - * @brief Requests hook callback. - * @details This hook allows to be notified of standard requests or to - * handle non standard requests. - */ - usbreqhandler_t requests_hook_cb; - /** - * @brief Start Of Frame callback. - */ - usbcallback_t sof_cb; - /* End of the mandatory fields.*/ -} USBConfig; - -/** - * @brief Structure representing an USB driver. - */ -struct USBDriver { - /** - * @brief Driver state. - */ - usbstate_t state; - /** - * @brief Current configuration data. - */ - const USBConfig *config; - /** - * @brief Bit map of the transmitting IN endpoints. - */ - uint16_t transmitting; - /** - * @brief Bit map of the receiving OUT endpoints. - */ - uint16_t receiving; - /** - * @brief Active endpoints configurations. - */ - const USBEndpointConfig *epc[USB_MAX_ENDPOINTS + 1]; - /** - * @brief Fields available to user, it can be used to associate an - * application-defined handler to an IN endpoint. - * @note The base index is one, the endpoint zero does not have a - * reserved element in this array. - */ - void *in_params[USB_MAX_ENDPOINTS]; - /** - * @brief Fields available to user, it can be used to associate an - * application-defined handler to an OUT endpoint. - * @note The base index is one, the endpoint zero does not have a - * reserved element in this array. - */ - void *out_params[USB_MAX_ENDPOINTS]; - /** - * @brief Endpoint 0 state. - */ - usbep0state_t ep0state; - /** - * @brief Next position in the buffer to be transferred through endpoint 0. - */ - uint8_t *ep0next; - /** - * @brief Number of bytes yet to be transferred through endpoint 0. - */ - size_t ep0n; - /** - * @brief Endpoint 0 end transaction callback. - */ - usbcallback_t ep0endcb; - /** - * @brief Setup packet buffer. - */ - uint8_t setup[8]; - /** - * @brief Current USB device status. - */ - uint16_t status; - /** - * @brief Assigned USB address. - */ - uint8_t address; - /** - * @brief Current USB device configuration. - */ - uint8_t configuration; - /** - * @brief State of the driver when a suspend happened. - */ - usbstate_t saved_state; -#if defined(USB_DRIVER_EXT_FIELDS) - USB_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the next address in the packet memory. - */ - uint32_t pmnext; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Returns the current frame number. - * - * @param[in] usbp pointer to the @p USBDriver object - * @return The current frame number. - * - * @notapi - */ -#define usb_lld_get_frame_number(usbp) ((USB0->FRMNUMH<<8)|USB0->FRMNUML) - -/** - * @brief Returns the exact size of a receive transaction. - * @details The received size can be different from the size specified in - * @p usbStartReceiveI() because the last packet could have a size - * different from the expected one. - * @pre The OUT endpoint must have been configured in transaction mode - * in order to use this function. - * - * @param[in] usbp pointer to the @p USBDriver object - * @param[in] ep endpoint number - * @return Received data size. - * - * @notapi - */ -#define usb_lld_get_transaction_size(usbp, ep) \ - ((usbp)->epc[ep]->out_state->rxcnt) - -/** - * @brief Connects the USB device. - * - * @api - */ -#if !defined(usb_lld_connect_bus) -#define usb_lld_connect_bus(usbp) (USB0->CONTROL |= USBx_CONTROL_DPPULLUPNONOTG) -#endif - -/** - * @brief Disconnect the USB device. - * - * @api - */ -#if !defined(usb_lld_disconnect_bus) -/* Writing to USB0->CONTROL causes an unhandled exception when USB module is not clocked. */ -#if KINETIS_USB0_IS_USBOTG -#define usb_lld_disconnect_bus(usbp) if(SIM->SCGC4 & SIM_SCGC4_USBOTG) {USB0->CONTROL &= ~USBx_CONTROL_DPPULLUPNONOTG;} else {} -#else /* KINETIS_USB0_IS_USBOTG */ -#define usb_lld_disconnect_bus(usbp) if(SIM->SCGC4 & SIM_SCGC4_USBFS) {USB0->CONTROL &= ~USBx_CONTROL_DPPULLUPNONOTG;} else {} -#endif /* KINETIS_USB0_IS_USBOTG */ -#endif - -/** - * @brief Start of host wake-up procedure. - * - * @notapi - */ -#define usb_lld_wakeup_host(usbp) \ - do{ \ - USB0->CTL |= USBx_CTL_RESUME; \ - osalThreadSleepMilliseconds(USB_HOST_WAKEUP_DURATION); \ - USB0->CTL &= ~USBx_CTL_RESUME; \ - } while (false) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_USB_USE_USB0 && !defined(__DOXYGEN__) -extern USBDriver USBD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void usb_lld_init(void); - void usb_lld_start(USBDriver *usbp); - void usb_lld_stop(USBDriver *usbp); - void usb_lld_reset(USBDriver *usbp); - void usb_lld_set_address(USBDriver *usbp); - void usb_lld_init_endpoint(USBDriver *usbp, usbep_t ep); - void usb_lld_disable_endpoints(USBDriver *usbp); - usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep); - usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep); - void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf); - void usb_lld_start_out(USBDriver *usbp, usbep_t ep); - void usb_lld_start_in(USBDriver *usbp, usbep_t ep); - void usb_lld_stall_out(USBDriver *usbp, usbep_t ep); - void usb_lld_stall_in(USBDriver *usbp, usbep_t ep); - void usb_lld_clear_out(USBDriver *usbp, usbep_t ep); - void usb_lld_clear_in(USBDriver *usbp, usbep_t ep); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_USB */ - -#endif /* HAL_USB_LLD_H_ */ - -/** @} */ -- cgit v1.2.3 From d921781a45a5e2f57e56bf59872e1d2aec2fb71f Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sun, 7 Oct 2018 18:34:01 +0700 Subject: KINETIS platform update for ChibiOS 18.2.x. --- .../ARMCMx/compilers/GCC/mk/startup_MK66F18.mk | 11 +- .../ARMCMx/compilers/GCC/mk/startup_k20x.mk | 6 +- .../ARMCMx/compilers/GCC/mk/startup_k20x5.mk | 5 + .../ARMCMx/compilers/GCC/mk/startup_k20x7.mk | 5 + .../ARMCMx/compilers/GCC/mk/startup_k60x.mk | 11 +- .../ARMCMx/compilers/GCC/mk/startup_kl2x.mk | 11 +- os/hal/ports/KINETIS/K20x/hal_pwm_lld.c | 390 --------------- os/hal/ports/KINETIS/K20x/hal_pwm_lld.h | 270 ----------- os/hal/ports/KINETIS/K20x/hal_spi_lld.c | 539 --------------------- os/hal/ports/KINETIS/K20x/hal_spi_lld.h | 261 ---------- os/hal/ports/KINETIS/K20x/platform.mk | 48 +- os/hal/ports/KINETIS/K60x/platform.mk | 47 +- os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c | 388 --------------- os/hal/ports/KINETIS/KL2x/hal_pwm_lld.h | 305 ------------ os/hal/ports/KINETIS/KL2x/platform.mk | 46 +- os/hal/ports/KINETIS/LLD/ADCv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/FTMv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c | 390 +++++++++++++++ os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.h | 270 +++++++++++ os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h | 5 + os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c | 6 +- os/hal/ports/KINETIS/LLD/PITv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/PORTv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/SPIv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c | 539 +++++++++++++++++++++ os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.h | 261 ++++++++++ os/hal/ports/KINETIS/LLD/TPMv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c | 388 +++++++++++++++ os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.h | 305 ++++++++++++ os/hal/ports/KINETIS/LLD/UARTv1/driver.mk | 9 + os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk | 9 + os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c | 390 --------------- os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.h | 270 ----------- os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c | 539 --------------------- os/hal/ports/KINETIS/MK66F18/hal_spi_lld.h | 261 ---------- os/hal/ports/KINETIS/MK66F18/platform.mk | 50 +- 39 files changed, 2420 insertions(+), 3696 deletions(-) delete mode 100644 os/hal/ports/KINETIS/K20x/hal_pwm_lld.c delete mode 100644 os/hal/ports/KINETIS/K20x/hal_pwm_lld.h delete mode 100644 os/hal/ports/KINETIS/K20x/hal_spi_lld.c delete mode 100644 os/hal/ports/KINETIS/K20x/hal_spi_lld.h delete mode 100644 os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c delete mode 100644 os/hal/ports/KINETIS/KL2x/hal_pwm_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/ADCv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/FTMv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/PITv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/PORTv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/SPIv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/TPMv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c create mode 100644 os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.h create mode 100644 os/hal/ports/KINETIS/LLD/UARTv1/driver.mk create mode 100644 os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk delete mode 100644 os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c delete mode 100644 os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.h delete mode 100644 os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c delete mode 100644 os/hal/ports/KINETIS/MK66F18/hal_spi_lld.h diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_MK66F18.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_MK66F18.mk index 50dff2d..3277ab8 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_MK66F18.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_MK66F18.mk @@ -1,8 +1,8 @@ # List of the ChibiOS generic MK66F18 startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/MK66F18 \ @@ -11,3 +11,8 @@ STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk index f474d19..f01bd22 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk @@ -1,8 +1,8 @@ # List of the ChibiOS generic K20x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x \ diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk index 7ab25de..d9a059a 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk @@ -1,3 +1,8 @@ include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x5 + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk index 3c8ea09..5c86011 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk @@ -1,3 +1,8 @@ include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x7 + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k60x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k60x.mk index 777df43..9bc04c3 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k60x.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k60x.mk @@ -1,8 +1,8 @@ # List of the ChibiOS generic K60x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K60x \ @@ -10,3 +10,8 @@ STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk index 0c9d329..0a5d98e 100644 --- a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk @@ -1,8 +1,8 @@ # List of the ChibiOS generic KL2x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/KL2x \ @@ -11,3 +11,8 @@ STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/os/hal/ports/KINETIS/K20x/hal_pwm_lld.c b/os/hal/ports/KINETIS/K20x/hal_pwm_lld.c deleted file mode 100644 index f5a8d96..0000000 --- a/os/hal/ports/KINETIS/K20x/hal_pwm_lld.c +++ /dev/null @@ -1,390 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file K20x/pwm_lld.c - * @brief KINETIS PWM subsystem low level driver source. - * - * @addtogroup PWM - * @{ - */ - -#include "hal.h" - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief PWMD1 driver identifier. - * @note The driver PWMD1 allocates the timer FTM0 when enabled. - */ -#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) -PWMDriver PWMD1; -#endif - -/** - * @brief PWMD2 driver identifier. - * @note The driver PWMD2 allocates the timer FTM1 when enabled. - */ -#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) -PWMDriver PWMD2; -#endif - -/** - * @brief PWMD3 driver identifier. - * @note The driver PWMD3 allocates the timer FTM2 when enabled. - */ -#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) -PWMDriver PWMD3; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { - uint32_t sr; - - sr = pwmp->ftm->SC; - pwmp->ftm->SC = sr&(~FTM_SC_TOF); - - if (((sr & FTM_SC_TOF) != 0) && /* Timer Overflow */ - ((sr & FTM_SC_TOIE) != 0) && - (pwmp->config->callback != NULL)) { - pwmp->config->callback(pwmp); - } - - uint8_t n=0; - for(n=0;nchannels;n++) { - sr = pwmp->ftm->CHANNEL[n].CnSC; - pwmp->ftm->CHANNEL[n].CnSC = sr&(~FTM_CnSC_CHF); - if (((sr & FTM_CnSC_CHF) != 0) && - ((sr & FTM_CnSC_CHIE) != 0) && - (pwmp->config->channels[n].callback != NULL)) { - pwmp->config->channels[n].callback(pwmp); - } - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_FTM0 -/** - * @brief FTM0 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM0 */ - -#if KINETIS_PWM_USE_FTM1 -/** - * @brief FTM1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM1_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM1 */ - -#if KINETIS_PWM_USE_FTM2 -/** - * @brief FTM2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM2_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM2 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level PWM driver initialization. - * - * @notapi - */ -void pwm_lld_init(void) { - -#if KINETIS_PWM_USE_FTM0 - pwmObjectInit(&PWMD1); - PWMD1.channels = KINETIS_FTM0_CHANNELS; - PWMD1.ftm = FTM0; -#endif - -#if KINETIS_PWM_USE_FTM1 - pwmObjectInit(&PWMD2); - PWMD2.channels = KINETIS_FTM1_CHANNELS; - PWMD2.ftm = FTM1; -#endif - -#if KINETIS_PWM_USE_FTM2 - pwmObjectInit(&PWMD3); - PWMD3.channels = KINETIS_FTM2_CHANNELS; - PWMD3.ftm = FTM2; -#endif -} - -/** - * @brief Configures and activates the PWM peripheral. - * @note Starting a driver that is already in the @p PWM_READY state - * disables all the active channels. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_start(PWMDriver *pwmp) { - uint16_t psc; - uint8_t i=0; - - if (pwmp->state == PWM_STOP) { - /* Clock activation and timer reset.*/ -#if KINETIS_PWM_USE_FTM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_FTM0; - nvicEnableVector(FTM0_IRQn, KINETIS_PWM_FTM0_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_FTM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_FTM1; - nvicEnableVector(FTM1_IRQn, KINETIS_PWM_FTM1_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_FTM2 - if (&PWMD3 == pwmp) { - SIM->SCGC3 |= SIM_SCGC3_FTM2; - nvicEnableVector(FTM2_IRQn, KINETIS_PWM_FTM2_PRIORITY); - } -#endif - } - pwmp->ftm->MODE = FTM_MODE_FTMEN_MASK|FTM_MODE_PWMSYNC_MASK; - pwmp->ftm->SYNC = FTM_SYNC_CNTMIN_MASK|FTM_SYNC_CNTMAX_MASK - |FTM_SYNC_SWSYNC_MASK; - pwmp->ftm->COMBINE = FTM_COMBINE_SYNCEN3_MASK | FTM_COMBINE_SYNCEN2_MASK - | FTM_COMBINE_SYNCEN1_MASK | FTM_COMBINE_SYNCEN0_MASK; - pwmp->ftm->SYNCONF = FTM_SYNCONF_SYNCMODE_MASK; - - pwmp->ftm->CNTIN = 0x0000; - //~ pwmp->ftm->SC = 0; /* Disable FTM counter.*/ - pwmp->ftm->CNT = 0x0000; /* Clear count register.*/ - - /* Prescaler value calculation.*/ - psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency); - //~ /* Prescaler must be power of two between 1 and 128.*/ - osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency"); - //~ /* Prescaler register value determination. - //~ Prescaler register value conveniently corresponds to bit position, - //~ i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/ - for (i = 0; i < 8; i++) { - if (psc == (unsigned)(1 << i)) { - break; - } - } - - /* Set prescaler and clock mode. - This also sets the following: - CPWMS up-counting mode - Timer overflow interrupt disabled - DMA disabled.*/ - pwmp->ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(i); - /* Configure period */ - pwmp->ftm->MOD = pwmp->period-1; - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; -} - -/** - * @brief Deactivates the PWM peripheral. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_stop(PWMDriver *pwmp) { - - /* If in ready state then disables the PWM clock.*/ - if (pwmp->state == PWM_READY) { -#if KINETIS_PWM_USE_FTM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_FTM0; - nvicDisableVector(FTM0_IRQn); - } -#endif - -#if KINETIS_PWM_USE_FTM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_FTM1; - nvicDisableVector(FTM1_IRQn); - } -#endif - -#if KINETIS_PWM_USE_FTM2 - if (&PWMD3 == pwmp) { - SIM->SCGC3 &= ~SIM_SCGC3_FTM2; - nvicDisableVector(FTM2_IRQn); - } -#endif - /* Disable FTM counter.*/ - pwmp->ftm->SC = 0; - pwmp->ftm->MOD = 0; - } -} - -/** - * @brief Enables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is active using the specified configuration. - * @note The function has effect at the next cycle start. - * @note Channel notification is not enabled. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * @param[in] width PWM pulse width as clock pulses number - * - * @notapi - */ -void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width) { - uint32_t mode = FTM_CnSC_MSB; /* Edge-aligned PWM mode.*/ - - switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) { - case PWM_OUTPUT_ACTIVE_HIGH: - mode |= FTM_CnSC_ELSB; - break; - case PWM_OUTPUT_ACTIVE_LOW: - mode |= FTM_CnSC_ELSA; - break; - } - - if (pwmp->ftm->CHANNEL[channel].CnSC & FTM_CnSC_CHIE) - mode |= FTM_CnSC_CHIE; - - pwmp->ftm->CHANNEL[channel].CnSC = mode; - pwmp->ftm->CHANNEL[channel].CnV = width; - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; -} - -/** - * @brief Disables a PWM channel and its notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is disabled and its output line returned to the - * idle state. - * @note The function has effect at the next cycle start. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { - - pwmp->ftm->CHANNEL[channel].CnSC = 0; - pwmp->ftm->CHANNEL[channel].CnV = 0; -} - -/** - * @brief Enables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { - pwmp->ftm->SC |= FTM_SC_TOIE; -} - -/** - * @brief Disables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { - pwmp->ftm->SC &= ~FTM_SC_TOIE; -} - -/** - * @brief Enables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->ftm->CHANNEL[channel].CnSC |= FTM_CnSC_CHIE; -} - -/** - * @brief Disables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->ftm->CHANNEL[channel].CnSC &= ~FTM_CnSC_CHIE; -} - -#endif /* HAL_USE_PWM */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/K20x/hal_pwm_lld.h b/os/hal/ports/KINETIS/K20x/hal_pwm_lld.h deleted file mode 100644 index ccc100f..0000000 --- a/os/hal/ports/KINETIS/K20x/hal_pwm_lld.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file K20x7/pwm_lld.h - * @brief KINETIS PWM subsystem low level driver header. - * - * @addtogroup PWM - * @{ - */ - -#ifndef HAL_PWM_LLD_H_ -#define HAL_PWM_LLD_H_ - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Number of PWM channels per PWM driver. - */ -#define PWM_CHANNELS 8 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -#if !defined(KINETIS_PWM_USE_FTM0) - #define KINETIS_PWM_USE_FTM0 FALSE -#endif - -#if !defined(KINETIS_PWM_USE_FTM1) - #define KINETIS_PWM_USE_FTM1 FALSE -#endif - -#if !defined(KINETIS_PWM_USE_FTM2) - #define KINETIS_PWM_USE_FTM2 FALSE -#endif - -/** - * @brief FTM0 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM0_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM0_PRIORITY 12 -#endif - -/** - * @brief FTM1 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM1_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM1_PRIORITY 12 -#endif - -/** - * @brief FTM2 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM2_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM2_PRIORITY 12 -#endif - -/** @} */ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief If advanced timer features switch. - * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are - * enabled. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__) -#define KINETIS_PWM_USE_ADVANCED FALSE -#endif -/** @} */ - -/*===========================================================================*/ -/* Configuration checks. */ -/*===========================================================================*/ - -#if !KINETIS_PWM_USE_FTM0 && !KINETIS_PWM_USE_FTM1 && !KINETIS_PWM_USE_FTM2 -#error "PWM driver activated but no FTM peripheral assigned" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a PWM mode. - */ -typedef uint32_t pwmmode_t; - -/** - * @brief Type of a PWM channel. - */ -typedef uint8_t pwmchannel_t; - -/** - * @brief Type of a channels mask. - */ -typedef uint32_t pwmchnmsk_t; - -/** - * @brief Type of a PWM counter. - */ -typedef uint16_t pwmcnt_t; - -/** - * @brief Type of a PWM driver channel configuration structure. - */ -typedef struct { - /** - * @brief Channel active logic level. - */ - pwmmode_t mode; - - /** - * @brief Channel callback pointer. - * @note This callback is invoked on the channel compare event. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /* End of the mandatory fields.*/ -} PWMChannelConfig; - -/** - * @brief Type of a PWM driver configuration structure. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - uint32_t frequency; - /** - * @brief PWM period in ticks. - * @note The low level can use assertions in order to catch invalid - * period specifications. - */ - pwmcnt_t period; - /** - * @brief Periodic callback pointer. - * @note This callback is invoked on PWM counter reset. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /** - * @brief Channels configurations. - */ - PWMChannelConfig channels[PWM_CHANNELS]; - /* End of the mandatory fields.*/ -} PWMConfig; - -/** - * @brief Structure representing a PWM driver. - */ -struct PWMDriver { - /** - * @brief Driver state. - */ - pwmstate_t state; - /** - * @brief Current driver configuration data. - */ - const PWMConfig *config; - /** - * @brief Current PWM period in ticks. - */ - pwmcnt_t period; - /** - * @brief Mask of the enabled channels. - */ - pwmchnmsk_t enabled; - /** - * @brief Number of channels in this instance. - */ - pwmchannel_t channels; -#if defined(PWM_DRIVER_EXT_FIELDS) - PWM_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the FTM registers block. - */ - FTM_TypeDef *ftm; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the period the PWM peripheral. - * @details This function changes the period of a PWM unit that has already - * been activated using @p pwmStart(). - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The PWM unit period is changed to the new value. - * @note The function has effect at the next cycle start. - * @note If a period is specified that is shorter than the pulse width - * programmed in one of the channels then the behavior is not - * guaranteed. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] period new cycle time in ticks - * - * @notapi - */ -#define pwm_lld_change_period(pwmp, period) \ - do { \ - (pwmp)->ftm->MOD = ((period) - 1); \ - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK;\ - } while(0) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) -extern PWMDriver PWMD1; -#endif -#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) -extern PWMDriver PWMD2; -#endif -#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) -extern PWMDriver PWMD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void pwm_lld_init(void); - void pwm_lld_start(PWMDriver *pwmp); - void pwm_lld_stop(PWMDriver *pwmp); - void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width); - void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); - void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); - void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PWM */ - -#endif /* HAL_PWM_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/K20x/hal_spi_lld.c b/os/hal/ports/KINETIS/K20x/hal_spi_lld.c deleted file mode 100644 index 29ab4e8..0000000 --- a/os/hal/ports/KINETIS/K20x/hal_spi_lld.c +++ /dev/null @@ -1,539 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/spi_lld.c - * @brief KINETIS SPI subsystem low level driver source. - * - * @addtogroup SPI - * @{ - */ - -#include "hal.h" - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#if !defined(KINETIS_SPI0_RX_DMA_IRQ_PRIORITY) -#define KINETIS_SPI0_RX_DMA_IRQ_PRIORITY 8 -#endif - -#if !defined(KINETIS_SPI0_RX_DMAMUX_CHANNEL) -#define KINETIS_SPI0_RX_DMAMUX_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI0_RX_DMA_CHANNEL) -#define KINETIS_SPI0_RX_DMA_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI0_TX_DMAMUX_CHANNEL) -#define KINETIS_SPI0_TX_DMAMUX_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI0_TX_DMA_CHANNEL) -#define KINETIS_SPI0_TX_DMA_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI1_RX_DMA_IRQ_PRIORITY) -#define KINETIS_SPI1_RX_DMA_IRQ_PRIORITY 8 -#endif - -#if !defined(KINETIS_SPI1_RX_DMAMUX_CHANNEL) -#define KINETIS_SPI1_RX_DMAMUX_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI1_RX_DMA_CHANNEL) -#define KINETIS_SPI1_RX_DMA_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI1_TX_DMAMUX_CHANNEL) -#define KINETIS_SPI1_TX_DMAMUX_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI1_TX_DMA_CHANNEL) -#define KINETIS_SPI1_TX_DMA_CHANNEL 1 -#endif - -#if KINETIS_SPI_USE_SPI0 -#define DMAMUX_SPI_RX_SOURCE 16 -#define DMAMUX_SPI_TX_SOURCE 17 -#endif - -#if KINETIS_SPI_USE_SPI1 -#define DMAMUX_SPI_RX_SOURCE 18 -#define DMAMUX_SPI_TX_SOURCE 19 -#endif - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief SPI0 driver identifier.*/ -#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) -SPIDriver SPID1; -#endif - -/** @brief SPI1 driver identifier.*/ -#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) -SPIDriver SPID2; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/* Use a dummy byte as the source/destination when a buffer is not provided */ -/* Note: The MMC driver relies on 0xFF being sent for dummy bytes. */ -static volatile uint16_t dmaRxDummy; -static uint16_t dmaTxDummy = 0xFFFF; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void spi_start_xfer(SPIDriver *spip, bool polling) -{ - /* - * Enable the DSPI peripheral in master mode. - * Clear the TX and RX FIFOs. - * */ - spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_CLR_TXF | SPIx_MCR_CLR_RXF; - - /* If we are not polling then enable DMA */ - if (!polling) { - - /* Enable receive dma and transmit dma */ - spip->spi->RSER = SPIx_RSER_RFDF_DIRS | SPIx_RSER_RFDF_RE | - SPIx_RSER_TFFF_RE | SPIx_RSER_TFFF_DIRS; - - /* Configure RX DMA */ - if (spip->rxbuf) { - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)spip->rxbuf; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = spip->word_size; - } else { - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)&dmaRxDummy; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = 0; - } - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].BITER_ELINKNO = spip->count; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CITER_ELINKNO = spip->count; - - /* Enable Request Register (ERQ) for RX by writing 0 to SERQ */ - DMA->SERQ = KINETIS_SPI0_RX_DMA_CHANNEL; - - /* Configure TX DMA */ - if (spip->txbuf) { - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)spip->txbuf; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = spip->word_size; - } else { - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)&dmaTxDummy; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = 0; - } - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].BITER_ELINKNO = spip->count; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CITER_ELINKNO = spip->count; - - /* Enable Request Register (ERQ) for TX by writing 1 to SERQ */ - DMA->SERQ = KINETIS_SPI0_TX_DMA_CHANNEL; - } -} - -static void spi_stop_xfer(SPIDriver *spip) -{ - /* Halt the DSPI peripheral */ - spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_HALT; - - /* Clear all the flags which are currently set. */ - spip->spi->SR |= spip->spi->SR; -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ - DMA->CINT = KINETIS_SPI0_RX_DMA_CHANNEL; - - spi_stop_xfer(&SPID1); - - _spi_isr_code(&SPID1); - - OSAL_IRQ_EPILOGUE(); -} - -#endif - -#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ - DMA->CINT = KINETIS_SPI1_RX_DMA_CHANNEL; - - spi_stop_xfer(&SPID2); - - _spi_isr_code(&SPID2); - - OSAL_IRQ_EPILOGUE(); -} - -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level SPI driver initialization. - * - * @notapi - */ -void spi_lld_init(void) { -#if KINETIS_SPI_USE_SPI0 - spiObjectInit(&SPID1); -#endif -#if KINETIS_SPI_USE_SPI1 - spiObjectInit(&SPID2); -#endif -} - -/** - * @brief Configures and activates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_start(SPIDriver *spip) { - - /* If in stopped state then enables the SPI and DMA clocks.*/ - if (spip->state == SPI_STOP) { - -#if KINETIS_SPI_USE_SPI0 - if (&SPID1 == spip) { - - /* Enable the clock for SPI0 */ - SIM->SCGC6 |= SIM_SCGC6_SPI0; - - SPID1.spi = SPI0; - - if (spip->config->tar0) { - spip->spi->CTAR[0] = spip->config->tar0; - } else { - spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; - } - } -#endif - -#if KINETIS_SPI_USE_SPI1 - if (&SPID2 == spip) { - - /* Enable the clock for SPI0 */ - SIM->SCGC6 |= SIM_SCGC6_SPI1; - - SPID2.spi = SPI1; - - if (spip->config->tar0) { - spip->spi->CTAR[0] = spip->config->tar0; - } else { - spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; - } - } -#endif - - nvicEnableVector(DMA0_IRQn, KINETIS_SPI0_RX_DMA_IRQ_PRIORITY); - - SIM->SCGC6 |= SIM_SCGC6_DMAMUX; - SIM->SCGC7 |= SIM_SCGC7_DMA; - - /* Clear DMA error flags */ - DMA->ERR = 0x0F; - -#if KINETIS_SPI_USE_SPI0 - /* Rx, select SPI Rx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI0_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); - - /* Tx, select SPI Tx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI0_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); - - /* Extract the frame size from the TAR */ - uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & - SPIx_CTARn_FMSZ_MASK) + 1; - - /* DMA transfer size is 16 bits for a frame size > 8 bits */ - uint16_t dma_size = frame_size > 8 ? 1 : 0; - - /* DMA word size is 2 for a 16 bit frame size */ - spip->word_size = frame_size > 8 ? 2 : 1; - - /* configure DMA RX fixed values */ - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI0->POPR; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SOFF = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | - DMA_CSR_INTMAJOR_MASK; - - /* configure DMA TX fixed values */ - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI0->PUSHR; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DOFF = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; -#endif - -#if KINETIS_SPI_USE_SPI1 - /* Rx, select SPI Rx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI1_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); - - /* Tx, select SPI Tx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI1_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); - - /* Extract the frame size from the TAR */ - uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & - SPIx_CTARn_FMSZ_MASK) + 1; - - /* DMA transfer size is 16 bits for a frame size > 8 bits */ - uint16_t dma_size = frame_size > 8 ? 1 : 0; - - /* DMA word size is 2 for a 16 bit frame size */ - spip->word_size = frame_size > 8 ? 2 : 1; - - /* configure DMA RX fixed values */ - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI1->POPR; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SOFF = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | - DMA_CSR_INTMAJOR_MASK; - - /* configure DMA TX fixed values */ - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI1->PUSHR; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DOFF = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; -#endif - } -} - -/** - * @brief Deactivates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_stop(SPIDriver *spip) { - - /* If in ready state then disables the SPI clock.*/ - if (spip->state == SPI_READY) { - - nvicDisableVector(DMA0_IRQn); - - SIM->SCGC7 &= ~SIM_SCGC7_DMA; - SIM->SCGC6 &= ~SIM_SCGC6_DMAMUX; - -#if KINETIS_SPI_USE_SPI0 - if (&SPID1 == spip) { - /* SPI halt.*/ - spip->spi->MCR |= SPIx_MCR_HALT; - } - - /* Disable the clock for SPI0 */ - SIM->SCGC6 &= ~SIM_SCGC6_SPI0; -#endif - -#if KINETIS_SPI_USE_SPI1 - if (&SPID2 == spip) { - /* SPI halt.*/ - spip->spi->MCR |= SPIx_MCR_HALT; - } - - /* Disable the clock for SPI1 */ - SIM->SCGC6 &= ~SIM_SCGC6_SPI1; -#endif - } -} - -/** - * @brief Asserts the slave select signal and prepares for transfers. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_select(SPIDriver *spip) { - - palClearPad(spip->config->ssport, spip->config->sspad); -} - -/** - * @brief Deasserts the slave select signal. - * @details The previously selected peripheral is unselected. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_unselect(SPIDriver *spip) { - - palSetPad(spip->config->ssport, spip->config->sspad); -} - -/** - * @brief Ignores data on the SPI bus. - * @details This asynchronous function starts the transmission of a series of - * idle words on the SPI bus and ignores the received data. - * @post At the end of the operation the configured callback is invoked. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be ignored - * - * @notapi - */ -void spi_lld_ignore(SPIDriver *spip, size_t n) { - - spip->count = n; - spip->rxbuf = NULL; - spip->txbuf = NULL; - - spi_start_xfer(spip, false); -} - -/** - * @brief Exchanges data on the SPI bus. - * @details This asynchronous function starts a simultaneous transmit/receive - * operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be exchanged - * @param[in] txbuf the pointer to the transmit buffer - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf) { - - spip->count = n; - spip->rxbuf = rxbuf; - spip->txbuf = txbuf; - - spi_start_xfer(spip, false); -} - -/** - * @brief Sends data over the SPI bus. - * @details This asynchronous function starts a transmit operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to send - * @param[in] txbuf the pointer to the transmit buffer - * - * @notapi - */ -void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - - spip->count = n; - spip->rxbuf = NULL; - spip->txbuf = (void *)txbuf; - - spi_start_xfer(spip, false); -} - -/** - * @brief Receives data from the SPI bus. - * @details This asynchronous function starts a receive operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to receive - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - - spip->count = n; - spip->rxbuf = rxbuf; - spip->txbuf = NULL; - - spi_start_xfer(spip, false); -} - -/** - * @brief Exchanges one frame using a polled wait. - * @details This synchronous function exchanges one frame using a polled - * synchronization method. This function is useful when exchanging - * small amount of data on high speed channels, usually in this - * situation is much more efficient just wait for completion using - * polling than suspending the thread waiting for an interrupt. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] frame the data frame to send over the SPI bus - * @return The received data frame from the SPI bus. - */ -uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - - spi_start_xfer(spip, true); - - spip->spi->PUSHR = SPIx_PUSHR_TXDATA(frame); - - while ((spip->spi->SR & SPIx_SR_RFDF) == 0) - ; - - frame = spip->spi->POPR; - - spi_stop_xfer(spip); - - return frame; -} - -#endif /* HAL_USE_SPI */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/K20x/hal_spi_lld.h b/os/hal/ports/KINETIS/K20x/hal_spi_lld.h deleted file mode 100644 index 0cf108e..0000000 --- a/os/hal/ports/KINETIS/K20x/hal_spi_lld.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/spi_lld.h - * @brief KINETIS SPI subsystem low level driver header. - * - * @addtogroup SPI - * @{ - */ - -#ifndef HAL_SPI_LLD_H_ -#define HAL_SPI_LLD_H_ - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief SPI0 driver enable switch. - * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_SPI_USE_SPI0) || defined(__DOXYGEN__) -#define KINETIS_SPI_USE_SPI0 FALSE -#endif - -/** - * @brief SPI0 interrupt priority level setting. - */ -#if !defined(KINETIS_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SPI_SPI0_IRQ_PRIORITY 10 -#endif - -/** - * @brief SPI1 driver enable switch. - * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_SPI_USE_SPI1) || defined(__DOXYGEN__) -#define KINETIS_SPI_USE_SPI1 FALSE -#endif - -/** - * @brief SPI1 interrupt priority level setting. - */ -#if !defined(KINETIS_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SPI_SPI1_IRQ_PRIORITY 10 -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 && !KINETIS_HAS_SPI0 -#error "SPI0 not present in the selected device" -#endif - -#if KINETIS_SPI_USE_SPI1 && !KINETIS_HAS_SPI1 -#error "SPI1 not present in the selected device" -#endif - -#if KINETIS_SPI_USE_SPI0 && KINETIS_SPI_USE_SPI1 -#error "Only one SPI peripheral can be enabled" -#endif - -#if !(KINETIS_SPI_USE_SPI0 || KINETIS_SPI_USE_SPI1) -#error "SPI driver activated but no SPI peripheral assigned" -#endif - -#if KINETIS_SPI_USE_SPI0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI0" -#endif - -#if KINETIS_SPI_USE_SPI1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI1" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an SPI driver. - */ -typedef struct SPIDriver SPIDriver; - -/** - * @brief SPI notification callback type. - * - * @param[in] spip pointer to the @p SPIDriver object triggering the - * callback - */ -typedef void (*spicallback_t)(SPIDriver *spip); - -/** - * @brief Driver configuration structure. - */ -typedef struct { - /** - * @brief Operation complete callback or @p NULL. - */ - spicallback_t end_cb; - /* End of the mandatory fields.*/ - /** - * @brief The chip select line port - when not using pcs. - */ - ioportid_t ssport; - /** - * @brief The chip select line pad number - when not using pcs. - */ - uint16_t sspad; - /** - * @brief SPI initialization data. - */ - uint32_t tar0; -} SPIConfig; - -/** - * @brief Structure representing a SPI driver. - */ -struct SPIDriver { - /** - * @brief Driver state. - */ - spistate_t state; - /** - * @brief Current configuration data. - */ - const SPIConfig *config; -#if SPI_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif /* SPI_USE_WAIT */ -#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#endif /* SPI_USE_MUTUAL_EXCLUSION */ -#if defined(SPI_DRIVER_EXT_FIELDS) - SPI_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the SPIx registers block. - */ - SPI_TypeDef *spi; - /** - * @brief Number of bytes/words of data to transfer. - */ - size_t count; - /** - * @brief Word size in bytes. - */ - size_t word_size; - /** - * @brief Pointer to the buffer with data to send. - */ - const uint8_t *txbuf; - /** - * @brief Pointer to the buffer to put received data. - */ - uint8_t *rxbuf; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* TAR settings for n bits at SYSCLK / 2 */ -#define KINETIS_SPI_TAR_SYSCLK_DIV_2(n)\ - SPIx_CTARn_FMSZ((n) - 1) | \ - SPIx_CTARn_CPOL | \ - SPIx_CTARn_CPHA | \ - SPIx_CTARn_DBR | \ - SPIx_CTARn_PBR(0) | \ - SPIx_CTARn_BR(0) | \ - SPIx_CTARn_CSSCK(0) | \ - SPIx_CTARn_ASC(0) | \ - SPIx_CTARn_DT(0) - -/* TAR settings for n bits at SYSCLK / 4096 for debugging */ -#define KINETIS_SPI_TAR_SYSCLK_DIV_4096(n) \ - SPIx_CTARn_FMSZ(((n) - 1)) | \ - SPIx_CTARn_CPOL | \ - SPIx_CTARn_CPHA | \ - SPIx_CTARn_PBR(0) | \ - SPIx_CTARn_BR(0xB) | \ - SPIx_CTARn_CSSCK(0xB) | \ - SPIx_CTARn_ASC(0x7) | \ - SPIx_CTARn_DT(0xB) - -#define KINETIS_SPI_TAR_8BIT_FAST KINETIS_SPI_TAR_SYSCLK_DIV_2(8) -#define KINETIS_SPI_TAR_8BIT_SLOW KINETIS_SPI_TAR_SYSCLK_DIV_4096(8) - -#define KINETIS_SPI_TAR0_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) -#define KINETIS_SPI_TAR1_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 && !defined(__DOXYGEN__) -extern SPIDriver SPID1; -#endif - -#if KINETIS_SPI_USE_SPI1 && !defined(__DOXYGEN__) -extern SPIDriver SPID2; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void spi_lld_init(void); - void spi_lld_start(SPIDriver *spip); - void spi_lld_stop(SPIDriver *spip); - void spi_lld_select(SPIDriver *spip); - void spi_lld_unselect(SPIDriver *spip); - void spi_lld_ignore(SPIDriver *spip, size_t n); - void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf); - void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); - void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); - uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SPI */ - -#endif /* HAL_SPI_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/K20x/platform.mk b/os/hal/ports/KINETIS/K20x/platform.mk index beee336..537a6b6 100644 --- a/os/hal/ports/KINETIS/K20x/platform.mk +++ b/os/hal/ports/KINETIS/K20x/platform.mk @@ -1,18 +1,32 @@ -# List of all platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x/hal_spi_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_ext_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_adc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x/hal_pwm_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_usb_lld.c +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x + +ifeq ($(USE_SMART_BUILD),yes) -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K20x \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SPIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/FTMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/KINETIS/K60x/platform.mk b/os/hal/ports/KINETIS/K60x/platform.mk index 33ac2cc..1eb6cc5 100644 --- a/os/hal/ports/KINETIS/K60x/platform.mk +++ b/os/hal/ports/KINETIS/K60x/platform.mk @@ -1,19 +1,30 @@ -# List of all platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_ext_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_adc_lld.c \ -# ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x/hal_spi_lld.c \ -# ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x/hal_pwm_lld.c \ -# ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_usb_lld.c +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x + +ifeq ($(USE_SMART_BUILD),yes) -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/K60x \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c b/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c deleted file mode 100644 index 2f56216..0000000 --- a/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c +++ /dev/null @@ -1,388 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KL2x/pwm_lld.c - * @brief KINETIS PWM subsystem low level driver source. - * - * @addtogroup PWM - * @{ - */ - -#include "hal.h" - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief PWMD1 driver identifier. - * @note The driver PWMD1 allocates the timer TPM0 when enabled. - */ -#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__) -PWMDriver PWMD1; -#endif - -/** - * @brief PWMD2 driver identifier. - * @note The driver PWMD2 allocates the timer TPM1 when enabled. - */ -#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__) -PWMDriver PWMD2; -#endif - -/** - * @brief PWMD3 driver identifier. - * @note The driver PWMD3 allocates the timer TPM2 when enabled. - */ -#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__) -PWMDriver PWMD3; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { - uint32_t sr; - - sr = pwmp->tpm->STATUS; - pwmp->tpm->STATUS = 0xFFFFFFFF; - - if (((sr & TPMx_STATUS_TOF) != 0) && - (pwmp->config->callback != NULL)) - pwmp->config->callback(pwmp); - if (((sr & TPMx_STATUS_CH0F) != 0) && - (pwmp->config->channels[0].callback != NULL)) - pwmp->config->channels[0].callback(pwmp); - if (((sr & TPMx_STATUS_CH1F) != 0) && - (pwmp->config->channels[1].callback != NULL)) - pwmp->config->channels[1].callback(pwmp); - if (((sr & TPMx_STATUS_CH2F) != 0) && - (pwmp->config->channels[2].callback != NULL)) - pwmp->config->channels[2].callback(pwmp); - if (((sr & TPMx_STATUS_CH3F) != 0) && - (pwmp->config->channels[3].callback != NULL)) - pwmp->config->channels[3].callback(pwmp); - if (((sr & TPMx_STATUS_CH4F) != 0) && - (pwmp->config->channels[4].callback != NULL)) - pwmp->config->channels[4].callback(pwmp); - if (((sr & TPMx_STATUS_CH5F) != 0) && - (pwmp->config->channels[5].callback != NULL)) - pwmp->config->channels[5].callback(pwmp); -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_TPM0 -/** - * @brief TPM0 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_TPM0_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_TPM0 */ - -#if KINETIS_PWM_USE_TPM1 -/** - * @brief TPM1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_TPM1_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_TPM1 */ - -#if KINETIS_PWM_USE_TPM2 -/** - * @brief TPM2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_TPM2_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_TPM2 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level PWM driver initialization. - * - * @notapi - */ -void pwm_lld_init(void) { - -#if KINETIS_PWM_USE_TPM0 - pwmObjectInit(&PWMD1); - PWMD1.channels = KINETIS_TPM0_CHANNELS; - PWMD1.tpm = TPM0; -#endif - -#if KINETIS_PWM_USE_TPM1 - pwmObjectInit(&PWMD2); - PWMD2.channels = KINETIS_TPM1_CHANNELS; - PWMD2.tpm = TPM1; -#endif - -#if KINETIS_PWM_USE_TPM2 - pwmObjectInit(&PWMD3); - PWMD3.channels = KINETIS_TPM2_CHANNELS; - PWMD3.tpm = TPM2; -#endif -} - -/** - * @brief Configures and activates the PWM peripheral. - * @note Starting a driver that is already in the @p PWM_READY state - * disables all the active channels. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_start(PWMDriver *pwmp) { - uint32_t psc; - int i; - - if (pwmp->state == PWM_STOP) { - /* Clock activation and timer reset.*/ -#if KINETIS_PWM_USE_TPM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_TPM0; - nvicEnableVector(TPM0_IRQn, KINETIS_PWM_TPM0_IRQ_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_TPM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_TPM1; - nvicEnableVector(TPM1_IRQn, KINETIS_PWM_TPM1_IRQ_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_TPM2 - if (&PWMD3 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_TPM2; - nvicEnableVector(TPM2_IRQn, KINETIS_PWM_TPM2_IRQ_PRIORITY); - } -#endif - } - - /* Disable LPTPM counter.*/ - pwmp->tpm->SC = 0; - /* Clear count register.*/ - pwmp->tpm->CNT = 0; - - /* Prescaler value calculation.*/ - psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency); - /* Prescaler must be power of two between 1 and 128.*/ - osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency"); - /* Prescaler register value determination. - Prescaler register value conveniently corresponds to bit position, - i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/ - for (i = 0; i < 8; i++) { - if (psc == (1UL << i)) { - break; - } - } - /* Set prescaler and clock mode. - This also sets the following: - CPWM up-counting mode - Timer overflow interrupt disabled - DMA disabled.*/ - pwmp->tpm->SC = TPMx_SC_CMOD_LPTPM_CLK | i; - /* Configure period.*/ - pwmp->tpm->MOD = pwmp->period - 1; -} - -/** - * @brief Deactivates the PWM peripheral. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_stop(PWMDriver *pwmp) { - - /* If in ready state then disables the PWM clock.*/ - if (pwmp->state == PWM_READY) { -#if KINETIS_PWM_USE_TPM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_TPM0; - nvicDisableVector(TPM0_IRQn); - } -#endif - -#if KINETIS_PWM_USE_TPM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_TPM1; - nvicDisableVector(TPM1_IRQn); - } -#endif - -#if KINETIS_PWM_USE_TPM2 - if (&PWMD3 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_TPM2; - nvicDisableVector(TPM2_IRQn); - } -#endif - /* Disable LPTPM counter.*/ - pwmp->tpm->SC = 0; - pwmp->tpm->MOD = 0; - } -} - - -/** - * @brief Enables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is active using the specified configuration. - * @note The function has effect at the next cycle start. - * @note Channel notification is not enabled. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * @param[in] width PWM pulse width as clock pulses number - * - * @notapi - */ -void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width) { - uint32_t mode = TPMx_CnSC_MSB; /* Edge-aligned PWM mode.*/ - - switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) { - case PWM_OUTPUT_ACTIVE_HIGH: - mode |= TPMx_CnSC_ELSB; - break; - case PWM_OUTPUT_ACTIVE_LOW: - mode |= TPMx_CnSC_ELSA; - break; - } - - if (pwmp->tpm->C[channel].SC & TPMx_CnSC_CHIE) - mode |= TPMx_CnSC_CHIE; - - pwmp->tpm->C[channel].SC = mode; - pwmp->tpm->C[channel].V = width; -} - -/** - * @brief Disables a PWM channel and its notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is disabled and its output line returned to the - * idle state. - * @note The function has effect at the next cycle start. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { - - pwmp->tpm->C[channel].SC = 0; - pwmp->tpm->C[channel].V = 0; -} - -/** - * @brief Enables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { - - pwmp->tpm->SC |= TPMx_SC_TOIE; -} - -/** - * @brief Disables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { - - pwmp->tpm->SC &= ~TPMx_SC_TOIE; -} - -/** - * @brief Enables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - - pwmp->tpm->C[channel].SC |= TPMx_CnSC_CHIE; -} - -/** - * @brief Disables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - - pwmp->tpm->C[channel].SC &= ~TPMx_CnSC_CHIE; -} - -#endif /* HAL_USE_PWM */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.h b/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.h deleted file mode 100644 index 64ff9ee..0000000 --- a/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.h +++ /dev/null @@ -1,305 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2015 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KL2x/pwm_lld.h - * @brief KINETIS PWM subsystem low level driver header. - * - * @addtogroup PWM - * @{ - */ - -#ifndef HAL_PWM_LLD_H_ -#define HAL_PWM_LLD_H_ - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#if !defined(KINETIS_PWM_USE_TPM0) -#define KINETIS_PWM_USE_TPM0 FALSE -#endif -#if !defined(KINETIS_PWM_USE_TPM1) -#define KINETIS_PWM_USE_TPM1 FALSE -#endif -#if !defined(KINETIS_PWM_USE_TPM2) -#define KINETIS_PWM_USE_TPM2 FALSE -#endif - -/** - * @brief Number of PWM channels per PWM driver. - */ -#define PWM_CHANNELS 6 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief If advanced timer features switch. - * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are - * enabled. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__) -#define KINETIS_PWM_USE_ADVANCED FALSE -#endif - -/** - * @brief TPM0 interrupt priority level setting. - * @note The default is 2. - */ -#if !defined(KINETIS_PWM_TPM0_IRQ_PRIORITY)|| defined(__DOXYGEN__) -#define KINETIS_PWM_TPM0_IRQ_PRIORITY 2 -#endif - -/** - * @brief TPM1 interrupt priority level setting. - * @note The default is 2. - */ -#if !defined(KINETIS_PWM_TPM1_IRQ_PRIORITY)|| defined(__DOXYGEN__) -#define KINETIS_PWM_TPM1_IRQ_PRIORITY 2 -#endif - -/** - * @brief TPM2 interrupt priority level setting. - * @note The default is 2. - */ -#if !defined(KINETIS_PWM_TPM2_IRQ_PRIORITY)|| defined(__DOXYGEN__) -#define KINETIS_PWM_TPM2_IRQ_PRIORITY 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/* Configuration checks. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_TPM0 && !KINETIS_HAS_TPM0 -#error "TPM0 not present in the selected device" -#endif - -#if KINETIS_PWM_USE_TPM1 && !KINETIS_HAS_TPM1 -#error "TPM1 not present in the selected device" -#endif - -#if KINETIS_PWM_USE_TPM2 && !KINETIS_HAS_TPM2 -#error "TPM2 not present in the selected device" -#endif - -#if !KINETIS_PWM_USE_TPM0 && !KINETIS_PWM_USE_TPM1 && !KINETIS_PWM_USE_TPM2 -#error "PWM driver activated but no TPM peripheral assigned" -#endif - -#if KINETIS_PWM_USE_TPM0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM0_IRQ_PRIORITY" -#endif - -#if KINETIS_PWM_USE_TPM1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM1_IRQ_PRIORITY" -#endif - -#if KINETIS_PWM_USE_TPM2 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM2_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM2_IRQ_PRIORITY" -#endif - -#if !defined(KINETIS_TPM0_IRQ_VECTOR) -#error "KINETIS_TPM0_IRQ_VECTOR not defined" -#endif - -#if !defined(KINETIS_TPM1_IRQ_VECTOR) -#error "KINETIS_TPM1_IRQ_VECTOR not defined" -#endif - -#if !defined(KINETIS_TPM2_IRQ_VECTOR) -#error "KINETIS_TPM2_IRQ_VECTOR not defined" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a PWM mode. - */ -typedef uint32_t pwmmode_t; - -/** - * @brief Type of a PWM channel. - */ -typedef uint8_t pwmchannel_t; - -/** - * @brief Type of a channels mask. - */ -typedef uint32_t pwmchnmsk_t; - -/** - * @brief Type of a PWM counter. - */ -typedef uint16_t pwmcnt_t; - -/** - * @brief Type of a PWM driver channel configuration structure. - */ -typedef struct { - /** - * @brief Channel active logic level. - */ - pwmmode_t mode; - /** - * @brief Channel callback pointer. - * @note This callback is invoked on the channel compare event. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /* End of the mandatory fields.*/ -} PWMChannelConfig; - -/** - * @brief Type of a PWM driver configuration structure. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - uint32_t frequency; - /** - * @brief PWM period in ticks. - * @note The low level can use assertions in order to catch invalid - * period specifications. - */ - pwmcnt_t period; - /** - * @brief Periodic callback pointer. - * @note This callback is invoked on PWM counter reset. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /** - * @brief Channels configurations. - */ - PWMChannelConfig channels[PWM_CHANNELS]; - /* End of the mandatory fields.*/ -} PWMConfig; - -/** - * @brief Structure representing a PWM driver. - */ -struct PWMDriver { - /** - * @brief Driver state. - */ - pwmstate_t state; - /** - * @brief Current driver configuration data. - */ - const PWMConfig *config; - /** - * @brief Current PWM period in ticks. - */ - pwmcnt_t period; - /** - * @brief Mask of the enabled channels. - */ - pwmchnmsk_t enabled; - /** - * @brief Number of channels in this instance. - */ - pwmchannel_t channels; -#if defined(PWM_DRIVER_EXT_FIELDS) - PWM_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the TPM registers block. - */ - TPM_TypeDef *tpm; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the period the PWM peripheral. - * @details This function changes the period of a PWM unit that has already - * been activated using @p pwmStart(). - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The PWM unit period is changed to the new value. - * @note The function has effect at the next cycle start. - * @note If a period is specified that is shorter than the pulse width - * programmed in one of the channels then the behavior is not - * guaranteed. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] period new cycle time in ticks - * - * @notapi - */ -#define pwm_lld_change_period(pwmp, period) \ - ((pwmp)->tpm->MOD = ((period) - 1)) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__) -extern PWMDriver PWMD1; -#endif -#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__) -extern PWMDriver PWMD2; -#endif -#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__) -extern PWMDriver PWMD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void pwm_lld_init(void); - void pwm_lld_start(PWMDriver *pwmp); - void pwm_lld_stop(PWMDriver *pwmp); - void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width); - void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); - void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); - void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PWM */ - -#endif /* HAL_PWM_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/KL2x/platform.mk b/os/hal/ports/KINETIS/KL2x/platform.mk index dda7a6d..9185022 100644 --- a/os/hal/ports/KINETIS/KL2x/platform.mk +++ b/os/hal/ports/KINETIS/KL2x/platform.mk @@ -1,17 +1,31 @@ -# List of all platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/KL2x/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_ext_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_adc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/KL2x/hal_pwm_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_usb_lld.c +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/KL2x/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/KL2x + +ifeq ($(USE_SMART_BUILD),yes) -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/KL2x \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/TPMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) diff --git a/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk b/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk new file mode 100644 index 0000000..5b5bcbb --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/hal_adc_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1 diff --git a/os/hal/ports/KINETIS/LLD/FTMv1/driver.mk b/os/hal/ports/KINETIS/LLD/FTMv1/driver.mk new file mode 100644 index 0000000..d581c2e --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/FTMv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/FTMv1 diff --git a/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c b/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c new file mode 100644 index 0000000..8c1be78 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.c @@ -0,0 +1,390 @@ +/* + ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file K20x/pwm_lld.c + * @brief KINETIS PWM subsystem low level driver source. + * + * @addtogroup PWM + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief PWMD1 driver identifier. + * @note The driver PWMD1 allocates the timer FTM0 when enabled. + */ +#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) +PWMDriver PWMD1; +#endif + +/** + * @brief PWMD2 driver identifier. + * @note The driver PWMD2 allocates the timer FTM1 when enabled. + */ +#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) +PWMDriver PWMD2; +#endif + +/** + * @brief PWMD3 driver identifier. + * @note The driver PWMD3 allocates the timer FTM2 when enabled. + */ +#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) +PWMDriver PWMD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { + uint32_t sr; + + sr = pwmp->ftm->SC; + pwmp->ftm->SC = sr&(~FTM_SC_TOF); + + if (((sr & FTM_SC_TOF) != 0) && /* Timer Overflow */ + ((sr & FTM_SC_TOIE) != 0) && + (pwmp->config->callback != NULL)) { + pwmp->config->callback(pwmp); + } + + uint8_t n=0; + for(n=0;nchannels;n++) { + sr = pwmp->ftm->CHANNEL[n].CnSC; + pwmp->ftm->CHANNEL[n].CnSC = sr&(~FTM_CnSC_CHF); + if (((sr & FTM_CnSC_CHF) != 0) && + ((sr & FTM_CnSC_CHIE) != 0) && + (pwmp->config->channels[n].callback != NULL)) { + pwmp->config->channels[n].callback(pwmp); + } + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_PWM_USE_FTM0 +/** + * @brief FTM0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_FTM0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_FTM0 */ + +#if KINETIS_PWM_USE_FTM1 +/** + * @brief FTM1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_FTM1_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_FTM1 */ + +#if KINETIS_PWM_USE_FTM2 +/** + * @brief FTM2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_FTM2_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_FTM2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level PWM driver initialization. + * + * @notapi + */ +void pwm_lld_init(void) { + +#if KINETIS_PWM_USE_FTM0 + pwmObjectInit(&PWMD1); + PWMD1.channels = KINETIS_FTM0_CHANNELS; + PWMD1.ftm = FTM0; +#endif + +#if KINETIS_PWM_USE_FTM1 + pwmObjectInit(&PWMD2); + PWMD2.channels = KINETIS_FTM1_CHANNELS; + PWMD2.ftm = FTM1; +#endif + +#if KINETIS_PWM_USE_FTM2 + pwmObjectInit(&PWMD3); + PWMD3.channels = KINETIS_FTM2_CHANNELS; + PWMD3.ftm = FTM2; +#endif +} + +/** + * @brief Configures and activates the PWM peripheral. + * @note Starting a driver that is already in the @p PWM_READY state + * disables all the active channels. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_start(PWMDriver *pwmp) { + uint16_t psc; + uint8_t i=0; + + if (pwmp->state == PWM_STOP) { + /* Clock activation and timer reset.*/ +#if KINETIS_PWM_USE_FTM0 + if (&PWMD1 == pwmp) { + SIM->SCGC6 |= SIM_SCGC6_FTM0; + nvicEnableVector(FTM0_IRQn, KINETIS_PWM_FTM0_PRIORITY); + } +#endif + +#if KINETIS_PWM_USE_FTM1 + if (&PWMD2 == pwmp) { + SIM->SCGC6 |= SIM_SCGC6_FTM1; + nvicEnableVector(FTM1_IRQn, KINETIS_PWM_FTM1_PRIORITY); + } +#endif + +#if KINETIS_PWM_USE_FTM2 + if (&PWMD3 == pwmp) { + SIM->SCGC3 |= SIM_SCGC3_FTM2; + nvicEnableVector(FTM2_IRQn, KINETIS_PWM_FTM2_PRIORITY); + } +#endif + } + pwmp->ftm->MODE = FTM_MODE_FTMEN_MASK|FTM_MODE_PWMSYNC_MASK; + pwmp->ftm->SYNC = FTM_SYNC_CNTMIN_MASK|FTM_SYNC_CNTMAX_MASK + |FTM_SYNC_SWSYNC_MASK; + pwmp->ftm->COMBINE = FTM_COMBINE_SYNCEN3_MASK | FTM_COMBINE_SYNCEN2_MASK + | FTM_COMBINE_SYNCEN1_MASK | FTM_COMBINE_SYNCEN0_MASK; + pwmp->ftm->SYNCONF = FTM_SYNCONF_SYNCMODE_MASK; + + pwmp->ftm->CNTIN = 0x0000; + //~ pwmp->ftm->SC = 0; /* Disable FTM counter.*/ + pwmp->ftm->CNT = 0x0000; /* Clear count register.*/ + + /* Prescaler value calculation.*/ + psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency); + //~ /* Prescaler must be power of two between 1 and 128.*/ + osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency"); + //~ /* Prescaler register value determination. + //~ Prescaler register value conveniently corresponds to bit position, + //~ i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/ + for (i = 0; i < 8; i++) { + if (psc == (unsigned)(1 << i)) { + break; + } + } + + /* Set prescaler and clock mode. + This also sets the following: + CPWMS up-counting mode + Timer overflow interrupt disabled + DMA disabled.*/ + pwmp->ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(i); + /* Configure period */ + pwmp->ftm->MOD = pwmp->period-1; + pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; +} + +/** + * @brief Deactivates the PWM peripheral. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_stop(PWMDriver *pwmp) { + + /* If in ready state then disables the PWM clock.*/ + if (pwmp->state == PWM_READY) { +#if KINETIS_PWM_USE_FTM0 + if (&PWMD1 == pwmp) { + SIM->SCGC6 &= ~SIM_SCGC6_FTM0; + nvicDisableVector(FTM0_IRQn); + } +#endif + +#if KINETIS_PWM_USE_FTM1 + if (&PWMD2 == pwmp) { + SIM->SCGC6 &= ~SIM_SCGC6_FTM1; + nvicDisableVector(FTM1_IRQn); + } +#endif + +#if KINETIS_PWM_USE_FTM2 + if (&PWMD3 == pwmp) { + SIM->SCGC3 &= ~SIM_SCGC3_FTM2; + nvicDisableVector(FTM2_IRQn); + } +#endif + /* Disable FTM counter.*/ + pwmp->ftm->SC = 0; + pwmp->ftm->MOD = 0; + } +} + +/** + * @brief Enables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is active using the specified configuration. + * @note The function has effect at the next cycle start. + * @note Channel notification is not enabled. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * @param[in] width PWM pulse width as clock pulses number + * + * @notapi + */ +void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width) { + uint32_t mode = FTM_CnSC_MSB; /* Edge-aligned PWM mode.*/ + + switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) { + case PWM_OUTPUT_ACTIVE_HIGH: + mode |= FTM_CnSC_ELSB; + break; + case PWM_OUTPUT_ACTIVE_LOW: + mode |= FTM_CnSC_ELSA; + break; + } + + if (pwmp->ftm->CHANNEL[channel].CnSC & FTM_CnSC_CHIE) + mode |= FTM_CnSC_CHIE; + + pwmp->ftm->CHANNEL[channel].CnSC = mode; + pwmp->ftm->CHANNEL[channel].CnV = width; + pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; +} + +/** + * @brief Disables a PWM channel and its notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is disabled and its output line returned to the + * idle state. + * @note The function has effect at the next cycle start. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { + + pwmp->ftm->CHANNEL[channel].CnSC = 0; + pwmp->ftm->CHANNEL[channel].CnV = 0; +} + +/** + * @brief Enables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { + pwmp->ftm->SC |= FTM_SC_TOIE; +} + +/** + * @brief Disables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { + pwmp->ftm->SC &= ~FTM_SC_TOIE; +} + +/** + * @brief Enables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + pwmp->ftm->CHANNEL[channel].CnSC |= FTM_CnSC_CHIE; +} + +/** + * @brief Disables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + pwmp->ftm->CHANNEL[channel].CnSC &= ~FTM_CnSC_CHIE; +} + +#endif /* HAL_USE_PWM */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.h b/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.h new file mode 100644 index 0000000..dd3b721 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/FTMv1/hal_pwm_lld.h @@ -0,0 +1,270 @@ +/* + ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file K20x7/pwm_lld.h + * @brief KINETIS PWM subsystem low level driver header. + * + * @addtogroup PWM + * @{ + */ + +#ifndef HAL_PWM_LLD_H_ +#define HAL_PWM_LLD_H_ + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Number of PWM channels per PWM driver. + */ +#define PWM_CHANNELS 8 + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +#if !defined(KINETIS_PWM_USE_FTM0) + #define KINETIS_PWM_USE_FTM0 FALSE +#endif + +#if !defined(KINETIS_PWM_USE_FTM1) + #define KINETIS_PWM_USE_FTM1 FALSE +#endif + +#if !defined(KINETIS_PWM_USE_FTM2) + #define KINETIS_PWM_USE_FTM2 FALSE +#endif + +/** + * @brief FTM0 interrupt priority level setting. + */ +#if !defined(KINETIS_PWM_FTM0_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_PWM_FTM0_PRIORITY 12 +#endif + +/** + * @brief FTM1 interrupt priority level setting. + */ +#if !defined(KINETIS_PWM_FTM1_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_PWM_FTM1_PRIORITY 12 +#endif + +/** + * @brief FTM2 interrupt priority level setting. + */ +#if !defined(KINETIS_PWM_FTM2_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_PWM_FTM2_PRIORITY 12 +#endif + +/** @} */ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief If advanced timer features switch. + * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are + * enabled. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__) +#define KINETIS_PWM_USE_ADVANCED FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/* Configuration checks. */ +/*===========================================================================*/ + +#if !KINETIS_PWM_USE_FTM0 && !KINETIS_PWM_USE_FTM1 && !KINETIS_PWM_USE_FTM2 +#error "PWM driver activated but no FTM peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a PWM mode. + */ +typedef uint32_t pwmmode_t; + +/** + * @brief Type of a PWM channel. + */ +typedef uint8_t pwmchannel_t; + +/** + * @brief Type of a channels mask. + */ +typedef uint32_t pwmchnmsk_t; + +/** + * @brief Type of a PWM counter. + */ +typedef uint16_t pwmcnt_t; + +/** + * @brief Type of a PWM driver channel configuration structure. + */ +typedef struct { + /** + * @brief Channel active logic level. + */ + pwmmode_t mode; + + /** + * @brief Channel callback pointer. + * @note This callback is invoked on the channel compare event. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /* End of the mandatory fields.*/ +} PWMChannelConfig; + +/** + * @brief Type of a PWM driver configuration structure. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + uint32_t frequency; + /** + * @brief PWM period in ticks. + * @note The low level can use assertions in order to catch invalid + * period specifications. + */ + pwmcnt_t period; + /** + * @brief Periodic callback pointer. + * @note This callback is invoked on PWM counter reset. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /** + * @brief Channels configurations. + */ + PWMChannelConfig channels[PWM_CHANNELS]; + /* End of the mandatory fields.*/ +} PWMConfig; + +/** + * @brief Structure representing a PWM driver. + */ +struct PWMDriver { + /** + * @brief Driver state. + */ + pwmstate_t state; + /** + * @brief Current driver configuration data. + */ + const PWMConfig *config; + /** + * @brief Current PWM period in ticks. + */ + pwmcnt_t period; + /** + * @brief Mask of the enabled channels. + */ + pwmchnmsk_t enabled; + /** + * @brief Number of channels in this instance. + */ + pwmchannel_t channels; +#if defined(PWM_DRIVER_EXT_FIELDS) + PWM_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the FTM registers block. + */ + FTM_TypeDef *ftm; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the period the PWM peripheral. + * @details This function changes the period of a PWM unit that has already + * been activated using @p pwmStart(). + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The PWM unit period is changed to the new value. + * @note The function has effect at the next cycle start. + * @note If a period is specified that is shorter than the pulse width + * programmed in one of the channels then the behavior is not + * guaranteed. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] period new cycle time in ticks + * + * @notapi + */ +#define pwm_lld_change_period(pwmp, period) \ + do { \ + (pwmp)->ftm->MOD = ((period) - 1); \ + pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK;\ + } while(0) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) +extern PWMDriver PWMD1; +#endif +#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) +extern PWMDriver PWMD2; +#endif +#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) +extern PWMDriver PWMD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void pwm_lld_init(void); + void pwm_lld_start(PWMDriver *pwmp); + void pwm_lld_stop(PWMDriver *pwmp); + void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width); + void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); + void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); + void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PWM */ + +#endif /* HAL_PWM_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk b/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk new file mode 100644 index 0000000..1e9aca0 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1 diff --git a/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h index 17125b1..376c0a6 100644 --- a/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/KINETIS/LLD/GPIOv1/hal_pal_lld.h @@ -82,6 +82,11 @@ typedef uint32_t ioline_t; */ typedef GPIO_TypeDef *ioportid_t; +/** + * @brief Type of an pad identifier. + */ +typedef uint32_t iopadid_t; + /** * @brief Port Configuration. * @details This structure stores the configuration parameters of all pads diff --git a/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk b/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk new file mode 100644 index 0000000..19658e5 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1 diff --git a/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c index aa47aa3..6bb9f44 100644 --- a/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c +++ b/os/hal/ports/KINETIS/LLD/I2Cv1/hal_i2c_lld.c @@ -442,7 +442,9 @@ static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, /* wait until the bus is released */ /* Calculating the time window for the timeout on the busy bus condition.*/ start = osalOsGetSystemTimeX(); -#if defined(OSAL_TIME_MS2I) +#if defined(OSAL_MS2I) + end = start + OSAL_MS2I(KINETIS_I2C_BUSY_TIMEOUT); +#elif defined(OSAL_TIME_MS2I) end = start + OSAL_TIME_MS2I(KINETIS_I2C_BUSY_TIMEOUT); #elif defined(OSAL_TIME_MS2ST) end = start + OSAL_TIME_MS2ST(KINETIS_I2C_BUSY_TIMEOUT); @@ -458,7 +460,7 @@ static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, break; /* If the system time went outside the allowed window then a timeout condition is returned.*/ - if (!osalOsIsTimeWithinX(osalOsGetSystemTimeX(), start, end)) { + if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) { return MSG_TIMEOUT; } osalSysUnlock(); diff --git a/os/hal/ports/KINETIS/LLD/PITv1/driver.mk b/os/hal/ports/KINETIS/LLD/PITv1/driver.mk new file mode 100644 index 0000000..065556b --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PITv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_gpt_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1 diff --git a/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk b/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk new file mode 100644 index 0000000..ca3b9df --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/hal_ext_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1 diff --git a/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk b/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk new file mode 100644 index 0000000..69f27db --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1/hal_sdc_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1 diff --git a/os/hal/ports/KINETIS/LLD/SPIv1/driver.mk b/os/hal/ports/KINETIS/LLD/SPIv1/driver.mk new file mode 100644 index 0000000..394b40a --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SPIv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SPIv1 diff --git a/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c new file mode 100644 index 0000000..7e643f2 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.c @@ -0,0 +1,539 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SPIv1/hal_spi_lld.c + * @brief KINETIS SPI subsystem low level driver source. + * + * @addtogroup SPI + * @{ + */ + +#include "hal.h" + +#if HAL_USE_SPI || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#if !defined(KINETIS_SPI0_RX_DMA_IRQ_PRIORITY) +#define KINETIS_SPI0_RX_DMA_IRQ_PRIORITY 8 +#endif + +#if !defined(KINETIS_SPI0_RX_DMAMUX_CHANNEL) +#define KINETIS_SPI0_RX_DMAMUX_CHANNEL 0 +#endif + +#if !defined(KINETIS_SPI0_RX_DMA_CHANNEL) +#define KINETIS_SPI0_RX_DMA_CHANNEL 0 +#endif + +#if !defined(KINETIS_SPI0_TX_DMAMUX_CHANNEL) +#define KINETIS_SPI0_TX_DMAMUX_CHANNEL 1 +#endif + +#if !defined(KINETIS_SPI0_TX_DMA_CHANNEL) +#define KINETIS_SPI0_TX_DMA_CHANNEL 1 +#endif + +#if !defined(KINETIS_SPI1_RX_DMA_IRQ_PRIORITY) +#define KINETIS_SPI1_RX_DMA_IRQ_PRIORITY 8 +#endif + +#if !defined(KINETIS_SPI1_RX_DMAMUX_CHANNEL) +#define KINETIS_SPI1_RX_DMAMUX_CHANNEL 0 +#endif + +#if !defined(KINETIS_SPI1_RX_DMA_CHANNEL) +#define KINETIS_SPI1_RX_DMA_CHANNEL 0 +#endif + +#if !defined(KINETIS_SPI1_TX_DMAMUX_CHANNEL) +#define KINETIS_SPI1_TX_DMAMUX_CHANNEL 1 +#endif + +#if !defined(KINETIS_SPI1_TX_DMA_CHANNEL) +#define KINETIS_SPI1_TX_DMA_CHANNEL 1 +#endif + +#if KINETIS_SPI_USE_SPI0 +#define DMAMUX_SPI_RX_SOURCE 16 +#define DMAMUX_SPI_TX_SOURCE 17 +#endif + +#if KINETIS_SPI_USE_SPI1 +#define DMAMUX_SPI_RX_SOURCE 18 +#define DMAMUX_SPI_TX_SOURCE 19 +#endif + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief SPI0 driver identifier.*/ +#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) +SPIDriver SPID1; +#endif + +/** @brief SPI1 driver identifier.*/ +#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) +SPIDriver SPID2; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/* Use a dummy byte as the source/destination when a buffer is not provided */ +/* Note: The MMC driver relies on 0xFF being sent for dummy bytes. */ +static volatile uint16_t dmaRxDummy; +static uint16_t dmaTxDummy = 0xFFFF; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void spi_start_xfer(SPIDriver *spip, bool polling) +{ + /* + * Enable the DSPI peripheral in master mode. + * Clear the TX and RX FIFOs. + * */ + spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_CLR_TXF | SPIx_MCR_CLR_RXF; + + /* If we are not polling then enable DMA */ + if (!polling) { + + /* Enable receive dma and transmit dma */ + spip->spi->RSER = SPIx_RSER_RFDF_DIRS | SPIx_RSER_RFDF_RE | + SPIx_RSER_TFFF_RE | SPIx_RSER_TFFF_DIRS; + + /* Configure RX DMA */ + if (spip->rxbuf) { + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)spip->rxbuf; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = spip->word_size; + } else { + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)&dmaRxDummy; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = 0; + } + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].BITER_ELINKNO = spip->count; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CITER_ELINKNO = spip->count; + + /* Enable Request Register (ERQ) for RX by writing 0 to SERQ */ + DMA->SERQ = KINETIS_SPI0_RX_DMA_CHANNEL; + + /* Configure TX DMA */ + if (spip->txbuf) { + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)spip->txbuf; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = spip->word_size; + } else { + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)&dmaTxDummy; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = 0; + } + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].BITER_ELINKNO = spip->count; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CITER_ELINKNO = spip->count; + + /* Enable Request Register (ERQ) for TX by writing 1 to SERQ */ + DMA->SERQ = KINETIS_SPI0_TX_DMA_CHANNEL; + } +} + +static void spi_stop_xfer(SPIDriver *spip) +{ + /* Halt the DSPI peripheral */ + spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_HALT; + + /* Clear all the flags which are currently set. */ + spip->spi->SR |= spip->spi->SR; +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ + DMA->CINT = KINETIS_SPI0_RX_DMA_CHANNEL; + + spi_stop_xfer(&SPID1); + + _spi_isr_code(&SPID1); + + OSAL_IRQ_EPILOGUE(); +} + +#endif + +#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { + OSAL_IRQ_PROLOGUE(); + + /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ + DMA->CINT = KINETIS_SPI1_RX_DMA_CHANNEL; + + spi_stop_xfer(&SPID2); + + _spi_isr_code(&SPID2); + + OSAL_IRQ_EPILOGUE(); +} + +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level SPI driver initialization. + * + * @notapi + */ +void spi_lld_init(void) { +#if KINETIS_SPI_USE_SPI0 + spiObjectInit(&SPID1); +#endif +#if KINETIS_SPI_USE_SPI1 + spiObjectInit(&SPID2); +#endif +} + +/** + * @brief Configures and activates the SPI peripheral. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_start(SPIDriver *spip) { + + /* If in stopped state then enables the SPI and DMA clocks.*/ + if (spip->state == SPI_STOP) { + +#if KINETIS_SPI_USE_SPI0 + if (&SPID1 == spip) { + + /* Enable the clock for SPI0 */ + SIM->SCGC6 |= SIM_SCGC6_SPI0; + + SPID1.spi = SPI0; + + if (spip->config->tar0) { + spip->spi->CTAR[0] = spip->config->tar0; + } else { + spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; + } + } +#endif + +#if KINETIS_SPI_USE_SPI1 + if (&SPID2 == spip) { + + /* Enable the clock for SPI0 */ + SIM->SCGC6 |= SIM_SCGC6_SPI1; + + SPID2.spi = SPI1; + + if (spip->config->tar0) { + spip->spi->CTAR[0] = spip->config->tar0; + } else { + spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; + } + } +#endif + + nvicEnableVector(DMA0_IRQn, KINETIS_SPI0_RX_DMA_IRQ_PRIORITY); + + SIM->SCGC6 |= SIM_SCGC6_DMAMUX; + SIM->SCGC7 |= SIM_SCGC7_DMA; + + /* Clear DMA error flags */ + DMA->ERR = 0x0F; + +#if KINETIS_SPI_USE_SPI0 + /* Rx, select SPI Rx FIFO */ + DMAMUX->CHCFG[KINETIS_SPI0_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | + DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); + + /* Tx, select SPI Tx FIFO */ + DMAMUX->CHCFG[KINETIS_SPI0_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | + DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); + + /* Extract the frame size from the TAR */ + uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & + SPIx_CTARn_FMSZ_MASK) + 1; + + /* DMA transfer size is 16 bits for a frame size > 8 bits */ + uint16_t dma_size = frame_size > 8 ? 1 : 0; + + /* DMA word size is 2 for a 16 bit frame size */ + spip->word_size = frame_size > 8 ? 2 : 1; + + /* configure DMA RX fixed values */ + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI0->POPR; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SOFF = 0; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SLAST = 0; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DLASTSGA = 0; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | + DMA_ATTR_DSIZE(dma_size); + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; + DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | + DMA_CSR_INTMAJOR_MASK; + + /* configure DMA TX fixed values */ + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SLAST = 0; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI0->PUSHR; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DOFF = 0; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DLASTSGA = 0; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | + DMA_ATTR_DSIZE(dma_size); + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; + DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; +#endif + +#if KINETIS_SPI_USE_SPI1 + /* Rx, select SPI Rx FIFO */ + DMAMUX->CHCFG[KINETIS_SPI1_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | + DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); + + /* Tx, select SPI Tx FIFO */ + DMAMUX->CHCFG[KINETIS_SPI1_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | + DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); + + /* Extract the frame size from the TAR */ + uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & + SPIx_CTARn_FMSZ_MASK) + 1; + + /* DMA transfer size is 16 bits for a frame size > 8 bits */ + uint16_t dma_size = frame_size > 8 ? 1 : 0; + + /* DMA word size is 2 for a 16 bit frame size */ + spip->word_size = frame_size > 8 ? 2 : 1; + + /* configure DMA RX fixed values */ + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI1->POPR; + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SOFF = 0; + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SLAST = 0; + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].DLASTSGA = 0; + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | + DMA_ATTR_DSIZE(dma_size); + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; + DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | + DMA_CSR_INTMAJOR_MASK; + + /* configure DMA TX fixed values */ + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].SLAST = 0; + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI1->PUSHR; + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DOFF = 0; + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DLASTSGA = 0; + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | + DMA_ATTR_DSIZE(dma_size); + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; + DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; +#endif + } +} + +/** + * @brief Deactivates the SPI peripheral. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_stop(SPIDriver *spip) { + + /* If in ready state then disables the SPI clock.*/ + if (spip->state == SPI_READY) { + + nvicDisableVector(DMA0_IRQn); + + SIM->SCGC7 &= ~SIM_SCGC7_DMA; + SIM->SCGC6 &= ~SIM_SCGC6_DMAMUX; + +#if KINETIS_SPI_USE_SPI0 + if (&SPID1 == spip) { + /* SPI halt.*/ + spip->spi->MCR |= SPIx_MCR_HALT; + } + + /* Disable the clock for SPI0 */ + SIM->SCGC6 &= ~SIM_SCGC6_SPI0; +#endif + +#if KINETIS_SPI_USE_SPI1 + if (&SPID2 == spip) { + /* SPI halt.*/ + spip->spi->MCR |= SPIx_MCR_HALT; + } + + /* Disable the clock for SPI1 */ + SIM->SCGC6 &= ~SIM_SCGC6_SPI1; +#endif + } +} + +/** + * @brief Asserts the slave select signal and prepares for transfers. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_select(SPIDriver *spip) { + + palClearPad(spip->config->ssport, spip->config->sspad); +} + +/** + * @brief Deasserts the slave select signal. + * @details The previously selected peripheral is unselected. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_unselect(SPIDriver *spip) { + + palSetPad(spip->config->ssport, spip->config->sspad); +} + +/** + * @brief Ignores data on the SPI bus. + * @details This asynchronous function starts the transmission of a series of + * idle words on the SPI bus and ignores the received data. + * @post At the end of the operation the configured callback is invoked. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to be ignored + * + * @notapi + */ +void spi_lld_ignore(SPIDriver *spip, size_t n) { + + spip->count = n; + spip->rxbuf = NULL; + spip->txbuf = NULL; + + spi_start_xfer(spip, false); +} + +/** + * @brief Exchanges data on the SPI bus. + * @details This asynchronous function starts a simultaneous transmit/receive + * operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to be exchanged + * @param[in] txbuf the pointer to the transmit buffer + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void spi_lld_exchange(SPIDriver *spip, size_t n, + const void *txbuf, void *rxbuf) { + + spip->count = n; + spip->rxbuf = rxbuf; + spip->txbuf = txbuf; + + spi_start_xfer(spip, false); +} + +/** + * @brief Sends data over the SPI bus. + * @details This asynchronous function starts a transmit operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to send + * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi + */ +void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { + + spip->count = n; + spip->rxbuf = NULL; + spip->txbuf = (void *)txbuf; + + spi_start_xfer(spip, false); +} + +/** + * @brief Receives data from the SPI bus. + * @details This asynchronous function starts a receive operation. + * @post At the end of the operation the configured callback is invoked. + * @note The buffers are organized as uint8_t arrays for data sizes below or + * equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] n number of words to receive + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { + + spip->count = n; + spip->rxbuf = rxbuf; + spip->txbuf = NULL; + + spi_start_xfer(spip, false); +} + +/** + * @brief Exchanges one frame using a polled wait. + * @details This synchronous function exchanges one frame using a polled + * synchronization method. This function is useful when exchanging + * small amount of data on high speed channels, usually in this + * situation is much more efficient just wait for completion using + * polling than suspending the thread waiting for an interrupt. + * + * @param[in] spip pointer to the @p SPIDriver object + * @param[in] frame the data frame to send over the SPI bus + * @return The received data frame from the SPI bus. + */ +uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { + + spi_start_xfer(spip, true); + + spip->spi->PUSHR = SPIx_PUSHR_TXDATA(frame); + + while ((spip->spi->SR & SPIx_SR_RFDF) == 0) + ; + + frame = spip->spi->POPR; + + spi_stop_xfer(spip); + + return frame; +} + +#endif /* HAL_USE_SPI */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.h new file mode 100644 index 0000000..d25dd75 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/SPIv1/hal_spi_lld.h @@ -0,0 +1,261 @@ +/* + ChibiOS - Copyright (C) 2014-2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file SPIv1/hal_spi_lld.h + * @brief KINETIS SPI subsystem low level driver header. + * + * @addtogroup SPI + * @{ + */ + +#ifndef HAL_SPI_LLD_H_ +#define HAL_SPI_LLD_H_ + +#if HAL_USE_SPI || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief SPI0 driver enable switch. + * @details If set to @p TRUE the support for SPI0 is included. + * @note The default is @p FALSE. + */ +#if !defined(KINETIS_SPI_USE_SPI0) || defined(__DOXYGEN__) +#define KINETIS_SPI_USE_SPI0 FALSE +#endif + +/** + * @brief SPI0 interrupt priority level setting. + */ +#if !defined(KINETIS_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SPI_SPI0_IRQ_PRIORITY 10 +#endif + +/** + * @brief SPI1 driver enable switch. + * @details If set to @p TRUE the support for SPI0 is included. + * @note The default is @p FALSE. + */ +#if !defined(KINETIS_SPI_USE_SPI1) || defined(__DOXYGEN__) +#define KINETIS_SPI_USE_SPI1 FALSE +#endif + +/** + * @brief SPI1 interrupt priority level setting. + */ +#if !defined(KINETIS_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define KINETIS_SPI_SPI1_IRQ_PRIORITY 10 +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if KINETIS_SPI_USE_SPI0 && !KINETIS_HAS_SPI0 +#error "SPI0 not present in the selected device" +#endif + +#if KINETIS_SPI_USE_SPI1 && !KINETIS_HAS_SPI1 +#error "SPI1 not present in the selected device" +#endif + +#if KINETIS_SPI_USE_SPI0 && KINETIS_SPI_USE_SPI1 +#error "Only one SPI peripheral can be enabled" +#endif + +#if !(KINETIS_SPI_USE_SPI0 || KINETIS_SPI_USE_SPI1) +#error "SPI driver activated but no SPI peripheral assigned" +#endif + +#if KINETIS_SPI_USE_SPI0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to SPI0" +#endif + +#if KINETIS_SPI_USE_SPI1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to SPI1" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a structure representing an SPI driver. + */ +typedef struct SPIDriver SPIDriver; + +/** + * @brief SPI notification callback type. + * + * @param[in] spip pointer to the @p SPIDriver object triggering the + * callback + */ +typedef void (*spicallback_t)(SPIDriver *spip); + +/** + * @brief Driver configuration structure. + */ +typedef struct { + /** + * @brief Operation complete callback or @p NULL. + */ + spicallback_t end_cb; + /* End of the mandatory fields.*/ + /** + * @brief The chip select line port - when not using pcs. + */ + ioportid_t ssport; + /** + * @brief The chip select line pad number - when not using pcs. + */ + uint16_t sspad; + /** + * @brief SPI initialization data. + */ + uint32_t tar0; +} SPIConfig; + +/** + * @brief Structure representing a SPI driver. + */ +struct SPIDriver { + /** + * @brief Driver state. + */ + spistate_t state; + /** + * @brief Current configuration data. + */ + const SPIConfig *config; +#if SPI_USE_WAIT || defined(__DOXYGEN__) + /** + * @brief Waiting thread. + */ + thread_reference_t thread; +#endif /* SPI_USE_WAIT */ +#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the bus. + */ + mutex_t mutex; +#endif /* SPI_USE_MUTUAL_EXCLUSION */ +#if defined(SPI_DRIVER_EXT_FIELDS) + SPI_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the SPIx registers block. + */ + SPI_TypeDef *spi; + /** + * @brief Number of bytes/words of data to transfer. + */ + size_t count; + /** + * @brief Word size in bytes. + */ + size_t word_size; + /** + * @brief Pointer to the buffer with data to send. + */ + const uint8_t *txbuf; + /** + * @brief Pointer to the buffer to put received data. + */ + uint8_t *rxbuf; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/* TAR settings for n bits at SYSCLK / 2 */ +#define KINETIS_SPI_TAR_SYSCLK_DIV_2(n)\ + SPIx_CTARn_FMSZ((n) - 1) | \ + SPIx_CTARn_CPOL | \ + SPIx_CTARn_CPHA | \ + SPIx_CTARn_DBR | \ + SPIx_CTARn_PBR(0) | \ + SPIx_CTARn_BR(0) | \ + SPIx_CTARn_CSSCK(0) | \ + SPIx_CTARn_ASC(0) | \ + SPIx_CTARn_DT(0) + +/* TAR settings for n bits at SYSCLK / 4096 for debugging */ +#define KINETIS_SPI_TAR_SYSCLK_DIV_4096(n) \ + SPIx_CTARn_FMSZ(((n) - 1)) | \ + SPIx_CTARn_CPOL | \ + SPIx_CTARn_CPHA | \ + SPIx_CTARn_PBR(0) | \ + SPIx_CTARn_BR(0xB) | \ + SPIx_CTARn_CSSCK(0xB) | \ + SPIx_CTARn_ASC(0x7) | \ + SPIx_CTARn_DT(0xB) + +#define KINETIS_SPI_TAR_8BIT_FAST KINETIS_SPI_TAR_SYSCLK_DIV_2(8) +#define KINETIS_SPI_TAR_8BIT_SLOW KINETIS_SPI_TAR_SYSCLK_DIV_4096(8) + +#define KINETIS_SPI_TAR0_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) +#define KINETIS_SPI_TAR1_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_SPI_USE_SPI0 && !defined(__DOXYGEN__) +extern SPIDriver SPID1; +#endif + +#if KINETIS_SPI_USE_SPI1 && !defined(__DOXYGEN__) +extern SPIDriver SPID2; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void spi_lld_init(void); + void spi_lld_start(SPIDriver *spip); + void spi_lld_stop(SPIDriver *spip); + void spi_lld_select(SPIDriver *spip); + void spi_lld_unselect(SPIDriver *spip); + void spi_lld_ignore(SPIDriver *spip, size_t n); + void spi_lld_exchange(SPIDriver *spip, size_t n, + const void *txbuf, void *rxbuf); + void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); + void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); + uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SPI */ + +#endif /* HAL_SPI_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/TPMv1/driver.mk b/os/hal/ports/KINETIS/LLD/TPMv1/driver.mk new file mode 100644 index 0000000..d4a0eef --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/TPMv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/TPMv1 diff --git a/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c b/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c new file mode 100644 index 0000000..a5eb46a --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.c @@ -0,0 +1,388 @@ +/* + ChibiOS - Copyright (C) 2014 Adam J. Porter + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file KL2x/pwm_lld.c + * @brief KINETIS PWM subsystem low level driver source. + * + * @addtogroup PWM + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief PWMD1 driver identifier. + * @note The driver PWMD1 allocates the timer TPM0 when enabled. + */ +#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__) +PWMDriver PWMD1; +#endif + +/** + * @brief PWMD2 driver identifier. + * @note The driver PWMD2 allocates the timer TPM1 when enabled. + */ +#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__) +PWMDriver PWMD2; +#endif + +/** + * @brief PWMD3 driver identifier. + * @note The driver PWMD3 allocates the timer TPM2 when enabled. + */ +#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__) +PWMDriver PWMD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { + uint32_t sr; + + sr = pwmp->tpm->STATUS; + pwmp->tpm->STATUS = 0xFFFFFFFF; + + if (((sr & TPMx_STATUS_TOF) != 0) && + (pwmp->config->callback != NULL)) + pwmp->config->callback(pwmp); + if (((sr & TPMx_STATUS_CH0F) != 0) && + (pwmp->config->channels[0].callback != NULL)) + pwmp->config->channels[0].callback(pwmp); + if (((sr & TPMx_STATUS_CH1F) != 0) && + (pwmp->config->channels[1].callback != NULL)) + pwmp->config->channels[1].callback(pwmp); + if (((sr & TPMx_STATUS_CH2F) != 0) && + (pwmp->config->channels[2].callback != NULL)) + pwmp->config->channels[2].callback(pwmp); + if (((sr & TPMx_STATUS_CH3F) != 0) && + (pwmp->config->channels[3].callback != NULL)) + pwmp->config->channels[3].callback(pwmp); + if (((sr & TPMx_STATUS_CH4F) != 0) && + (pwmp->config->channels[4].callback != NULL)) + pwmp->config->channels[4].callback(pwmp); + if (((sr & TPMx_STATUS_CH5F) != 0) && + (pwmp->config->channels[5].callback != NULL)) + pwmp->config->channels[5].callback(pwmp); +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if KINETIS_PWM_USE_TPM0 +/** + * @brief TPM0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_TPM0_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_TPM0 */ + +#if KINETIS_PWM_USE_TPM1 +/** + * @brief TPM1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_TPM1_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_TPM1 */ + +#if KINETIS_PWM_USE_TPM2 +/** + * @brief TPM2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(KINETIS_TPM2_IRQ_VECTOR) { + + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} +#endif /* KINETIS_PWM_USE_TPM2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level PWM driver initialization. + * + * @notapi + */ +void pwm_lld_init(void) { + +#if KINETIS_PWM_USE_TPM0 + pwmObjectInit(&PWMD1); + PWMD1.channels = KINETIS_TPM0_CHANNELS; + PWMD1.tpm = TPM0; +#endif + +#if KINETIS_PWM_USE_TPM1 + pwmObjectInit(&PWMD2); + PWMD2.channels = KINETIS_TPM1_CHANNELS; + PWMD2.tpm = TPM1; +#endif + +#if KINETIS_PWM_USE_TPM2 + pwmObjectInit(&PWMD3); + PWMD3.channels = KINETIS_TPM2_CHANNELS; + PWMD3.tpm = TPM2; +#endif +} + +/** + * @brief Configures and activates the PWM peripheral. + * @note Starting a driver that is already in the @p PWM_READY state + * disables all the active channels. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_start(PWMDriver *pwmp) { + uint32_t psc; + int i; + + if (pwmp->state == PWM_STOP) { + /* Clock activation and timer reset.*/ +#if KINETIS_PWM_USE_TPM0 + if (&PWMD1 == pwmp) { + SIM->SCGC6 |= SIM_SCGC6_TPM0; + nvicEnableVector(TPM0_IRQn, KINETIS_PWM_TPM0_IRQ_PRIORITY); + } +#endif + +#if KINETIS_PWM_USE_TPM1 + if (&PWMD2 == pwmp) { + SIM->SCGC6 |= SIM_SCGC6_TPM1; + nvicEnableVector(TPM1_IRQn, KINETIS_PWM_TPM1_IRQ_PRIORITY); + } +#endif + +#if KINETIS_PWM_USE_TPM2 + if (&PWMD3 == pwmp) { + SIM->SCGC6 |= SIM_SCGC6_TPM2; + nvicEnableVector(TPM2_IRQn, KINETIS_PWM_TPM2_IRQ_PRIORITY); + } +#endif + } + + /* Disable LPTPM counter.*/ + pwmp->tpm->SC = 0; + /* Clear count register.*/ + pwmp->tpm->CNT = 0; + + /* Prescaler value calculation.*/ + psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency); + /* Prescaler must be power of two between 1 and 128.*/ + osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency"); + /* Prescaler register value determination. + Prescaler register value conveniently corresponds to bit position, + i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/ + for (i = 0; i < 8; i++) { + if (psc == (1UL << i)) { + break; + } + } + /* Set prescaler and clock mode. + This also sets the following: + CPWM up-counting mode + Timer overflow interrupt disabled + DMA disabled.*/ + pwmp->tpm->SC = TPMx_SC_CMOD_LPTPM_CLK | i; + /* Configure period.*/ + pwmp->tpm->MOD = pwmp->period - 1; +} + +/** + * @brief Deactivates the PWM peripheral. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_stop(PWMDriver *pwmp) { + + /* If in ready state then disables the PWM clock.*/ + if (pwmp->state == PWM_READY) { +#if KINETIS_PWM_USE_TPM0 + if (&PWMD1 == pwmp) { + SIM->SCGC6 &= ~SIM_SCGC6_TPM0; + nvicDisableVector(TPM0_IRQn); + } +#endif + +#if KINETIS_PWM_USE_TPM1 + if (&PWMD2 == pwmp) { + SIM->SCGC6 &= ~SIM_SCGC6_TPM1; + nvicDisableVector(TPM1_IRQn); + } +#endif + +#if KINETIS_PWM_USE_TPM2 + if (&PWMD3 == pwmp) { + SIM->SCGC6 &= ~SIM_SCGC6_TPM2; + nvicDisableVector(TPM2_IRQn); + } +#endif + /* Disable LPTPM counter.*/ + pwmp->tpm->SC = 0; + pwmp->tpm->MOD = 0; + } +} + + +/** + * @brief Enables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is active using the specified configuration. + * @note The function has effect at the next cycle start. + * @note Channel notification is not enabled. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * @param[in] width PWM pulse width as clock pulses number + * + * @notapi + */ +void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width) { + uint32_t mode = TPMx_CnSC_MSB; /* Edge-aligned PWM mode.*/ + + switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) { + case PWM_OUTPUT_ACTIVE_HIGH: + mode |= TPMx_CnSC_ELSB; + break; + case PWM_OUTPUT_ACTIVE_LOW: + mode |= TPMx_CnSC_ELSA; + break; + } + + if (pwmp->tpm->C[channel].SC & TPMx_CnSC_CHIE) + mode |= TPMx_CnSC_CHIE; + + pwmp->tpm->C[channel].SC = mode; + pwmp->tpm->C[channel].V = width; +} + +/** + * @brief Disables a PWM channel and its notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is disabled and its output line returned to the + * idle state. + * @note The function has effect at the next cycle start. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { + + pwmp->tpm->C[channel].SC = 0; + pwmp->tpm->C[channel].V = 0; +} + +/** + * @brief Enables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { + + pwmp->tpm->SC |= TPMx_SC_TOIE; +} + +/** + * @brief Disables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { + + pwmp->tpm->SC &= ~TPMx_SC_TOIE; +} + +/** + * @brief Enables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + + pwmp->tpm->C[channel].SC |= TPMx_CnSC_CHIE; +} + +/** + * @brief Disables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + + pwmp->tpm->C[channel].SC &= ~TPMx_CnSC_CHIE; +} + +#endif /* HAL_USE_PWM */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.h b/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.h new file mode 100644 index 0000000..9821369 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/TPMv1/hal_pwm_lld.h @@ -0,0 +1,305 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Adam J. Porter + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file KL2x/pwm_lld.h + * @brief KINETIS PWM subsystem low level driver header. + * + * @addtogroup PWM + * @{ + */ + +#ifndef HAL_PWM_LLD_H_ +#define HAL_PWM_LLD_H_ + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#if !defined(KINETIS_PWM_USE_TPM0) +#define KINETIS_PWM_USE_TPM0 FALSE +#endif +#if !defined(KINETIS_PWM_USE_TPM1) +#define KINETIS_PWM_USE_TPM1 FALSE +#endif +#if !defined(KINETIS_PWM_USE_TPM2) +#define KINETIS_PWM_USE_TPM2 FALSE +#endif + +/** + * @brief Number of PWM channels per PWM driver. + */ +#define PWM_CHANNELS 6 + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief If advanced timer features switch. + * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are + * enabled. + * @note The default is @p TRUE. + */ +#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__) +#define KINETIS_PWM_USE_ADVANCED FALSE +#endif + +/** + * @brief TPM0 interrupt priority level setting. + * @note The default is 2. + */ +#if !defined(KINETIS_PWM_TPM0_IRQ_PRIORITY)|| defined(__DOXYGEN__) +#define KINETIS_PWM_TPM0_IRQ_PRIORITY 2 +#endif + +/** + * @brief TPM1 interrupt priority level setting. + * @note The default is 2. + */ +#if !defined(KINETIS_PWM_TPM1_IRQ_PRIORITY)|| defined(__DOXYGEN__) +#define KINETIS_PWM_TPM1_IRQ_PRIORITY 2 +#endif + +/** + * @brief TPM2 interrupt priority level setting. + * @note The default is 2. + */ +#if !defined(KINETIS_PWM_TPM2_IRQ_PRIORITY)|| defined(__DOXYGEN__) +#define KINETIS_PWM_TPM2_IRQ_PRIORITY 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/* Configuration checks. */ +/*===========================================================================*/ + +#if KINETIS_PWM_USE_TPM0 && !KINETIS_HAS_TPM0 +#error "TPM0 not present in the selected device" +#endif + +#if KINETIS_PWM_USE_TPM1 && !KINETIS_HAS_TPM1 +#error "TPM1 not present in the selected device" +#endif + +#if KINETIS_PWM_USE_TPM2 && !KINETIS_HAS_TPM2 +#error "TPM2 not present in the selected device" +#endif + +#if !KINETIS_PWM_USE_TPM0 && !KINETIS_PWM_USE_TPM1 && !KINETIS_PWM_USE_TPM2 +#error "PWM driver activated but no TPM peripheral assigned" +#endif + +#if KINETIS_PWM_USE_TPM0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM0_IRQ_PRIORITY" +#endif + +#if KINETIS_PWM_USE_TPM1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM1_IRQ_PRIORITY" +#endif + +#if KINETIS_PWM_USE_TPM2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_PWM_TPM2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to KINETIS_PWM_TPM2_IRQ_PRIORITY" +#endif + +#if !defined(KINETIS_TPM0_IRQ_VECTOR) +#error "KINETIS_TPM0_IRQ_VECTOR not defined" +#endif + +#if !defined(KINETIS_TPM1_IRQ_VECTOR) +#error "KINETIS_TPM1_IRQ_VECTOR not defined" +#endif + +#if !defined(KINETIS_TPM2_IRQ_VECTOR) +#error "KINETIS_TPM2_IRQ_VECTOR not defined" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a PWM mode. + */ +typedef uint32_t pwmmode_t; + +/** + * @brief Type of a PWM channel. + */ +typedef uint8_t pwmchannel_t; + +/** + * @brief Type of a channels mask. + */ +typedef uint32_t pwmchnmsk_t; + +/** + * @brief Type of a PWM counter. + */ +typedef uint16_t pwmcnt_t; + +/** + * @brief Type of a PWM driver channel configuration structure. + */ +typedef struct { + /** + * @brief Channel active logic level. + */ + pwmmode_t mode; + /** + * @brief Channel callback pointer. + * @note This callback is invoked on the channel compare event. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /* End of the mandatory fields.*/ +} PWMChannelConfig; + +/** + * @brief Type of a PWM driver configuration structure. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + uint32_t frequency; + /** + * @brief PWM period in ticks. + * @note The low level can use assertions in order to catch invalid + * period specifications. + */ + pwmcnt_t period; + /** + * @brief Periodic callback pointer. + * @note This callback is invoked on PWM counter reset. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /** + * @brief Channels configurations. + */ + PWMChannelConfig channels[PWM_CHANNELS]; + /* End of the mandatory fields.*/ +} PWMConfig; + +/** + * @brief Structure representing a PWM driver. + */ +struct PWMDriver { + /** + * @brief Driver state. + */ + pwmstate_t state; + /** + * @brief Current driver configuration data. + */ + const PWMConfig *config; + /** + * @brief Current PWM period in ticks. + */ + pwmcnt_t period; + /** + * @brief Mask of the enabled channels. + */ + pwmchnmsk_t enabled; + /** + * @brief Number of channels in this instance. + */ + pwmchannel_t channels; +#if defined(PWM_DRIVER_EXT_FIELDS) + PWM_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the TPM registers block. + */ + TPM_TypeDef *tpm; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the period the PWM peripheral. + * @details This function changes the period of a PWM unit that has already + * been activated using @p pwmStart(). + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The PWM unit period is changed to the new value. + * @note The function has effect at the next cycle start. + * @note If a period is specified that is shorter than the pulse width + * programmed in one of the channels then the behavior is not + * guaranteed. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] period new cycle time in ticks + * + * @notapi + */ +#define pwm_lld_change_period(pwmp, period) \ + ((pwmp)->tpm->MOD = ((period) - 1)) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if KINETIS_PWM_USE_TPM0 || defined(__DOXYGEN__) +extern PWMDriver PWMD1; +#endif +#if KINETIS_PWM_USE_TPM1 || defined(__DOXYGEN__) +extern PWMDriver PWMD2; +#endif +#if KINETIS_PWM_USE_TPM2 || defined(__DOXYGEN__) +extern PWMDriver PWMD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void pwm_lld_init(void); + void pwm_lld_start(PWMDriver *pwmp); + void pwm_lld_stop(PWMDriver *pwmp); + void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width); + void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); + void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); + void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PWM */ + +#endif /* HAL_PWM_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk b/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk new file mode 100644 index 0000000..e0ba660 --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/hal_serial_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1 diff --git a/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk b/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk new file mode 100644 index 0000000..1c0192a --- /dev/null +++ b/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1 diff --git a/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c b/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c deleted file mode 100644 index f39823d..0000000 --- a/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c +++ /dev/null @@ -1,390 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MK66F18/pwm_lld.c - * @brief KINETIS PWM subsystem low level driver source. - * - * @addtogroup PWM - * @{ - */ - -#include "hal.h" - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief PWMD1 driver identifier. - * @note The driver PWMD1 allocates the timer FTM0 when enabled. - */ -#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) -PWMDriver PWMD1; -#endif - -/** - * @brief PWMD2 driver identifier. - * @note The driver PWMD2 allocates the timer FTM1 when enabled. - */ -#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) -PWMDriver PWMD2; -#endif - -/** - * @brief PWMD3 driver identifier. - * @note The driver PWMD3 allocates the timer FTM2 when enabled. - */ -#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) -PWMDriver PWMD3; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { - uint32_t sr; - - sr = pwmp->ftm->SC; - pwmp->ftm->SC = sr&(~FTM_SC_TOF); - - if (((sr & FTM_SC_TOF) != 0) && /* Timer Overflow */ - ((sr & FTM_SC_TOIE) != 0) && - (pwmp->config->callback != NULL)) { - pwmp->config->callback(pwmp); - } - - uint8_t n=0; - for(n=0;nchannels;n++) { - sr = pwmp->ftm->CHANNEL[n].CnSC; - pwmp->ftm->CHANNEL[n].CnSC = sr&(~FTM_CnSC_CHF); - if (((sr & FTM_CnSC_CHF) != 0) && - ((sr & FTM_CnSC_CHIE) != 0) && - (pwmp->config->channels[n].callback != NULL)) { - pwmp->config->channels[n].callback(pwmp); - } - } -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_FTM0 -/** - * @brief FTM0 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD1); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM0 */ - -#if KINETIS_PWM_USE_FTM1 -/** - * @brief FTM1 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM1_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD2); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM1 */ - -#if KINETIS_PWM_USE_FTM2 -/** - * @brief FTM2 interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(KINETIS_FTM2_IRQ_VECTOR) { - - OSAL_IRQ_PROLOGUE(); - pwm_lld_serve_interrupt(&PWMD3); - OSAL_IRQ_EPILOGUE(); -} -#endif /* KINETIS_PWM_USE_FTM2 */ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level PWM driver initialization. - * - * @notapi - */ -void pwm_lld_init(void) { - -#if KINETIS_PWM_USE_FTM0 - pwmObjectInit(&PWMD1); - PWMD1.channels = KINETIS_FTM0_CHANNELS; - PWMD1.ftm = FTM0; -#endif - -#if KINETIS_PWM_USE_FTM1 - pwmObjectInit(&PWMD2); - PWMD2.channels = KINETIS_FTM1_CHANNELS; - PWMD2.ftm = FTM1; -#endif - -#if KINETIS_PWM_USE_FTM2 - pwmObjectInit(&PWMD3); - PWMD3.channels = KINETIS_FTM2_CHANNELS; - PWMD3.ftm = FTM2; -#endif -} - -/** - * @brief Configures and activates the PWM peripheral. - * @note Starting a driver that is already in the @p PWM_READY state - * disables all the active channels. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_start(PWMDriver *pwmp) { - uint16_t psc; - uint8_t i=0; - - if (pwmp->state == PWM_STOP) { - /* Clock activation and timer reset.*/ -#if KINETIS_PWM_USE_FTM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_FTM0; - nvicEnableVector(FTM0_IRQn, KINETIS_PWM_FTM0_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_FTM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 |= SIM_SCGC6_FTM1; - nvicEnableVector(FTM1_IRQn, KINETIS_PWM_FTM1_PRIORITY); - } -#endif - -#if KINETIS_PWM_USE_FTM2 - if (&PWMD3 == pwmp) { - SIM->SCGC3 |= SIM_SCGC3_FTM2; - nvicEnableVector(FTM2_IRQn, KINETIS_PWM_FTM2_PRIORITY); - } -#endif - } - pwmp->ftm->MODE = FTM_MODE_FTMEN_MASK|FTM_MODE_PWMSYNC_MASK; - pwmp->ftm->SYNC = FTM_SYNC_CNTMIN_MASK|FTM_SYNC_CNTMAX_MASK - |FTM_SYNC_SWSYNC_MASK; - pwmp->ftm->COMBINE = FTM_COMBINE_SYNCEN3_MASK | FTM_COMBINE_SYNCEN2_MASK - | FTM_COMBINE_SYNCEN1_MASK | FTM_COMBINE_SYNCEN0_MASK; - pwmp->ftm->SYNCONF = FTM_SYNCONF_SYNCMODE_MASK; - - pwmp->ftm->CNTIN = 0x0000; - //~ pwmp->ftm->SC = 0; /* Disable FTM counter.*/ - pwmp->ftm->CNT = 0x0000; /* Clear count register.*/ - - /* Prescaler value calculation.*/ - psc = (KINETIS_SYSCLK_FREQUENCY / pwmp->config->frequency); - //~ /* Prescaler must be power of two between 1 and 128.*/ - osalDbgAssert(psc <= 128 && !(psc & (psc - 1)), "invalid frequency"); - //~ /* Prescaler register value determination. - //~ Prescaler register value conveniently corresponds to bit position, - //~ i.e., register value for prescaler CLK/64 is 6 ((1 << 6) == 64).*/ - for (i = 0; i < 8; i++) { - if (psc == (unsigned)(1 << i)) { - break; - } - } - - /* Set prescaler and clock mode. - This also sets the following: - CPWMS up-counting mode - Timer overflow interrupt disabled - DMA disabled.*/ - pwmp->ftm->SC = FTM_SC_CLKS(1) | FTM_SC_PS(i); - /* Configure period */ - pwmp->ftm->MOD = pwmp->period-1; - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; -} - -/** - * @brief Deactivates the PWM peripheral. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_stop(PWMDriver *pwmp) { - - /* If in ready state then disables the PWM clock.*/ - if (pwmp->state == PWM_READY) { -#if KINETIS_PWM_USE_FTM0 - if (&PWMD1 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_FTM0; - nvicDisableVector(FTM0_IRQn); - } -#endif - -#if KINETIS_PWM_USE_FTM1 - if (&PWMD2 == pwmp) { - SIM->SCGC6 &= ~SIM_SCGC6_FTM1; - nvicDisableVector(FTM1_IRQn); - } -#endif - -#if KINETIS_PWM_USE_FTM2 - if (&PWMD3 == pwmp) { - SIM->SCGC3 &= ~SIM_SCGC3_FTM2; - nvicDisableVector(FTM2_IRQn); - } -#endif - /* Disable FTM counter.*/ - pwmp->ftm->SC = 0; - pwmp->ftm->MOD = 0; - } -} - -/** - * @brief Enables a PWM channel. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is active using the specified configuration. - * @note The function has effect at the next cycle start. - * @note Channel notification is not enabled. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * @param[in] width PWM pulse width as clock pulses number - * - * @notapi - */ -void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width) { - uint32_t mode = FTM_CnSC_MSB; /* Edge-aligned PWM mode.*/ - - switch (pwmp->config->channels[channel].mode & PWM_OUTPUT_MASK) { - case PWM_OUTPUT_ACTIVE_HIGH: - mode |= FTM_CnSC_ELSB; - break; - case PWM_OUTPUT_ACTIVE_LOW: - mode |= FTM_CnSC_ELSA; - break; - } - - if (pwmp->ftm->CHANNEL[channel].CnSC & FTM_CnSC_CHIE) - mode |= FTM_CnSC_CHIE; - - pwmp->ftm->CHANNEL[channel].CnSC = mode; - pwmp->ftm->CHANNEL[channel].CnV = width; - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK; -} - -/** - * @brief Disables a PWM channel and its notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The channel is disabled and its output line returned to the - * idle state. - * @note The function has effect at the next cycle start. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { - - pwmp->ftm->CHANNEL[channel].CnSC = 0; - pwmp->ftm->CHANNEL[channel].CnV = 0; -} - -/** - * @brief Enables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { - pwmp->ftm->SC |= FTM_SC_TOIE; -} - -/** - * @brief Disables the periodic activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * - * @notapi - */ -void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { - pwmp->ftm->SC &= ~FTM_SC_TOIE; -} - -/** - * @brief Enables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already enabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->ftm->CHANNEL[channel].CnSC |= FTM_CnSC_CHIE; -} - -/** - * @brief Disables a channel de-activation edge notification. - * @pre The PWM unit must have been activated using @p pwmStart(). - * @pre The channel must have been activated using @p pwmEnableChannel(). - * @note If the notification is already disabled then the call has no effect. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] channel PWM channel identifier (0...channels-1) - * - * @notapi - */ -void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel) { - pwmp->ftm->CHANNEL[channel].CnSC &= ~FTM_CnSC_CHIE; -} - -#endif /* HAL_USE_PWM */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.h b/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.h deleted file mode 100644 index 9332e34..0000000 --- a/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2014 Adam J. Porter - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MK66F18/pwm_lld.h - * @brief KINETIS PWM subsystem low level driver header. - * - * @addtogroup PWM - * @{ - */ - -#ifndef HAL_PWM_LLD_H_ -#define HAL_PWM_LLD_H_ - -#if HAL_USE_PWM || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Number of PWM channels per PWM driver. - */ -#define PWM_CHANNELS 8 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -#if !defined(KINETIS_PWM_USE_FTM0) - #define KINETIS_PWM_USE_FTM0 FALSE -#endif - -#if !defined(KINETIS_PWM_USE_FTM1) - #define KINETIS_PWM_USE_FTM1 FALSE -#endif - -#if !defined(KINETIS_PWM_USE_FTM2) - #define KINETIS_PWM_USE_FTM2 FALSE -#endif - -/** - * @brief FTM0 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM0_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM0_PRIORITY 12 -#endif - -/** - * @brief FTM1 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM1_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM1_PRIORITY 12 -#endif - -/** - * @brief FTM2 interrupt priority level setting. - */ -#if !defined(KINETIS_PWM_FTM2_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_PWM_FTM2_PRIORITY 12 -#endif - -/** @} */ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief If advanced timer features switch. - * @details If set to @p TRUE the advanced features for TIM1 and TIM8 are - * enabled. - * @note The default is @p TRUE. - */ -#if !defined(KINETIS_PWM_USE_ADVANCED) || defined(__DOXYGEN__) -#define KINETIS_PWM_USE_ADVANCED FALSE -#endif -/** @} */ - -/*===========================================================================*/ -/* Configuration checks. */ -/*===========================================================================*/ - -#if !KINETIS_PWM_USE_FTM0 && !KINETIS_PWM_USE_FTM1 && !KINETIS_PWM_USE_FTM2 -#error "PWM driver activated but no FTM peripheral assigned" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a PWM mode. - */ -typedef uint32_t pwmmode_t; - -/** - * @brief Type of a PWM channel. - */ -typedef uint8_t pwmchannel_t; - -/** - * @brief Type of a channels mask. - */ -typedef uint32_t pwmchnmsk_t; - -/** - * @brief Type of a PWM counter. - */ -typedef uint16_t pwmcnt_t; - -/** - * @brief Type of a PWM driver channel configuration structure. - */ -typedef struct { - /** - * @brief Channel active logic level. - */ - pwmmode_t mode; - - /** - * @brief Channel callback pointer. - * @note This callback is invoked on the channel compare event. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /* End of the mandatory fields.*/ -} PWMChannelConfig; - -/** - * @brief Type of a PWM driver configuration structure. - */ -typedef struct { - /** - * @brief Timer clock in Hz. - * @note The low level can use assertions in order to catch invalid - * frequency specifications. - */ - uint32_t frequency; - /** - * @brief PWM period in ticks. - * @note The low level can use assertions in order to catch invalid - * period specifications. - */ - pwmcnt_t period; - /** - * @brief Periodic callback pointer. - * @note This callback is invoked on PWM counter reset. If set to - * @p NULL then the callback is disabled. - */ - pwmcallback_t callback; - /** - * @brief Channels configurations. - */ - PWMChannelConfig channels[PWM_CHANNELS]; - /* End of the mandatory fields.*/ -} PWMConfig; - -/** - * @brief Structure representing a PWM driver. - */ -struct PWMDriver { - /** - * @brief Driver state. - */ - pwmstate_t state; - /** - * @brief Current driver configuration data. - */ - const PWMConfig *config; - /** - * @brief Current PWM period in ticks. - */ - pwmcnt_t period; - /** - * @brief Mask of the enabled channels. - */ - pwmchnmsk_t enabled; - /** - * @brief Number of channels in this instance. - */ - pwmchannel_t channels; -#if defined(PWM_DRIVER_EXT_FIELDS) - PWM_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the FTM registers block. - */ - FTM_TypeDef *ftm; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Changes the period the PWM peripheral. - * @details This function changes the period of a PWM unit that has already - * been activated using @p pwmStart(). - * @pre The PWM unit must have been activated using @p pwmStart(). - * @post The PWM unit period is changed to the new value. - * @note The function has effect at the next cycle start. - * @note If a period is specified that is shorter than the pulse width - * programmed in one of the channels then the behavior is not - * guaranteed. - * - * @param[in] pwmp pointer to a @p PWMDriver object - * @param[in] period new cycle time in ticks - * - * @notapi - */ -#define pwm_lld_change_period(pwmp, period) \ - do { \ - (pwmp)->ftm->MOD = ((period) - 1); \ - pwmp->ftm->PWMLOAD = FTM_PWMLOAD_LDOK_MASK;\ - } while(0) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_PWM_USE_FTM0 || defined(__DOXYGEN__) -extern PWMDriver PWMD1; -#endif -#if KINETIS_PWM_USE_FTM1 || defined(__DOXYGEN__) -extern PWMDriver PWMD2; -#endif -#if KINETIS_PWM_USE_FTM2 || defined(__DOXYGEN__) -extern PWMDriver PWMD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void pwm_lld_init(void); - void pwm_lld_start(PWMDriver *pwmp); - void pwm_lld_stop(PWMDriver *pwmp); - void pwm_lld_enable_channel(PWMDriver *pwmp, - pwmchannel_t channel, - pwmcnt_t width); - void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); - void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); - void pwm_lld_enable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); - void pwm_lld_disable_channel_notification(PWMDriver *pwmp, - pwmchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_PWM */ - -#endif /* HAL_PWM_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c b/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c deleted file mode 100644 index 29ab4e8..0000000 --- a/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c +++ /dev/null @@ -1,539 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/spi_lld.c - * @brief KINETIS SPI subsystem low level driver source. - * - * @addtogroup SPI - * @{ - */ - -#include "hal.h" - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#if !defined(KINETIS_SPI0_RX_DMA_IRQ_PRIORITY) -#define KINETIS_SPI0_RX_DMA_IRQ_PRIORITY 8 -#endif - -#if !defined(KINETIS_SPI0_RX_DMAMUX_CHANNEL) -#define KINETIS_SPI0_RX_DMAMUX_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI0_RX_DMA_CHANNEL) -#define KINETIS_SPI0_RX_DMA_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI0_TX_DMAMUX_CHANNEL) -#define KINETIS_SPI0_TX_DMAMUX_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI0_TX_DMA_CHANNEL) -#define KINETIS_SPI0_TX_DMA_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI1_RX_DMA_IRQ_PRIORITY) -#define KINETIS_SPI1_RX_DMA_IRQ_PRIORITY 8 -#endif - -#if !defined(KINETIS_SPI1_RX_DMAMUX_CHANNEL) -#define KINETIS_SPI1_RX_DMAMUX_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI1_RX_DMA_CHANNEL) -#define KINETIS_SPI1_RX_DMA_CHANNEL 0 -#endif - -#if !defined(KINETIS_SPI1_TX_DMAMUX_CHANNEL) -#define KINETIS_SPI1_TX_DMAMUX_CHANNEL 1 -#endif - -#if !defined(KINETIS_SPI1_TX_DMA_CHANNEL) -#define KINETIS_SPI1_TX_DMA_CHANNEL 1 -#endif - -#if KINETIS_SPI_USE_SPI0 -#define DMAMUX_SPI_RX_SOURCE 16 -#define DMAMUX_SPI_TX_SOURCE 17 -#endif - -#if KINETIS_SPI_USE_SPI1 -#define DMAMUX_SPI_RX_SOURCE 18 -#define DMAMUX_SPI_TX_SOURCE 19 -#endif - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief SPI0 driver identifier.*/ -#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) -SPIDriver SPID1; -#endif - -/** @brief SPI1 driver identifier.*/ -#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) -SPIDriver SPID2; -#endif - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/* Use a dummy byte as the source/destination when a buffer is not provided */ -/* Note: The MMC driver relies on 0xFF being sent for dummy bytes. */ -static volatile uint16_t dmaRxDummy; -static uint16_t dmaTxDummy = 0xFFFF; - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -static void spi_start_xfer(SPIDriver *spip, bool polling) -{ - /* - * Enable the DSPI peripheral in master mode. - * Clear the TX and RX FIFOs. - * */ - spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_CLR_TXF | SPIx_MCR_CLR_RXF; - - /* If we are not polling then enable DMA */ - if (!polling) { - - /* Enable receive dma and transmit dma */ - spip->spi->RSER = SPIx_RSER_RFDF_DIRS | SPIx_RSER_RFDF_RE | - SPIx_RSER_TFFF_RE | SPIx_RSER_TFFF_DIRS; - - /* Configure RX DMA */ - if (spip->rxbuf) { - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)spip->rxbuf; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = spip->word_size; - } else { - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DADDR = (uint32_t)&dmaRxDummy; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DOFF = 0; - } - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].BITER_ELINKNO = spip->count; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CITER_ELINKNO = spip->count; - - /* Enable Request Register (ERQ) for RX by writing 0 to SERQ */ - DMA->SERQ = KINETIS_SPI0_RX_DMA_CHANNEL; - - /* Configure TX DMA */ - if (spip->txbuf) { - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)spip->txbuf; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = spip->word_size; - } else { - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SADDR = (uint32_t)&dmaTxDummy; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SOFF = 0; - } - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].BITER_ELINKNO = spip->count; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CITER_ELINKNO = spip->count; - - /* Enable Request Register (ERQ) for TX by writing 1 to SERQ */ - DMA->SERQ = KINETIS_SPI0_TX_DMA_CHANNEL; - } -} - -static void spi_stop_xfer(SPIDriver *spip) -{ - /* Halt the DSPI peripheral */ - spip->spi->MCR = SPIx_MCR_MSTR | SPIx_MCR_HALT; - - /* Clear all the flags which are currently set. */ - spip->spi->SR |= spip->spi->SR; -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ - DMA->CINT = KINETIS_SPI0_RX_DMA_CHANNEL; - - spi_stop_xfer(&SPID1); - - _spi_isr_code(&SPID1); - - OSAL_IRQ_EPILOGUE(); -} - -#endif - -#if KINETIS_SPI_USE_SPI1 || defined(__DOXYGEN__) - -OSAL_IRQ_HANDLER(KINETIS_DMA0_IRQ_VECTOR) { - OSAL_IRQ_PROLOGUE(); - - /* Clear bit 0 in Interrupt Request Register (INT) by writing 0 to CINT */ - DMA->CINT = KINETIS_SPI1_RX_DMA_CHANNEL; - - spi_stop_xfer(&SPID2); - - _spi_isr_code(&SPID2); - - OSAL_IRQ_EPILOGUE(); -} - -#endif - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level SPI driver initialization. - * - * @notapi - */ -void spi_lld_init(void) { -#if KINETIS_SPI_USE_SPI0 - spiObjectInit(&SPID1); -#endif -#if KINETIS_SPI_USE_SPI1 - spiObjectInit(&SPID2); -#endif -} - -/** - * @brief Configures and activates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_start(SPIDriver *spip) { - - /* If in stopped state then enables the SPI and DMA clocks.*/ - if (spip->state == SPI_STOP) { - -#if KINETIS_SPI_USE_SPI0 - if (&SPID1 == spip) { - - /* Enable the clock for SPI0 */ - SIM->SCGC6 |= SIM_SCGC6_SPI0; - - SPID1.spi = SPI0; - - if (spip->config->tar0) { - spip->spi->CTAR[0] = spip->config->tar0; - } else { - spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; - } - } -#endif - -#if KINETIS_SPI_USE_SPI1 - if (&SPID2 == spip) { - - /* Enable the clock for SPI0 */ - SIM->SCGC6 |= SIM_SCGC6_SPI1; - - SPID2.spi = SPI1; - - if (spip->config->tar0) { - spip->spi->CTAR[0] = spip->config->tar0; - } else { - spip->spi->CTAR[0] = KINETIS_SPI_TAR0_DEFAULT; - } - } -#endif - - nvicEnableVector(DMA0_IRQn, KINETIS_SPI0_RX_DMA_IRQ_PRIORITY); - - SIM->SCGC6 |= SIM_SCGC6_DMAMUX; - SIM->SCGC7 |= SIM_SCGC7_DMA; - - /* Clear DMA error flags */ - DMA->ERR = 0x0F; - -#if KINETIS_SPI_USE_SPI0 - /* Rx, select SPI Rx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI0_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); - - /* Tx, select SPI Tx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI0_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); - - /* Extract the frame size from the TAR */ - uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & - SPIx_CTARn_FMSZ_MASK) + 1; - - /* DMA transfer size is 16 bits for a frame size > 8 bits */ - uint16_t dma_size = frame_size > 8 ? 1 : 0; - - /* DMA word size is 2 for a 16 bit frame size */ - spip->word_size = frame_size > 8 ? 2 : 1; - - /* configure DMA RX fixed values */ - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI0->POPR; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SOFF = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI0_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | - DMA_CSR_INTMAJOR_MASK; - - /* configure DMA TX fixed values */ - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI0->PUSHR; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DOFF = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI0_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; -#endif - -#if KINETIS_SPI_USE_SPI1 - /* Rx, select SPI Rx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI1_RX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_RX_SOURCE); - - /* Tx, select SPI Tx FIFO */ - DMAMUX->CHCFG[KINETIS_SPI1_TX_DMAMUX_CHANNEL] = DMAMUX_CHCFGn_ENBL | - DMAMUX_CHCFGn_SOURCE(DMAMUX_SPI_TX_SOURCE); - - /* Extract the frame size from the TAR */ - uint16_t frame_size = ((spip->spi->CTAR[0] >> SPIx_CTARn_FMSZ_SHIFT) & - SPIx_CTARn_FMSZ_MASK) + 1; - - /* DMA transfer size is 16 bits for a frame size > 8 bits */ - uint16_t dma_size = frame_size > 8 ? 1 : 0; - - /* DMA word size is 2 for a 16 bit frame size */ - spip->word_size = frame_size > 8 ? 2 : 1; - - /* configure DMA RX fixed values */ - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SADDR = (uint32_t)&SPI1->POPR; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SOFF = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI1_RX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK | - DMA_CSR_INTMAJOR_MASK; - - /* configure DMA TX fixed values */ - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].SLAST = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DADDR = (uint32_t)&SPI1->PUSHR; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DOFF = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].DLASTSGA = 0; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].ATTR = DMA_ATTR_SSIZE(dma_size) | - DMA_ATTR_DSIZE(dma_size); - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].NBYTES_MLNO = spip->word_size; - DMA->TCD[KINETIS_SPI1_TX_DMA_CHANNEL].CSR = DMA_CSR_DREQ_MASK; -#endif - } -} - -/** - * @brief Deactivates the SPI peripheral. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_stop(SPIDriver *spip) { - - /* If in ready state then disables the SPI clock.*/ - if (spip->state == SPI_READY) { - - nvicDisableVector(DMA0_IRQn); - - SIM->SCGC7 &= ~SIM_SCGC7_DMA; - SIM->SCGC6 &= ~SIM_SCGC6_DMAMUX; - -#if KINETIS_SPI_USE_SPI0 - if (&SPID1 == spip) { - /* SPI halt.*/ - spip->spi->MCR |= SPIx_MCR_HALT; - } - - /* Disable the clock for SPI0 */ - SIM->SCGC6 &= ~SIM_SCGC6_SPI0; -#endif - -#if KINETIS_SPI_USE_SPI1 - if (&SPID2 == spip) { - /* SPI halt.*/ - spip->spi->MCR |= SPIx_MCR_HALT; - } - - /* Disable the clock for SPI1 */ - SIM->SCGC6 &= ~SIM_SCGC6_SPI1; -#endif - } -} - -/** - * @brief Asserts the slave select signal and prepares for transfers. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_select(SPIDriver *spip) { - - palClearPad(spip->config->ssport, spip->config->sspad); -} - -/** - * @brief Deasserts the slave select signal. - * @details The previously selected peripheral is unselected. - * - * @param[in] spip pointer to the @p SPIDriver object - * - * @notapi - */ -void spi_lld_unselect(SPIDriver *spip) { - - palSetPad(spip->config->ssport, spip->config->sspad); -} - -/** - * @brief Ignores data on the SPI bus. - * @details This asynchronous function starts the transmission of a series of - * idle words on the SPI bus and ignores the received data. - * @post At the end of the operation the configured callback is invoked. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be ignored - * - * @notapi - */ -void spi_lld_ignore(SPIDriver *spip, size_t n) { - - spip->count = n; - spip->rxbuf = NULL; - spip->txbuf = NULL; - - spi_start_xfer(spip, false); -} - -/** - * @brief Exchanges data on the SPI bus. - * @details This asynchronous function starts a simultaneous transmit/receive - * operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to be exchanged - * @param[in] txbuf the pointer to the transmit buffer - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf) { - - spip->count = n; - spip->rxbuf = rxbuf; - spip->txbuf = txbuf; - - spi_start_xfer(spip, false); -} - -/** - * @brief Sends data over the SPI bus. - * @details This asynchronous function starts a transmit operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to send - * @param[in] txbuf the pointer to the transmit buffer - * - * @notapi - */ -void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { - - spip->count = n; - spip->rxbuf = NULL; - spip->txbuf = (void *)txbuf; - - spi_start_xfer(spip, false); -} - -/** - * @brief Receives data from the SPI bus. - * @details This asynchronous function starts a receive operation. - * @post At the end of the operation the configured callback is invoked. - * @note The buffers are organized as uint8_t arrays for data sizes below or - * equal to 8 bits else it is organized as uint16_t arrays. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] n number of words to receive - * @param[out] rxbuf the pointer to the receive buffer - * - * @notapi - */ -void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { - - spip->count = n; - spip->rxbuf = rxbuf; - spip->txbuf = NULL; - - spi_start_xfer(spip, false); -} - -/** - * @brief Exchanges one frame using a polled wait. - * @details This synchronous function exchanges one frame using a polled - * synchronization method. This function is useful when exchanging - * small amount of data on high speed channels, usually in this - * situation is much more efficient just wait for completion using - * polling than suspending the thread waiting for an interrupt. - * - * @param[in] spip pointer to the @p SPIDriver object - * @param[in] frame the data frame to send over the SPI bus - * @return The received data frame from the SPI bus. - */ -uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { - - spi_start_xfer(spip, true); - - spip->spi->PUSHR = SPIx_PUSHR_TXDATA(frame); - - while ((spip->spi->SR & SPIx_SR_RFDF) == 0) - ; - - frame = spip->spi->POPR; - - spi_stop_xfer(spip); - - return frame; -} - -#endif /* HAL_USE_SPI */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.h b/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.h deleted file mode 100644 index 0cf108e..0000000 --- a/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014-2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file KINETIS/spi_lld.h - * @brief KINETIS SPI subsystem low level driver header. - * - * @addtogroup SPI - * @{ - */ - -#ifndef HAL_SPI_LLD_H_ -#define HAL_SPI_LLD_H_ - -#if HAL_USE_SPI || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief SPI0 driver enable switch. - * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_SPI_USE_SPI0) || defined(__DOXYGEN__) -#define KINETIS_SPI_USE_SPI0 FALSE -#endif - -/** - * @brief SPI0 interrupt priority level setting. - */ -#if !defined(KINETIS_SPI_SPI0_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SPI_SPI0_IRQ_PRIORITY 10 -#endif - -/** - * @brief SPI1 driver enable switch. - * @details If set to @p TRUE the support for SPI0 is included. - * @note The default is @p FALSE. - */ -#if !defined(KINETIS_SPI_USE_SPI1) || defined(__DOXYGEN__) -#define KINETIS_SPI_USE_SPI1 FALSE -#endif - -/** - * @brief SPI1 interrupt priority level setting. - */ -#if !defined(KINETIS_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define KINETIS_SPI_SPI1_IRQ_PRIORITY 10 -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 && !KINETIS_HAS_SPI0 -#error "SPI0 not present in the selected device" -#endif - -#if KINETIS_SPI_USE_SPI1 && !KINETIS_HAS_SPI1 -#error "SPI1 not present in the selected device" -#endif - -#if KINETIS_SPI_USE_SPI0 && KINETIS_SPI_USE_SPI1 -#error "Only one SPI peripheral can be enabled" -#endif - -#if !(KINETIS_SPI_USE_SPI0 || KINETIS_SPI_USE_SPI1) -#error "SPI driver activated but no SPI peripheral assigned" -#endif - -#if KINETIS_SPI_USE_SPI0 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI0_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI0" -#endif - -#if KINETIS_SPI_USE_SPI1 && \ - !OSAL_IRQ_IS_VALID_PRIORITY(KINETIS_SPI_SPI1_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SPI1" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an SPI driver. - */ -typedef struct SPIDriver SPIDriver; - -/** - * @brief SPI notification callback type. - * - * @param[in] spip pointer to the @p SPIDriver object triggering the - * callback - */ -typedef void (*spicallback_t)(SPIDriver *spip); - -/** - * @brief Driver configuration structure. - */ -typedef struct { - /** - * @brief Operation complete callback or @p NULL. - */ - spicallback_t end_cb; - /* End of the mandatory fields.*/ - /** - * @brief The chip select line port - when not using pcs. - */ - ioportid_t ssport; - /** - * @brief The chip select line pad number - when not using pcs. - */ - uint16_t sspad; - /** - * @brief SPI initialization data. - */ - uint32_t tar0; -} SPIConfig; - -/** - * @brief Structure representing a SPI driver. - */ -struct SPIDriver { - /** - * @brief Driver state. - */ - spistate_t state; - /** - * @brief Current configuration data. - */ - const SPIConfig *config; -#if SPI_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif /* SPI_USE_WAIT */ -#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#endif /* SPI_USE_MUTUAL_EXCLUSION */ -#if defined(SPI_DRIVER_EXT_FIELDS) - SPI_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the SPIx registers block. - */ - SPI_TypeDef *spi; - /** - * @brief Number of bytes/words of data to transfer. - */ - size_t count; - /** - * @brief Word size in bytes. - */ - size_t word_size; - /** - * @brief Pointer to the buffer with data to send. - */ - const uint8_t *txbuf; - /** - * @brief Pointer to the buffer to put received data. - */ - uint8_t *rxbuf; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/* TAR settings for n bits at SYSCLK / 2 */ -#define KINETIS_SPI_TAR_SYSCLK_DIV_2(n)\ - SPIx_CTARn_FMSZ((n) - 1) | \ - SPIx_CTARn_CPOL | \ - SPIx_CTARn_CPHA | \ - SPIx_CTARn_DBR | \ - SPIx_CTARn_PBR(0) | \ - SPIx_CTARn_BR(0) | \ - SPIx_CTARn_CSSCK(0) | \ - SPIx_CTARn_ASC(0) | \ - SPIx_CTARn_DT(0) - -/* TAR settings for n bits at SYSCLK / 4096 for debugging */ -#define KINETIS_SPI_TAR_SYSCLK_DIV_4096(n) \ - SPIx_CTARn_FMSZ(((n) - 1)) | \ - SPIx_CTARn_CPOL | \ - SPIx_CTARn_CPHA | \ - SPIx_CTARn_PBR(0) | \ - SPIx_CTARn_BR(0xB) | \ - SPIx_CTARn_CSSCK(0xB) | \ - SPIx_CTARn_ASC(0x7) | \ - SPIx_CTARn_DT(0xB) - -#define KINETIS_SPI_TAR_8BIT_FAST KINETIS_SPI_TAR_SYSCLK_DIV_2(8) -#define KINETIS_SPI_TAR_8BIT_SLOW KINETIS_SPI_TAR_SYSCLK_DIV_4096(8) - -#define KINETIS_SPI_TAR0_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) -#define KINETIS_SPI_TAR1_DEFAULT KINETIS_SPI_TAR_SYSCLK_DIV_2(8) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if KINETIS_SPI_USE_SPI0 && !defined(__DOXYGEN__) -extern SPIDriver SPID1; -#endif - -#if KINETIS_SPI_USE_SPI1 && !defined(__DOXYGEN__) -extern SPIDriver SPID2; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void spi_lld_init(void); - void spi_lld_start(SPIDriver *spip); - void spi_lld_stop(SPIDriver *spip); - void spi_lld_select(SPIDriver *spip); - void spi_lld_unselect(SPIDriver *spip); - void spi_lld_ignore(SPIDriver *spip, size_t n); - void spi_lld_exchange(SPIDriver *spip, size_t n, - const void *txbuf, void *rxbuf); - void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); - void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); - uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_SPI */ - -#endif /* HAL_SPI_LLD_H_ */ - -/** @} */ diff --git a/os/hal/ports/KINETIS/MK66F18/platform.mk b/os/hal/ports/KINETIS/MK66F18/platform.mk index 0e6be12..ce16bd5 100644 --- a/os/hal/ports/KINETIS/MK66F18/platform.mk +++ b/os/hal/ports/KINETIS/MK66F18/platform.mk @@ -1,19 +1,33 @@ -# List of all platform files. -PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_pal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_serial_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18/hal_spi_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_ext_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_adc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_gpt_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18/hal_pwm_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_st_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/hal_usb_lld.c +PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/hal_st_lld.c + +PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD \ + ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18 + +ifeq ($(USE_SMART_BUILD),yes) -# Required include directories -PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/MK66F18 \ - ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD +# Configuration files directory +ifeq ($(CONFDIR),) + CONFDIR = . +endif + +HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community.h | egrep -e "\#define")) + +endif + +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SPIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/FTMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk + +# Shared variables +ALLCSRC += $(PLATFORMSRC_CONTRIB) +ALLINC += $(PLATFORMINC_CONTRIB) -- cgit v1.2.3 From a6bb21d05b4dd7299de9a632cf55bda7c058164e Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sun, 7 Oct 2018 18:37:15 +0700 Subject: KINETIS tests and demos updated to ChibiOS 18.2.x. --- demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile | 28 +- demos/KINETIS/RT-FREEDOM-K20D50M-EXT/chconf.h | 222 +++++++++-- .../RT-FREEDOM-K20D50M-EXT/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-FREEDOM-K20D50M/Makefile | 28 +- demos/KINETIS/RT-FREEDOM-K20D50M/chconf.h | 222 +++++++++-- .../KINETIS/RT-FREEDOM-K20D50M/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-FREEDOM-K20D50M/main.c | 5 +- demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile | 34 +- demos/KINETIS/RT-FREEDOM-KL25Z-EXT/chconf.h | 222 +++++++++-- .../RT-FREEDOM-KL25Z-EXT/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile | 41 +- demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/chconf.h | 221 +++++++++- .../RT-FREEDOM-KL25Z-SHELL/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-FREEDOM-KL25Z/Makefile | 35 +- demos/KINETIS/RT-FREEDOM-KL25Z/chconf.h | 222 +++++++++-- demos/KINETIS/RT-FREEDOM-KL25Z/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-FREEDOM-KL25Z/main.c | 5 +- demos/KINETIS/RT-MCHCK-K20-GPT/Makefile | 32 +- demos/KINETIS/RT-MCHCK-K20-GPT/chconf.h | 222 +++++++++-- demos/KINETIS/RT-MCHCK-K20-GPT/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-MCHCK-K20-SPI/Makefile | 32 +- demos/KINETIS/RT-MCHCK-K20-SPI/chconf.h | 222 +++++++++-- demos/KINETIS/RT-MCHCK-K20-SPI/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-TEENSY3/Makefile | 436 ++++++++++---------- demos/KINETIS/RT-TEENSY3/chconf.h | 222 +++++++++-- demos/KINETIS/RT-TEENSY3/halconf_community.h | 173 ++++++++ demos/KINETIS/RT-TEENSY3/main.c | 5 +- os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk | 4 + os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk | 4 + os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk | 4 + os/hal/boards/MCHCK_K20/board.mk | 4 + os/hal/boards/PJRC_TEENSY_3/board.mk | 4 + os/hal/boards/PJRC_TEENSY_3_1/board.mk | 4 + os/hal/boards/PJRC_TEENSY_3_5/board.mk | 4 + os/hal/boards/PJRC_TEENSY_3_6/board.mk | 4 + os/hal/boards/PJRC_TEENSY_LC/board.mk | 4 + testhal/KINETIS/FRDM-K20D50M/I2C/Makefile | 23 +- testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h | 271 ++++++++++--- .../KINETIS/FRDM-K20D50M/I2C/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile | 30 +- testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/chconf.h | 221 +++++++++- .../FRDM-K20D50M/USB_SERIAL/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL25Z/ADC/Makefile | 40 +- testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h | 271 ++++++++++--- testhal/KINETIS/FRDM-KL25Z/ADC/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL25Z/GPT/Makefile | 32 +- testhal/KINETIS/FRDM-KL25Z/GPT/chconf.h | 227 +++++++++-- testhal/KINETIS/FRDM-KL25Z/GPT/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL25Z/PWM/Makefile | 32 +- testhal/KINETIS/FRDM-KL25Z/PWM/chconf.h | 217 +++++++++- testhal/KINETIS/FRDM-KL25Z/PWM/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile | 40 +- testhal/KINETIS/FRDM-KL25Z/USB_HID/chconf.h | 223 ++++++++++- .../KINETIS/FRDM-KL25Z/USB_HID/halconf_community.h | 50 ++- testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile | 39 +- testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/chconf.h | 219 +++++++++- .../FRDM-KL25Z/USB_SERIAL/halconf_community.h | 180 +++++++++ testhal/KINETIS/FRDM-KL26Z/I2C/Makefile | 31 +- testhal/KINETIS/FRDM-KL26Z/I2C/chconf.h | 271 ++++++++++--- testhal/KINETIS/FRDM-KL26Z/I2C/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL26Z/PWM/Makefile | 32 +- testhal/KINETIS/FRDM-KL26Z/PWM/chconf.h | 217 +++++++++- testhal/KINETIS/FRDM-KL26Z/PWM/halconf_community.h | 173 ++++++++ testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile | 39 +- testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/chconf.h | 219 +++++++++- .../FRDM-KL26Z/USB_SERIAL/halconf_community.h | 173 ++++++++ testhal/KINETIS/KL27Z/BLINK/Makefile | 32 +- testhal/KINETIS/KL27Z/BLINK/board/board.mk | 4 + testhal/KINETIS/KL27Z/BLINK/chconf.h | 215 +++++++++- testhal/KINETIS/KL27Z/BLINK/halconf_community.h | 173 ++++++++ testhal/KINETIS/MCHCK/BOOTLOADER/Makefile | 24 +- testhal/KINETIS/MCHCK/BOOTLOADER/chconf.h | 219 +++++++++- .../KINETIS/MCHCK/BOOTLOADER/halconf_community.h | 173 ++++++++ testhal/KINETIS/MCHCK/PWM/Makefile | 24 +- testhal/KINETIS/MCHCK/PWM/chconf.h | 227 +++++++++-- testhal/KINETIS/MCHCK/PWM/halconf_community.h | 173 ++++++++ testhal/KINETIS/MCHCK/USB_SERIAL/Makefile | 32 +- testhal/KINETIS/MCHCK/USB_SERIAL/chconf.h | 236 +++++++++-- .../KINETIS/MCHCK/USB_SERIAL/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/ADC/Makefile | 24 +- testhal/KINETIS/TEENSY3_x/ADC/chconf.h | 227 +++++++++-- testhal/KINETIS/TEENSY3_x/ADC/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile | 27 +- testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h | 215 +++++++++- .../TEENSY3_x/EEPROM_EMU/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/EXT/Makefile | 24 +- testhal/KINETIS/TEENSY3_x/EXT/chconf.h | 227 +++++++++-- testhal/KINETIS/TEENSY3_x/EXT/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/GPT/Makefile | 24 +- testhal/KINETIS/TEENSY3_x/GPT/chconf.h | 227 +++++++++-- testhal/KINETIS/TEENSY3_x/GPT/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/PWM/Makefile | 24 +- testhal/KINETIS/TEENSY3_x/PWM/chconf.h | 223 ++++++++++- testhal/KINETIS/TEENSY3_x/PWM/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/SERIAL/Makefile | 24 +- testhal/KINETIS/TEENSY3_x/SERIAL/chconf.h | 227 +++++++++-- .../KINETIS/TEENSY3_x/SERIAL/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile | 444 ++++++++++----------- testhal/KINETIS/TEENSY3_x/USB_SERIAL/chconf.h | 236 +++++++++-- .../TEENSY3_x/USB_SERIAL/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile | 32 +- testhal/KINETIS/TEENSY_LC/BOOTLOADER/chconf.h | 219 +++++++++- .../TEENSY_LC/BOOTLOADER/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile | 34 +- testhal/KINETIS/TEENSY_LC/EEPROM_EMU/chconf.h | 219 +++++++++- .../TEENSY_LC/EEPROM_EMU/halconf_community.h | 173 ++++++++ testhal/KINETIS/TEENSY_LC/PWM/Makefile | 32 +- testhal/KINETIS/TEENSY_LC/PWM/chconf.h | 217 +++++++++- testhal/KINETIS/TEENSY_LC/PWM/halconf_community.h | 173 ++++++++ 109 files changed, 12781 insertions(+), 1764 deletions(-) create mode 100644 demos/KINETIS/RT-FREEDOM-K20D50M-EXT/halconf_community.h create mode 100644 demos/KINETIS/RT-FREEDOM-K20D50M/halconf_community.h create mode 100644 demos/KINETIS/RT-FREEDOM-KL25Z-EXT/halconf_community.h create mode 100644 demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/halconf_community.h create mode 100644 demos/KINETIS/RT-FREEDOM-KL25Z/halconf_community.h create mode 100644 demos/KINETIS/RT-MCHCK-K20-GPT/halconf_community.h create mode 100644 demos/KINETIS/RT-MCHCK-K20-SPI/halconf_community.h create mode 100644 demos/KINETIS/RT-TEENSY3/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-K20D50M/I2C/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL25Z/ADC/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL25Z/GPT/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL25Z/PWM/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL26Z/I2C/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL26Z/PWM/halconf_community.h create mode 100644 testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/KL27Z/BLINK/halconf_community.h create mode 100644 testhal/KINETIS/MCHCK/BOOTLOADER/halconf_community.h create mode 100644 testhal/KINETIS/MCHCK/PWM/halconf_community.h create mode 100644 testhal/KINETIS/MCHCK/USB_SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/ADC/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/EXT/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/GPT/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/PWM/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY3_x/USB_SERIAL/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY_LC/BOOTLOADER/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY_LC/EEPROM_EMU/halconf_community.h create mode 100644 testhal/KINETIS/TEENSY_LC/PWM/halconf_community.h diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile index c8818bf..7d2224c 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile +++ b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile @@ -69,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif -# Enables the use of FPU (no, softfp, hard). +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). ifeq ($(USE_FPU),) USE_FPU = no endif @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,26 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MK20DX128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/chconf.h b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/chconf.h +++ b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/halconf_community.h b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile b/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile index c8818bf..7d2224c 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile @@ -69,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif -# Enables the use of FPU (no, softfp, hard). +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). ifeq ($(USE_FPU),) USE_FPU = no endif @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,26 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MK20DX128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/chconf.h b/demos/KINETIS/RT-FREEDOM-K20D50M/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/chconf.h +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/halconf_community.h b/demos/KINETIS/RT-FREEDOM-K20D50M/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/main.c b/demos/KINETIS/RT-FREEDOM-K20D50M/main.c index 558e7ad..4e914ff 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/main.c +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/main.c @@ -17,6 +17,8 @@ #include "ch.h" #include "hal.h" #include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" static THD_WORKING_AREA(waThread1, 64); static THD_FUNCTION(Thread1, arg) { @@ -78,7 +80,8 @@ int main(void) { chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, NULL); chThdCreateStatic(waThread3, sizeof(waThread3), NORMALPRIO, Thread3, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (1) { chThdSleepMilliseconds(500); } diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile index 0ce214c..7616baa 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile @@ -10,7 +10,7 @@ endif # C specific options here (added to USE_OPT). ifeq ($(USE_COPT),) - USE_COPT = + USE_COPT = endif # C++ specific options here (added to USE_OPT). @@ -25,7 +25,7 @@ endif # Linker extra options here. ifeq ($(USE_LDOPT),) - USE_LDOPT = + USE_LDOPT = endif # Enable this if you want link time optimizations (LTO) @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,25 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT = $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/chconf.h b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/chconf.h +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/halconf_community.h b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile index b9dd9f7..6a17c8b 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nosys.specs -lnosys -D SHELL_CONFIG_FILE + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -82,7 +87,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT -CHIBIOS_CONTRIB = ../../.. +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,31 +101,25 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/various/shell/shell.mk # Define linker script file here -LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld +LDSCRIPT = $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ shellcfg.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +142,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/chconf.h b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/chconf.h index 054d6b3..1750f63 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/chconf.h +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -433,7 +610,14 @@ /** * @brief Context switch hook. - * @details This hook is invoked jus * @brief ISR enter hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. */ #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ /* IRQ prologue code here.*/ \ @@ -446,13 +630,6 @@ /* IRQ epilogue code here.*/ \ } -/** -t before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - /** * @brief Idle thread enter hook. * @note This hook is invoked within a critical zone, no OS functions @@ -460,6 +637,7 @@ t before switching between threads. * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ t before switching between threads. * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/halconf_community.h b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile index 00ca08c..7616baa 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile @@ -10,7 +10,7 @@ endif # C specific options here (added to USE_OPT). ifeq ($(USE_COPT),) - USE_COPT = + USE_COPT = endif # C++ specific options here (added to USE_OPT). @@ -25,7 +25,7 @@ endif # Linker extra options here. ifeq ($(USE_LDOPT),) - USE_LDOPT = + USE_LDOPT = endif # Enable this if you want link time optimizations (LTO) @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,26 +101,22 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here LDSCRIPT = $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -136,13 +139,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z/chconf.h b/demos/KINETIS/RT-FREEDOM-KL25Z/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z/chconf.h +++ b/demos/KINETIS/RT-FREEDOM-KL25Z/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z/halconf_community.h b/demos/KINETIS/RT-FREEDOM-KL25Z/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-FREEDOM-KL25Z/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z/main.c b/demos/KINETIS/RT-FREEDOM-KL25Z/main.c index 479356c..803d99c 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z/main.c +++ b/demos/KINETIS/RT-FREEDOM-KL25Z/main.c @@ -17,6 +17,8 @@ #include "ch.h" #include "hal.h" #include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" static THD_WORKING_AREA(waThread1, 64); static THD_FUNCTION(Thread1, arg) { @@ -78,7 +80,8 @@ int main(void) { chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, NULL); chThdCreateStatic(waThread3, sizeof(waThread3), NORMALPRIO, Thread3, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (1) { chThdSleepMilliseconds(500); } diff --git a/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile b/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile index 5039ff3..58ebbb3 100644 --- a/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile +++ b/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile @@ -10,7 +10,7 @@ endif # C specific options here (added to USE_OPT). ifeq ($(USE_COPT),) - USE_COPT = + USE_COPT = endif # C++ specific options here (added to USE_OPT). @@ -25,7 +25,7 @@ endif # Linker extra options here. ifeq ($(USE_LDOPT),) - USE_LDOPT = + USE_LDOPT = endif # Enable this if you want link time optimizations (LTO) @@ -69,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif -# Enables the use of FPU (no, softfp, hard). +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). ifeq ($(USE_FPU),) USE_FPU = no endif @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here # Use BLDR4 for a 4k bootloader, BLDR3 for a 3k bootloader @@ -107,19 +111,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128BLDR4.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -142,13 +140,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-MCHCK-K20-GPT/chconf.h b/demos/KINETIS/RT-MCHCK-K20-GPT/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-MCHCK-K20-GPT/chconf.h +++ b/demos/KINETIS/RT-MCHCK-K20-GPT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-MCHCK-K20-GPT/halconf_community.h b/demos/KINETIS/RT-MCHCK-K20-GPT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-MCHCK-K20-GPT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile b/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile index 5039ff3..58ebbb3 100644 --- a/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile +++ b/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile @@ -10,7 +10,7 @@ endif # C specific options here (added to USE_OPT). ifeq ($(USE_COPT),) - USE_COPT = + USE_COPT = endif # C++ specific options here (added to USE_OPT). @@ -25,7 +25,7 @@ endif # Linker extra options here. ifeq ($(USE_LDOPT),) - USE_LDOPT = + USE_LDOPT = endif # Enable this if you want link time optimizations (LTO) @@ -69,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif -# Enables the use of FPU (no, softfp, hard). +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). ifeq ($(USE_FPU),) USE_FPU = no endif @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk # Define linker script file here # Use BLDR4 for a 4k bootloader, BLDR3 for a 3k bootloader @@ -107,19 +111,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128BLDR4.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -142,13 +140,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/demos/KINETIS/RT-MCHCK-K20-SPI/chconf.h b/demos/KINETIS/RT-MCHCK-K20-SPI/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-MCHCK-K20-SPI/chconf.h +++ b/demos/KINETIS/RT-MCHCK-K20-SPI/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-MCHCK-K20-SPI/halconf_community.h b/demos/KINETIS/RT-MCHCK-K20-SPI/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-MCHCK-K20-SPI/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-TEENSY3/Makefile b/demos/KINETIS/RT-TEENSY3/Makefile index 5f23627..65aec1a 100644 --- a/demos/KINETIS/RT-TEENSY3/Makefile +++ b/demos/KINETIS/RT-TEENSY3/Makefile @@ -1,220 +1,216 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# Linker extra options here. -ifeq ($(USE_LDOPT),) - USE_LDOPT = -endif - -# Enable this if you want link time optimizations (LTO) -ifeq ($(USE_LTO),) - USE_LTO = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# If enabled, this option makes the build process faster by not compiling -# modules not used in the current configuration. -ifeq ($(USE_SMART_BUILD),) - USE_SMART_BUILD = yes -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Stack size to be allocated to the Cortex-M process stack. This stack is -# the stack used by the main() thread. -ifeq ($(USE_PROCESS_STACKSIZE),) - USE_PROCESS_STACKSIZE = 0x200 -endif - -# Stack size to the allocated to the Cortex-M main/exceptions stack. This -# stack is used for processing interrupts and exceptions. -ifeq ($(USE_EXCEPTIONS_STACKSIZE),) - USE_EXCEPTIONS_STACKSIZE = 0x400 -endif - -# Enables the use of FPU (no, softfp, hard). -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT -CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib -# Startup files. -include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk -# HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk -include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3/board.mk -include $(CHIBIOS)/os/hal/osal/rt/osal.mk -# RTOS files (optional). -include $(CHIBIOS)/os/rt/rt.mk -include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk -# Other files (optional). -include $(CHIBIOS)/test/rt/test.mk - -# Define linker script file here -LDSCRIPT= $(STARTUPLD)/MK20DX128.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(TESTSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -AR = $(TRGT)ar -OD = $(TRGT)objdump -SZ = $(TRGT)size -HEX = $(CP) -O ihex -BIN = $(CP) -O binary -SREC = $(CP) -O srec - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra -Wundef - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC -include $(RULESPATH)/rules.mk +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x200 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3_1/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/MK20DX256.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/demos/KINETIS/RT-TEENSY3/chconf.h b/demos/KINETIS/RT-TEENSY3/chconf.h index c95387a..1750f63 100644 --- a/demos/KINETIS/RT-TEENSY3/chconf.h +++ b/demos/KINETIS/RT-TEENSY3/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,15 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#define CH_CFG_USE_QUEUES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -280,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -292,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -301,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -312,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -328,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -337,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -346,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -356,23 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p CH_DBG_TRACE_MASK_NONE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_NONE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif /** * @brief Trace buffer entries. * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_NONE. + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) #define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -384,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -394,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -405,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -416,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -425,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -437,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -529,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/demos/KINETIS/RT-TEENSY3/halconf_community.h b/demos/KINETIS/RT-TEENSY3/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/demos/KINETIS/RT-TEENSY3/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/demos/KINETIS/RT-TEENSY3/main.c b/demos/KINETIS/RT-TEENSY3/main.c index 42d6510..f4c23af 100644 --- a/demos/KINETIS/RT-TEENSY3/main.c +++ b/demos/KINETIS/RT-TEENSY3/main.c @@ -17,6 +17,8 @@ #include "ch.h" #include "hal.h" #include "ch_test.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" /* * LED blinker thread. @@ -57,7 +59,8 @@ int main(void) { */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - test_execute((BaseSequentialStream *)&SD1); + test_execute((BaseSequentialStream *)&SD1, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite); while (true) { chThdSleepMilliseconds(1000); } diff --git a/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk b/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk index f74d306..15c74fc 100644 --- a/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk +++ b/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_K20D50M + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk b/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk index 3097a90..96a2498 100644 --- a/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk +++ b/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL25Z + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk b/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk index c352346..4ee8195 100644 --- a/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk +++ b/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL26Z + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/MCHCK_K20/board.mk b/os/hal/boards/MCHCK_K20/board.mk index 22406ac..3082383 100644 --- a/os/hal/boards/MCHCK_K20/board.mk +++ b/os/hal/boards/MCHCK_K20/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/MCHCK_K20/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/MCHCK_K20 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/PJRC_TEENSY_3/board.mk b/os/hal/boards/PJRC_TEENSY_3/board.mk index b9dcdc8..cc268a9 100644 --- a/os/hal/boards/PJRC_TEENSY_3/board.mk +++ b/os/hal/boards/PJRC_TEENSY_3/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/PJRC_TEENSY_3_1/board.mk b/os/hal/boards/PJRC_TEENSY_3_1/board.mk index 572a524..c6027b8 100644 --- a/os/hal/boards/PJRC_TEENSY_3_1/board.mk +++ b/os/hal/boards/PJRC_TEENSY_3_1/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_1/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_1 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/PJRC_TEENSY_3_5/board.mk b/os/hal/boards/PJRC_TEENSY_3_5/board.mk index 4e18eb0..6c88262 100644 --- a/os/hal/boards/PJRC_TEENSY_3_5/board.mk +++ b/os/hal/boards/PJRC_TEENSY_3_5/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_5/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_5 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/PJRC_TEENSY_3_6/board.mk b/os/hal/boards/PJRC_TEENSY_3_6/board.mk index 6e2695c..0424c4d 100644 --- a/os/hal/boards/PJRC_TEENSY_3_6/board.mk +++ b/os/hal/boards/PJRC_TEENSY_3_6/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_6/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_6 + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/boards/PJRC_TEENSY_LC/board.mk b/os/hal/boards/PJRC_TEENSY_LC/board.mk index 85c643a..87accf3 100644 --- a/os/hal/boards/PJRC_TEENSY_LC/board.mk +++ b/os/hal/boards/PJRC_TEENSY_LC/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_LC/board.c # Required include directories BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_LC + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile index a4de448..e2ad0c8 100644 --- a/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile +++ b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile @@ -89,6 +89,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -106,18 +108,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h b/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h index 5f05547..1750f63 100644 --- a/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h +++ b/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -438,20 +615,20 @@ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ } - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} /** * @brief Idle thread enter hook. @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -496,15 +675,15 @@ #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ /* System halt code here.*/ \ } - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} /** @} */ @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-K20D50M/I2C/halconf_community.h b/testhal/KINETIS/FRDM-K20D50M/I2C/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-K20D50M/I2C/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile index a5f4c68..1f34aba 100644 --- a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/various/shell/shell.mk @@ -108,22 +112,14 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ usbcfg.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -146,13 +142,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/chconf.h b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/chconf.h index 222c5ea..0ac7be8 100644 --- a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/chconf.h +++ b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/halconf_community.h b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile index d5120b9..0a813ec 100644 --- a/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile @@ -5,12 +5,12 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). ifeq ($(USE_COPT),) - USE_COPT = -std=gnu99 + USE_COPT = endif # C++ specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,32 +88,32 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib - +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk +# HAL-OSAL files (optional). include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/KL2x/platform.mk include $(CHIBIOS_CONTRIB)/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Other files (optional). # Define linker script file here LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -131,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths @@ -160,6 +163,7 @@ LD = $(TRGT)gcc #LD = $(TRGT)g++ CP = $(TRGT)objcopy AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar OD = $(TRGT)objdump SZ = $(TRGT)size HEX = $(CP) -O ihex diff --git a/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h b/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h index 5f05547..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h +++ b/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -438,20 +615,20 @@ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ } - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} /** * @brief Idle thread enter hook. @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -496,15 +675,15 @@ #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ /* System halt code here.*/ \ } - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} /** @} */ @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/ADC/halconf_community.h b/testhal/KINETIS/FRDM-KL25Z/ADC/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL25Z/ADC/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile b/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile index 8ea9026..0a813ec 100644 --- a/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,25 +101,19 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,12 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL25Z/GPT/chconf.h b/testhal/KINETIS/FRDM-KL25Z/GPT/chconf.h index 5d231c8..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL25Z/GPT/chconf.h +++ b/testhal/KINETIS/FRDM-KL25Z/GPT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file FRDM-KL25Z/GPT/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/GPT/halconf_community.h b/testhal/KINETIS/FRDM-KL25Z/GPT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL25Z/GPT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile b/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile index 8ea9026..0a813ec 100644 --- a/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,25 +101,19 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,12 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL25Z/PWM/chconf.h b/testhal/KINETIS/FRDM-KL25Z/PWM/chconf.h index 2a25a25..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL25Z/PWM/chconf.h +++ b/testhal/KINETIS/FRDM-KL25Z/PWM/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file FRDM-KL25Z/PWM/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/PWM/halconf_community.h b/testhal/KINETIS/FRDM-KL25Z/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL25Z/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile b/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile index 39c7ccd..3c25877 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nosys.specs -lnosys + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,27 +101,24 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -#include $(CHIBIOS)/test/rt/test.mk -#include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ usbcfg.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -137,13 +141,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths @@ -153,7 +155,7 @@ INCDIR = $(CHIBIOS)/os/license \ # Compiler settings # -MCU = cortex-m0 +MCU = cortex-m0plus #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_HID/chconf.h b/testhal/KINETIS/FRDM-KL25Z/USB_HID/chconf.h index 424cf02..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_HID/chconf.h +++ b/testhal/KINETIS/FRDM-KL25Z/USB_HID/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -433,7 +610,14 @@ /** * @brief Context switch hook. - * @details This hook is invoked jus * @brief ISR enter hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. */ #define CH_CFG_IRQ_PROLOGUE_HOOK() { \ /* IRQ prologue code here.*/ \ @@ -446,13 +630,6 @@ /* IRQ epilogue code here.*/ \ } -/** -t before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - /** * @brief Idle thread enter hook. * @note This hook is invoked within a critical zone, no OS functions @@ -460,6 +637,7 @@ t before switching between threads. * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ t before switching between threads. * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_HID/halconf_community.h b/testhal/KINETIS/FRDM-KL25Z/USB_HID/halconf_community.h index b2f75af..fb7ebf6 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_HID/halconf_community.h +++ b/testhal/KINETIS/FRDM-KL25Z/USB_HID/halconf_community.h @@ -80,15 +80,36 @@ #define HAL_USE_TIMCAP FALSE #endif +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + /** * @brief Enables the USBH subsystem. */ #if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) -#define HAL_USE_USBH FALSE +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE #endif /** - * @brief Enables the USB HID subsystem. + * @brief Enables the USB_HID subsystem. */ #if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) #define HAL_USE_USB_HID TRUE @@ -121,7 +142,25 @@ */ #define ONEWIRE_USE_SEARCH_ROM TRUE - /*===========================================================================*/ +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ /* EEProm driver related settings. */ /*===========================================================================*/ @@ -129,13 +168,12 @@ * @brief Enables 24xx series I2C eeprom device driver. * @note Disabling this option saves both code and data space. */ -#define EEPROM_USE_EE24XX TRUE +#define EEPROM_USE_EE24XX FALSE /** * @brief Enables 25xx series SPI eeprom device driver. * @note Disabling this option saves both code and data space. */ -#define EEPROM_USE_EE25XX TRUE - +#define EEPROM_USE_EE25XX FALSE #endif /* HALCONF_COMMUNITY_H */ diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile index 57ab9e8..0eab704 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/various/shell/shell.mk @@ -103,22 +112,14 @@ LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ usbcfg.c \ - main.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +142,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/chconf.h b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/chconf.h index e89ec1f..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/chconf.h +++ b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file FRDM-KL25Z/USB_SERIAL/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/halconf_community.h b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/halconf_community.h new file mode 100644 index 0000000..cf0b508 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/** + * @brief Enables the USB_HID subsystem. + */ +#if !defined(HAL_USE_USB_HID) || defined(__DOXYGEN__) +#define HAL_USE_USB_HID FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile b/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile index 597f431..7ce4956 100644 --- a/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -DCRT0_INIT_STACKS=0 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -100,18 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -134,12 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL26Z/I2C/chconf.h b/testhal/KINETIS/FRDM-KL26Z/I2C/chconf.h index 5f05547..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL26Z/I2C/chconf.h +++ b/testhal/KINETIS/FRDM-KL26Z/I2C/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -438,20 +615,20 @@ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ } - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} /** * @brief Idle thread enter hook. @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -496,15 +675,15 @@ #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ /* System halt code here.*/ \ } - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} /** @} */ @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/I2C/halconf_community.h b/testhal/KINETIS/FRDM-KL26Z/I2C/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL26Z/I2C/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile b/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile index bca626d..7ce4956 100644 --- a/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,25 +101,19 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk # Define linker script file here LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,12 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL26Z/PWM/chconf.h b/testhal/KINETIS/FRDM-KL26Z/PWM/chconf.h index 9f9b3e9..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL26Z/PWM/chconf.h +++ b/testhal/KINETIS/FRDM-KL26Z/PWM/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file FRDM-KL26Z/PWM/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/PWM/halconf_community.h b/testhal/KINETIS/FRDM-KL26Z/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL26Z/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile index 3cf61b4..b71d3b1 100644 --- a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -94,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/various/shell/shell.mk @@ -103,22 +112,14 @@ LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ - main.c \ usbcfg.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +142,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/chconf.h b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/chconf.h index 9c9a479..1750f63 100644 --- a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/chconf.h +++ b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file FRDM-KL26Z/USB_SERIAL/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/halconf_community.h b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/KL27Z/BLINK/Makefile b/testhal/KINETIS/KL27Z/BLINK/Makefile index 16025f3..cd6424e 100644 --- a/testhal/KINETIS/KL27Z/BLINK/Makefile +++ b/testhal/KINETIS/KL27Z/BLINK/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -100,18 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MKL27Z256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -134,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/KL27Z/BLINK/board/board.mk b/testhal/KINETIS/KL27Z/BLINK/board/board.mk index 14102c4..b410cdb 100644 --- a/testhal/KINETIS/KL27Z/BLINK/board/board.mk +++ b/testhal/KINETIS/KL27Z/BLINK/board/board.mk @@ -3,3 +3,7 @@ BOARDSRC = ./board/board.c # Required include directories BOARDINC = ./board + +# Shared variables +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/testhal/KINETIS/KL27Z/BLINK/chconf.h b/testhal/KINETIS/KL27Z/BLINK/chconf.h index 49d21ae..1750f63 100644 --- a/testhal/KINETIS/KL27Z/BLINK/chconf.h +++ b/testhal/KINETIS/KL27Z/BLINK/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ /** - * @file KL27Z/BLINK/chconf.h + * @file templates/chconf.h * @brief Configuration file template. * @details A copy of this file must be placed in each project directory, it * contains the application specific kernel settings. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/KL27Z/BLINK/halconf_community.h b/testhal/KINETIS/KL27Z/BLINK/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/KL27Z/BLINK/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile b/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile index 884d20e..8ff8acd 100644 --- a/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile +++ b/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -106,19 +108,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128BLDR4.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/MCHCK/BOOTLOADER/chconf.h b/testhal/KINETIS/MCHCK/BOOTLOADER/chconf.h index a185459..1750f63 100644 --- a/testhal/KINETIS/MCHCK/BOOTLOADER/chconf.h +++ b/testhal/KINETIS/MCHCK/BOOTLOADER/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file MCHCK/BOOTLOADER/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/MCHCK/BOOTLOADER/halconf_community.h b/testhal/KINETIS/MCHCK/BOOTLOADER/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/MCHCK/BOOTLOADER/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/MCHCK/PWM/Makefile b/testhal/KINETIS/MCHCK/PWM/Makefile index 884d20e..8ff8acd 100644 --- a/testhal/KINETIS/MCHCK/PWM/Makefile +++ b/testhal/KINETIS/MCHCK/PWM/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -106,19 +108,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128BLDR4.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -141,13 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/MCHCK/PWM/chconf.h b/testhal/KINETIS/MCHCK/PWM/chconf.h index 2f2938a..1750f63 100644 --- a/testhal/KINETIS/MCHCK/PWM/chconf.h +++ b/testhal/KINETIS/MCHCK/PWM/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file MCHCK/PWM/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/MCHCK/PWM/halconf_community.h b/testhal/KINETIS/MCHCK/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/MCHCK/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile b/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile index b4d1ef8..cc51364 100644 --- a/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile +++ b/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk # HAL-OSAL files (optional). @@ -99,7 +101,9 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk # Other files (optional). -include $(CHIBIOS)/test/rt/test.mk +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk include $(CHIBIOS)/os/hal/lib/streams/streams.mk include $(CHIBIOS)/os/various/shell/shell.mk @@ -109,22 +113,14 @@ LDSCRIPT= $(STARTUPLD)/MK20DX128BLDR4.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ usbcfg.c \ - main.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -147,13 +143,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/MCHCK/USB_SERIAL/chconf.h b/testhal/KINETIS/MCHCK/USB_SERIAL/chconf.h index 22272b1..1750f63 100644 --- a/testhal/KINETIS/MCHCK/USB_SERIAL/chconf.h +++ b/testhal/KINETIS/MCHCK/USB_SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file MCHCK/USB_SERIAL/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,15 +119,20 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. * @details When this option is activated the function @p chSysInit() * does not spawn the idle thread. The application @p main() * function becomes the idle thread and must implement an - * infinite loop. */ + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -120,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -138,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -146,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -155,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -163,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -174,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -182,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -192,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -202,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -212,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -220,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -230,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -239,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -250,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -260,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -269,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -281,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -290,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -301,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -317,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -326,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -335,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -345,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -366,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -376,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -387,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -398,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -407,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -419,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -433,7 +613,7 @@ * @details This hook is invoked just before switching between threads. */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ + /* Context switch code here.*/ \ } /** @@ -456,7 +636,8 @@ * should be invoked from here. * @note This macro can be used to activate a power saving mode. */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -465,7 +646,8 @@ * should be invoked from here. * @note This macro can be used to deactivate a power saving mode. */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -509,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/MCHCK/USB_SERIAL/halconf_community.h b/testhal/KINETIS/MCHCK/USB_SERIAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/MCHCK/USB_SERIAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/ADC/Makefile b/testhal/KINETIS/TEENSY3_x/ADC/Makefile index 6510052..d12b346 100644 --- a/testhal/KINETIS/TEENSY3_x/ADC/Makefile +++ b/testhal/KINETIS/TEENSY3_x/ADC/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/ADC/chconf.h b/testhal/KINETIS/TEENSY3_x/ADC/chconf.h index 029e4ec..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/ADC/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/ADC/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015 RedoX https://github.com/RedoXyde + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY3_x/ADC/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/ADC/halconf_community.h b/testhal/KINETIS/TEENSY3_x/ADC/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/ADC/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile index fa5084c..1733c56 100644 --- a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile +++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,14 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ eeprom.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h index 3bb57de..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ /** - * @file TEENSY3_x/EEPROM_EMU/chconf.h + * @file templates/chconf.h * @brief Configuration file template. * @details A copy of this file must be placed in each project directory, it * contains the application specific kernel settings. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf_community.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/EXT/Makefile b/testhal/KINETIS/TEENSY3_x/EXT/Makefile index 6510052..d12b346 100644 --- a/testhal/KINETIS/TEENSY3_x/EXT/Makefile +++ b/testhal/KINETIS/TEENSY3_x/EXT/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/EXT/chconf.h b/testhal/KINETIS/TEENSY3_x/EXT/chconf.h index 0be6605..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/EXT/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/EXT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015 RedoX https://github.com/RedoXyde + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY3_x/EXT/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/EXT/halconf_community.h b/testhal/KINETIS/TEENSY3_x/EXT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/EXT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/GPT/Makefile b/testhal/KINETIS/TEENSY3_x/GPT/Makefile index 6510052..d12b346 100644 --- a/testhal/KINETIS/TEENSY3_x/GPT/Makefile +++ b/testhal/KINETIS/TEENSY3_x/GPT/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/GPT/chconf.h b/testhal/KINETIS/TEENSY3_x/GPT/chconf.h index 93ba7b8..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/GPT/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/GPT/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015 RedoX https://github.com/RedoXyde + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY3_x/GPT/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/GPT/halconf_community.h b/testhal/KINETIS/TEENSY3_x/GPT/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/GPT/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/PWM/Makefile b/testhal/KINETIS/TEENSY3_x/PWM/Makefile index 6510052..d12b346 100644 --- a/testhal/KINETIS/TEENSY3_x/PWM/Makefile +++ b/testhal/KINETIS/TEENSY3_x/PWM/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/PWM/chconf.h b/testhal/KINETIS/TEENSY3_x/PWM/chconf.h index a661f7e..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/PWM/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/PWM/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ /** - * @file TEENSY3_x/PWM/chconf.h + * @file templates/chconf.h * @brief Configuration file template. * @details A copy of this file must be placed in each project directory, it * contains the application specific kernel settings. @@ -25,11 +25,11 @@ * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -42,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -59,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -82,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -95,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -104,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -123,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -141,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -149,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -158,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -166,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -177,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -185,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -195,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -205,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -215,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -223,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -233,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -242,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -253,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -263,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -272,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -284,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -293,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -304,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -320,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -329,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -338,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -348,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -369,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -379,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -390,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -401,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -410,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -422,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -460,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -469,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -512,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/PWM/halconf_community.h b/testhal/KINETIS/TEENSY3_x/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile b/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile index 6510052..d12b346 100644 --- a/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile +++ b/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -88,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk # HAL-OSAL files (optional). @@ -105,19 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MK20DX256.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -140,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY3_x/SERIAL/chconf.h b/testhal/KINETIS/TEENSY3_x/SERIAL/chconf.h index 27ed81c..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/SERIAL/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015 RedoX https://github.com/RedoXyde + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY3_x/SERIAL/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/SERIAL/halconf_community.h b/testhal/KINETIS/TEENSY3_x/SERIAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/SERIAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile index 055c3dc..0cd1dbc 100644 --- a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile +++ b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile @@ -1,225 +1,219 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# Linker extra options here. -ifeq ($(USE_LDOPT),) - USE_LDOPT = -endif - -# Enable this if you want link time optimizations (LTO) -ifeq ($(USE_LTO),) - USE_LTO = no -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# If enabled, this option makes the build process faster by not compiling -# modules not used in the current configuration. -ifeq ($(USE_SMART_BUILD),) - USE_SMART_BUILD = yes -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Stack size to be allocated to the Cortex-M process stack. This stack is -# the stack used by the main() thread. -ifeq ($(USE_PROCESS_STACKSIZE),) - USE_PROCESS_STACKSIZE = 0x200 -endif - -# Stack size to the allocated to the Cortex-M main/exceptions stack. This -# stack is used for processing interrupts and exceptions. -ifeq ($(USE_EXCEPTIONS_STACKSIZE),) - USE_EXCEPTIONS_STACKSIZE = 0x400 -endif - -# Enables the use of FPU on Cortex-M4 (no, softfp, hard). -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT -CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib -# Startup files. -include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk -# HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk -include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3_1/board.mk -include $(CHIBIOS)/os/hal/osal/rt/osal.mk -# RTOS files (optional). -include $(CHIBIOS)/os/rt/rt.mk -include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk -# Other files (optional). -include $(CHIBIOS)/test/rt/test.mk -include $(CHIBIOS)/os/hal/lib/streams/streams.mk -include $(CHIBIOS)/os/various/shell/shell.mk - -# Define linker script file here -LDSCRIPT= $(STARTUPLD)/MK20DX256.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(TESTSRC) \ - $(STREAMSSRC) \ - $(SHELLSRC) \ - usbcfg.c \ - main.c \ - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) - -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(STREAMSINC) $(SHELLINC) - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -AR = $(TRGT)ar -OD = $(TRGT)objdump -SZ = $(TRGT)size -HEX = $(CP) -O ihex -BIN = $(CP) -O binary -SREC = $(CP) -O srec - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra -Wundef - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC -include $(RULESPATH)/rules.mk +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x200 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3_1/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/MK20DX256.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + usbcfg.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/chconf.h b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/chconf.h index 6dbecb5..1750f63 100644 --- a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/chconf.h +++ b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY3_x/USB_SERIAL/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,15 +119,20 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. * @details When this option is activated the function @p chSysInit() * does not spawn the idle thread. The application @p main() * function becomes the idle thread and must implement an - * infinite loop. */ + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -120,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -138,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -146,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -155,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -163,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -174,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -182,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -192,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -202,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -212,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -220,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -230,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -239,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -250,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -260,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -269,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -281,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -290,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -301,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -317,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -326,7 +472,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -335,7 +483,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_CHECKS FALSE +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -345,16 +495,28 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_ASSERTS FALSE +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE FALSE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -366,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -376,7 +540,9 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_FILL_THREADS FALSE +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -387,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -398,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -407,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -419,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -433,7 +613,7 @@ * @details This hook is invoked just before switching between threads. */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ + /* Context switch code here.*/ \ } /** @@ -456,7 +636,8 @@ * should be invoked from here. * @note This macro can be used to activate a power saving mode. */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -465,7 +646,8 @@ * should be invoked from here. * @note This macro can be used to deactivate a power saving mode. */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -509,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/halconf_community.h b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile index f868337..71438e9 100644 --- a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile +++ b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -100,18 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MKL26Z64.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -134,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/chconf.h b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/chconf.h index f0c238c..1750f63 100644 --- a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/chconf.h +++ b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY_LC/BOOTLOADER/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/halconf_community.h b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile index a9534fc..812efc4 100644 --- a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile +++ b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -96,23 +103,18 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk # Other files (optional). # Define linker script file here -LDSCRIPT = MKL26Z64.ld +LDSCRIPT= MKL26Z64.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ eeprom.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -135,13 +137,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/chconf.h b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/chconf.h index 97c98b7..1750f63 100644 --- a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/chconf.h +++ b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY_LC/EEPROM_EMU/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#define CH_CFG_USE_SEMAPHORES_PRIORITY TRUE +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/halconf_community.h b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/PWM/Makefile b/testhal/KINETIS/TEENSY_LC/PWM/Makefile index f868337..71438e9 100644 --- a/testhal/KINETIS/TEENSY_LC/PWM/Makefile +++ b/testhal/KINETIS/TEENSY_LC/PWM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -30,7 +30,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -69,6 +69,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),) USE_EXCEPTIONS_STACKSIZE = 0x400 endif +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # # Architecture or project specific options ############################################################################## @@ -83,6 +88,8 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../../../../ChibiOS-RT CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk # HAL-OSAL files (optional). @@ -100,18 +107,13 @@ LDSCRIPT= $(STARTUPLD)/MKL26Z64.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = $(STARTUPSRC) \ - $(KERNSRC) \ - $(PORTSRC) \ - $(OSALSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CPPSRC = +CPPSRC = $(ALLCPPSRC) # C sources to be compiled in ARM mode regardless of the global setting. # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler @@ -134,13 +136,11 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = -ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) -INCDIR = $(CHIBIOS)/os/license \ - $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) # # Project, sources and paths diff --git a/testhal/KINETIS/TEENSY_LC/PWM/chconf.h b/testhal/KINETIS/TEENSY_LC/PWM/chconf.h index d910706..1750f63 100644 --- a/testhal/KINETIS/TEENSY_LC/PWM/chconf.h +++ b/testhal/KINETIS/TEENSY_LC/PWM/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - (C) 2015-2016 flabbergast + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -15,19 +15,21 @@ */ /** - * @file TEENSY_LC/PWM/chconf.h - * @brief Configuration file. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. * * @addtogroup config * @details Kernel related settings and hooks. * @{ */ -#ifndef _CHCONF_H_ -#define _CHCONF_H_ +#ifndef CHCONF_H +#define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_0_ +#define _CHIBIOS_RT_CONF_VER_5_1_ /*===========================================================================*/ /** @@ -40,14 +42,34 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ +#if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 +#endif /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ +#if !defined(CH_CFG_ST_FREQUENCY) #define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif /** * @brief Time delta constant for the tick-less mode. @@ -57,7 +79,9 @@ * The value one is not valid, timeouts are rounded up to * this value. */ +#if !defined(CH_CFG_ST_TIMEDELTA) #define CH_CFG_ST_TIMEDELTA 0 +#endif /** @} */ @@ -80,7 +104,9 @@ * @note The round robin preemption is not supported in tickless mode and * must be set to zero in that case. */ -#define CH_CFG_TIME_QUANTUM 20 +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif /** * @brief Managed RAM size. @@ -93,7 +119,9 @@ * provide the @p __heap_base__ and @p __heap_end__ symbols. * @note Requires @p CH_CFG_USE_MEMCORE. */ +#if !defined(CH_CFG_MEMCORE_SIZE) #define CH_CFG_MEMCORE_SIZE 0 +#endif /** * @brief Idle thread automatic spawn suppression. @@ -102,7 +130,9 @@ * function becomes the idle thread and must implement an * infinite loop. */ +#if !defined(CH_CFG_NO_IDLE_THREAD) #define CH_CFG_NO_IDLE_THREAD FALSE +#endif /** @} */ @@ -121,7 +151,9 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) #define CH_CFG_OPTIMIZE_SPEED TRUE +#endif /** @} */ @@ -139,7 +171,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_TM) #define CH_CFG_USE_TM FALSE +#endif /** * @brief Threads registry APIs. @@ -147,7 +181,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_REGISTRY) #define CH_CFG_USE_REGISTRY TRUE +#endif /** * @brief Threads synchronization APIs. @@ -156,7 +192,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_WAITEXIT) #define CH_CFG_USE_WAITEXIT TRUE +#endif /** * @brief Semaphores APIs. @@ -164,7 +202,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_SEMAPHORES) #define CH_CFG_USE_SEMAPHORES TRUE +#endif /** * @brief Semaphores queuing mode. @@ -175,7 +215,9 @@ * requirements. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif /** * @brief Mutexes APIs. @@ -183,7 +225,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MUTEXES) #define CH_CFG_USE_MUTEXES TRUE +#endif /** * @brief Enables recursive behavior on mutexes. @@ -193,7 +237,9 @@ * @note The default is @p FALSE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif /** * @brief Conditional Variables APIs. @@ -203,7 +249,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_MUTEXES. */ +#if !defined(CH_CFG_USE_CONDVARS) #define CH_CFG_USE_CONDVARS TRUE +#endif /** * @brief Conditional Variables APIs with timeout. @@ -213,7 +261,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_CONDVARS. */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif /** * @brief Events Flags APIs. @@ -221,7 +271,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_EVENTS) #define CH_CFG_USE_EVENTS TRUE +#endif /** * @brief Events Flags APIs with timeout. @@ -231,7 +283,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_EVENTS. */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) #define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif /** * @brief Synchronous Messages APIs. @@ -240,7 +294,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MESSAGES) #define CH_CFG_USE_MESSAGES TRUE +#endif /** * @brief Synchronous Messages queuing mode. @@ -251,7 +307,9 @@ * requirements. * @note Requires @p CH_CFG_USE_MESSAGES. */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) #define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif /** * @brief Mailboxes APIs. @@ -261,7 +319,9 @@ * @note The default is @p TRUE. * @note Requires @p CH_CFG_USE_SEMAPHORES. */ +#if !defined(CH_CFG_USE_MAILBOXES) #define CH_CFG_USE_MAILBOXES TRUE +#endif /** * @brief Core Memory Manager APIs. @@ -270,7 +330,9 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMCORE) #define CH_CFG_USE_MEMCORE TRUE +#endif /** * @brief Heap Allocator APIs. @@ -282,7 +344,9 @@ * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ +#if !defined(CH_CFG_USE_HEAP) #define CH_CFG_USE_HEAP TRUE +#endif /** * @brief Memory Pools Allocator APIs. @@ -291,7 +355,20 @@ * * @note The default is @p TRUE. */ +#if !defined(CH_CFG_USE_MEMPOOLS) #define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif /** * @brief Dynamic Threads APIs. @@ -302,7 +379,73 @@ * @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ +#if !defined(CH_CFG_USE_DYNAMIC) #define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif /** @} */ @@ -318,7 +461,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_STATISTICS) #define CH_DBG_STATISTICS FALSE +#endif /** * @brief Debug option, system state check. @@ -327,7 +472,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) #define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -336,7 +483,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_CHECKS) #define CH_DBG_ENABLE_CHECKS TRUE +#endif /** * @brief Debug option, consistency checks. @@ -346,16 +495,28 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_ENABLE_ASSERTS) #define CH_DBG_ENABLE_ASSERTS TRUE +#endif /** * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. + * @details If enabled then the trace buffer is activated. * - * @note The default is @p FALSE. + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. */ -#define CH_DBG_ENABLE_TRACE TRUE +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif /** * @brief Debug option, stack checks. @@ -367,7 +528,9 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) #define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif /** * @brief Debug option, stacks initialization. @@ -377,7 +540,9 @@ * * @note The default is @p FALSE. */ +#if !defined(CH_DBG_FILL_THREADS) #define CH_DBG_FILL_THREADS TRUE +#endif /** * @brief Debug option, threads profiling. @@ -388,7 +553,9 @@ * @note This debug option is not currently compatible with the * tickless mode. */ +#if !defined(CH_DBG_THREADS_PROFILING) #define CH_DBG_THREADS_PROFILING FALSE +#endif /** @} */ @@ -399,6 +566,22 @@ */ /*===========================================================================*/ +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + /** * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p thread_t structure. @@ -408,9 +591,9 @@ /** * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. + * @details User initialization code added to the @p _thread_init() function. * - * @note It is invoked from within @p chThdInit() and implicitly from all + * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ @@ -420,10 +603,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -458,6 +637,7 @@ * @note This macro can be used to activate a power saving mode. */ #define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ } /** @@ -467,6 +647,7 @@ * @note This macro can be used to deactivate a power saving mode. */ #define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ } /** @@ -510,6 +691,6 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -#endif /* _CHCONF_H_ */ +#endif /* CHCONF_H */ /** @} */ diff --git a/testhal/KINETIS/TEENSY_LC/PWM/halconf_community.h b/testhal/KINETIS/TEENSY_LC/PWM/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/KINETIS/TEENSY_LC/PWM/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ -- cgit v1.2.3 From 33375fb281b05ac493ce3ff34deaf21c15565157 Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sun, 7 Oct 2018 18:39:36 +0700 Subject: Fix USB HID driver. --- os/hal/src/hal_usb_hid.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/os/hal/src/hal_usb_hid.c b/os/hal/src/hal_usb_hid.c index d9d671b..305fe8d 100644 --- a/os/hal/src/hal_usb_hid.c +++ b/os/hal/src/hal_usb_hid.c @@ -128,15 +128,23 @@ static size_t readt(void *ip, uint8_t *bp, size_t n, systime_t timeout) { return ibqReadTimeout(&((USBHIDDriver *)ip)->ibqueue, bp, n, timeout); } +static msg_t ctl(void *ip, unsigned int operation, void *arg) { + (void)ip; + (void)operation; + (void)arg; + return MSG_OK; +} + static void flush(void *ip) { obqFlush(&((USBHIDDriver *)ip)->obqueue); } static const struct USBHIDDriverVMT vmt = { + (size_t)0, write, read, put, get, putt, gett, writet, readt, - flush + ctl, flush }; /** -- cgit v1.2.3 From 322d1813f091dd4b682c21b111ebee2316e4d566 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 4 Dec 2018 02:29:16 +0100 Subject: Update README.md --- README.md | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 913b1e7..d0ed018 100644 --- a/README.md +++ b/README.md @@ -15,10 +15,14 @@ Feel free to send pull request there. ``` Note: this repos cloned in the same directory side by side (not inside). -#### Useful links +#### Contributing + +When you submit a pull request, make sure all impacted platform tests compile using the tools/build.sh script. +Feel free to update authors.txt with your name. -https://help.github.com/ -http://git-scm.com/ +#### Useful links +https://help.github.com/ +http://git-scm.com/ http://chibios.org/dokuwiki/doku.php?id=chibios:guides:style_guide -- cgit v1.2.3 From 92b21d872d5edcac773843986a645c2e1e572b03 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Mon, 10 Dec 2018 22:34:43 +0100 Subject: Fixed board generation for pins with note in name --- tools/mx2board.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 132689e..99b54a3 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -171,7 +171,11 @@ def read_gpio(filename): for pin in root.findall('GPIO_Pin'): try: port = pin.attrib['Name'][1] - num = int(pin.attrib['Name'][2:]) + num = pin.attrib['Name'][2:] + # remove notes from pin name (e.g. PH0 - OSC_IN) + num = num.split('-')[0].strip() + num = int(num) + if port not in gpio['ports']: gpio['ports'][port] = {} if num not in gpio['ports'][port]: -- cgit v1.2.3 From bfa560413c8052e7ef2be656546b2868e5a993a2 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Fri, 21 Dec 2018 17:25:22 +0100 Subject: Fixed Timer number generation --- tools/mx2board.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 99b54a3..5bec83c 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -275,7 +275,7 @@ def gen_defines(project): defines['LINE_'+label] += ', ' + str(pad_key) + 'U)' if re.search(r"TIM\d+_CH\d$", signal, re.M): - timer = signal.replace('S_TIM', '').replace('_CH', '')[:-1] + timer = signal.replace('TIM', '').replace('_CH', '')[:-1] ch_num = int(signal[-1:]) defines['TIM_' + label] = timer -- cgit v1.2.3 From ceff99507d96795f5040d6a0b493867ceaf35d34 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Fri, 21 Dec 2018 23:52:26 +0100 Subject: Generate peripherals and channels from signal name --- tools/mx2board.py | 42 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 5bec83c..14b367c 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -230,6 +230,7 @@ def read_project(gpio, filename): or 'DAC' in prop_value \ or 'OSC' in prop_value: pads[pad_port][pad_num]["MODER"] = PIN_MODE_ANALOG + pads[pad_port][pad_num]["SIGNAL"] = prop_value elif 'GPIO_Output' == prop_value: pads[pad_port][pad_num]["MODER"] = PIN_MODE_OUTPUT elif 'GPIO_Input' == prop_value: @@ -274,15 +275,48 @@ def gen_defines(project): defines['LINE_'+label] = 'PAL_LINE(GPIO' + port_key defines['LINE_'+label] += ', ' + str(pad_key) + 'U)' - if re.search(r"TIM\d+_CH\d$", signal, re.M): - timer = signal.replace('TIM', '').replace('_CH', '')[:-1] - ch_num = int(signal[-1:]) - + match = re.search(r"TIM(\d+)_CH(\d)$", signal) + if match: + timer = match.group(1) + ch_num = int(match.group(2)) defines['TIM_' + label] = timer defines['CCR_' + label] = 'CCR' + timer[-1] defines['PWMD_' + label] = 'PWMD' + timer[-1] defines['ICUD_' + label] = 'ICUD' + timer[-1] defines['CHN_' + label] = ch_num - 1 + continue + + match = re.search(r"ADC(\d*)_IN(\d+)$", signal) + if match: + adc = match.group(1) + if len(adc) == 0: + adc = 1 + defines['ADC_' + label] = adc + defines['CHN_' + label] = match.group(2) + continue + + match = re.search(r"USART(\d+)_[RT]X$", signal) + if match: + defines['USART_' + label] = match.group(1) + continue + + match = re.search(r"COMP_DAC(\d+)_group", signal) + if match: + defines['DAC_' + label] = match.group(1) + continue + + match = re.search(r"I2C(\d)_S(CL|DA)", signal) + if match: + defines['I2C_' + label] = match.group(1) + continue + + match = re.search(r"CAN(\d)_[RT]X", signal) + if match: + can = match.group(1) + if len(can) == 0: + can = 1 + defines['CAN_' + label] = can + continue return defines -- cgit v1.2.3 From 4ce121fdb0039a11f9617ca0e8a53bdac57a64c8 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Sat, 22 Dec 2018 09:12:33 +0100 Subject: Fixed single can generation --- tools/mx2board.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 14b367c..20dcfb3 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -310,7 +310,7 @@ def gen_defines(project): defines['I2C_' + label] = match.group(1) continue - match = re.search(r"CAN(\d)_[RT]X", signal) + match = re.search(r"CAN(\d*)_[RT]X", signal) if match: can = match.group(1) if len(can) == 0: -- cgit v1.2.3 From 2168085ac76c280880a0c2262a7e63fd0ce7c952 Mon Sep 17 00:00:00 2001 From: andru <7698720+AndruPol@users.noreply.github.com> Date: Tue, 8 Jan 2019 11:22:01 +0300 Subject: added NRF52 pwm, icu, i2c, radio esb drivers --- os/hal/boards/NRF52-E73-2G4M04S/board.c | 81 ++ os/hal/boards/NRF52-E73-2G4M04S/board.h | 164 +++ os/hal/boards/NRF52-E73-2G4M04S/board.mk | 8 + os/hal/ports/NRF5/LLD/PWMv2/driver.mk | 9 + os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c | 402 +++++++ os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.h | 243 +++++ os/hal/ports/NRF5/LLD/TIMERv1/driver.mk | 4 + os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c | 768 ++++++++++++++ os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.h | 424 ++++++++ os/hal/ports/NRF5/LLD/TWIMv1/driver.mk | 9 + os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c | 420 ++++++++ os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h | 210 ++++ os/hal/ports/NRF5/NRF52832/hal_lld.c | 26 +- os/hal/ports/NRF5/NRF52832/hal_lld.h | 32 +- os/hal/ports/NRF5/NRF52832/nrf_delay.h | 335 ++++-- os/hal/ports/NRF5/NRF52832/platform.mk | 3 +- os/various/devices_lib/rf/nrf52_radio.c | 1111 ++++++++++++++++++++ os/various/devices_lib/rf/nrf52_radio.h | 256 +++++ testhal/NRF52/NRF52832/I2C/Makefile | 207 ++++ testhal/NRF52/NRF52832/I2C/chconf.h | 696 ++++++++++++ testhal/NRF52/NRF52832/I2C/halconf.h | 327 ++++++ testhal/NRF52/NRF52832/I2C/halconf_community.h | 173 +++ testhal/NRF52/NRF52832/I2C/main.c | 165 +++ testhal/NRF52/NRF52832/I2C/mcuconf.h | 25 + testhal/NRF52/NRF52832/I2C/readme.txt | 21 + testhal/NRF52/NRF52832/PWM-ICU/Makefile | 228 ++++ testhal/NRF52/NRF52832/PWM-ICU/chconf.h | 696 ++++++++++++ testhal/NRF52/NRF52832/PWM-ICU/halconf.h | 327 ++++++ testhal/NRF52/NRF52832/PWM-ICU/halconf_community.h | 173 +++ testhal/NRF52/NRF52832/PWM-ICU/main.c | 122 +++ testhal/NRF52/NRF52832/PWM-ICU/mcuconf.h | 33 + testhal/NRF52/NRF52832/RADIO-ESB/Makefile | 212 ++++ testhal/NRF52/NRF52832/RADIO-ESB/chconf.h | 696 ++++++++++++ testhal/NRF52/NRF52832/RADIO-ESB/halconf.h | 327 ++++++ .../NRF52/NRF52832/RADIO-ESB/halconf_community.h | 173 +++ testhal/NRF52/NRF52832/RADIO-ESB/main.c | 122 +++ testhal/NRF52/NRF52832/RADIO-ESB/mcuconf.h | 28 + testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.c | 1111 ++++++++++++++++++++ testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.h | 256 +++++ 39 files changed, 10514 insertions(+), 109 deletions(-) create mode 100644 os/hal/boards/NRF52-E73-2G4M04S/board.c create mode 100644 os/hal/boards/NRF52-E73-2G4M04S/board.h create mode 100644 os/hal/boards/NRF52-E73-2G4M04S/board.mk create mode 100644 os/hal/ports/NRF5/LLD/PWMv2/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c create mode 100644 os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.h create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c create mode 100644 os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.h create mode 100644 os/hal/ports/NRF5/LLD/TWIMv1/driver.mk create mode 100644 os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c create mode 100644 os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h create mode 100644 os/various/devices_lib/rf/nrf52_radio.c create mode 100644 os/various/devices_lib/rf/nrf52_radio.h create mode 100644 testhal/NRF52/NRF52832/I2C/Makefile create mode 100644 testhal/NRF52/NRF52832/I2C/chconf.h create mode 100644 testhal/NRF52/NRF52832/I2C/halconf.h create mode 100644 testhal/NRF52/NRF52832/I2C/halconf_community.h create mode 100644 testhal/NRF52/NRF52832/I2C/main.c create mode 100644 testhal/NRF52/NRF52832/I2C/mcuconf.h create mode 100644 testhal/NRF52/NRF52832/I2C/readme.txt create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/Makefile create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/chconf.h create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/halconf.h create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/halconf_community.h create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/main.c create mode 100644 testhal/NRF52/NRF52832/PWM-ICU/mcuconf.h create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/Makefile create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/chconf.h create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/halconf.h create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/halconf_community.h create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/main.c create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/mcuconf.h create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.c create mode 100644 testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.h diff --git a/os/hal/boards/NRF52-E73-2G4M04S/board.c b/os/hal/boards/NRF52-E73-2G4M04S/board.c new file mode 100644 index 0000000..adf002d --- /dev/null +++ b/os/hal/boards/NRF52-E73-2G4M04S/board.c @@ -0,0 +1,81 @@ +/* + Copyright (C) 2016 Stéphane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +const PALConfig pal_default_config = +{ + .pads = { + PAL_MODE_UNCONNECTED, /* P0.0 : XTAL (32MHz) */ + PAL_MODE_UNCONNECTED, /* P0.1 : XTAL (32MHz) */ + PAL_MODE_UNCONNECTED, /* P0.2 */ + PAL_MODE_UNCONNECTED, /* P0.3 */ + PAL_MODE_UNCONNECTED, /* P0.4 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.5 : UART_RTS */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.6 : UART_TX */ + PAL_MODE_INPUT_PULLUP, /* P0.7 : UART_CTS */ + PAL_MODE_INPUT_PULLUP, /* P0.8 : UART_RX */ + PAL_MODE_UNCONNECTED, /* P0.9 */ + PAL_MODE_UNCONNECTED, /* P0.10 */ + PAL_MODE_UNCONNECTED, /* P0.11 */ + PAL_MODE_UNCONNECTED, /* P0.12 */ + PAL_MODE_INPUT, /* P0.13: BTN1 */ + PAL_MODE_INPUT, /* P0.14: BTN2 */ + PAL_MODE_INPUT_PULLUP, /* P0.15: BTN3 */ + PAL_MODE_INPUT_PULLUP, /* P0.16: BTN4 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.17: LED1 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.18: LED2 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.19: LED3 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.20: LED4 */ + PAL_MODE_UNCONNECTED, /* P0.21 */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: SPI_SS */ + PAL_MODE_INPUT_PULLUP, /* P0.23: SPI_MISO */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: SPI_MOSI */ + PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_SCK */ + PAL_MODE_OUTPUT_OPENDRAIN, /* P0.26: SDA */ + PAL_MODE_OUTPUT_OPENDRAIN, /* P0.27: SCL */ + PAL_MODE_UNCONNECTED, /* P0.28 */ + PAL_MODE_UNCONNECTED, /* P0.29 */ + PAL_MODE_UNCONNECTED, /* P0.30 */ + PAL_MODE_UNCONNECTED, /* P0.31 */ + }, +}; +#endif + +/** + * @brief Early initialization code. + * @details This initialization is performed just after reset before BSS and + * DATA segments initialization. + */ +void __early_init(void) +{ +} + +/** + * @brief Late initialization code. + * @note This initialization is performed after BSS and DATA segments + * initialization and before invoking the main() function. + */ +void boardInit(void) +{ +} diff --git a/os/hal/boards/NRF52-E73-2G4M04S/board.h b/os/hal/boards/NRF52-E73-2G4M04S/board.h new file mode 100644 index 0000000..c78909f --- /dev/null +++ b/os/hal/boards/NRF52-E73-2G4M04S/board.h @@ -0,0 +1,164 @@ +/* + Copyright (C) 2016 Stephane D'Alu + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* Board identifier. */ +#define BOARD_NRF52_EBYTE_E73 +#define BOARD_NAME "nRF52 EBYTE E73-2G4M04S" + +/* Board oscillators-related settings. */ +#define NRF5_XTAL_VALUE 32000000 +#define NRF5_HFCLK_SOURCE NRF5_HFCLK_HFXO +#define NRF5_LFCLK_SOURCE NRF5_LFCLK_XTAL + +#define NRF5_HFCLK_HFINT 0 +#define NRF5_HFCLK_HFXO 1 + +#define NRF5_LFCLK_RC 0 +#define NRF5_LFCLK_XTAL 1 +#define NRF5_LFCLK_SYNTH 2 + +/* + * GPIO pins. + */ +/* Defined by board */ +#define BTN1 13U +#define BTN2 14U +#define BTN3 15U +#define BTN4 16U +#define LED1 17U +#define LED2 18U +#define LED3 19U +#define LED4 20U +#define UART_RTS 5U +#define UART_TX 6U +#define UART_CTS 7U +#define UART_RX 8U +#define NFC1 9U +#define NFC2 10U +#define I2C_SCL 27U +#define I2C_SDA 26U + +/* Our definitions */ +#define SPI_SCK 25U +#define SPI_MOSI 24U +#define SPI_MISO 23U +#define SPI_SS 22U + +/* Analog input */ +#define AIN0 2U +#define AIN1 3U +#define AIN2 4U +#define AIN3 5U +#define AIN4 28U +#define AIN5 29U +#define AIN6 30U +#define AIN7 31U +#define AREF0 AIN0 +#define AREF1 AIN1 + +/* + * IO pins assignments. + */ +/* Defined by board */ +#define IOPORT1_BTN1 13U +#define IOPORT1_BTN2 14U +#define IOPORT1_BTN3 15U +#define IOPORT1_BTN4 16U +#define IOPORT1_LED1 17U +#define IOPORT1_LED2 18U +#define IOPORT1_LED3 19U +#define IOPORT1_LED4 20U +#define IOPORT1_UART_RTS 5U +#define IOPORT1_UART_TX 6U +#define IOPORT1_UART_CTS 7U +#define IOPORT1_UART_RX 8U +#define IOPORT1_NFC1 9U +#define IOPORT1_NFC2 10U +#define IOPORT1_I2C_SCL 27U +#define IOPORT1_I2C_SDA 26U +#define IOPORT1_RESET 21U + +/* Our definitions */ +#define IOPORT1_SPI_SCK 25U +#define IOPORT1_SPI_MOSI 24U +#define IOPORT1_SPI_MISO 23U +#define IOPORT1_SPI_SS 22U + +/* Analog inpupt */ +#define IOPORT1_AIN0 2U +#define IOPORT1_AIN1 3U +#define IOPORT1_AIN2 4U +#define IOPORT1_AIN3 5U +#define IOPORT1_AIN4 28U +#define IOPORT1_AIN5 29U +#define IOPORT1_AIN6 30U +#define IOPORT1_AIN7 31U +#define IOPORT1_AREF0 IOPORT1_AIN0 +#define IOPORT1_AREF1 IOPORT1_AIN1 + +/* + * IO lines assignments. + */ +/* Board defined */ +#define LINE_BTN1 PAL_LINE(IOPORT1, IOPORT1_BTN1) +#define LINE_BTN2 PAL_LINE(IOPORT1, IOPORT1_BTN2) +#define LINE_BTN3 PAL_LINE(IOPORT1, IOPORT1_BTN3) +#define LINE_BTN4 PAL_LINE(IOPORT1, IOPORT1_BTN4) +#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1) +#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2) +#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3) +#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4) +#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS) +#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX) +#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS) +#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX) +#define LINE_NFC1 PAL_LINE(IOPORT1, IOPORT1_NFC1) +#define LINE_NFC2 PAL_LINE(IOPORT1, IOPORT1_NFC2) +#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL) +#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA) + +/* Our definitions */ +#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK) +#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI) +#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO) +#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS) + +/* Analog line */ +#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) +#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) +#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) +#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) +#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) +#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) +#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) +#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) +#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) +#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/os/hal/boards/NRF52-E73-2G4M04S/board.mk b/os/hal/boards/NRF52-E73-2G4M04S/board.mk new file mode 100644 index 0000000..8876668 --- /dev/null +++ b/os/hal/boards/NRF52-E73-2G4M04S/board.mk @@ -0,0 +1,8 @@ +# List of all the board related files. +BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S/board.c + +# Required include directories +BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S + +ALLCSRC += $(BOARDSRC) +ALLINC += $(BOARDINC) diff --git a/os/hal/ports/NRF5/LLD/PWMv2/driver.mk b/os/hal/ports/NRF5/LLD/PWMv2/driver.mk new file mode 100644 index 0000000..ce247df --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv2/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv2 diff --git a/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c b/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c new file mode 100644 index 0000000..7162b1b --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.c @@ -0,0 +1,402 @@ +/* + ChibiOS/HAL - Copyright (C) 2018 Andru + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_pwm_lld.c + * @brief NRF52 PWM subsystem low level driver source. + * + * @addtogroup PWM + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ +uint16_t pwm_seq[PWM_CHANNELS]; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief PWMD1 driver identifier. + * @note The driver PWMD1 enabled. + */ +#if NRF5_PWM_USE_PWM0 || defined(__DOXYGEN__) +PWMDriver PWMD1; +#endif + +/** + * @brief PWMD2 driver identifier. + * @note The driver PWMD2 enabled. + */ +#if NRF5_PWM_USE_PWM1 || defined(__DOXYGEN__) +PWMDriver PWMD2; +#endif + +/** + * @brief PWMD3 driver identifier. + * @note The driver PWMD3 enabled. + */ +#if NRF5_PWM_USE_PWM2 || defined(__DOXYGEN__) +PWMDriver PWMD3; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void pwm_lld_serve_interrupt(PWMDriver *pwmp) { + /* Deal with PWM period + */ + if (pwmp->config->callback == NULL) { + return; + } + + if ((pwmp->pwm->INTEN & PWM_INTEN_PWMPERIODEND_Msk) && (pwmp->pwm->EVENTS_PWMPERIODEND)) { + pwmp->config->callback(pwmp); + pwmp->pwm->EVENTS_PWMPERIODEND = 0; + (void)pwmp->pwm->EVENTS_PWMPERIODEND; + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_PWM_USE_PWM0 +/** + * @brief PWM0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorB0) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_PWM0 */ + +#if NRF5_PWM_USE_PWM1 +/** + * @brief PWM1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorC4) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_PWM1 */ + +#if NRF5_PWM_USE_PWM2 +/** + * @brief PWM2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorC8) { + OSAL_IRQ_PROLOGUE(); + pwm_lld_serve_interrupt(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_PWM_USE_PWM2 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level PWM driver initialization. + * + * @notapi + */ +void pwm_lld_init(void) { + +#if NRF5_PWM_USE_PWM0 + pwmObjectInit(&PWMD1); + PWMD1.channels = PWM_CHANNELS; + PWMD1.pwm = NRF_PWM0; +#endif + +#if NRF5_PWM_USE_PWM1 + pwmObjectInit(&PWMD2); + PWMD2.channels = PWM_CHANNELS; + PWMD2.pwm = NRF_PWM1; +#endif + +#if NRF5_PWM_USE_PWM2 + pwmObjectInit(&PWMD3); + PWMD3.channels = PWM_CHANNELS; + PWMD3.pwm = NRF_PWM2; +#endif +} + +/** + * @brief Configures and activates the PWM peripheral. + * @note Starting a driver that is already in the @p PWM_READY state + * disables all the active channels. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_start(PWMDriver *pwmp) { + /* Prescaler value calculation: ftimer = 16MHz / 2^PRESCALER */ + /* Prescaler value as a power of 2, must be 0..7 */ + uint8_t i, psc_value; + for (psc_value = 0; psc_value < 8; psc_value++) + if (pwmp->config->frequency == (uint32_t)(16000000 >> psc_value)) + break; + + /* Prescaler value must be between 0..7, and a power of two. */ + osalDbgAssert(psc_value <= 7, "invalid frequency"); + + /* Set PWM output lines */ + for (i=0; iconfig->channels[i]; + uint32_t gpio_pin = PAL_PAD(cfg_channel->ioline); + if (cfg_channel->mode == PWM_OUTPUT_DISABLED) { + gpio_pin = PAL_NOLINE; + } + + pwmp->pwm->PSEL.OUT[i] = gpio_pin << PWM_PSEL_OUT_PIN_Pos; + } + + /* Enable PWM */ + pwmp->pwm->ENABLE = PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos; + + /* Set mode */ + pwmp->pwm->MODE = PWM_MODE_UPDOWN_Up & PWM_MODE_UPDOWN_Msk; + + /* Set prescaler */ + pwmp->pwm->PRESCALER = psc_value & PWM_PRESCALER_PRESCALER_Msk; + + /* Set period */ + pwmp->pwm->COUNTERTOP = pwmp->period & PWM_COUNTERTOP_COUNTERTOP_Msk; + + pwmp->pwm->LOOP = PWM_LOOP_CNT_Disabled & PWM_LOOP_CNT_Msk; + pwmp->pwm->DECODER = (PWM_DECODER_LOAD_Individual << PWM_DECODER_LOAD_Pos) | + (PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos); + + pwmp->pwm->SEQ[0].PTR = ((uint32_t)(pwm_seq) << PWM_SEQ_PTR_PTR_Pos); + pwmp->pwm->SEQ[0].CNT = ((sizeof(pwm_seq) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos); + pwmp->pwm->SEQ[0].REFRESH = 0; + pwmp->pwm->SEQ[0].ENDDELAY = 0; + + pwmp->pwm->SEQ[1].PTR = ((uint32_t)(pwm_seq) << PWM_SEQ_PTR_PTR_Pos); + pwmp->pwm->SEQ[1].CNT = ((sizeof(pwm_seq) / sizeof(uint16_t)) << PWM_SEQ_CNT_CNT_Pos); + pwmp->pwm->SEQ[1].REFRESH = 0; + pwmp->pwm->SEQ[1].ENDDELAY = 0; + + /* With clear shortcuts for period */ + pwmp->pwm->SHORTS = 0; + + /* Disable and reset interrupts */ + pwmp->pwm->INTEN = 0; +} + +/** + * @brief Deactivates the PWM peripheral. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_stop(PWMDriver *pwmp) { +#if NRF5_PWM_USE_PWM0 + if (&PWMD1 == pwmp) { + nvicDisableVector(PWM0_IRQn); + } +#endif + +#if NRF5_PWM_USE_PWM1 + if (&PWMD2 == pwmp) { + nvicDisableVector(PWM1_IRQn); + } +#endif + +#if NRF5_PWM_USE_PWM2 + if (&PWMD3 == pwmp) { + nvicDisableVector(PWM2_IRQn); + } +#endif + + /* Stop PWM generation */ + pwmp->pwm->TASKS_STOP = 1; + + /* Disable PWM */ + pwmp->pwm->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos); +} + +/** + * @brief Enables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is active using the specified configuration. + * @note The function has effect at the next cycle start. + * @note Channel notification is not enabled. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * @param[in] width PWM pulse width as clock pulses number + * + * @notapi + */ +void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width) { + const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; + + /* Deal with corner case: 0% and 100% */ + if ((width <= 0) || (width >= pwmp->period)) { + pwm_seq[channel] = pwmp->period & PWM_COUNTERTOP_COUNTERTOP_Msk; + if (cfg_channel->mode == PWM_OUTPUT_ACTIVE_LOW) pwm_seq[channel] |= 0x8000; + /* Really doing PWM */ + } else { + pwm_seq[channel] = width & PWM_COUNTERTOP_COUNTERTOP_Msk; + if (cfg_channel->mode == PWM_OUTPUT_ACTIVE_HIGH) pwm_seq[channel] |= 0x8000; + } + + pwmp->pwm->EVENTS_STOPPED = 0; + (void)pwmp->pwm->EVENTS_STOPPED; + + pwmp->pwm->TASKS_SEQSTART[0] = 1; +} + +/** + * @brief Disables a PWM channel and its notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is disabled and its output line returned to the + * idle state. + * @note The function has effect at the next cycle start. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) { + const PWMChannelConfig *cfg_channel = &pwmp->config->channels[channel]; + + pwm_seq[channel] = pwmp->period & PWM_COUNTERTOP_COUNTERTOP_Msk; + if (cfg_channel->mode == PWM_OUTPUT_ACTIVE_LOW) pwm_seq[channel] |= 0x8000; + + pwmp->pwm->EVENTS_STOPPED = 0; + (void)pwmp->pwm->EVENTS_STOPPED; + + pwmp->pwm->TASKS_SEQSTART[0] = 1; +} + +/** + * @brief Enables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { + + /* Events clear */ + pwmp->pwm->EVENTS_LOOPSDONE = 0; + pwmp->pwm->EVENTS_SEQEND[0] = 0; + pwmp->pwm->EVENTS_SEQEND[1] = 0; + pwmp->pwm->EVENTS_STOPPED = 0; +#if CORTEX_MODEL >= 4 + (void)pwmp->pwm->EVENTS_LOOPSDONE; + (void)pwmp->pwm->EVENTS_SEQEND[0]; + (void)pwmp->pwm->EVENTS_SEQEND[1]; + (void)pwmp->pwm->EVENTS_STOPPED; +#endif + + pwmp->pwm->INTENSET = PWM_INTENSET_PWMPERIODEND_Msk; + + /* Enable interrupt */ +#if NRF5_PWM_USE_PWM0 + if (&PWMD1 == pwmp) { + nvicEnableVector(PWM0_IRQn, NRF5_PWM_PWM0_PRIORITY); + } +#endif + +#if NRF5_PWM_USE_PWM1 + if (&PWMD2 == pwmp) { + nvicEnableVector(PWM1_IRQn, NRF5_PWM_PWM1_PRIORITY); + } +#endif + +#if NRF5_PWM_USE_PWM2 + if (&PWMD3 == pwmp) { + nvicEnableVector(PWM2_IRQn, NRF5_PWM_PWM2_PRIORITY); + } +#endif +} + +/** + * @brief Disables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { + pwmp->pwm->INTENCLR = PWM_INTENCLR_PWMPERIODEND_Msk; +} + +/** + * @brief Enables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { +} + +/** + * @brief Disables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { +} + +#endif /* HAL_USE_PWM */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.h b/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.h new file mode 100644 index 0000000..647b95e --- /dev/null +++ b/os/hal/ports/NRF5/LLD/PWMv2/hal_pwm_lld.h @@ -0,0 +1,243 @@ +/* + ChibiOS/HAL - Copyright (C) 2018 Andru + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_pwm_lld.h + * @brief NRF52 PWM subsystem low level driver header. + * + * @addtogroup PWM + * @{ + */ + +#ifndef HAL_PWM_LLD_H_ +#define HAL_PWM_LLD_H_ + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Number of PWM channels per PWM driver. + */ +#define PWM_CHANNELS 4 + +typedef enum { + PWM_FREQUENCY_16MHZ = 16000000, /** @brief 16MHz */ + PWM_FREQUENCY_8MHZ = 8000000, /** @brief 8MHz */ + PWM_FREQUENCY_4MHZ = 4000000, /** @brief 4MHz */ + PWM_FREQUENCY_2MHZ = 2000000, /** @brief 2MHz */ + PWM_FREQUENCY_1MHZ = 1000000, /** @brief 1MHz */ + PWM_FREQUENCY_500KHZ = 500000, /** @brief 500kHz */ + PWM_FREQUENCY_250KHZ = 250000, /** @brief 250kHz */ + PWM_FREQUENCY_125KHZ = 125000, /** @brief 125kHz */ +} pwm_frequency_t; + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** @} */ + +/*===========================================================================*/ +/* Configuration checks. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Type of a PWM mode. + */ +typedef uint32_t pwmmode_t; + +/** + * @brief Type of a PWM channel. + */ +typedef uint8_t pwmchannel_t; + +/** + * @brief Type of a channels mask. + */ +typedef uint32_t pwmchnmsk_t; + +/** + * @brief Type of a PWM counter. + */ +typedef uint16_t pwmcnt_t; + +/** + * @brief Type of a PWM driver channel configuration structure. + */ +typedef struct { + /** + * @brief Channel active logic level. + */ + pwmmode_t mode; + + /** + * @brief Channel callback pointer. + * @note This callback is invoked on the channel compare event. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /* End of the mandatory fields.*/ + + /** + * @brief PAL line to toggle. + * @note Only used if mode is PWM_OUTPUT_HIGH or PWM_OUTPUT_LOW. + * @note When channel enabled it wont be possible to access this PAL line using the PAL + * driver. + */ + ioline_t ioline; + +} PWMChannelConfig; + +/** + * @brief Type of a PWM driver configuration structure. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + pwm_frequency_t frequency; + /** + * @brief PWM period in ticks. + * @note The low level can use assertions in order to catch invalid + * period specifications. + */ + pwmcnt_t period; + /** + * @brief Periodic callback pointer. + * @note This callback is invoked on PWM counter reset. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /** + * @brief Channels configurations. + */ + PWMChannelConfig channels[PWM_CHANNELS]; + /* End of the mandatory fields.*/ +} PWMConfig; + +/** + * @brief Structure representing a PWM driver. + */ +struct PWMDriver { + /** + * @brief Driver state. + */ + pwmstate_t state; + /** + * @brief Current driver configuration data. + */ + const PWMConfig *config; + /** + * @brief Current PWM period in ticks. + */ + pwmcnt_t period; + /** + * @brief Mask of the enabled channels. + */ + pwmchnmsk_t enabled; + /** + * @brief Number of channels in this instance. + */ + pwmchannel_t channels; +#if defined(PWM_DRIVER_EXT_FIELDS) + PWM_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the PWM registers block. + */ + NRF_PWM_Type *pwm; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the period the PWM peripheral. + * @details This function changes the period of a PWM unit that has already + * been activated using @p pwmStart(). + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The PWM unit period is changed to the new value. + * @note The function has effect at the next cycle start. + * @note If a period is specified that is shorter than the pulse width + * programmed in one of the channels then the behavior is not + * guaranteed. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] period new cycle time in ticks + * + * @notapi + */ +#define pwm_lld_change_period(pwmp, period) \ + do { \ + (pwmp)->pwm->COUNTERTOP = period & PWM_COUNTERTOP_COUNTERTOP_Msk; \ + } while(0) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if NRF5_PWM_USE_PWM0 || defined(__DOXYGEN__) +extern PWMDriver PWMD1; +#endif +#if NRF5_PWM_USE_PWM1 || defined(__DOXYGEN__) +extern PWMDriver PWMD2; +#endif +#if NRF5_PWM_USE_PWM2 || defined(__DOXYGEN__) +extern PWMDriver PWMD3; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void pwm_lld_init(void); + void pwm_lld_start(PWMDriver *pwmp); + void pwm_lld_stop(PWMDriver *pwmp); + void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width); + void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); + void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); + void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PWM */ + +#endif /* HAL_PWM_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk b/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk index 6f3ce0e..333fe3c 100644 --- a/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk +++ b/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk @@ -2,8 +2,12 @@ ifeq ($(USE_SMART_BUILD),yes) ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c endif +ifneq ($(findstring HAL_USE_ICU TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c +endif else PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_gpt_lld.c +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c endif PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1 diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c new file mode 100644 index 0000000..4966007 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c @@ -0,0 +1,768 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * Hardware Abstraction Layer for Extended Input Capture Unit + */ +#include "hal.h" + +#if (HAL_USE_ICU == TRUE) || defined(__DOXYGEN__) + +/** + * @brief Returns the compare value of the latest cycle. + * + * @param[in] chp Pointer to channel structure that fired the interrupt. + * @return The number of ticks. + * + * @notapi + */ +//#define icu_lld_get_compare(chp) (*((chp)->ccp) + 1) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief ICUD1 driver identifier. + * @note The driver ICUD1 allocates the complex timer TIMER0 when enabled. + */ +#if NRF5_ICU_USE_TIMER0 && !defined(__DOXYGEN__) +ICUDriver ICUD1; +#endif + +/** + * @brief ICUD2 driver identifier. + * @note The driver ICUD2 allocates the timer TIMER1 when enabled. + */ +#if NRF5_ICU_USE_TIMER1 && !defined(__DOXYGEN__) +ICUDriver ICUD2; +#endif + +/** + * @brief ICUD3 driver identifier. + * @note The driver ICUD3 allocates the timer TIMER2 when enabled. + */ +#if NRF5_ICU_USE_TIMER2 && !defined(__DOXYGEN__) +ICUDriver ICUD3; +#endif + +/** + * @brief ICUD4 driver identifier. + * @note The driver ICUD4 allocates the timer TIMER3 when enabled. + */ +#if NRF5_ICU_USE_TIMER3 && !defined(__DOXYGEN__) +ICUDriver ICUD4; +#endif + +/** + * @brief ICUD5 driver identifier. + * @note The driver ICUD5 allocates the timer TIMER4 when enabled. + */ +#if NRF5_ICU_USE_TIMER4 && !defined(__DOXYGEN__) +ICUDriver ICUD5; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ +/** + * @brief Returns pulse width. + * @details The time is defined as number of ticks. + * + * @param[in] icup Pointer to the ICUDriver object. + * @param[in] channel The timer channel that fired the interrupt. + * @param[in] compare Content of the CC register. + * @return The number of ticks. + * + * @notapi + */ +static icucnt_t get_time_width(const ICUDriver *icup, + uint8_t channel, + icucnt_t compare) { + + const ICUChannel *chp = &icup->channel[channel]; + + /* Note! there is no overflow check because it handles under the hood of + unsigned subtraction math.*/ + return compare - chp->last_idle; +} + +/** + * @brief Returns pulse period. + * @details The time is defined as number of ticks. + * + * @param[in] icup Pointer to the ICUDriver object. + * @param[in] channel The timer channel that fired the interrupt. + * @param[in] compare Content of the CC register. + * @return The number of ticks. + * + * @notapi + */ +static icucnt_t get_time_period(const ICUDriver *icup, + uint8_t channel, + icucnt_t compare) { + + const ICUChannel *chp = &icup->channel[channel]; + + /* Note! there is no overflow check because it handles under the hood of + unsigned subtraction math.*/ + return compare - chp->last_idle; +} + +/** + * @brief ICU width event. + * + * @param[in] icup Pointer to the @p ICUDriver object + * @param[in] channel The timer channel that fired the interrupt. + * + * @notapi + */ +static void _isr_invoke_width_cb(ICUDriver *icup, uint8_t channel) { + ICUChannel *chp = &icup->channel[channel]; + icucnt_t compare = icup->timer->CC[channel+2]; + chp->last_active = compare; + if (ICU_CH_ACTIVE == chp->state) { + icup->result.width = get_time_width(icup, channel, compare); + if ((icup->state == ICU_ACTIVE) && (icup->config->width_cb != NULL)) + icup->config->width_cb(icup); + chp->state = ICU_CH_IDLE; + } +} + +/** + * @brief ICU period detect event. + * + * @param[in] icup Pointer to the @p ICUDriver object + * @param[in] channel The timer channel that fired the interrupt. + * + * @notapi + */ +static void _isr_invoke_period_cb(ICUDriver *icup, uint8_t channel) { + ICUChannel *chp = &icup->channel[channel]; + icucnt_t compare = (uint32_t)icup->timer->CC[channel]; + icup->result.period = get_time_period(icup, channel, compare); + chp->last_idle = compare; + chp->state = ICU_CH_ACTIVE; + if ((icup->state == ICU_ACTIVE) && (icup->config->period_cb != NULL)) + icup->config->period_cb(icup); + icup->state = ICU_ACTIVE; + /* Set overflow timeout */ + icup->timer->CC[channel] = compare + ICU_WAIT_TIMEOUT; +} + +/** + * @brief Shared IRQ handler. + * + * @param[in] icup Pointer to the @p ICUDriver object + */ +void icu_lld_serve_gpiote_interrupt(ICUDriver *icup) { + uint8_t ch; + for (ch=0; chconfig->iccfgp[ch]; + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + + /* Period event */ + if (NRF_GPIOTE->INTENSET & (1 << gpiote_channel[0]) && NRF_GPIOTE->EVENTS_IN[gpiote_channel[0]]) { + _isr_invoke_period_cb(icup, ch); + NRF_GPIOTE->EVENTS_IN[gpiote_channel[0]] = 0; + (void) NRF_GPIOTE->EVENTS_IN[gpiote_channel[0]]; + } + /* Width event */ + if (NRF_GPIOTE->INTENSET & (1 << gpiote_channel[1]) && NRF_GPIOTE->EVENTS_IN[gpiote_channel[1]]) { + _isr_invoke_width_cb(icup, ch); + NRF_GPIOTE->EVENTS_IN[gpiote_channel[1]] = 0; + (void) NRF_GPIOTE->EVENTS_IN[gpiote_channel[1]]; + } + } +} + +/** + * @brief Overflow IRQ handler. + * + * @param[in] icup Pointer to the @p ICUDriver object + */ +void icu_lld_serve_interrupt(ICUDriver *icup) { + uint8_t ch; + for (ch=0; chtimer->INTENSET & (1 << (TIMER_INTENSET_COMPARE0_Pos + ch)) && + icup->timer->EVENTS_COMPARE[ch]) { + icup->timer->EVENTS_COMPARE[ch] = 0; + (void) icup->timer->EVENTS_COMPARE[ch]; + /* Set next overlow compare */ + icup->timer->CC[ch] = icup->timer->CC[ch] + ICU_WAIT_TIMEOUT; + } + } + if (icup->config->overflow_cb != NULL) + icup->config->overflow_cb(icup); + icup->state = ICU_WAITING; +} + +/** + * @brief Starts every channel. + * + * @param[in] icup Pointer to the @p ICUDriver object + * + * @note GPIO Line[0] -> GPIOTE channel[0] will detect start edge. + * @note GPIO Line[1] -> GPIOTE channel[1] will detect end edge. + */ +static void start_channels(ICUDriver *icup) { + + /* Set each input channel that is used as: a normal input capture channel. */ +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel->mode == ICU_INPUT_DISABLED) continue; + + const uint32_t gpio_pin0 = PAL_PAD(cfg_channel->ioline[0]); + const uint32_t gpio_pin1 = PAL_PAD(cfg_channel->ioline[1]); + osalDbgAssert((gpio_pin0 < 32) && + (gpio_pin1 < 32) && + (gpio_pin0 != gpio_pin1), + "invalid Line configuration"); + + /* NRF52832 GPIOTE channels 0..7 */ + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + osalDbgAssert((gpiote_channel[0] < 8) && + (gpiote_channel[1] < 8) && + (gpiote_channel[0] != gpiote_channel[1]), + "invalid GPIOTE configuration"); + + /* NRF52832 PPI channels 0..19 */ + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + osalDbgAssert((gpiote_channel[0] < 20) && + (gpiote_channel[1] < 20) && + (gpiote_channel[0] != gpiote_channel[1]), + "invalid PPI configuration"); + + /* Program PPI events for period */ + NRF_PPI->CH[ppi_channel[0]].EEP = (uint32_t) &NRF_GPIOTE->EVENTS_IN[gpiote_channel[0]]; + NRF_PPI->CH[ppi_channel[0]].TEP = (uint32_t) &icup->timer->TASKS_CAPTURE[channel]; + + /* Program PPI events for width */ + NRF_PPI->CH[ppi_channel[1]].EEP = (uint32_t) &NRF_GPIOTE->EVENTS_IN[gpiote_channel[1]]; + NRF_PPI->CH[ppi_channel[1]].TEP = (uint32_t) &icup->timer->TASKS_CAPTURE[channel+2]; + + /* Disable GPIOTE interrupts */ + NRF_GPIOTE->INTENCLR = (GPIOTE_INTENCLR_PORT_Clear << GPIOTE_INTENCLR_PORT_Pos) | + (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + NRF_GPIOTE->EVENTS_PORT = 1; + + /* Clear GPIOTE channels */ + NRF_GPIOTE->CONFIG[gpiote_channel[0]] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk); + NRF_GPIOTE->CONFIG[gpiote_channel[1]] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk); + + /* Set GPIOTE channels */ + if (cfg_channel->mode == ICU_INPUT_ACTIVE_HIGH) { + NRF_GPIOTE->CONFIG[gpiote_channel[0]] = + (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | + ((gpio_pin0 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) | + ((GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk); + NRF_GPIOTE->CONFIG[gpiote_channel[1]] = + (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | + ((gpio_pin1 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) | + ((GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk); + } else { + NRF_GPIOTE->CONFIG[gpiote_channel[0]] = + (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | + ((gpio_pin0 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) | + ((GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos) + & GPIOTE_CONFIG_POLARITY_Msk); + NRF_GPIOTE->CONFIG[gpiote_channel[1]] = + (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | + ((gpio_pin1 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) | + ((GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos) + & GPIOTE_CONFIG_POLARITY_Msk); + } + } +#endif + +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_ICU_USE_GPIOTE_PPI +/** + * @brief GPIOTE events interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector58) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_gpiote_interrupt(&ICUD1); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_GPIOTE_PPI */ + +#if NRF5_ICU_USE_TIMER0 +/** + * @brief TIMER0 compare interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector60) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD1); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_TIMER0 */ + +#if NRF5_ICU_USE_TIMER1 +/** + * @brief TIMER1 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector64) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD2); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_TIMER1 */ + +#if NRF5_ICU_USE_TIMER2 +/** + * @brief TIMER2 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector68) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD3); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_TIMER2 */ + +#if NRF5_ICU_USE_TIMER3 +/** + * @brief TIMER3 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorA8) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD4); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_TIMER3 */ + +#if NRF5_ICU_USE_TIMER4 +/** + * @brief TIMER4 interrupt handler. + * @note It is assumed that the various sources are only activated if the + * associated callback pointer is not equal to @p NULL in order to not + * perform an extra check in a potentially critical interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(VectorAC) { + + OSAL_IRQ_PROLOGUE(); + + icu_lld_serve_interrupt(&ICUD5); + + OSAL_IRQ_EPILOGUE(); +} +#endif /* NRF5_ICU_USE_TIMER4 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ICU driver initialization. + * + * @notapi + */ +void icu_lld_init(void) { +#if NRF5_ICU_USE_TIMER0 + /* Driver initialization.*/ + icuObjectInit(&ICUD1); + ICUD1.timer = NRF_TIMER0; +#endif + +#if NRF5_ICU_USE_TIMER1 + /* Driver initialization.*/ + icuObjectInit(&ICUD2); + ICUD2.timer = NRF_TIMER1; +#endif + +#if NRF5_ICU_USE_TIMER2 + /* Driver initialization.*/ + icuObjectInit(&ICUD3); + ICUD3.timer = NRF_TIMER2; +#endif + +#if NRF5_ICU_USE_TIMER3 + /* Driver initialization.*/ + icuObjectInit(&ICUD4); + ICUD4.timer = NRF_TIMER3; +#endif + +#if NRF5_ICU_USE_TIMER4 + /* Driver initialization.*/ + icuObjectInit(&ICUD5); + ICUD5.timer = NRF_TIMER4; +#endif +} + +/** + * @brief Configures and activates the ICU peripheral. + * + * @param[in] icup Pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_start(ICUDriver *icup) { + size_t ch; + osalDbgAssert((&icup->config->iccfgp[0] != NULL) || + (&icup->config->iccfgp[1] != NULL), + "invalid input configuration"); + /* Prescaler value calculation: ftimer = 16MHz / 2^PRESCALER */ + uint16_t psc_ratio = 16000000 / icup->config->frequency; + /* Prescaler ratio must be between 1 and 512, and a power of two. */ + osalDbgAssert(psc_ratio <= 512 && !(psc_ratio & (psc_ratio - 1)), + "invalid frequency"); + /* Prescaler value as a power of 2, must be 0..9 */ + uint32_t psc_value; + for (psc_value = 0; psc_value < 10; psc_value++) + if (psc_ratio == (unsigned)(1 << psc_value)) + break; + + /* Configure as 32bits timer */ + icup->timer->BITMODE = TIMER_BITMODE_BITMODE_32Bit; + + /* Set timer mode */ + icup->timer->MODE = TIMER_MODE_MODE_Timer; + + /* Set prescaler */ + icup->timer->PRESCALER = psc_value; + + /* With clear shortcuts. */ + icup->timer->SHORTS = 0; + + /* Clear Timer */ + icup->timer->TASKS_CLEAR = 1; + + /* Disable and reset interrupts for compare events */ + icup->timer->INTENCLR = (TIMER_INTENCLR_COMPARE0_Msk | + TIMER_INTENCLR_COMPARE1_Msk | + TIMER_INTENCLR_COMPARE2_Msk | + TIMER_INTENCLR_COMPARE3_Msk ); + + icup->timer->EVENTS_COMPARE[0] = 0; + icup->timer->EVENTS_COMPARE[1] = 0; + icup->timer->EVENTS_COMPARE[2] = 0; + icup->timer->EVENTS_COMPARE[3] = 0; + (void) icup->timer->EVENTS_COMPARE[0]; + (void) icup->timer->EVENTS_COMPARE[1]; + (void) icup->timer->EVENTS_COMPARE[2]; + (void) icup->timer->EVENTS_COMPARE[3]; + + /* Enable GPIOTE and TIMER interrupt vectors.*/ +#if NRF5_ICU_USE_GPIOTE_PPI + nvicEnableVector(GPIOTE_IRQn, NRF5_ICU_GPIOTE_IRQ_PRIORITY); +#endif +#if NRF5_ICU_USE_TIMER0 + if (&ICUD1 == icup) { + nvicEnableVector(TIMER0_IRQn, NRF5_ICU_TIMER0_IRQ_PRIORITY); + } +#endif +#if NRF5_ICU_USE_TIMER1 + if (&ICUD2 == icup) { + nvicEnableVector(TIMER1_IRQn, NRF5_ICU_TIMER1_IRQ_PRIORITY); + } +#endif +#if NRF5_ICU_USE_TIMER2 + if (&ICUD3 == icup) { + nvicEnableVector(TIMER2_IRQn, NRF5_ICU_TIMER2_IRQ_PRIORITY); + } +#endif +#if NRF5_ICU_USE_TIMER3 + if (&ICUD4 == icup) { + nvicEnableVector(TIMER3_IRQn, NRF5_ICU_TIMER3_IRQ_PRIORITY); + } +#endif +#if NRF5_ICU_USE_TIMER4 + if (&ICUD5 == icup) { + nvicEnableVector(TIMER4_IRQn, NRF5_ICU_TIMER4_IRQ_PRIORITY); + } +#endif + + /* clean channel structures and set pointers to channel configs */ + for (ch=0; chchannel[ch].last_active = 0; + icup->channel[ch].last_idle = 0; + icup->channel[ch].state = ICU_CH_IDLE; + } + /* Set GPIOTE & PPI channels */ + start_channels(icup); +} + +/** + * @brief Deactivates the ICU peripheral. + * + * @param[in] icup Pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_stop(ICUDriver *icup) { + + if (icup->state == ICU_READY) { + /* Timer stop.*/ + icup->timer->TASKS_STOP = 1; + +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel == NULL) continue; + + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + + /* Disable Timer interrupt */ + icup->timer->INTENCLR = 1 << (TIMER_INTENCLR_COMPARE0_Pos + channel); + + /* Disable GPIOTE interrupts */ + NRF_GPIOTE->INTENCLR = (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + + /* Disable PPI channels */ + NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + + /* Clear GPIOTE channels */ + NRF_GPIOTE->CONFIG[gpiote_channel[0]] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk); + NRF_GPIOTE->CONFIG[gpiote_channel[1]] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk); + } +#endif + +#if NRF5_ICU_USE_GPIOTE_PPI + nvicDisableVector(GPIOTE_IRQn); +#endif +#if NRF5_ICU_USE_TIMER0 + if (&ICUD1 == icup) { + nvicDisableVector(TIMER0_IRQn); + } +#endif +#if NRF5_ICU_USE_TIMER1 + if (&ICUD2 == icup) { + nvicDisableVector(TIMER1_IRQn); + } +#endif +#if NRF5_ICU_USE_TIMER2 + if (&ICUD3 == icup) { + nvicDisableVector(TIMER2_IRQn); + } +#endif +#if NRF5_ICU_USE_TIMER3 + if (&ICUD4 == icup) { + nvicDisableVector(TIMER3_IRQn); + } +#endif +#if NRF5_ICU_USE_TIMER4 + if (&ICUD5 == icup) { + nvicDisableVector(TIMER4_IRQn); + } +#endif + } +} + +/** + * @brief Starts the input capture. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_start_capture(ICUDriver *icup) { + /* Clear and start Timer */ + icup->timer->TASKS_CLEAR = 1; + icup->timer->TASKS_START = 1; + +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel == NULL) continue; + + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + + /* Enable interrupt for overflow events */ + icup->timer->CC[channel] = ICU_WAIT_TIMEOUT; + icup->timer->INTENSET = 1 << (TIMER_INTENSET_COMPARE0_Pos + channel); + + /* Enable PPI channels */ + NRF_PPI->CHENSET = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + + /* Enable GPIOTE interrupt */ + NRF_GPIOTE->INTENSET = (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + } +#endif +} + +/** + * @brief Waits for a completed capture. + * @note The operation is performed in polled mode. + * @note In order to use this function notifications must be disabled. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The capture status. + * @retval false if the capture is successful. + * @retval true if a timer overflow occurred. + * + * @notapi + */ +bool icu_lld_wait_capture(ICUDriver *icup) { + + /* If the driver is still in the ICU_WAITING state then we need to wait + for the first activation edge.*/ + if (icup->state == ICU_WAITING) + if (icu_lld_wait_edge(icup)) + return true; + + /* This edge marks the availability of a capture result.*/ + return icu_lld_wait_edge(icup); +} + +/** + * @brief Stops the input capture. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_stop_capture(ICUDriver *icup) { + /* Timer stopped.*/ + icup->timer->TASKS_STOP = 1; + +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel == NULL) continue; + + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + const uint8_t *ppi_channel = cfg_channel->ppi_channel; + + /* Disable Timer interrupt for overflow events */ + icup->timer->INTENCLR = 1 << (TIMER_INTENCLR_COMPARE0_Pos + channel); + + /* Disable GPIOTE interrupt */ + NRF_GPIOTE->INTENCLR = (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + + /* Disable PPI channels */ + NRF_PPI->CHENCLR = ((1 << ppi_channel[0]) | (1 << ppi_channel[1])); + } +#endif +} + +/** + * @brief Enables notifications. + * @pre The ICU unit must have been activated using @p icuStart() and the + * capture started using @p icuStartCapture(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_enable_notifications(ICUDriver *icup) { +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel == NULL) continue; + + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + + /* Enable Timer interrupt */ + icup->timer->INTENSET = 1 << (TIMER_INTENSET_COMPARE0_Pos + channel); + + /* Enable GPIOTE interrupt */ + NRF_GPIOTE->INTENSET = (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + } +#endif +} + +/** + * @brief Disables notifications. + * @pre The ICU unit must have been activated using @p icuStart() and the + * capture started using @p icuStartCapture(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_disable_notifications(ICUDriver *icup) { + /* All interrupts disabled.*/ +#if NRF5_ICU_USE_GPIOTE_PPI + uint8_t channel; + for (channel = 0; channelconfig->iccfgp[channel]; + if (cfg_channel == NULL) continue; + + const uint8_t *gpiote_channel = cfg_channel->gpiote_channel; + + /* Disable Timer interrupt for overflow events */ + icup->timer->INTENCLR = 1 << (TIMER_INTENCLR_COMPARE0_Pos + channel); + + /* Disable GPIOTE interrupt */ + NRF_GPIOTE->INTENCLR = (1 << gpiote_channel[0]) | (1 << gpiote_channel[1]); + } +#endif + +} + +#endif /* HAL_USE_ICU */ diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.h b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.h new file mode 100644 index 0000000..7fcace7 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.h @@ -0,0 +1,424 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +/* +*/ + +#ifndef HAL_ICU_LLD_H +#define HAL_ICU_LLD_H + +#if (HAL_USE_ICU == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ +/** + * @brief Number of ICU channels per ICU driver. + */ +#define ICU_CHANNELS 2 /* max channels */ +#define ICU_WAIT_TIMEOUT ( 0xFFFF ) /* first edge wait timeout */ + +#define ICU_FREQUENCY_16MHZ 16000000 /** @brief 16MHz */ +#define ICU_FREQUENCY_8MHZ 8000000 /** @brief 8MHz */ +#define ICU_FREQUENCY_4MHZ 4000000 /** @brief 4MHz */ +#define ICU_FREQUENCY_2MHZ 2000000 /** @brief 2MHz */ +#define ICU_FREQUENCY_1MHZ 1000000 /** @brief 1MHz */ +#define ICU_FREQUENCY_500KHZ 500000 /** @brief 500kHz */ +#define ICU_FREQUENCY_250KHZ 250000 /** @brief 250kHz */ +#define ICU_FREQUENCY_125KHZ 125000 /** @brief 125kHz */ +#define ICU_FREQUENCY_62500HZ 62500 /** @brief 62500Hz */ +#define ICU_FREQUENCY_31250HZ 31250 /** @brief 31250Hz */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief ICUD1 driver enable switch. + * @details If set to @p TRUE the support for ICUD1 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_ICU_USE_TIMER0) || defined(__DOXYGEN__) +#define NRF5_ICU_USE_TIMER0 FALSE +#endif + +/** + * @brief ICUD2 driver enable switch. + * @details If set to @p TRUE the support for ICUD2 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_ICU_USE_TIMER1) || defined(__DOXYGEN__) +#define NRF5_ICU_USE_TIMER1 FALSE +#endif + +/** + * @brief ICUD3 driver enable switch. + * @details If set to @p TRUE the support for ICUD3 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_ICU_USE_TIMER2) || defined(__DOXYGEN__) +#define NRF5_ICU_USE_TIMER2 FALSE +#endif + +/** + * @brief ICUD4 driver enable switch. + * @details If set to @p TRUE the support for ICUD4 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_ICU_USE_TIMER3) || defined(__DOXYGEN__) +#define NRF5_ICU_USE_TIMER3 FALSE +#endif + +/** + * @brief ICUD5 driver enable switch. + * @details If set to @p TRUE the support for ICUD5 is included. + * @note The default is @p TRUE. + */ +#if !defined(NRF5_ICU_USE_TIMER4) || defined(__DOXYGEN__) +#define NRF5_ICU_USE_TIMER4 FALSE +#endif + +/** + * @brief ICUD1 interrupt priority level setting. + */ +#if !defined(NRF5_ICU_TIMER0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ICU_TIMER0_IRQ_PRIORITY 3 +#endif + +/** + * @brief ICUD2 interrupt priority level setting. + */ +#if !defined(NRF5_ICU_TIMER1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ICU_TIMER1_IRQ_PRIORITY 3 +#endif + +/** + * @brief ICUD3 interrupt priority level setting. + */ +#if !defined(NRF5_ICU_TIMER2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ICU_TIMER2_IRQ_PRIORITY 3 +#endif + +/** + * @brief ICUD4 interrupt priority level setting. + */ +#if !defined(NRF5_ICU_TIMER3_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ICU_TIMER3_IRQ_PRIORITY 3 +#endif + +/** + * @brief ICUD5 interrupt priority level setting. + */ +#if !defined(NRF5_ICU_TIMER4_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_ICU_TIMER4_IRQ_PRIORITY 3 +#endif + +/** + * @brief Allow driver to use GPIOTE/PPI to capture PAL line + */ +#if !defined(NRF5_ICU_USE_GPIOTE_PPI) +#define NRF5_ICU_USE_GPIOTE_PPI TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !NRF5_ICU_USE_TIMER0 && !NRF5_ICU_USE_TIMER1 && \ + !NRF5_ICU_USE_TIMER2 && !NRF5_ICU_USE_TIMER3 && \ + !NRF5_ICU_USE_TIMER4 +#error "ICU driver activated but no TIMER peripheral assigned" +#endif + +#if NRF5_ICU_USE_TIMER0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ICU_TIMER0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER0" +#endif + +#if NRF5_ICU_USE_TIMER1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ICU_TIMER1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER1" +#endif + +#if NRF5_ICU_USE_TIMER2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ICU_TIMER2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER2" +#endif + +#if NRF5_ICU_USE_TIMER3 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ICU_TIMER3_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER3" +#endif + +#if NRF5_ICU_USE_TIMER4 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ICU_TIMER4_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIMER4" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ +/** + * @brief Active level selector. + */ +typedef enum { + ICU_INPUT_DISABLED, /**< Channel disabled . */ + ICU_INPUT_ACTIVE_HIGH, /**< Trigger on rising edge. */ + ICU_INPUT_ACTIVE_LOW, /**< Trigger on falling edge. */ +} icumode_t; + +/** + * @brief ICU channel state. + */ +typedef enum { + ICU_CH_IDLE = 0, /**< Not initialized. */ + ICU_CH_ACTIVE = 1 /**< First front detected. */ +} icuchannelstate_t; + +/** + * @brief ICU frequency type. + */ +typedef uint32_t icufreq_t; + +/** + * @brief ICU channel type. + */ +typedef enum { + ICU_CHANNEL_1 = 0, /**< Use TIMERx channel 0,2 */ + ICU_CHANNEL_2 = 1, /**< Use TIMERx channel 1,3 */ +} icuchannel_t; + +/** + * @brief ICU counter type. + */ +typedef uint32_t icucnt_t; + +/** + * @brief ICU captured width and (or) period. + */ +typedef struct { + /** + * @brief Pulse width. + */ + icucnt_t width; + /** + * @brief Pulse period. + */ + icucnt_t period; +} icuresult_t; + +/** + * @brief ICU Capture Channel Config structure definition. + */ +typedef struct { + /** + * @brief Specifies the channel capture mode. + */ + icumode_t mode; + +#if NRF5_ICU_USE_GPIOTE_PPI || defined(__DOXYGEN__) + /** + * @brief PAL line to capture. + * @note When NRF5_ICU_USE_GPIOTE_PPI is used and channel enabled, + * it wont be possible to access this PAL line using the PAL + * driver. + */ + ioline_t ioline[2]; + + /** + * @brief Unique GPIOTE channel to use. (2 channel) + * @note Only 8 GPIOTE channels are available on nRF52. + */ + uint8_t gpiote_channel[2]; + + /** + * @brief Unique PPI channels to use. (2 channels) + * @note Only 20 PPI channels are available on nRF52 + * (When Softdevice is enabled, only channels 0-7 are available) + */ + uint8_t ppi_channel[2]; +#endif +} ICUChannelConfig; + +/** + * @brief ICU Capture Channel structure definition. + */ +typedef struct { + /** + * @brief Channel state for the internal state machine. + */ + icuchannelstate_t state; + /** + * @brief Cached value for pulse width calculation. + */ + icucnt_t last_active; + /** + * @brief Cached value for period calculation. + */ + icucnt_t last_idle; + /** + * @brief Pointer to Input Capture channel configuration. + */ +// const ICUChannelConfig *config; +} ICUChannel; + +/** + * @brief ICU Config structure definition. + */ +typedef struct { + /** + * @brief Specifies the Timer clock in Hz. + */ + icufreq_t frequency; + /** + * @brief Callback for pulse width measurement. + */ + icucallback_t width_cb; + /** + * @brief Callback for cycle period measurement. + */ + icucallback_t period_cb; + /** + * @brief Callback for timer overflow. + */ + icucallback_t overflow_cb; + /** + * @brief Pointer to each Input Capture channel configuration. + * @note A NULL parameter indicates the channel as unused. + * @note In ICU mode, only Channel 1 OR Channel 2 may be used. + */ + const ICUChannelConfig iccfgp[ICU_CHANNELS]; +} ICUConfig; + +/** + * @brief ICU Driver structure definition + */ +struct ICUDriver { + /** + * @brief NRF52 timer peripheral for Input Capture. + */ + NRF_TIMER_Type *timer; + /** + * @brief Driver state for the internal state machine. + */ + icustate_t state; + /** + * @brief Channels' data structures. + */ + ICUChannel channel[ICU_CHANNELS]; + /** + * @brief Timer base clock. + */ + uint32_t clock; + /** + * @brief Pointer to configuration for the driver. + */ + const ICUConfig *config; + /** + * @brief Period, width last value. + */ + icuresult_t result; +#if defined(ICU_DRIVER_EXT_FIELDS) + ICU_DRIVER_EXT_FIELDS +#endif +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ +/** + * @brief Returns the width of the latest pulse. + * @details The pulse width is defined as number of ticks between the start + * edge and the stop edge. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The number of ticks. + * + * @notapi + */ +#define icu_lld_get_width(icup) ((uint32_t)((icup)->result.width)) + +/** + * @brief Returns the width of the latest cycle. + * @details The cycle width is defined as number of ticks between a start + * edge and the next start edge. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The number of ticks. + * + * @notapi + */ +#define icu_lld_get_period(icup) ((uint32_t)((icup)->result.period)) + +/** + * @brief Check on notifications status. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The notifications status. + * @retval false if notifications are not enabled. + * @retval true if notifications are enabled. + * + * @notapi + */ +#define icu_lld_are_notifications_enabled(icup) ( 1 ) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ +#if NRF5_ICU_USE_TIMER0 && !defined(__DOXYGEN__) +extern ICUDriver ICUD1; +#endif + +#if NRF5_ICU_USE_TIMER1 && !defined(__DOXYGEN__) +extern ICUDriver ICUD2; +#endif + +#if NRF5_ICU_USE_TIMER2 && !defined(__DOXYGEN__) +extern ICUDriver ICUD3; +#endif + +#if NRF5_ICU_USE_TIMER3 && !defined(__DOXYGEN__) +extern ICUDriver ICUD4; +#endif + +#if NRF5_ICU_USE_TIMER4 && !defined(__DOXYGEN__) +extern ICUDriver ICUD5; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void icu_lld_init(void); + void icu_lld_start(ICUDriver *icup); + void icu_lld_stop(ICUDriver *icup); + void icu_lld_start_capture(ICUDriver *icup); + bool icu_lld_wait_capture(ICUDriver *icup); + void icu_lld_stop_capture(ICUDriver *icup); + void icu_lld_enable_notifications(ICUDriver *icup); + void icu_lld_disable_notifications(ICUDriver *icup); + void icu_lld_serve_interrupt(ICUDriver *icup); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_ICU */ + +#endif /* HAL_ICU_LLD_H */ diff --git a/os/hal/ports/NRF5/LLD/TWIMv1/driver.mk b/os/hal/ports/NRF5/LLD/TWIMv1/driver.mk new file mode 100644 index 0000000..43ad8e3 --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIMv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIMv1 diff --git a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c new file mode 100644 index 0000000..957c0be --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c @@ -0,0 +1,420 @@ +/* + Copyright (C) 2018 andru + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF5/NRF52832/hal_i2c_lld.c + * @brief NRF52 I2C subsystem low level driver source. + * + * @addtogroup I2C + * @{ + */ + +#include "osal.h" +#include "hal.h" +#include "nrf_delay.h" + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */ +#define I2C_HIGH(p) do { IOPORT1->OUTSET = (1UL << (p)); } while(0) /*!< Pulls I2C line high */ +#define I2C_LOW(p) do { IOPORT1->OUTCLR = (1UL << (p)); } while(0) /*!< Pulls I2C line low */ +#define I2C_INPUT(p) do { IOPORT1->DIRCLR = (1UL << (p)); } while(0) /*!< Configures I2C pin as input */ +#define I2C_OUTPUT(p) do { IOPORT1->DIRSET = (1UL << (p)); } while(0) /*!< Configures I2C pin as output */ + +#define I2C_PIN_CNF \ + ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ + | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ + | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ + | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) + +#define I2C_PIN_CNF_CLR \ + ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ + | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ + | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ + | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) + +#if NRF5_I2C_USE_I2C0 +#define I2C0_IRQ_NUM SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#define I2C0_IRQ_PRI NRF5_I2C_I2C0_IRQ_PRIORITY +#endif +#if NRF5_I2C_USE_I2C1 +#define I2C1_IRQ_NUM SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#define I2C1_IRQ_PRI NRF5_I2C_I2C1_IRQ_PRIORITY +#endif + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief I2C0 driver identifier. + */ +#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) +I2CDriver I2CD1; +#endif + +/** + * @brief I2C1 driver identifier. + */ +#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) +I2CDriver I2CD2; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ +/** + * @brief Function for detecting stuck slaves (SDA = 0 and SCL = 1) and tries to clear the bus. + * + * @return + * @retval false Bus is stuck. + * @retval true Bus is clear. + */ +static void i2c_clear_bus(I2CDriver *i2cp) { + const I2CConfig *cfg = i2cp->config; + uint8_t i; + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + + I2C_HIGH(cfg->sda_pad); + I2C_HIGH(cfg->scl_pad); + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + + nrf_delay_us(4); + + for(i = 0; i < 9; i++) { + if (palReadPad(IOPORT1, cfg->sda_pad)) { + if(i > 0) + break; + else + return; + } + + I2C_LOW(cfg->scl_pad); + nrf_delay_us(4); + I2C_HIGH(cfg->scl_pad); + nrf_delay_us(4); + } + + I2C_LOW(cfg->sda_pad); + nrf_delay_us(4); + I2C_HIGH(cfg->sda_pad); +} + +#if defined(__GNUC__) +__attribute__((noinline)) +#endif +/** + * @brief Common IRQ handler. + * @note Tries hard to clear all the pending interrupt sources, we don't + * want to go through the whole ISR and have another interrupt soon + * after. + * + * @param[in] i2cp pointer to an I2CDriver + */ +static void i2c_serve_interrupt(I2CDriver *i2cp) { + NRF_TWIM_Type *i2c = i2cp->i2c; + + if (i2c->EVENTS_ERROR) { + uint32_t err = i2c->ERRORSRC; + i2c->EVENTS_ERROR = 0; + (void)i2c->EVENTS_ERROR; + + if (err & 0x01) // nRF52832 Product Specification v1.3 p.314 TWIM_ERRORSRC OVERRUN bit = 0x01 + i2cp->errors |= I2C_OVERRUN; + if (err & (TWIM_ERRORSRC_ANACK_Msk | TWIM_ERRORSRC_DNACK_Msk)) + i2cp->errors |= I2C_ACK_FAILURE; + + i2c->TASKS_STOP = 1; + + _i2c_wakeup_error_isr(i2cp); + } else if(i2c->EVENTS_STOPPED) { + + i2c->EVENTS_STOPPED = 0; + (void)i2c->EVENTS_STOPPED; + + _i2c_wakeup_isr(i2cp); + } +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if NRF5_I2C_USE_I2C0 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(Vector4C) { + + OSAL_IRQ_PROLOGUE(); + i2c_serve_interrupt(&I2CD1); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +#if NRF5_I2C_USE_I2C1 || defined(__DOXYGEN__) + +OSAL_IRQ_HANDLER(Vector50) { + + OSAL_IRQ_PROLOGUE(); + i2c_serve_interrupt(&I2CD2); + OSAL_IRQ_EPILOGUE(); +} + +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level I2C driver initialization. + * + * @notapi + */ +void i2c_lld_init(void) { + +#if NRF5_I2C_USE_I2C0 + i2cObjectInit(&I2CD1); + I2CD1.thread = NULL; + I2CD1.i2c = NRF_TWIM0; +#endif + +#if NRF5_I2C_USE_I2C1 + i2cObjectInit(&I2CD2); + I2CD2.thread = NULL; + I2CD2.i2c = NRF_TWIM1; +#endif + +} + +/** + * @brief Configures and activates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_start(I2CDriver *i2cp) { + NRF_TWIM_Type *i2c = i2cp->i2c; + + const I2CConfig *cfg = i2cp->config; + + if (i2cp->state != I2C_STOP) + return; + + osalDbgAssert(i2c->ENABLE == 0, "already in use"); + + i2c_clear_bus(i2cp); + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + + i2c->SHORTS = 0; + + i2c->EVENTS_STOPPED = 0; + i2c->EVENTS_ERROR = 0; + (void)i2c->EVENTS_STOPPED; + (void)i2c->EVENTS_ERROR; + + i2c->PSEL.SCL = cfg->scl_pad; + i2c->PSEL.SDA = cfg->sda_pad; + + switch (cfg->clock) { + case 100000: + i2c->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K100 << TWIM_FREQUENCY_FREQUENCY_Pos; + break; + case 250000: + i2c->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K250 << TWIM_FREQUENCY_FREQUENCY_Pos; + break; + case 400000: + i2c->FREQUENCY = TWIM_FREQUENCY_FREQUENCY_K400 << TWIM_FREQUENCY_FREQUENCY_Pos; + break; + default: + osalDbgAssert(0, "invalid I2C frequency"); + break; + }; + +#if NRF5_I2C_USE_I2C0 + nvicEnableVector(I2C0_IRQ_NUM, I2C0_IRQ_PRI); +#endif + +#if NRF5_I2C_USE_I2C1 + nvicEnableVector(I2C1_IRQ_NUM, I2C1_IRQ_PRI); +#endif + + i2c->INTENSET = TWIM_INTENSET_STOPPED_Msk | TWIM_INTENSET_ERROR_Msk; + + i2c->ENABLE = TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos; +} + +/** + * @brief Deactivates the I2C peripheral. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +void i2c_lld_stop(I2CDriver *i2cp) { + NRF_TWIM_Type *i2c = i2cp->i2c; + const I2CConfig *cfg = i2cp->config; + + if (i2cp->state != I2C_STOP) { + i2c->SHORTS = 0; + + i2c->INTENCLR = TWIM_INTENCLR_STOPPED_Msk | TWIM_INTENCLR_ERROR_Msk; + +#if NRF5_I2C_USE_I2C0 + nvicDisableVector(I2C0_IRQ_NUM); +#endif + +#if NRF5_I2C_USE_I2C1 + nvicDisableVector(I2C1_IRQ_NUM); +#endif + + i2c->ENABLE = TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos; + + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + } +} + +static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + NRF_TWIM_Type *i2c = i2cp->i2c; + msg_t msg; + + i2cp->errors = I2C_NO_ERROR; + i2cp->addr = addr; + + uint8_t tx_bytes = txbytes; + uint8_t rx_bytes = rxbytes; + + i2cp->i2c->SHORTS = 0; + i2c->ADDRESS = addr; + + if (tx_bytes && rx_bytes) { + i2c->TXD.PTR = (uint32_t)txbuf; + i2c->TXD.MAXCNT = tx_bytes; + i2c->TXD.LIST = TWIM_TXD_LIST_LIST_ArrayList << TWIM_TXD_LIST_LIST_Pos; + i2c->RXD.PTR = (uint32_t)rxbuf; + i2c->RXD.MAXCNT = rx_bytes; + i2c->RXD.LIST = TWIM_RXD_LIST_LIST_ArrayList << TWIM_RXD_LIST_LIST_Pos; + i2cp->i2c->SHORTS = TWIM_SHORTS_LASTTX_STARTRX_Enabled << TWIM_SHORTS_LASTTX_STARTRX_Pos | + TWIM_SHORTS_LASTRX_STOP_Enabled << TWIM_SHORTS_LASTRX_STOP_Pos; + i2c->TASKS_STARTTX = 1; + } else if (tx_bytes && !rx_bytes) { + i2c->TXD.PTR = (uint32_t)txbuf; + i2c->TXD.MAXCNT = tx_bytes; + i2c->TXD.LIST = TWIM_TXD_LIST_LIST_ArrayList << TWIM_TXD_LIST_LIST_Pos; + i2cp->i2c->SHORTS = TWIM_SHORTS_LASTTX_STOP_Enabled << TWIM_SHORTS_LASTTX_STOP_Pos; + i2c->TASKS_STARTTX = 1; + } else if (!tx_bytes && rx_bytes) { + i2c->RXD.PTR = (uint32_t)rxbuf; + i2c->RXD.MAXCNT = rx_bytes; + i2c->RXD.LIST = TWIM_RXD_LIST_LIST_ArrayList << TWIM_RXD_LIST_LIST_Pos; + i2cp->i2c->SHORTS = TWIM_SHORTS_LASTRX_STOP_Enabled << TWIM_SHORTS_LASTRX_STOP_Pos; + i2c->TASKS_STARTRX = 1; + } else { + osalDbgAssert(0, "no bytes to transfer"); + } + + msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout); + + if (msg == MSG_TIMEOUT) + i2c->TASKS_STOP = 1; + + return msg; +} + +/** + * @brief Receives data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + return _i2c_txrx_timeout(i2cp, addr, NULL, 0, rxbuf, rxbytes, timeout); +} + +/** + * @brief Transmits data via the I2C bus as master. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * @param[in] addr slave device address + * @param[in] txbuf pointer to the transmit buffer + * @param[in] txbytes number of bytes to be transmitted + * @param[out] rxbuf pointer to the receive buffer + * @param[in] rxbytes number of bytes to be received + * @param[in] timeout the number of ticks before the operation timeouts, + * the following special values are allowed: + * - @a TIME_INFINITE no timeout. + * . + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more I2C errors occurred, the errors can + * be retrieved using @p i2cGetErrors(). + * @retval MSG_TIMEOUT if a timeout occurred before operation end. After a + * timeout the driver must be stopped and restarted + * because the bus is in an uncertain state. + * + * @notapi + */ +msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout) { + + return _i2c_txrx_timeout(i2cp, addr, txbuf, txbytes, rxbuf, rxbytes, timeout); +} + +#endif /* HAL_USE_I2C */ + +/** @} */ diff --git a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h new file mode 100644 index 0000000..fb88a5e --- /dev/null +++ b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h @@ -0,0 +1,210 @@ +/* + Copyright (C) 2018 andru + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF5/NRF52832/hal_i2c_lld.h + * @brief NRF52 I2C subsystem low level driver header. + * + * @addtogroup I2C + * @{ + */ + +#ifndef HAL_I2C_LLD_H +#define HAL_I2C_LLD_H + +#if HAL_USE_I2C || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief I2C0 driver enable switch. + * @details If set to @p TRUE the support for I2C0 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_I2C_USE_I2C0) || defined(__DOXYGEN__) +#define NRF5_I2C_USE_I2C0 FALSE +#endif + +/** + * @brief I2C1 driver enable switch. + * @details If set to @p TRUE the support for I2C1 is included. + * @note The default is @p FALSE. + */ +#if !defined(NRF5_I2C_USE_I2C1) || defined(__DOXYGEN__) +#define NRF5_I2C_USE_I2C1 FALSE +#endif + +/** + * @brief I2C0 interrupt priority level setting. + */ +#if !defined(NRF5_I2C_I2C0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_I2C_I2C0_IRQ_PRIORITY 3 +#endif + +/** + * @brief I2C1 interrupt priority level setting. + */ +#if !defined(NRF5_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_I2C_I2C1_IRQ_PRIORITY 3 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if NRF5_I2C_USE_I2C0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to I2C0" +#endif + +#if NRF5_I2C_USE_I2C1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(NRF5_I2C_I2C1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to I2C1" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/* @brief Type representing I2C address. */ +typedef uint8_t i2caddr_t; + +/* @brief Type of I2C Driver condition flags. */ +typedef uint32_t i2cflags_t; + +/** + * @brief Driver configuration structure. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ + +/** + * @brief Driver configuration structure. + */ +typedef struct { + + /* @brief Clock to be used for the I2C bus. */ + uint32_t clock; + /* @brief Pad number for SCL */ + uint8_t scl_pad; + /* @brief Pad number for SDA */ + uint8_t sda_pad; + +} I2CConfig; + +/** + * @brief Type of a structure representing an I2C driver. + */ +typedef struct I2CDriver I2CDriver; + +/** + * @brief Structure representing an I2C driver. + */ +struct I2CDriver { + /** + * @brief Driver state. + */ + i2cstate_t state; + /** + * @brief Current configuration data. + */ + const I2CConfig *config; + /** + * @brief Error flags. + */ + i2cflags_t errors; +#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the bus. + */ + mutex_t mutex; +#endif /* I2C_USE_MUTUAL_EXCLUSION */ +#if defined(I2C_DRIVER_EXT_FIELDS) + I2C_DRIVER_EXT_FIELDS +#endif + /* @brief Thread waiting for I/O completion. */ + thread_reference_t thread; + /* @brief Current slave address without R/W bit. */ + i2caddr_t addr; + + /* End of the mandatory fields.*/ + + /* @brief Low-level register access. */ + NRF_TWIM_Type *i2c; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Get errors from I2C driver. + * + * @param[in] i2cp pointer to the @p I2CDriver object + * + * @notapi + */ +#define i2c_lld_get_errors(i2cp) ((i2cp)->errors) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + +#if NRF5_I2C_USE_I2C0 +extern I2CDriver I2CD1; +#endif + +#if NRF5_I2C_USE_I2C1 +extern I2CDriver I2CD2; +#endif + +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void i2c_lld_init(void); + void i2c_lld_start(I2CDriver *i2cp); + void i2c_lld_stop(I2CDriver *i2cp); + msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr, + const uint8_t *txbuf, size_t txbytes, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); + msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr, + uint8_t *rxbuf, size_t rxbytes, + systime_t timeout); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_I2C */ + +#endif /* HAL_I2C_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/NRF52832/hal_lld.c b/os/hal/ports/NRF5/NRF52832/hal_lld.c index 500de13..e63e57e 100644 --- a/os/hal/ports/NRF5/NRF52832/hal_lld.c +++ b/os/hal/ports/NRF5/NRF52832/hal_lld.c @@ -55,23 +55,37 @@ */ void hal_lld_init(void) { - /* High frequency clock initialisation + /* High frequency clock initialization */ NRF_CLOCK->TASKS_HFCLKSTOP = 1; + #if !defined(NRF5_XTAL_VALUE) && (NRF5_XTAL_VALUE != 32000000) #error "A 32Mhz crystal is mandatory on nRF52 boards." #endif +#if (NRF5_HFCLK_SOURCE == NRF5_HFCLK_HFXO) + NRF_CLOCK->EVENTS_HFCLKSTARTED = 0; + NRF_CLOCK->TASKS_HFCLKSTART = 1; + while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0); +#endif - /* Low frequency clock initialisation - * Clock is only started if st driver requires it + /* Low frequency clock initialization */ +#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) +#if (NRF5_ST_USE_RTC0 || NRF5_ST_USE_RTC1) && \ + (NRF5_LFCLK_SOURCE == NRF5_LFCLK_RC) +#error "A NRF5_SYSTEM_TICKS_AS_RTC requires LFCLK clock to be started." +#endif +#endif + NRF_CLOCK->TASKS_LFCLKSTOP = 1; + +#if (NRF5_LFCLK_SOURCE != NRF5_LFCLK_RC) NRF_CLOCK->LFCLKSRC = NRF5_LFCLK_SOURCE; - -#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) && \ - (NRF5_SYSTEM_TICKS == NRF5_SYSTEM_TICKS_AS_RTC) + + NRF_CLOCK->EVENTS_LFCLKSTARTED = 0; NRF_CLOCK->TASKS_LFCLKSTART = 1; + while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0); #endif } diff --git a/os/hal/ports/NRF5/NRF52832/hal_lld.h b/os/hal/ports/NRF5/NRF52832/hal_lld.h index 24784d3..a2a8cc3 100644 --- a/os/hal/ports/NRF5/NRF52832/hal_lld.h +++ b/os/hal/ports/NRF5/NRF52832/hal_lld.h @@ -59,23 +59,37 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ +/** + * @brief Select source of High Frequency Clock (HFCLK) + * @details Possible values for source are: + * 0 : 64 MHz internal oscillator (HFINT) + * 1 : 32 MHz external crystal oscillator (HFXO) + */ +#if !defined(NRF5_HFCLK_SOURCE) || defined(__DOXYGEN__) +#define NRF5_HFCLK_SOURCE NRF5_HFCLK_HFINT +#endif + /** * @brief Select source of Low Frequency Clock (LFCLK) * @details Possible values for source are: * 0 : RC oscillator - * 1 : External cristal - * 2 : Synthetized clock from High Frequency Clock (HFCLK) - * When cristal is not available it's preferable to use the - * internal RC oscillator that synthezing the clock. + * 1 : External crystal + * 2 : Synthesized clock from High Frequency Clock (HFCLK) + * When crystal is not available it's preferable to use the + * internal RC oscillator that synthesizing the clock. */ #if !defined(NRF5_LFCLK_SOURCE) || defined(__DOXYGEN__) -#define NRF5_LFCLK_SOURCE 0 +#define NRF5_LFCLK_SOURCE NRF5_LFCLK_RC #endif /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ +#if (NRF5_HFCLK_SOURCE < 0) || (NRF5_HFCLK_SOURCE > 1) +#error "Possible value for NRF5_HFCLK_SOURCE are HFINT=0, HFXO=1" +#endif + #if (NRF5_LFCLK_SOURCE < 0) || (NRF5_LFCLK_SOURCE > 2) #error "Possible value for NRF5_LFCLK_SOURCE are 0=RC, 1=XTAL, 2=Synth" #endif @@ -91,6 +105,14 @@ /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ +#if 0 // moved to board.h +#define NRF5_HFCLK_HFINT 0 +#define NRF5_HFCLK_HFXO 1 + +#define NRF5_LFCLK_RC 0 +#define NRF5_LFCLK_XTAL 1 +#define NRF5_LFCLK_SYNTH 2 +#endif #include "nvic.h" diff --git a/os/hal/ports/NRF5/NRF52832/nrf_delay.h b/os/hal/ports/NRF5/NRF52832/nrf_delay.h index 9b5df64..b73d8ae 100644 --- a/os/hal/ports/NRF5/NRF52832/nrf_delay.h +++ b/os/hal/ports/NRF5/NRF52832/nrf_delay.h @@ -1,97 +1,238 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF5/NRF52832/nrf_delay.h - * @brief NRF5 Delay routines - * - * @{ - */ - -#ifndef _NRF_DELAY_H -#define _NRF_DELAY_H - -inline static void nrf_delay_us(uint32_t volatile number_of_us) __attribute__((always_inline)); -inline static void nrf_delay_us(uint32_t volatile number_of_us) -{ -register uint32_t delay __asm ("r0") = number_of_us; -__asm volatile ( -".syntax unified\n" - "1:\n" - " SUBS %0, %0, #1\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " NOP\n" - " BNE 1b\n" - ".syntax divided\n" - : "+r" (delay)); -} -#endif //__NRF_DELAY_H +#ifndef _NRF_DELAY_H +#define _NRF_DELAY_H + +/** + * @brief Function for delaying execution for number of microseconds. + * + * @note NRF52 has instruction cache and because of that delay is not precise. + * + * @param number_of_ms + */ +/*lint --e{438, 522} "Variable not used" "Function lacks side-effects" */ +#if defined ( __CC_ARM ) + +static __ASM void __INLINE nrf_delay_us(uint32_t volatile number_of_us) +{ +loop + SUBS R0, R0, #1 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP +#ifdef NRF52 + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP + NOP +#endif + BNE loop + BX LR +} + +#elif defined ( __ICCARM__ ) + +static void __INLINE nrf_delay_us(uint32_t volatile number_of_us) +{ +__ASM ( +"loop:\n\t" + " SUBS R0, R0, #1\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" +#ifdef NRF52 + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" + " NOP\n\t" +#endif + " BNE.n loop\n\t"); +} + +#elif defined ( _WIN32 ) || defined ( __unix ) || defined( __APPLE__ ) + +__STATIC_INLINE void nrf_delay_us(uint32_t volatile number_of_us); + +#ifndef CUSTOM_NRF_DELAY_US +__STATIC_INLINE void nrf_delay_us(uint32_t volatile number_of_us) +{} +#endif + +#elif defined ( __GNUC__ ) + +inline static void nrf_delay_us(uint32_t volatile number_of_us) __attribute__((always_inline)); +inline static void nrf_delay_us(uint32_t volatile number_of_us) +{ +register uint32_t delay __ASM ("r0") = number_of_us; +__ASM volatile ( +#ifdef NRF51 + ".syntax unified\n" +#endif + "1:\n" + " SUBS %0, %0, #1\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" +#ifdef NRF52 + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" + " NOP\n" +#endif + " BNE 1b\n" +#ifdef NRF51 + ".syntax divided\n" +#endif + : "+r" (delay)); +} +#endif + +#endif diff --git a/os/hal/ports/NRF5/NRF52832/platform.mk b/os/hal/ports/NRF5/NRF52832/platform.mk index e71f591..f1fcfe7 100644 --- a/os/hal/ports/NRF5/NRF52832/platform.mk +++ b/os/hal/ports/NRF5/NRF52832/platform.mk @@ -20,7 +20,8 @@ endif include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/driver.mk -include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/PWMv2/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/WDTv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/RNGv1/driver.mk diff --git a/os/various/devices_lib/rf/nrf52_radio.c b/os/various/devices_lib/rf/nrf52_radio.c new file mode 100644 index 0000000..e55870f --- /dev/null +++ b/os/various/devices_lib/rf/nrf52_radio.c @@ -0,0 +1,1111 @@ +/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved. + * + * The information contained herein is property of Nordic Semiconductor ASA. + * Terms and conditions of usage are described in detail in NORDIC + * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. + * + * Licensees are granted free, non-transferable use of the information. NO + * WARRANTY of ANY KIND is provided. This heading must NOT be removed from + * the file. + * + * Enhanced ShockBurst proprietary protocol to ChibiOS port + * + * ported on: 25/10/2018, by andru + * + */ + +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "nrf52_radio.h" + + +#define BIT_MASK_UINT_8(x) (0xFF >> (8 - (x))) +#define NRF52_PIPE_COUNT 9 + +#define RADIO_SHORTS_COMMON ( RADIO_SHORTS_READY_START_Msk | RADIO_SHORTS_END_DISABLE_Msk | \ + RADIO_SHORTS_ADDRESS_RSSISTART_Msk | RADIO_SHORTS_DISABLED_RSSISTOP_Msk ) + +// Constant parameters +#define RX_WAIT_FOR_ACK_TIMEOUT_US_2MBPS (48) /**< 2MBit RX wait for ack timeout value. Smallest reliable value - 43 */ +#define RX_WAIT_FOR_ACK_TIMEOUT_US_1MBPS (64) /**< 1MBit RX wait for ack timeout value. Smallest reliable value - 59 */ + +#define NRF52_ADDR_UPDATE_MASK_BASE0 (1 << 0) /*< Mask value to signal updating BASE0 radio address. */ +#define NRF52_ADDR_UPDATE_MASK_BASE1 (1 << 1) /*< Mask value to signal updating BASE1 radio address. */ +#define NRF52_ADDR_UPDATE_MASK_PREFIX (1 << 2) /*< Mask value to signal updating radio prefixes */ + +#define NRF52_PID_RESET_VALUE 0xFF /**< Invalid PID value which is guaranteed to not collide with any valid PID value. */ +#define NRF52_PID_MAX 3 /**< Maximum value for PID. */ +#define NRF52_CRC_RESET_VALUE 0xFFFF /**< CRC reset value*/ + +#ifndef NRF52_RADIO_USE_TIMER0 +#define NRF52_RADIO_USE_TIMER0 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER1 +#define NRF52_RADIO_USE_TIMER1 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER2 +#define NRF52_RADIO_USE_TIMER2 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER3 +#define NRF52_RADIO_USE_TIMER3 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER4 +#define NRF52_RADIO_USE_TIMER4 FALSE +#endif + +#ifndef NRF52_RADIO_IRQ_PRIORITY +#define NRF52_RADIO_IRQ_PRIORITY 3 /**< RADIO interrupt priority. */ +#endif + +#ifndef NRF52_RADIO_PPI_TIMER_START +#error "PPI channel NRF52_RADIO_PPI_TIMER_START need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_TIMER_STOP +#error "PPI channel NRF52_RADIO_PPI_TIMER_STOP need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_RX_TIMEOUT +#error "PPI channel NRF52_RADIO_PPI_RX_TIMEOUT need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_TX_START +#error "PPI channel NRF52_RADIO_PPI_TX_START need to be defined" +#endif + +#if (NRF52_RADIO_USE_TIMER0 == FALSE) && (NRF52_RADIO_USE_TIMER1 == FALSE) && \ + (NRF52_RADIO_USE_TIMER2 == FALSE) && (NRF52_RADIO_USE_TIMER3 == FALSE) && \ + (NRF52_RADIO_USE_TIMER4 == FALSE) +#error "At least one hardware TIMER must be defined" +#endif + +#ifndef NRF52_RADIO_INTTHD_PRIORITY +#error "Interrupt handle thread priority need to be defined" +#endif + +#ifndef NRF52_RADIO_EVTTHD_PRIORITY +#error "Event thread priority need to be defined" +#endif + +#define VERIFY_PAYLOAD_LENGTH(p) \ +do \ +{ \ + if(p->length == 0 || \ + p->length > NRF52_MAX_PAYLOAD_LENGTH || \ + (RFD1.config.protocol == NRF52_PROTOCOL_ESB && \ + p->length > RFD1.config.payload_length)) \ + { \ + return NRF52_ERROR_INVALID_LENGTH; \ + } \ +}while(0) + +//Structure holding pipe info PID and CRC and ack payload. +typedef struct +{ + uint16_t m_crc; + uint8_t m_pid; + uint8_t m_ack_payload; +} pipe_info_t; + +// First in first out queue of payloads to be transmitted. +typedef struct +{ + nrf52_payload_t * p_payload[NRF52_TX_FIFO_SIZE]; /**< Pointer to the actual queue. */ + uint32_t entry_point; /**< Current start of queue. */ + uint32_t exit_point; /**< Current end of queue. */ + uint32_t count; /**< Current number of elements in the queue. */ +} nrf52_payload_tx_fifo_t; + +// First in first out queue of received payloads. +typedef struct +{ + nrf52_payload_t * p_payload[NRF52_RX_FIFO_SIZE]; /**< Pointer to the actual queue. */ + uint32_t entry_point; /**< Current start of queue. */ + uint32_t exit_point; /**< Current end of queue. */ + uint32_t count; /**< Current number of elements in the queue. */ +} nrf52_payload_rx_fifo_t; + +// These function pointers are changed dynamically, depending on protocol configuration and state. +//static void (*on_radio_end)(RFDriver *rfp) = NULL; +static void (*set_rf_payload_format)(RFDriver *rfp, uint32_t payload_length) = NULL; + +// The following functions are assigned to the function pointers above. +static void on_radio_disabled_tx_noack(RFDriver *rfp); +static void on_radio_disabled_tx(RFDriver *rfp); +static void on_radio_disabled_tx_wait_for_ack(RFDriver *rfp); +static void on_radio_disabled_rx(RFDriver *rfp); +static void on_radio_disabled_rx_ack(RFDriver *rfp); + +static volatile uint16_t wait_for_ack_timeout_us; +static nrf52_payload_t * p_current_payload; + +// TX FIFO +static nrf52_payload_t tx_fifo_payload[NRF52_TX_FIFO_SIZE]; +static nrf52_payload_tx_fifo_t tx_fifo; + +// RX FIFO +static nrf52_payload_t rx_fifo_payload[NRF52_RX_FIFO_SIZE]; +static nrf52_payload_rx_fifo_t rx_fifo; + +// Payload buffers +static uint8_t tx_payload_buffer[NRF52_MAX_PAYLOAD_LENGTH + 2]; +static uint8_t rx_payload_buffer[NRF52_MAX_PAYLOAD_LENGTH + 2]; + +static uint8_t pids[NRF52_PIPE_COUNT]; +static pipe_info_t rx_pipe_info[NRF52_PIPE_COUNT]; + + // disable and events semaphores. +static binary_semaphore_t disable_sem; +static binary_semaphore_t events_sem; + +RFDriver RFD1; + +// Function to do bytewise bit-swap on a unsigned 32 bit value +static uint32_t bytewise_bit_swap(uint8_t const * p_inp) { + uint32_t inp = (*(uint32_t*)p_inp); + + return __REV((uint32_t)__RBIT(inp)); //lint -esym(628, __rev) -esym(526, __rev) -esym(628, __rbit) -esym(526, __rbit) */ +} + +// Internal function to convert base addresses from nRF24L type addressing to nRF52 type addressing +static uint32_t addr_conv(uint8_t const* p_addr) { + return __REV(bytewise_bit_swap(p_addr)); //lint -esym(628, __rev) -esym(526, __rev) */ +} + +static thread_t *rfEvtThread_p; +static THD_WORKING_AREA(waRFEvtThread, 64); +static THD_FUNCTION(rfEvtThread, arg) { + (void)arg; + + chRegSetThreadName("rfevent"); + + while (!chThdShouldTerminateX()) { + chBSemWait(&events_sem); + + nrf52_int_flags_t interrupts = RFD1.flags; + RFD1.flags = 0; + + if (interrupts & NRF52_INT_TX_SUCCESS_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_TX_SUCCESS); + } + if (interrupts & NRF52_INT_TX_FAILED_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_TX_FAILED); + } + if (interrupts & NRF52_INT_RX_DR_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_RX_RECEIVED); + } + } + chThdExit((msg_t) 0); +} + +static thread_t *rfIntThread_p; +static THD_WORKING_AREA(waRFIntThread, 64); +static THD_FUNCTION(rfIntThread, arg) { + (void)arg; + + chRegSetThreadName("rfint"); + + while (!chThdShouldTerminateX()) { + chBSemWait(&disable_sem); + switch (RFD1.state) { + case NRF52_STATE_PTX_TX: + on_radio_disabled_tx_noack(&RFD1); + break; + case NRF52_STATE_PTX_TX_ACK: + on_radio_disabled_tx(&RFD1); + break; + case NRF52_STATE_PTX_RX_ACK: + on_radio_disabled_tx_wait_for_ack(&RFD1); + break; + case NRF52_STATE_PRX: + on_radio_disabled_rx(&RFD1); + break; + case NRF52_STATE_PRX_SEND_ACK: + on_radio_disabled_rx_ack(&RFD1); + break; + default: + break; + } + } + chThdExit((msg_t) 0); +} + +static void serve_radio_interrupt(RFDriver *rfp) { + (void) rfp; + if ((NRF_RADIO->INTENSET & RADIO_INTENSET_READY_Msk) && NRF_RADIO->EVENTS_READY) { + NRF_RADIO->EVENTS_READY = 0; + (void) NRF_RADIO->EVENTS_READY; + } + if ((NRF_RADIO->INTENSET & RADIO_INTENSET_DISABLED_Msk) && NRF_RADIO->EVENTS_DISABLED) { + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + chSysLockFromISR(); + chBSemSignalI(&disable_sem); + chSysUnlockFromISR(); + } +} + +/** + * @brief RADIO events interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector44) { + + OSAL_IRQ_PROLOGUE(); + + serve_radio_interrupt(&RFD1); + + OSAL_IRQ_EPILOGUE(); +} + +static void set_rf_payload_format_esb_dpl(RFDriver *rfp, uint32_t payload_length) { + (void)payload_length; +#if (NRF52_MAX_PAYLOAD_LENGTH <= 32) + // Using 6 bits for length + NRF_RADIO->PCNF0 = (0 << RADIO_PCNF0_S0LEN_Pos) | + (6 << RADIO_PCNF0_LFLEN_Pos) | + (3 << RADIO_PCNF0_S1LEN_Pos) ; +#else + // Using 8 bits for length + NRF_RADIO->PCNF0 = (0 << RADIO_PCNF0_S0LEN_Pos) | + (8 << RADIO_PCNF0_LFLEN_Pos) | + (3 << RADIO_PCNF0_S1LEN_Pos) ; +#endif + NRF_RADIO->PCNF1 = (RADIO_PCNF1_WHITEEN_Disabled << RADIO_PCNF1_WHITEEN_Pos) | + (RADIO_PCNF1_ENDIAN_Big << RADIO_PCNF1_ENDIAN_Pos) | + ((rfp->config.address.addr_length - 1) << RADIO_PCNF1_BALEN_Pos) | + (0 << RADIO_PCNF1_STATLEN_Pos) | + (NRF52_MAX_PAYLOAD_LENGTH << RADIO_PCNF1_MAXLEN_Pos); +} + +static void set_rf_payload_format_esb(RFDriver *rfp, uint32_t payload_length) { + NRF_RADIO->PCNF0 = (1 << RADIO_PCNF0_S0LEN_Pos) | + (0 << RADIO_PCNF0_LFLEN_Pos) | + (1 << RADIO_PCNF0_S1LEN_Pos); + + NRF_RADIO->PCNF1 = (RADIO_PCNF1_WHITEEN_Disabled << RADIO_PCNF1_WHITEEN_Pos) | + (RADIO_PCNF1_ENDIAN_Big << RADIO_PCNF1_ENDIAN_Pos) | + ((rfp->config.address.addr_length - 1) << RADIO_PCNF1_BALEN_Pos) | + (payload_length << RADIO_PCNF1_STATLEN_Pos) | + (payload_length << RADIO_PCNF1_MAXLEN_Pos); +} + +/* Set BASE0 and BASE1 addresses & prefixes registers + * NRF52 { prefixes[0], base0_addr[0], base0_addr[1], base0_addr[2], base0_addr[3] } == + * NRF24 { addr[0], addr[1], addr[2], addr[3], addr[4] } + */ +static void set_addresses(RFDriver *rfp, uint8_t update_mask) { + if (update_mask & NRF52_ADDR_UPDATE_MASK_BASE0) { + NRF_RADIO->BASE0 = addr_conv(rfp->config.address.base_addr_p0); + NRF_RADIO->DAB[0] = addr_conv(rfp->config.address.base_addr_p0); + } + + if (update_mask & NRF52_ADDR_UPDATE_MASK_BASE1) { + NRF_RADIO->BASE1 = addr_conv(rfp->config.address.base_addr_p1); + NRF_RADIO->DAB[1] = addr_conv(rfp->config.address.base_addr_p1); + } + + if (update_mask & NRF52_ADDR_UPDATE_MASK_PREFIX) { + NRF_RADIO->PREFIX0 = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[0]); + NRF_RADIO->DAP[0] = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[0]); + NRF_RADIO->PREFIX1 = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[4]); + NRF_RADIO->DAP[1] = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[4]); + } +} + +static void set_tx_power(RFDriver *rfp) { + NRF_RADIO->TXPOWER = rfp->config.tx_power << RADIO_TXPOWER_TXPOWER_Pos; +} + +static void set_bitrate(RFDriver *rfp) { + NRF_RADIO->MODE = rfp->config.bitrate << RADIO_MODE_MODE_Pos; + + switch (rfp->config.bitrate) { + case NRF52_BITRATE_2MBPS: + wait_for_ack_timeout_us = RX_WAIT_FOR_ACK_TIMEOUT_US_2MBPS; + break; + case NRF52_BITRATE_1MBPS: + wait_for_ack_timeout_us = RX_WAIT_FOR_ACK_TIMEOUT_US_1MBPS; + break; + } +} + +static void set_protocol(RFDriver *rfp) { + switch (rfp->config.protocol) { + case NRF52_PROTOCOL_ESB_DPL: + set_rf_payload_format = set_rf_payload_format_esb_dpl; + break; + case NRF52_PROTOCOL_ESB: + set_rf_payload_format = set_rf_payload_format_esb; + break; + } +} + +static void set_crc(RFDriver *rfp) { + NRF_RADIO->CRCCNF = rfp->config.crc << RADIO_CRCCNF_LEN_Pos; + + if (rfp->config.crc == RADIO_CRCCNF_LEN_Two) + { + NRF_RADIO->CRCINIT = 0xFFFFUL; // Initial value + NRF_RADIO->CRCPOLY = 0x11021UL; // CRC poly: x^16+x^12^x^5+1 + } + else if (rfp->config.crc == RADIO_CRCCNF_LEN_One) + { + NRF_RADIO->CRCINIT = 0xFFUL; // Initial value + NRF_RADIO->CRCPOLY = 0x107UL; // CRC poly: x^8+x^2^x^1+1 + } +} + +static void ppi_init(RFDriver *rfp) { + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_START].EEP = (uint32_t)&NRF_RADIO->EVENTS_READY; + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_START].TEP = (uint32_t)&rfp->timer->TASKS_START; + + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_STOP].EEP = (uint32_t)&NRF_RADIO->EVENTS_ADDRESS; + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_STOP].TEP = (uint32_t)&rfp->timer->TASKS_STOP; + + NRF_PPI->CH[NRF52_RADIO_PPI_RX_TIMEOUT].EEP = (uint32_t)&rfp->timer->EVENTS_COMPARE[0]; + NRF_PPI->CH[NRF52_RADIO_PPI_RX_TIMEOUT].TEP = (uint32_t)&NRF_RADIO->TASKS_DISABLE; + + NRF_PPI->CH[NRF52_RADIO_PPI_TX_START].EEP = (uint32_t)&rfp->timer->EVENTS_COMPARE[1]; + NRF_PPI->CH[NRF52_RADIO_PPI_TX_START].TEP = (uint32_t)&NRF_RADIO->TASKS_TXEN; +} + +static void set_parameters(RFDriver *rfp) { + set_tx_power(rfp); + set_bitrate(rfp); + set_protocol(rfp); + set_crc(rfp); + set_rf_payload_format(rfp, rfp->config.payload_length); +} + +static void reset_fifo(void) { + tx_fifo.entry_point = 0; + tx_fifo.exit_point = 0; + tx_fifo.count = 0; + + rx_fifo.entry_point = 0; + rx_fifo.exit_point = 0; + rx_fifo.count = 0; +} + +static void init_fifo(void) { + uint8_t i; + reset_fifo(); + + for (i = 0; i < NRF52_TX_FIFO_SIZE; i++) { + tx_fifo.p_payload[i] = &tx_fifo_payload[i]; + } + + for (i = 0; i < NRF52_RX_FIFO_SIZE; i++) { + rx_fifo.p_payload[i] = &rx_fifo_payload[i]; + } +} + +static void tx_fifo_remove_last(void) { + if (tx_fifo.count > 0) { + nvicDisableVector(RADIO_IRQn); + + tx_fifo.count--; + if (++tx_fifo.exit_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.exit_point = 0; + } + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + } +} + +/** @brief Function to push the content of the rx_buffer to the RX FIFO. + * + * The module will point the register NRF_RADIO->PACKETPTR to a buffer for receiving packets. + * After receiving a packet the module will call this function to copy the received data to + * the RX FIFO. + * + * @param pipe Pipe number to set for the packet. + * @param pid Packet ID. + * + * @retval true Operation successful. + * @retval false Operation failed. + */ +static bool rx_fifo_push_rfbuf(RFDriver *rfp, uint8_t pipe, uint8_t pid) { + if (rx_fifo.count < NRF52_RX_FIFO_SIZE) { + if (rfp->config.protocol == NRF52_PROTOCOL_ESB_DPL) { + if (rx_payload_buffer[0] > NRF52_MAX_PAYLOAD_LENGTH) { + return false; + } + + rx_fifo.p_payload[rx_fifo.entry_point]->length = rx_payload_buffer[0]; + } + else if (rfp->state == NRF52_STATE_PTX_RX_ACK) { + // Received packet is an acknowledgment + rx_fifo.p_payload[rx_fifo.entry_point]->length = 0; + } + else { + rx_fifo.p_payload[rx_fifo.entry_point]->length = rfp->config.payload_length; + } + + memcpy(rx_fifo.p_payload[rx_fifo.entry_point]->data, &rx_payload_buffer[2], + rx_fifo.p_payload[rx_fifo.entry_point]->length); + + rx_fifo.p_payload[rx_fifo.entry_point]->pipe = pipe; + rx_fifo.p_payload[rx_fifo.entry_point]->rssi = NRF_RADIO->RSSISAMPLE; + rx_fifo.p_payload[rx_fifo.entry_point]->pid = pid; + if (++rx_fifo.entry_point >= NRF52_RX_FIFO_SIZE) { + rx_fifo.entry_point = 0; + } + rx_fifo.count++; + + return true; + } + + return false; +} + +static void timer_init(RFDriver *rfp) { + // Configure the system timer with a 1 MHz base frequency + rfp->timer->PRESCALER = 4; + rfp->timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; + rfp->timer->SHORTS = TIMER_SHORTS_COMPARE1_CLEAR_Msk | TIMER_SHORTS_COMPARE1_STOP_Msk; +} + +static void start_tx_transaction(RFDriver *rfp) { + bool ack; + + rfp->tx_attempt = 1; + rfp->tx_remaining = rfp->config.retransmit.count; + + // Prepare the payload + p_current_payload = tx_fifo.p_payload[tx_fifo.exit_point]; + + // Handling ack if noack is set to false or if selctive auto ack is turned turned off + ack = !p_current_payload->noack || !rfp->config.selective_auto_ack; + + switch (rfp->config.protocol) { + case NRF52_PROTOCOL_ESB: + set_rf_payload_format(rfp, p_current_payload->length); + tx_payload_buffer[0] = p_current_payload->pid; + tx_payload_buffer[1] = 0; + memcpy(&tx_payload_buffer[2], p_current_payload->data, p_current_payload->length); + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk | RADIO_INTENSET_READY_Msk; + + // Configure the retransmit counter + rfp->tx_remaining = rfp->config.retransmit.count; + rfp->state = NRF52_STATE_PTX_TX_ACK; + break; + + case NRF52_PROTOCOL_ESB_DPL: + tx_payload_buffer[0] = p_current_payload->length; + tx_payload_buffer[1] = p_current_payload->pid << 1; + tx_payload_buffer[1] |= ack ? 0x00 : 0x01; + memcpy(&tx_payload_buffer[2], p_current_payload->data, p_current_payload->length); + + if (ack) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk | RADIO_INTENSET_READY_Msk; + + // Configure the retransmit counter + rfp->tx_remaining = rfp->config.retransmit.count; + rfp->state = NRF52_STATE_PTX_TX_ACK; + } + else { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + rfp->state = NRF52_STATE_PTX_TX; + } + break; + } + + NRF_RADIO->TXADDRESS = p_current_payload->pipe; + NRF_RADIO->RXADDRESSES = 1 << p_current_payload->pipe; + + NRF_RADIO->FREQUENCY = rfp->config.address.rf_channel; + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + + NRF_RADIO->EVENTS_READY = 0; + NRF_RADIO->EVENTS_DISABLED = 0; + (void)NRF_RADIO->EVENTS_READY; + (void)NRF_RADIO->EVENTS_DISABLED; + + nvicClearPending(RADIO_IRQn); + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + NRF_RADIO->TASKS_TXEN = 1; +} + +static void on_radio_disabled_tx_noack(RFDriver *rfp) { + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + tx_fifo_remove_last(); + + chBSemSignal(&events_sem); + + if (tx_fifo.count == 0) { + rfp->state = NRF52_STATE_IDLE; + } + else { + start_tx_transaction(rfp); + } +} + +static void on_radio_disabled_tx(RFDriver *rfp) { + // Remove the DISABLED -> RXEN shortcut, to make sure the radio stays + // disabled after the RX window + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + + // Make sure the timer is started the next time the radio is ready, + // and that it will disable the radio automatically if no packet is + // received by the time defined in m_wait_for_ack_timeout_us + rfp->timer->CC[0] = wait_for_ack_timeout_us + 130; + rfp->timer->CC[1] = rfp->config.retransmit.delay - 130; + rfp->timer->TASKS_CLEAR = 1; + rfp->timer->EVENTS_COMPARE[0] = 0; + rfp->timer->EVENTS_COMPARE[1] = 0; + (void)rfp->timer->EVENTS_COMPARE[0]; + (void)rfp->timer->EVENTS_COMPARE[1]; + + NRF_PPI->CHENSET = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT) | + (1 << NRF52_RADIO_PPI_TIMER_STOP); + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + + NRF_RADIO->EVENTS_END = 0; + (void)NRF_RADIO->EVENTS_END; + + if (rfp->config.protocol == NRF52_PROTOCOL_ESB) { + set_rf_payload_format(rfp, 0); + } + + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + rfp->state = NRF52_STATE_PTX_RX_ACK; +} + +static void on_radio_disabled_tx_wait_for_ack(RFDriver *rfp) { + // This marks the completion of a TX_RX sequence (TX with ACK) + + // Make sure the timer will not deactivate the radio if a packet is received + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT) | + (1 << NRF52_RADIO_PPI_TIMER_STOP); + + // If the radio has received a packet and the CRC status is OK + if (NRF_RADIO->EVENTS_END && NRF_RADIO->CRCSTATUS != 0) { + rfp->timer->TASKS_STOP = 1; + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + rfp->tx_attempt++;// = rfp->config.retransmit.count - rfp->tx_remaining + 1; + + tx_fifo_remove_last(); + + if (rfp->config.protocol != NRF52_PROTOCOL_ESB && rx_payload_buffer[0] > 0) { + if (rx_fifo_push_rfbuf(rfp, (uint8_t)NRF_RADIO->TXADDRESS, 0)) { + rfp->flags |= NRF52_INT_RX_DR_MSK; + } + } + + chBSemSignal(&events_sem); + + if ((tx_fifo.count == 0) || (rfp->config.tx_mode == NRF52_TXMODE_MANUAL)) { + rfp->state = NRF52_STATE_IDLE; + } + else { + start_tx_transaction(rfp); + } + } + else { + if (rfp->tx_remaining-- == 0) { + rfp->timer->TASKS_STOP = 1; + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + // All retransmits are expended, and the TX operation is suspended + rfp->tx_attempt = rfp->config.retransmit.count + 1; + rfp->flags |= NRF52_INT_TX_FAILED_MSK; + + chBSemSignal(&events_sem); + + rfp->state = NRF52_STATE_IDLE; + } + else { + // There are still have more retransmits left, TX mode should be + // entered again as soon as the system timer reaches CC[1]. + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + set_rf_payload_format(rfp, p_current_payload->length); + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + rfp->state = NRF52_STATE_PTX_TX_ACK; + rfp->timer->TASKS_START = 1; + NRF_PPI->CHENSET = (1 << NRF52_RADIO_PPI_TX_START); + if (rfp->timer->EVENTS_COMPARE[1]) + NRF_RADIO->TASKS_TXEN = 1; + } + } +} + +static void clear_events_restart_rx(RFDriver *rfp) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + set_rf_payload_format(rfp, rfp->config.payload_length); + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + NRF_RADIO->INTENCLR = RADIO_INTENCLR_DISABLED_Msk; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->TASKS_DISABLE = 1; + while (NRF_RADIO->EVENTS_DISABLED == 0); + + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + NRF_RADIO->TASKS_RXEN = 1; +} + +static void on_radio_disabled_rx(RFDriver *rfp) { + bool ack = false; + bool retransmit_payload = false; + bool send_rx_event = true; + pipe_info_t * p_pipe_info; + + if (NRF_RADIO->CRCSTATUS == 0) { + clear_events_restart_rx(rfp); + return; + } + + if(rx_fifo.count >= NRF52_RX_FIFO_SIZE) { + clear_events_restart_rx(rfp); + return; + } + + p_pipe_info = &rx_pipe_info[NRF_RADIO->RXMATCH]; + if (NRF_RADIO->RXCRC == p_pipe_info->m_crc && + (rx_payload_buffer[1] >> 1) == p_pipe_info->m_pid ) { + retransmit_payload = true; + send_rx_event = false; + } + + p_pipe_info->m_pid = rx_payload_buffer[1] >> 1; + p_pipe_info->m_crc = NRF_RADIO->RXCRC; + + if(rfp->config.selective_auto_ack == false || ((rx_payload_buffer[1] & 0x01) == 0)) + ack = true; + + if(ack) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + + switch(rfp->config.protocol) { + case NRF52_PROTOCOL_ESB_DPL: + { + if (tx_fifo.count > 0 && + (tx_fifo.p_payload[tx_fifo.exit_point]->pipe == NRF_RADIO->RXMATCH)) + { + // Pipe stays in ACK with payload until TX fifo is empty + // Do not report TX success on first ack payload or retransmit + if (p_pipe_info->m_ack_payload != 0 && !retransmit_payload) { + if(++tx_fifo.exit_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.exit_point = 0; + } + + tx_fifo.count--; + + // ACK payloads also require TX_DS + // (page 40 of the 'nRF24LE1_Product_Specification_rev1_6.pdf'). + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + } + + p_pipe_info->m_ack_payload = 1; + + p_current_payload = tx_fifo.p_payload[tx_fifo.exit_point]; + + set_rf_payload_format(rfp, p_current_payload->length); + tx_payload_buffer[0] = p_current_payload->length; + memcpy(&tx_payload_buffer[2], + p_current_payload->data, + p_current_payload->length); + } + else { + p_pipe_info->m_ack_payload = 0; + set_rf_payload_format(rfp, 0); + tx_payload_buffer[0] = 0; + } + + tx_payload_buffer[1] = rx_payload_buffer[1]; + } + break; + + case NRF52_PROTOCOL_ESB: + { + set_rf_payload_format(rfp, 0); + tx_payload_buffer[0] = rx_payload_buffer[0]; + tx_payload_buffer[1] = 0; + } + break; + } + + rfp->state = NRF52_STATE_PRX_SEND_ACK; + NRF_RADIO->TXADDRESS = NRF_RADIO->RXMATCH; + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + } + else { + clear_events_restart_rx(rfp); + } + + if (send_rx_event) { + // Push the new packet to the RX buffer and trigger a received event if the operation was + // successful. + if (rx_fifo_push_rfbuf(rfp, NRF_RADIO->RXMATCH, p_pipe_info->m_pid)) { + rfp->flags |= NRF52_INT_RX_DR_MSK; + chBSemSignal(&events_sem); + } + } +} + +static void on_radio_disabled_rx_ack(RFDriver *rfp) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + set_rf_payload_format(rfp, rfp->config.payload_length); + + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + rfp->state = NRF52_STATE_PRX; +} + +nrf52_error_t radio_disable(void) { + RFD1.state = NRF52_STATE_IDLE; + + // Clear PPI + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_TIMER_STOP) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT); + + reset_fifo(); + + memset(rx_pipe_info, 0, sizeof(rx_pipe_info)); + memset(pids, 0, sizeof(pids)); + + // Disable the radio + NRF_RADIO->SHORTS = RADIO_SHORTS_READY_START_Enabled << RADIO_SHORTS_READY_START_Pos | + RADIO_SHORTS_END_DISABLE_Enabled << RADIO_SHORTS_END_DISABLE_Pos; + + nvicDisableVector(RADIO_IRQn); + + // Terminate interrupts handle thread + chThdTerminate(rfIntThread_p); + chBSemSignal(&disable_sem); + chThdWait(rfIntThread_p); + + // Terminate events handle thread + chThdTerminate(rfEvtThread_p); + RFD1.flags = 0; + chBSemSignal(&events_sem); + chThdWait(rfEvtThread_p); + + RFD1.state = NRF52_STATE_UNINIT; + + return NRF52_SUCCESS; +} + +// +nrf52_error_t radio_init(nrf52_config_t const *config) { + osalDbgAssert(config != NULL, + "config must be defined"); + osalDbgAssert(&config->address != NULL, + "address must be defined"); + osalDbgAssert(NRF52_RADIO_IRQ_PRIORITY <= 7, + "wrong radio irq priority"); + + if (RFD1.state != NRF52_STATE_UNINIT) { + nrf52_error_t err = radio_disable(); + if (err != NRF52_SUCCESS) + return err; + } + + RFD1.radio = NRF_RADIO; + RFD1.config = *config; + RFD1.flags = 0; + + init_fifo(); + +#if NRF52_RADIO_USE_TIMER0 + RFD1.timer = NRF_TIMER0; +#endif +#if NRF52_RADIO_USE_TIMER1 + RFD1.timer = NRF_TIMER1; +#endif +#if NRF52_RADIO_USE_TIMER2 + RFD1.timer = NRF_TIMER2; +#endif +#if NRF52_RADIO_USE_TIMER3 + RFD1.timer = NRF_TIMER3; +#endif +#if NRF52_RADIO_USE_TIMER4 + RFD1.timer = NRF_TIMER4; +#endif + + set_parameters(&RFD1); + + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE0); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE1); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_PREFIX); + + ppi_init(&RFD1); + timer_init(&RFD1); + + chBSemObjectInit(&disable_sem, TRUE); + chBSemObjectInit(&events_sem, TRUE); + + chEvtObjectInit(&RFD1.eventsrc); + + // interrupt handle thread + rfIntThread_p = chThdCreateStatic(waRFIntThread, sizeof(waRFIntThread), + NRF52_RADIO_INTTHD_PRIORITY, rfIntThread, NULL); + + // events handle thread + rfEvtThread_p = chThdCreateStatic(waRFEvtThread, sizeof(waRFEvtThread), + NRF52_RADIO_EVTTHD_PRIORITY, rfEvtThread, NULL); + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + RFD1.state = NRF52_STATE_IDLE; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_write_payload(nrf52_payload_t const * p_payload) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if(p_payload == NULL) + return NRF52_ERROR_NULL; + VERIFY_PAYLOAD_LENGTH(p_payload); + if (tx_fifo.count >= NRF52_TX_FIFO_SIZE) + return NRF52_ERROR_INVALID_LENGTH; + + if (RFD1.config.mode == NRF52_MODE_PTX && + p_payload->noack && !RFD1.config.selective_auto_ack ) + { + return NRF52_ERROR_NOT_SUPPORTED; + } + + nvicDisableVector(RADIO_IRQn); + + memcpy(tx_fifo.p_payload[tx_fifo.entry_point], p_payload, sizeof(nrf52_payload_t)); + + pids[p_payload->pipe] = (pids[p_payload->pipe] + 1) % (NRF52_PID_MAX + 1); + tx_fifo.p_payload[tx_fifo.entry_point]->pid = pids[p_payload->pipe]; + + if (++tx_fifo.entry_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.entry_point = 0; + } + + tx_fifo.count++; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + if (RFD1.config.mode == NRF52_MODE_PTX && + RFD1.config.tx_mode == NRF52_TXMODE_AUTO && + RFD1.state == NRF52_STATE_IDLE) + { + start_tx_transaction(&RFD1); + } + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_read_rx_payload(nrf52_payload_t * p_payload) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if (p_payload == NULL) + return NRF52_ERROR_NULL; + + if (rx_fifo.count == 0) { + return NRF52_ERROR_INVALID_LENGTH; + } + + nvicDisableVector(RADIO_IRQn); + + p_payload->length = rx_fifo.p_payload[rx_fifo.exit_point]->length; + p_payload->pipe = rx_fifo.p_payload[rx_fifo.exit_point]->pipe; + p_payload->rssi = rx_fifo.p_payload[rx_fifo.exit_point]->rssi; + p_payload->pid = rx_fifo.p_payload[rx_fifo.exit_point]->pid; + memcpy(p_payload->data, rx_fifo.p_payload[rx_fifo.exit_point]->data, p_payload->length); + + if (++rx_fifo.exit_point >= NRF52_RX_FIFO_SIZE) { + rx_fifo.exit_point = 0; + } + + rx_fifo.count--; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_start_tx(void) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + + if (tx_fifo.count == 0) { + return NRF52_ERROR_INVALID_LENGTH; + } + + start_tx_transaction(&RFD1); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_start_rx(void) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + + NRF_RADIO->INTENCLR = 0xFFFFFFFF; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + RFD1.state = NRF52_STATE_PRX; + + NRF_RADIO->RXADDRESSES = RFD1.config.address.rx_pipes; + NRF_RADIO->FREQUENCY = RFD1.config.address.rf_channel; + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + nvicClearPending(RADIO_IRQn); + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + NRF_RADIO->EVENTS_ADDRESS = 0; + NRF_RADIO->EVENTS_PAYLOAD = 0; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_ADDRESS; + (void) NRF_RADIO->EVENTS_PAYLOAD; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->TASKS_RXEN = 1; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_stop_rx(void) { + if (RFD1.state != NRF52_STATE_PRX) { + return NRF52_INVALID_STATE; + } + + NRF_RADIO->SHORTS = 0; + NRF_RADIO->INTENCLR = 0xFFFFFFFF; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + NRF_RADIO->TASKS_DISABLE = 1; + while (NRF_RADIO->EVENTS_DISABLED == 0); + RFD1.state = NRF52_STATE_IDLE; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_flush_tx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + + nvicDisableVector(RADIO_IRQn); + + tx_fifo.count = 0; + tx_fifo.entry_point = 0; + tx_fifo.exit_point = 0; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_pop_tx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if (tx_fifo.count == 0) + return NRF52_ERROR_INVALID_LENGTH; + + nvicDisableVector(RADIO_IRQn); + + if (++tx_fifo.entry_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.entry_point = 0; + } + tx_fifo.count--; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_flush_rx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + + nvicDisableVector(RADIO_IRQn); + + rx_fifo.count = 0; + rx_fifo.entry_point = 0; + rx_fifo.exit_point = 0; + + memset(rx_pipe_info, 0, sizeof(rx_pipe_info)); + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_base_address_0(uint8_t const * p_addr) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_addr == NULL) + return NRF52_ERROR_NULL; + + memcpy(RFD1.config.address.base_addr_p0, p_addr, 4); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE0); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_base_address_1(uint8_t const * p_addr) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_addr == NULL) + return NRF52_ERROR_NULL; + + memcpy(RFD1.config.address.base_addr_p1, p_addr, 4); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE1); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_prefixes(uint8_t const * p_prefixes, uint8_t num_pipes) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_prefixes == NULL) + return NRF52_ERROR_NULL; + if (num_pipes > 8) + return NRF52_ERROR_INVALID_PARAM; + + memcpy(RFD1.config.address.pipe_prefixes, p_prefixes, num_pipes); + RFD1.config.address.num_pipes = num_pipes; + RFD1.config.address.rx_pipes = BIT_MASK_UINT_8(num_pipes); + + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_PREFIX); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_prefix(uint8_t pipe, uint8_t prefix) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (pipe > 8) + return NRF52_ERROR_INVALID_PARAM; + + RFD1.config.address.pipe_prefixes[pipe] = prefix; + + NRF_RADIO->PREFIX0 = bytewise_bit_swap(&RFD1.config.address.pipe_prefixes[0]); + NRF_RADIO->PREFIX1 = bytewise_bit_swap(&RFD1.config.address.pipe_prefixes[4]); + + return NRF52_SUCCESS; +} diff --git a/os/various/devices_lib/rf/nrf52_radio.h b/os/various/devices_lib/rf/nrf52_radio.h new file mode 100644 index 0000000..2f94465 --- /dev/null +++ b/os/various/devices_lib/rf/nrf52_radio.h @@ -0,0 +1,256 @@ +/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved. + * + * The information contained herein is property of Nordic Semiconductor ASA. + * Terms and conditions of usage are described in detail in NORDIC + * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. + * + * Licensees are granted free, non-transferable use of the information. NO + * WARRANTY of ANY KIND is provided. This heading must NOT be removed from + * the file. + * + * @brief Enhanced ShockBurst (ESB) is a basic protocol supporting two-way data + * packet communication including packet buffering, packet acknowledgment + * and automatic retransmission of lost packets. + * + * ported on: 25/10/2018, by andru + * + */ + +#ifndef NRF52_RADIO_H_ +#define NRF52_RADIO_H_ + +// Hard coded parameters - change if necessary +#ifndef NRF52_MAX_PAYLOAD_LENGTH +#define NRF52_MAX_PAYLOAD_LENGTH 32 /**< The max size of the payload. Valid values are 1 to 252 */ +#endif + +#define NRF52_CRC_RESET_VALUE 0xFFFF /**< CRC reset value*/ + +#define NRF52_TX_FIFO_SIZE 8 /**< The size of the transmission first in first out buffer. */ +#define NRF52_RX_FIFO_SIZE 8 /**< The size of the reception first in first out buffer. */ + +#define NRF52_RADIO_USE_TIMER0 FALSE /**< TIMER0 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER1 TRUE /**< TIMER1 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER2 FALSE /**< TIMER2 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER3 FALSE /**< TIMER3 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER4 FALSE /**< TIMER4 will be used by the module. */ + +#define NRF52_RADIO_IRQ_PRIORITY 3 /**< RADIO interrupt priority. */ +#define NRF52_RADIO_INTTHD_PRIORITY (NORMALPRIO+2) /**< Interrupts handle thread priority. */ +#define NRF52_RADIO_EVTTHD_PRIORITY (NORMALPRIO+1) /**< Events handle thread priority */ + +#define NRF52_RADIO_PPI_TIMER_START 10 /**< The PPI channel used for timer start. */ +#define NRF52_RADIO_PPI_TIMER_STOP 11 /**< The PPI channel used for timer stop. */ +#define NRF52_RADIO_PPI_RX_TIMEOUT 12 /**< The PPI channel used for RX timeout. */ +#define NRF52_RADIO_PPI_TX_START 13 /**< The PPI channel used for starting TX. */ + + +typedef enum { + NRF52_SUCCESS, /* Call was successful. */ + NRF52_INVALID_STATE, /* Module is not initialized. */ + NRF52_ERROR_BUSY, /* Module was not in idle state. */ + NRF52_ERROR_NULL, /* Required parameter was NULL. */ + NRF52_ERROR_INVALID_PARAM, /* Required parameter is invalid */ + NRF52_ERROR_NOT_SUPPORTED, /* p_payload->noack was false while selective ack was not enabled. */ + NRF52_ERROR_INVALID_LENGTH, /* Payload length was invalid (zero or larger than max allowed). */ +} nrf52_error_t; + +// Internal radio module state. +typedef enum { + NRF52_STATE_UNINIT, /**< Module not initialized. */ + NRF52_STATE_IDLE, /**< Module idle. */ + NRF52_STATE_PTX_TX, /**< Module transmitting without ack. */ + NRF52_STATE_PTX_TX_ACK, /**< Module transmitting with ack. */ + NRF52_STATE_PTX_RX_ACK, /**< Module transmitting with ack and reception of payload with the ack response. */ + NRF52_STATE_PRX, /**< Module receiving packets without ack. */ + NRF52_STATE_PRX_SEND_ACK, /**< Module transmitting ack in RX mode. */ +} nrf52_state_t; + +/**@brief Events to indicate the last transmission/receiving status. */ +typedef enum { + NRF52_EVENT_TX_SUCCESS = 0x01, /**< Event triggered on TX success. */ + NRF52_EVENT_TX_FAILED = 0x02, /**< Event triggered on TX failed. */ + NRF52_EVENT_RX_RECEIVED = 0x04, /**< Event triggered on RX Received. */ +} nrf52_event_t; + +// Interrupt flags +typedef enum { + NRF52_INT_TX_SUCCESS_MSK = 0x01, /**< The flag used to indicate a success since last event. */ + NRF52_INT_TX_FAILED_MSK = 0x02, /**< The flag used to indicate a failiure since last event. */ + NRF52_INT_RX_DR_MSK = 0x04, /**< The flag used to indicate a received packet since last event. */ +} nrf52_int_flags_t; + +/**Macro to create initializer for a TX data packet. + * + * @details This macro generates an initializer. It is more efficient + * than setting the individual parameters dynamically. + * + * @param[in] _pipe The pipe to use for the data packet. + * @param[in] ... Comma separated list of character data to put in the TX buffer. + * Supported values are from 1 to 63 characters. + * + * @return Initializer that sets up pipe, length and the byte array for content of the TX data. + */ +#define NRF52_CREATE_PAYLOAD(_pipe, ...) \ + {.pipe = _pipe, .length = NUM_VA_ARGS(__VA_ARGS__), .data = {__VA_ARGS__}}; \ + STATIC_ASSERT(NUM_VA_ARGS(__VA_ARGS__) > 0 && NUM_VA_ARGS(__VA_ARGS__) <= 63) + +/**@brief Enhanced ShockBurst protocol. */ +typedef enum { + NRF52_PROTOCOL_ESB, /*< Enhanced ShockBurst with fixed payload length. */ + NRF52_PROTOCOL_ESB_DPL /*< Enhanced ShockBurst with dynamic payload length. */ +} nrf52_protocol_t; + +/**@brief Enhanced ShockBurst mode. */ +typedef enum { + NRF52_MODE_PTX, /*< Primary transmitter mode. */ + NRF52_MODE_PRX /*< Primary receiver mode. */ +} nrf52_mode_t; + +/**@brief Enhanced ShockBurst bitrate mode. */ +typedef enum { + NRF52_BITRATE_2MBPS = RADIO_MODE_MODE_Nrf_2Mbit, /**< 2Mbit radio mode. */ + NRF52_BITRATE_1MBPS = RADIO_MODE_MODE_Nrf_1Mbit, /**< 1Mbit radio mode. */ +} nrf52_bitrate_t; + +/**@brief Enhanced ShockBurst CRC modes. */ +typedef enum { + NRF52_CRC_16BIT = RADIO_CRCCNF_LEN_Two, /**< Use two byte CRC. */ + NRF52_CRC_8BIT = RADIO_CRCCNF_LEN_One, /**< Use one byte CRC. */ + NRF52_CRC_OFF = RADIO_CRCCNF_LEN_Disabled /**< Disable CRC. */ +} nrf52_crc_t; + +/**@brief Enhanced ShockBurst radio transmission power modes. */ +typedef enum { + NRF52_TX_POWER_4DBM = RADIO_TXPOWER_TXPOWER_Pos4dBm, /**< 4 dBm radio transmit power. */ + NRF52_TX_POWER_0DBM = RADIO_TXPOWER_TXPOWER_0dBm, /**< 0 dBm radio transmit power. */ + NRF52_TX_POWER_NEG4DBM = RADIO_TXPOWER_TXPOWER_Neg4dBm, /**< -4 dBm radio transmit power. */ + NRF52_TX_POWER_NEG8DBM = RADIO_TXPOWER_TXPOWER_Neg8dBm, /**< -8 dBm radio transmit power. */ + NRF52_TX_POWER_NEG12DBM = RADIO_TXPOWER_TXPOWER_Neg12dBm, /**< -12 dBm radio transmit power. */ + NRF52_TX_POWER_NEG16DBM = RADIO_TXPOWER_TXPOWER_Neg16dBm, /**< -16 dBm radio transmit power. */ + NRF52_TX_POWER_NEG20DBM = RADIO_TXPOWER_TXPOWER_Neg20dBm, /**< -20 dBm radio transmit power. */ + NRF52_TX_POWER_NEG30DBM = RADIO_TXPOWER_TXPOWER_Neg30dBm /**< -30 dBm radio transmit power. */ +} nrf52_tx_power_t; + +/**@brief Enhanced ShockBurst transmission modes. */ +typedef enum { + NRF52_TXMODE_AUTO, /*< Automatic TX mode - When the TX fifo is non-empty and the radio is idle packets will be sent automatically. */ + NRF52_TXMODE_MANUAL, /*< Manual TX mode - Packets will not be sent until radio_start_tx() is called. Can be used to ensure consistent packet timing. */ + NRF52_TXMODE_MANUAL_START /*< Manual start TX mode - Packets will not be sent until radio_start_tx() is called, but transmission will continue automatically until the TX fifo is empty. */ +} nrf52_tx_mode_t; + +/**@brief Enhanced ShockBurst addresses. + * + * @details The module is able to transmit packets with the TX address stored in tx_address. + The module can also receive packets from peers with up to eight different tx_addresses + stored in esb_addr_p0 - esb_addr_p7. esb_addr_p0 can have 5 arbitrary bytes + independent of the other addresses. esb_addr_p1 - esb_addr_p7 will share the + same four byte base address found in the last four bytes of esb_addr_p1. + They have an independent prefix byte found in esb_addr_p1[0] and esb_addr_p2 - + esb_addr_p7. +*/ +typedef struct { + uint8_t base_addr_p0[4]; /**< Base address for pipe 0 encoded in big endian. */ + uint8_t base_addr_p1[4]; /**< Base address for pipe 1-7 encoded in big endian. */ + uint8_t pipe_prefixes[8]; /**< Address prefix for pipe P0 to P7. */ + uint8_t num_pipes; /**< Number of pipes available. */ + uint8_t addr_length; /**< Length of address including prefix */ + uint8_t rx_pipes; /**< Bitfield for enabled RX pipes. */ + uint8_t rf_channel; /**< Which channel is to be used. Must be in range 0 and 125 to be valid. */ +} nrf52_address_t; + +/**@brief Enhanced ShockBurst payload. + * + * @note The payload is used both for transmission and receive with ack and payload. +*/ +typedef struct +{ + uint8_t length; /**< Length of the packet. Should be equal or less than NRF_ESB_MAX_PAYLOAD_LENGTH. */ + uint8_t pipe; /**< Pipe used for this payload. */ + int8_t rssi; /**< RSSI for received packet. */ + uint8_t noack; /**< Flag indicating that this packet will not be acknowledged. */ + uint8_t pid; /**< PID assigned during communication. */ + uint8_t data[NRF52_MAX_PAYLOAD_LENGTH]; /**< The payload data. */ +} nrf52_payload_t; + +/**@brief Retransmit attempts delay and counter. */ +typedef struct { + uint16_t delay; /**< The delay between each retransmission of unacked packets. */ + uint16_t count; /**< The number of retransmissions attempts before transmission fail. */ +} nrf52_retransmit_t; + +/**@brief Main nrf_esb configuration struct. */ +typedef struct { + nrf52_protocol_t protocol; /**< Enhanced ShockBurst protocol. */ + nrf52_mode_t mode; /**< Enhanced ShockBurst default RX or TX mode. */ + + // General RF parameters + nrf52_bitrate_t bitrate; /**< Enhanced ShockBurst bitrate mode. */ + nrf52_crc_t crc; /**< Enhanced ShockBurst CRC mode. */ + nrf52_tx_power_t tx_power; /**< Enhanced ShockBurst radio transmission power mode.*/ + + // Control settings + nrf52_tx_mode_t tx_mode; /**< Enhanced ShockBurst transmit mode. */ + + bool selective_auto_ack; /**< Enable or disable selective auto acknowledgement. */ + + nrf52_retransmit_t retransmit; /**< Packet retransmit parameters */ + + uint8_t payload_length; /**< Enhanced ShockBurst static payload length */ + + nrf52_address_t address; /**< Address parameters structure */ +} nrf52_config_t; + +typedef struct { + /** + * @brief NRF52 radio peripheral. + */ + NRF_RADIO_Type *radio; + /** + * @brief NRF52 timer peripheral. + */ + NRF_TIMER_Type *timer; + /** + * @brief Driver state. + */ + nrf52_state_t state; + /** + * @brief RF parameters. + */ + nrf52_config_t config; + /** + * @brief Interrupts flag. + */ + nrf52_int_flags_t flags; + /** + * @brief TX attempt number. + */ + uint16_t tx_attempt; + /** + * @brief TX retransmits remaining. + */ + uint16_t tx_remaining; + /** + * @brief Radio events source. + */ + event_source_t eventsrc; +} RFDriver; + +extern RFDriver RFD1; + +nrf52_error_t radio_init(nrf52_config_t const *config); +nrf52_error_t radio_disable(void); +nrf52_error_t radio_write_payload(nrf52_payload_t const * p_payload); +nrf52_error_t radio_read_rx_payload(nrf52_payload_t * p_payload); +nrf52_error_t radio_start_tx(void); +nrf52_error_t radio_start_rx(void); +nrf52_error_t radio_stop_rx(void); +nrf52_error_t radio_flush_tx(void); +nrf52_error_t radio_flush_rx(void); +nrf52_error_t radio_pop_tx(void); +nrf52_error_t radio_set_base_address_0(uint8_t const * p_addr); +nrf52_error_t radio_set_base_address_1(uint8_t const * p_addr); +nrf52_error_t radio_set_prefixes(uint8_t const * p_prefixes, uint8_t num_pipes); +nrf52_error_t radio_set_prefix(uint8_t pipe, uint8_t prefix); + +#endif /* NRF52_RADIO_H_ */ diff --git a/testhal/NRF52/NRF52832/I2C/Makefile b/testhal/NRF52/NRF52832/I2C/Makefile new file mode 100644 index 0000000..e5061f7 --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF52832/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF52-E73-2G4M04S/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +#include $(CHIBIOS)/test/rt/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/NRF52832.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/NRF52/NRF52832/I2C/chconf.h b/testhal/NRF52/NRF52832/I2C/chconf.h new file mode 100644 index 0000000..1750f63 --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/chconf.h @@ -0,0 +1,696 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/I2C/halconf.h b/testhal/NRF52/NRF52832/I2C/halconf.h new file mode 100644 index 0000000..1c3036a --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/halconf.h @@ -0,0 +1,327 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/I2C/halconf_community.h b/testhal/NRF52/NRF52832/I2C/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/I2C/main.c b/testhal/NRF52/NRF52832/I2C/main.c new file mode 100644 index 0000000..88fb1e8 --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/main.c @@ -0,0 +1,165 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + This demo: + 1) Writes bytes to the EEPROM + 2) Reads the same bytes back + 3) Inverts the byte values + 4) Writes them + 5) Reads them back + */ + +#include + +#include "ch.h" +#include "hal.h" + +#define I2C_ADDR 0x50 +#define I2C_FAKE_ADDR 0x4C +#define EEPROM_START_ADDR 0x00 + +/* + * EEPROM thread. + */ +static THD_WORKING_AREA(PollEepromThreadWA, 1024); +static THD_FUNCTION(PollEepromThread, arg) { + + unsigned i; + uint8_t tx_data[6]; + uint8_t rx_data[4]; + msg_t status; + + (void)arg; + + chRegSetThreadName("PollEeprom"); + + /* set initial data to write */ + tx_data[0] = EEPROM_START_ADDR; + tx_data[1] = EEPROM_START_ADDR; + tx_data[2] = 0xA0; + tx_data[3] = 0xA1; + tx_data[4] = 0xA2; + tx_data[5] = 0xA3; + + while (true) { + + /* write out initial data */ + i2cAcquireBus(&I2CD1); + status = i2cMasterTransmitTimeout(&I2CD1, I2C_ADDR, tx_data, sizeof(tx_data), NULL, 0, TIME_INFINITE); + i2cReleaseBus(&I2CD1); + osalDbgCheck(MSG_OK == status); + + /* read back inital data */ + osalThreadSleepMilliseconds(2); + i2cAcquireBus(&I2CD1); + status = i2cMasterTransmitTimeout(&I2CD1, I2C_ADDR, tx_data, 2, rx_data, sizeof(rx_data), TIME_INFINITE); + i2cReleaseBus(&I2CD1); + osalDbgCheck(MSG_OK == status); + + /* invert the data */ + for (i = 2; i < sizeof(tx_data); i++) + tx_data[i] ^= 0xff; + + /* write out inverted data */ + osalThreadSleepMilliseconds(2); + i2cAcquireBus(&I2CD1); + status = i2cMasterTransmitTimeout(&I2CD1, I2C_ADDR, tx_data, sizeof(tx_data), NULL, 0, TIME_INFINITE); + i2cReleaseBus(&I2CD1); + osalDbgCheck(MSG_OK == status); + + /* read back inverted data */ + osalThreadSleepMilliseconds(2); + i2cAcquireBus(&I2CD1); + status = i2cMasterTransmitTimeout(&I2CD1, I2C_ADDR, tx_data, 2, rx_data, sizeof(rx_data), TIME_INFINITE); + i2cReleaseBus(&I2CD1); + osalDbgCheck(MSG_OK == status); + + osalThreadSleepMilliseconds(TIME_INFINITE); + } +} + +/* + * Fake polling thread. + */ +static THD_WORKING_AREA(PollFakeThreadWA, 256); +static THD_FUNCTION(PollFakeThread, arg) { + + (void)arg; + + chRegSetThreadName("PollFake"); + while (true) { + + msg_t status; + uint8_t rx_data[2]; + i2cflags_t errors; + + i2cAcquireBus(&I2CD1); + status = i2cMasterReceiveTimeout(&I2CD1, I2C_FAKE_ADDR, rx_data, 2, TIME_MS2I(4)); + i2cReleaseBus(&I2CD1); + + if (status == MSG_RESET){ + errors = i2cGetErrors(&I2CD1); + osalDbgCheck(I2C_ACK_FAILURE == errors); + } + + palTogglePad(IOPORT1, LED1); /* on */ + osalThreadSleepMilliseconds(1000); + } +} + +/* + * I2C1 config. + */ +static const I2CConfig i2cfg = { + 100000, + I2C_SCL, + I2C_SDA, +}; + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(void) { + + halInit(); + chSysInit(); + + i2cStart(&I2CD1, &i2cfg); + + /* Create EEPROM thread. */ + chThdCreateStatic(PollEepromThreadWA, + sizeof(PollEepromThreadWA), + NORMALPRIO, + PollEepromThread, + NULL); + + /* Create not responding thread. */ + chThdCreateStatic(PollFakeThreadWA, + sizeof(PollFakeThreadWA), + NORMALPRIO, + PollFakeThread, + NULL); + + /* main loop handles LED */ + while (true) { + palTogglePad(IOPORT1, LED2); /* on */ + osalThreadSleepMilliseconds(500); + } + + return 0; +} diff --git a/testhal/NRF52/NRF52832/I2C/mcuconf.h b/testhal/NRF52/NRF52832/I2C/mcuconf.h new file mode 100644 index 0000000..fd238a2 --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/mcuconf.h @@ -0,0 +1,25 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * HAL driver system settings. + */ +#define NRF5_I2C_USE_I2C0 TRUE + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NRF52/NRF52832/I2C/readme.txt b/testhal/NRF52/NRF52832/I2C/readme.txt new file mode 100644 index 0000000..281bd3e --- /dev/null +++ b/testhal/NRF52/NRF52832/I2C/readme.txt @@ -0,0 +1,21 @@ +***************************************************************************** +** ChibiOS/HAL - I2C driver demo for NRF52832. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an EByte E73-2G4M04S board. + +** The Demo ** + +The application demonstrates the use of the NRF52832 I2C driver. + +** Board Setup ** + +- Connect AT24CXX EEPROM board to I2C port on E73-2G4M04S board + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/NRF52/NRF52832/PWM-ICU/Makefile b/testhal/NRF52/NRF52832/PWM-ICU/Makefile new file mode 100644 index 0000000..6cc0a38 --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/Makefile @@ -0,0 +1,228 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib + +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF52832/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF52-E73-2G4M04S/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +#include $(CHIBIOS)/test/rt/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/NRF52832.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ + $(CHIBIOS)/os/hal/lib/streams/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(CHIBIOS)/os/hal/lib/streams \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk + + +include $(CHIBIOS_CONTRIB)/os/various/jlink.mk + + +JLINK_DEVICE = nrf51422 +JLINK_PRE_FLASH = w4 4001e504 1 +JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 + +flash: all jlink-flash + diff --git a/testhal/NRF52/NRF52832/PWM-ICU/chconf.h b/testhal/NRF52/NRF52832/PWM-ICU/chconf.h new file mode 100644 index 0000000..1750f63 --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/chconf.h @@ -0,0 +1,696 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/PWM-ICU/halconf.h b/testhal/NRF52/NRF52832/PWM-ICU/halconf.h new file mode 100644 index 0000000..6674ab5 --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/halconf.h @@ -0,0 +1,327 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/PWM-ICU/halconf_community.h b/testhal/NRF52/NRF52832/PWM-ICU/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/PWM-ICU/main.c b/testhal/NRF52/NRF52832/PWM-ICU/main.c new file mode 100644 index 0000000..6ad8a4c --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/main.c @@ -0,0 +1,122 @@ +/* + Copyright (C) 2018 andru + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" +#include "chprintf.h" + +static icucnt_t last_width, last_period; + +static SerialConfig serial_config = { + .speed = 38400, + .tx_pad = UART_TX, + .rx_pad = UART_RX, +#if NRF5_SERIAL_USE_HWFLOWCTRL == TRUE + .rts_pad = UART_RTS, + .cts_pad = UART_CTS, +#endif +}; + +static void pwm_cb_period(PWMDriver *pwmp) { + (void)pwmp; + palTogglePad(IOPORT1, LED1); +} + +void icu_width_cb(ICUDriver *icup) { + last_width = icuGetWidthX(icup); +} + +void icu_period_cb(ICUDriver *icup) { + last_period = icuGetPeriodX(icup); +} + +ICUConfig icucfg = { + .frequency = ICU_FREQUENCY_250KHZ, + .width_cb = icu_width_cb, + .period_cb = icu_period_cb, + NULL, + .iccfgp = { + { + .ioline = { BTN1, BTN2 }, + .mode = ICU_INPUT_ACTIVE_HIGH, + .gpiote_channel = { 0, 1 }, + .ppi_channel = { 0, 1 }, + }, + }, +}; + +PWMConfig pwmcfg = { + .frequency = PWM_FREQUENCY_125KHZ, + .period = 12500, + .callback = pwm_cb_period, + { + { .mode = PWM_OUTPUT_DISABLED, + }, + { .mode = PWM_OUTPUT_ACTIVE_HIGH, + .ioline = LINE_LED2, + }, + }, +}; + +/* + * Application entry point. + */ +int main(void) { + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + sdStart(&SD1, &serial_config); + + /* + * + */ + pwmStart(&PWMD1, &pwmcfg); + pwmEnablePeriodicNotification(&PWMD1); + + icuStart(&ICUD1, &icucfg); + icuStartCapture(&ICUD1); + + pwmEnableChannel(&PWMD1, 1, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); // 25% + chThdSleepMilliseconds(5000); + chprintf((BaseSequentialStream *) &SD1, "period=%d, width=%d\r\n", last_period, last_width); + + pwmEnableChannel(&PWMD1, 1, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); // 50% + chThdSleepMilliseconds(5000); + chprintf((BaseSequentialStream *) &SD1, "period=%d, width=%d\r\n", last_period, last_width); + + pwmEnableChannel(&PWMD1, 1, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); // 75% + chThdSleepMilliseconds(5000); + chprintf((BaseSequentialStream *) &SD1, "period=%d, width=%d\r\n", last_period, last_width); + + pwmChangePeriod(&PWMD1, 5000); + chThdSleepMilliseconds(5000); + + pwmDisableChannel(&PWMD1, 1); + pwmStop(&PWMD1); + icuStopCapture(&ICUD1); + icuStop(&ICUD1); + + while (true) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/NRF52/NRF52832/PWM-ICU/mcuconf.h b/testhal/NRF52/NRF52832/PWM-ICU/mcuconf.h new file mode 100644 index 0000000..e2fbdb8 --- /dev/null +++ b/testhal/NRF52/NRF52832/PWM-ICU/mcuconf.h @@ -0,0 +1,33 @@ +/* + Copyright (C) 2015 Fabio Utzig + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * HAL driver system settings. + */ +#define NRF5_SERIAL_USE_UART0 TRUE +#define NRF5_ST_USE_RTC0 TRUE +#define NRF5_ST_USE_RTC1 FALSE +#define NRF5_ST_USE_TIMER0 FALSE +#define NRF5_PWM_USE_PWM0 TRUE +#define NRF5_PWM_PWM0_PRIORITY 6 +#define NRF5_ICU_USE_TIMER0 TRUE +#define NRF5_ICU_GPIOTE_IRQ_PRIORITY 4 +#define NRF5_ICU_TIMER0_IRQ_PRIORITY 4 + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/Makefile b/testhal/NRF52/NRF52832/RADIO-ESB/Makefile new file mode 100644 index 0000000..481f911 --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/Makefile @@ -0,0 +1,212 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF52832/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF52-E73-2G4M04S/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +#include $(CHIBIOS)/test/rt/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/NRF52832.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ + $(CHIBIOS)/os/hal/lib/streams/chprintf.c \ + nrf52_radio.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(CHIBIOS)/os/hal/lib/streams \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/chconf.h b/testhal/NRF52/NRF52832/RADIO-ESB/chconf.h new file mode 100644 index 0000000..1750f63 --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/chconf.h @@ -0,0 +1,696 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/halconf.h b/testhal/NRF52/NRF52832/RADIO-ESB/halconf.h new file mode 100644 index 0000000..d7d0f43 --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/halconf.h @@ -0,0 +1,327 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/halconf_community.h b/testhal/NRF52/NRF52832/RADIO-ESB/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/main.c b/testhal/NRF52/NRF52832/RADIO-ESB/main.c new file mode 100644 index 0000000..8971fef --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/main.c @@ -0,0 +1,122 @@ +#include +#include +#include + +#include "ch.h" +#include "hal.h" +#include "chprintf.h" + +#include "nrf52_radio.h" + +static SerialConfig serial_config = { + .speed = 38400, + .tx_pad = UART_TX, + .rx_pad = UART_RX, +#if NRF5_SERIAL_USE_HWFLOWCTRL == TRUE + .rts_pad = UART_RTS, + .cts_pad = UART_CTS, +#endif +}; + +static THD_WORKING_AREA(waLEDThread, 64); +static THD_FUNCTION(LEDThread, arg) { + (void)arg; + + chRegSetThreadName("blinker"); + palSetPadMode(IOPORT1, LED1, PAL_MODE_OUTPUT_PUSHPULL); + + while (1) { + palTogglePad(IOPORT1, LED1); + chThdSleepMilliseconds(500); + } +} + +static nrf52_config_t radiocfg = { + .protocol = NRF52_PROTOCOL_ESB_DPL, + .mode = NRF52_MODE_PRX, + .bitrate = NRF52_BITRATE_1MBPS, + .crc = NRF52_CRC_8BIT, + .tx_power = NRF52_TX_POWER_0DBM, + .tx_mode = NRF52_TXMODE_MANUAL_START, + .selective_auto_ack = false, + .retransmit = { 1000, 3 }, + .payload_length = 0, + .address = { + .base_addr_p0 = { 0xF3, 0xF3, 0xF3, 0x01 }, + .base_addr_p1 = { 0x3F, 0x3F, 0x3F, 0x01 }, + .pipe_prefixes = { 0xF3, 0x3F, }, + .num_pipes = 2, + .addr_length = 5, + .rx_pipes = 1 << 0, + .rf_channel = 1, + }, +}; + +static uint16_t cnt, fail_pkt, good_pkt; +static nrf52_payload_t tx_payload = { + .pipe = 1, +}; +static nrf52_payload_t rx_payload; + +static THD_WORKING_AREA(waRadioThread, 256); +static THD_FUNCTION(RadioThread, arg) { + (void)arg; + + event_listener_t el; + chEvtRegisterMask(&RFD1.eventsrc, &el, EVENT_MASK(0)); + + chRegSetThreadName("radio"); + + while (1) { + chEvtWaitAny(EVENT_MASK(0)); + eventflags_t flags = chEvtGetAndClearFlags(&el); + if (flags & NRF52_EVENT_TX_SUCCESS) { + radio_start_rx(); + good_pkt++; + } + if (flags & NRF52_EVENT_TX_FAILED) { + radio_start_rx(); + fail_pkt++; + } + if (flags & NRF52_EVENT_RX_RECEIVED) { + memset(rx_payload.data, 0, 32); + radio_read_rx_payload(&rx_payload); + } + } +} + +/**@brief Function for application main entry. + */ +int main(void) { + + halInit(); + chSysInit(); + + sdStart(&SD1, &serial_config); + + chThdCreateStatic(waLEDThread, sizeof(waLEDThread), NORMALPRIO, LEDThread, NULL); + chThdCreateStatic(waRadioThread, sizeof(waRadioThread), NORMALPRIO, RadioThread, NULL); + + radio_init(&radiocfg); + radio_flush_tx(); + radio_flush_rx(); + radio_start_rx(); + + cnt = good_pkt = fail_pkt = 0; + + while (true) { + memset(tx_payload.data, 0, 32); + sprintf((char*)tx_payload.data, "counter value=%d" , cnt++); + tx_payload.length = strlen((char *)tx_payload.data); + radio_stop_rx(); + radio_write_payload(&tx_payload); + radio_start_tx(); + chprintf((BaseSequentialStream *)&SD1, "packets: good=%d, fail=%d, sent=%s\r\n", good_pkt, fail_pkt, tx_payload.data); + chThdSleepMilliseconds(500); + if (strlen((char*) rx_payload.data)) { + chprintf((BaseSequentialStream *)&SD1, "rssi=%d, received=%s\r\n", rx_payload.rssi, rx_payload.data); + rx_payload.data[0] = 0; + } + } +} + diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/mcuconf.h b/testhal/NRF52/NRF52832/RADIO-ESB/mcuconf.h new file mode 100644 index 0000000..1ba934e --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/mcuconf.h @@ -0,0 +1,28 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * HAL driver system settings. + */ +#define NRF5_SERIAL_USE_UART0 TRUE +#define NRF5_ST_USE_RTC0 TRUE +#define NRF5_ST_USE_RTC1 FALSE +#define NRF5_ST_USE_TIMER0 FALSE + +#endif /* _MCUCONF_H_ */ diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.c b/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.c new file mode 100644 index 0000000..e55870f --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.c @@ -0,0 +1,1111 @@ +/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved. + * + * The information contained herein is property of Nordic Semiconductor ASA. + * Terms and conditions of usage are described in detail in NORDIC + * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. + * + * Licensees are granted free, non-transferable use of the information. NO + * WARRANTY of ANY KIND is provided. This heading must NOT be removed from + * the file. + * + * Enhanced ShockBurst proprietary protocol to ChibiOS port + * + * ported on: 25/10/2018, by andru + * + */ + +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "nrf52_radio.h" + + +#define BIT_MASK_UINT_8(x) (0xFF >> (8 - (x))) +#define NRF52_PIPE_COUNT 9 + +#define RADIO_SHORTS_COMMON ( RADIO_SHORTS_READY_START_Msk | RADIO_SHORTS_END_DISABLE_Msk | \ + RADIO_SHORTS_ADDRESS_RSSISTART_Msk | RADIO_SHORTS_DISABLED_RSSISTOP_Msk ) + +// Constant parameters +#define RX_WAIT_FOR_ACK_TIMEOUT_US_2MBPS (48) /**< 2MBit RX wait for ack timeout value. Smallest reliable value - 43 */ +#define RX_WAIT_FOR_ACK_TIMEOUT_US_1MBPS (64) /**< 1MBit RX wait for ack timeout value. Smallest reliable value - 59 */ + +#define NRF52_ADDR_UPDATE_MASK_BASE0 (1 << 0) /*< Mask value to signal updating BASE0 radio address. */ +#define NRF52_ADDR_UPDATE_MASK_BASE1 (1 << 1) /*< Mask value to signal updating BASE1 radio address. */ +#define NRF52_ADDR_UPDATE_MASK_PREFIX (1 << 2) /*< Mask value to signal updating radio prefixes */ + +#define NRF52_PID_RESET_VALUE 0xFF /**< Invalid PID value which is guaranteed to not collide with any valid PID value. */ +#define NRF52_PID_MAX 3 /**< Maximum value for PID. */ +#define NRF52_CRC_RESET_VALUE 0xFFFF /**< CRC reset value*/ + +#ifndef NRF52_RADIO_USE_TIMER0 +#define NRF52_RADIO_USE_TIMER0 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER1 +#define NRF52_RADIO_USE_TIMER1 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER2 +#define NRF52_RADIO_USE_TIMER2 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER3 +#define NRF52_RADIO_USE_TIMER3 FALSE +#endif + +#ifndef NRF52_RADIO_USE_TIMER4 +#define NRF52_RADIO_USE_TIMER4 FALSE +#endif + +#ifndef NRF52_RADIO_IRQ_PRIORITY +#define NRF52_RADIO_IRQ_PRIORITY 3 /**< RADIO interrupt priority. */ +#endif + +#ifndef NRF52_RADIO_PPI_TIMER_START +#error "PPI channel NRF52_RADIO_PPI_TIMER_START need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_TIMER_STOP +#error "PPI channel NRF52_RADIO_PPI_TIMER_STOP need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_RX_TIMEOUT +#error "PPI channel NRF52_RADIO_PPI_RX_TIMEOUT need to be defined" +#endif + +#ifndef NRF52_RADIO_PPI_TX_START +#error "PPI channel NRF52_RADIO_PPI_TX_START need to be defined" +#endif + +#if (NRF52_RADIO_USE_TIMER0 == FALSE) && (NRF52_RADIO_USE_TIMER1 == FALSE) && \ + (NRF52_RADIO_USE_TIMER2 == FALSE) && (NRF52_RADIO_USE_TIMER3 == FALSE) && \ + (NRF52_RADIO_USE_TIMER4 == FALSE) +#error "At least one hardware TIMER must be defined" +#endif + +#ifndef NRF52_RADIO_INTTHD_PRIORITY +#error "Interrupt handle thread priority need to be defined" +#endif + +#ifndef NRF52_RADIO_EVTTHD_PRIORITY +#error "Event thread priority need to be defined" +#endif + +#define VERIFY_PAYLOAD_LENGTH(p) \ +do \ +{ \ + if(p->length == 0 || \ + p->length > NRF52_MAX_PAYLOAD_LENGTH || \ + (RFD1.config.protocol == NRF52_PROTOCOL_ESB && \ + p->length > RFD1.config.payload_length)) \ + { \ + return NRF52_ERROR_INVALID_LENGTH; \ + } \ +}while(0) + +//Structure holding pipe info PID and CRC and ack payload. +typedef struct +{ + uint16_t m_crc; + uint8_t m_pid; + uint8_t m_ack_payload; +} pipe_info_t; + +// First in first out queue of payloads to be transmitted. +typedef struct +{ + nrf52_payload_t * p_payload[NRF52_TX_FIFO_SIZE]; /**< Pointer to the actual queue. */ + uint32_t entry_point; /**< Current start of queue. */ + uint32_t exit_point; /**< Current end of queue. */ + uint32_t count; /**< Current number of elements in the queue. */ +} nrf52_payload_tx_fifo_t; + +// First in first out queue of received payloads. +typedef struct +{ + nrf52_payload_t * p_payload[NRF52_RX_FIFO_SIZE]; /**< Pointer to the actual queue. */ + uint32_t entry_point; /**< Current start of queue. */ + uint32_t exit_point; /**< Current end of queue. */ + uint32_t count; /**< Current number of elements in the queue. */ +} nrf52_payload_rx_fifo_t; + +// These function pointers are changed dynamically, depending on protocol configuration and state. +//static void (*on_radio_end)(RFDriver *rfp) = NULL; +static void (*set_rf_payload_format)(RFDriver *rfp, uint32_t payload_length) = NULL; + +// The following functions are assigned to the function pointers above. +static void on_radio_disabled_tx_noack(RFDriver *rfp); +static void on_radio_disabled_tx(RFDriver *rfp); +static void on_radio_disabled_tx_wait_for_ack(RFDriver *rfp); +static void on_radio_disabled_rx(RFDriver *rfp); +static void on_radio_disabled_rx_ack(RFDriver *rfp); + +static volatile uint16_t wait_for_ack_timeout_us; +static nrf52_payload_t * p_current_payload; + +// TX FIFO +static nrf52_payload_t tx_fifo_payload[NRF52_TX_FIFO_SIZE]; +static nrf52_payload_tx_fifo_t tx_fifo; + +// RX FIFO +static nrf52_payload_t rx_fifo_payload[NRF52_RX_FIFO_SIZE]; +static nrf52_payload_rx_fifo_t rx_fifo; + +// Payload buffers +static uint8_t tx_payload_buffer[NRF52_MAX_PAYLOAD_LENGTH + 2]; +static uint8_t rx_payload_buffer[NRF52_MAX_PAYLOAD_LENGTH + 2]; + +static uint8_t pids[NRF52_PIPE_COUNT]; +static pipe_info_t rx_pipe_info[NRF52_PIPE_COUNT]; + + // disable and events semaphores. +static binary_semaphore_t disable_sem; +static binary_semaphore_t events_sem; + +RFDriver RFD1; + +// Function to do bytewise bit-swap on a unsigned 32 bit value +static uint32_t bytewise_bit_swap(uint8_t const * p_inp) { + uint32_t inp = (*(uint32_t*)p_inp); + + return __REV((uint32_t)__RBIT(inp)); //lint -esym(628, __rev) -esym(526, __rev) -esym(628, __rbit) -esym(526, __rbit) */ +} + +// Internal function to convert base addresses from nRF24L type addressing to nRF52 type addressing +static uint32_t addr_conv(uint8_t const* p_addr) { + return __REV(bytewise_bit_swap(p_addr)); //lint -esym(628, __rev) -esym(526, __rev) */ +} + +static thread_t *rfEvtThread_p; +static THD_WORKING_AREA(waRFEvtThread, 64); +static THD_FUNCTION(rfEvtThread, arg) { + (void)arg; + + chRegSetThreadName("rfevent"); + + while (!chThdShouldTerminateX()) { + chBSemWait(&events_sem); + + nrf52_int_flags_t interrupts = RFD1.flags; + RFD1.flags = 0; + + if (interrupts & NRF52_INT_TX_SUCCESS_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_TX_SUCCESS); + } + if (interrupts & NRF52_INT_TX_FAILED_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_TX_FAILED); + } + if (interrupts & NRF52_INT_RX_DR_MSK) { + chEvtBroadcastFlags(&RFD1.eventsrc, (eventflags_t) NRF52_EVENT_RX_RECEIVED); + } + } + chThdExit((msg_t) 0); +} + +static thread_t *rfIntThread_p; +static THD_WORKING_AREA(waRFIntThread, 64); +static THD_FUNCTION(rfIntThread, arg) { + (void)arg; + + chRegSetThreadName("rfint"); + + while (!chThdShouldTerminateX()) { + chBSemWait(&disable_sem); + switch (RFD1.state) { + case NRF52_STATE_PTX_TX: + on_radio_disabled_tx_noack(&RFD1); + break; + case NRF52_STATE_PTX_TX_ACK: + on_radio_disabled_tx(&RFD1); + break; + case NRF52_STATE_PTX_RX_ACK: + on_radio_disabled_tx_wait_for_ack(&RFD1); + break; + case NRF52_STATE_PRX: + on_radio_disabled_rx(&RFD1); + break; + case NRF52_STATE_PRX_SEND_ACK: + on_radio_disabled_rx_ack(&RFD1); + break; + default: + break; + } + } + chThdExit((msg_t) 0); +} + +static void serve_radio_interrupt(RFDriver *rfp) { + (void) rfp; + if ((NRF_RADIO->INTENSET & RADIO_INTENSET_READY_Msk) && NRF_RADIO->EVENTS_READY) { + NRF_RADIO->EVENTS_READY = 0; + (void) NRF_RADIO->EVENTS_READY; + } + if ((NRF_RADIO->INTENSET & RADIO_INTENSET_DISABLED_Msk) && NRF_RADIO->EVENTS_DISABLED) { + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + chSysLockFromISR(); + chBSemSignalI(&disable_sem); + chSysUnlockFromISR(); + } +} + +/** + * @brief RADIO events interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector44) { + + OSAL_IRQ_PROLOGUE(); + + serve_radio_interrupt(&RFD1); + + OSAL_IRQ_EPILOGUE(); +} + +static void set_rf_payload_format_esb_dpl(RFDriver *rfp, uint32_t payload_length) { + (void)payload_length; +#if (NRF52_MAX_PAYLOAD_LENGTH <= 32) + // Using 6 bits for length + NRF_RADIO->PCNF0 = (0 << RADIO_PCNF0_S0LEN_Pos) | + (6 << RADIO_PCNF0_LFLEN_Pos) | + (3 << RADIO_PCNF0_S1LEN_Pos) ; +#else + // Using 8 bits for length + NRF_RADIO->PCNF0 = (0 << RADIO_PCNF0_S0LEN_Pos) | + (8 << RADIO_PCNF0_LFLEN_Pos) | + (3 << RADIO_PCNF0_S1LEN_Pos) ; +#endif + NRF_RADIO->PCNF1 = (RADIO_PCNF1_WHITEEN_Disabled << RADIO_PCNF1_WHITEEN_Pos) | + (RADIO_PCNF1_ENDIAN_Big << RADIO_PCNF1_ENDIAN_Pos) | + ((rfp->config.address.addr_length - 1) << RADIO_PCNF1_BALEN_Pos) | + (0 << RADIO_PCNF1_STATLEN_Pos) | + (NRF52_MAX_PAYLOAD_LENGTH << RADIO_PCNF1_MAXLEN_Pos); +} + +static void set_rf_payload_format_esb(RFDriver *rfp, uint32_t payload_length) { + NRF_RADIO->PCNF0 = (1 << RADIO_PCNF0_S0LEN_Pos) | + (0 << RADIO_PCNF0_LFLEN_Pos) | + (1 << RADIO_PCNF0_S1LEN_Pos); + + NRF_RADIO->PCNF1 = (RADIO_PCNF1_WHITEEN_Disabled << RADIO_PCNF1_WHITEEN_Pos) | + (RADIO_PCNF1_ENDIAN_Big << RADIO_PCNF1_ENDIAN_Pos) | + ((rfp->config.address.addr_length - 1) << RADIO_PCNF1_BALEN_Pos) | + (payload_length << RADIO_PCNF1_STATLEN_Pos) | + (payload_length << RADIO_PCNF1_MAXLEN_Pos); +} + +/* Set BASE0 and BASE1 addresses & prefixes registers + * NRF52 { prefixes[0], base0_addr[0], base0_addr[1], base0_addr[2], base0_addr[3] } == + * NRF24 { addr[0], addr[1], addr[2], addr[3], addr[4] } + */ +static void set_addresses(RFDriver *rfp, uint8_t update_mask) { + if (update_mask & NRF52_ADDR_UPDATE_MASK_BASE0) { + NRF_RADIO->BASE0 = addr_conv(rfp->config.address.base_addr_p0); + NRF_RADIO->DAB[0] = addr_conv(rfp->config.address.base_addr_p0); + } + + if (update_mask & NRF52_ADDR_UPDATE_MASK_BASE1) { + NRF_RADIO->BASE1 = addr_conv(rfp->config.address.base_addr_p1); + NRF_RADIO->DAB[1] = addr_conv(rfp->config.address.base_addr_p1); + } + + if (update_mask & NRF52_ADDR_UPDATE_MASK_PREFIX) { + NRF_RADIO->PREFIX0 = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[0]); + NRF_RADIO->DAP[0] = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[0]); + NRF_RADIO->PREFIX1 = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[4]); + NRF_RADIO->DAP[1] = bytewise_bit_swap(&rfp->config.address.pipe_prefixes[4]); + } +} + +static void set_tx_power(RFDriver *rfp) { + NRF_RADIO->TXPOWER = rfp->config.tx_power << RADIO_TXPOWER_TXPOWER_Pos; +} + +static void set_bitrate(RFDriver *rfp) { + NRF_RADIO->MODE = rfp->config.bitrate << RADIO_MODE_MODE_Pos; + + switch (rfp->config.bitrate) { + case NRF52_BITRATE_2MBPS: + wait_for_ack_timeout_us = RX_WAIT_FOR_ACK_TIMEOUT_US_2MBPS; + break; + case NRF52_BITRATE_1MBPS: + wait_for_ack_timeout_us = RX_WAIT_FOR_ACK_TIMEOUT_US_1MBPS; + break; + } +} + +static void set_protocol(RFDriver *rfp) { + switch (rfp->config.protocol) { + case NRF52_PROTOCOL_ESB_DPL: + set_rf_payload_format = set_rf_payload_format_esb_dpl; + break; + case NRF52_PROTOCOL_ESB: + set_rf_payload_format = set_rf_payload_format_esb; + break; + } +} + +static void set_crc(RFDriver *rfp) { + NRF_RADIO->CRCCNF = rfp->config.crc << RADIO_CRCCNF_LEN_Pos; + + if (rfp->config.crc == RADIO_CRCCNF_LEN_Two) + { + NRF_RADIO->CRCINIT = 0xFFFFUL; // Initial value + NRF_RADIO->CRCPOLY = 0x11021UL; // CRC poly: x^16+x^12^x^5+1 + } + else if (rfp->config.crc == RADIO_CRCCNF_LEN_One) + { + NRF_RADIO->CRCINIT = 0xFFUL; // Initial value + NRF_RADIO->CRCPOLY = 0x107UL; // CRC poly: x^8+x^2^x^1+1 + } +} + +static void ppi_init(RFDriver *rfp) { + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_START].EEP = (uint32_t)&NRF_RADIO->EVENTS_READY; + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_START].TEP = (uint32_t)&rfp->timer->TASKS_START; + + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_STOP].EEP = (uint32_t)&NRF_RADIO->EVENTS_ADDRESS; + NRF_PPI->CH[NRF52_RADIO_PPI_TIMER_STOP].TEP = (uint32_t)&rfp->timer->TASKS_STOP; + + NRF_PPI->CH[NRF52_RADIO_PPI_RX_TIMEOUT].EEP = (uint32_t)&rfp->timer->EVENTS_COMPARE[0]; + NRF_PPI->CH[NRF52_RADIO_PPI_RX_TIMEOUT].TEP = (uint32_t)&NRF_RADIO->TASKS_DISABLE; + + NRF_PPI->CH[NRF52_RADIO_PPI_TX_START].EEP = (uint32_t)&rfp->timer->EVENTS_COMPARE[1]; + NRF_PPI->CH[NRF52_RADIO_PPI_TX_START].TEP = (uint32_t)&NRF_RADIO->TASKS_TXEN; +} + +static void set_parameters(RFDriver *rfp) { + set_tx_power(rfp); + set_bitrate(rfp); + set_protocol(rfp); + set_crc(rfp); + set_rf_payload_format(rfp, rfp->config.payload_length); +} + +static void reset_fifo(void) { + tx_fifo.entry_point = 0; + tx_fifo.exit_point = 0; + tx_fifo.count = 0; + + rx_fifo.entry_point = 0; + rx_fifo.exit_point = 0; + rx_fifo.count = 0; +} + +static void init_fifo(void) { + uint8_t i; + reset_fifo(); + + for (i = 0; i < NRF52_TX_FIFO_SIZE; i++) { + tx_fifo.p_payload[i] = &tx_fifo_payload[i]; + } + + for (i = 0; i < NRF52_RX_FIFO_SIZE; i++) { + rx_fifo.p_payload[i] = &rx_fifo_payload[i]; + } +} + +static void tx_fifo_remove_last(void) { + if (tx_fifo.count > 0) { + nvicDisableVector(RADIO_IRQn); + + tx_fifo.count--; + if (++tx_fifo.exit_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.exit_point = 0; + } + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + } +} + +/** @brief Function to push the content of the rx_buffer to the RX FIFO. + * + * The module will point the register NRF_RADIO->PACKETPTR to a buffer for receiving packets. + * After receiving a packet the module will call this function to copy the received data to + * the RX FIFO. + * + * @param pipe Pipe number to set for the packet. + * @param pid Packet ID. + * + * @retval true Operation successful. + * @retval false Operation failed. + */ +static bool rx_fifo_push_rfbuf(RFDriver *rfp, uint8_t pipe, uint8_t pid) { + if (rx_fifo.count < NRF52_RX_FIFO_SIZE) { + if (rfp->config.protocol == NRF52_PROTOCOL_ESB_DPL) { + if (rx_payload_buffer[0] > NRF52_MAX_PAYLOAD_LENGTH) { + return false; + } + + rx_fifo.p_payload[rx_fifo.entry_point]->length = rx_payload_buffer[0]; + } + else if (rfp->state == NRF52_STATE_PTX_RX_ACK) { + // Received packet is an acknowledgment + rx_fifo.p_payload[rx_fifo.entry_point]->length = 0; + } + else { + rx_fifo.p_payload[rx_fifo.entry_point]->length = rfp->config.payload_length; + } + + memcpy(rx_fifo.p_payload[rx_fifo.entry_point]->data, &rx_payload_buffer[2], + rx_fifo.p_payload[rx_fifo.entry_point]->length); + + rx_fifo.p_payload[rx_fifo.entry_point]->pipe = pipe; + rx_fifo.p_payload[rx_fifo.entry_point]->rssi = NRF_RADIO->RSSISAMPLE; + rx_fifo.p_payload[rx_fifo.entry_point]->pid = pid; + if (++rx_fifo.entry_point >= NRF52_RX_FIFO_SIZE) { + rx_fifo.entry_point = 0; + } + rx_fifo.count++; + + return true; + } + + return false; +} + +static void timer_init(RFDriver *rfp) { + // Configure the system timer with a 1 MHz base frequency + rfp->timer->PRESCALER = 4; + rfp->timer->BITMODE = TIMER_BITMODE_BITMODE_16Bit; + rfp->timer->SHORTS = TIMER_SHORTS_COMPARE1_CLEAR_Msk | TIMER_SHORTS_COMPARE1_STOP_Msk; +} + +static void start_tx_transaction(RFDriver *rfp) { + bool ack; + + rfp->tx_attempt = 1; + rfp->tx_remaining = rfp->config.retransmit.count; + + // Prepare the payload + p_current_payload = tx_fifo.p_payload[tx_fifo.exit_point]; + + // Handling ack if noack is set to false or if selctive auto ack is turned turned off + ack = !p_current_payload->noack || !rfp->config.selective_auto_ack; + + switch (rfp->config.protocol) { + case NRF52_PROTOCOL_ESB: + set_rf_payload_format(rfp, p_current_payload->length); + tx_payload_buffer[0] = p_current_payload->pid; + tx_payload_buffer[1] = 0; + memcpy(&tx_payload_buffer[2], p_current_payload->data, p_current_payload->length); + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk | RADIO_INTENSET_READY_Msk; + + // Configure the retransmit counter + rfp->tx_remaining = rfp->config.retransmit.count; + rfp->state = NRF52_STATE_PTX_TX_ACK; + break; + + case NRF52_PROTOCOL_ESB_DPL: + tx_payload_buffer[0] = p_current_payload->length; + tx_payload_buffer[1] = p_current_payload->pid << 1; + tx_payload_buffer[1] |= ack ? 0x00 : 0x01; + memcpy(&tx_payload_buffer[2], p_current_payload->data, p_current_payload->length); + + if (ack) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk | RADIO_INTENSET_READY_Msk; + + // Configure the retransmit counter + rfp->tx_remaining = rfp->config.retransmit.count; + rfp->state = NRF52_STATE_PTX_TX_ACK; + } + else { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + rfp->state = NRF52_STATE_PTX_TX; + } + break; + } + + NRF_RADIO->TXADDRESS = p_current_payload->pipe; + NRF_RADIO->RXADDRESSES = 1 << p_current_payload->pipe; + + NRF_RADIO->FREQUENCY = rfp->config.address.rf_channel; + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + + NRF_RADIO->EVENTS_READY = 0; + NRF_RADIO->EVENTS_DISABLED = 0; + (void)NRF_RADIO->EVENTS_READY; + (void)NRF_RADIO->EVENTS_DISABLED; + + nvicClearPending(RADIO_IRQn); + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + NRF_RADIO->TASKS_TXEN = 1; +} + +static void on_radio_disabled_tx_noack(RFDriver *rfp) { + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + tx_fifo_remove_last(); + + chBSemSignal(&events_sem); + + if (tx_fifo.count == 0) { + rfp->state = NRF52_STATE_IDLE; + } + else { + start_tx_transaction(rfp); + } +} + +static void on_radio_disabled_tx(RFDriver *rfp) { + // Remove the DISABLED -> RXEN shortcut, to make sure the radio stays + // disabled after the RX window + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + + // Make sure the timer is started the next time the radio is ready, + // and that it will disable the radio automatically if no packet is + // received by the time defined in m_wait_for_ack_timeout_us + rfp->timer->CC[0] = wait_for_ack_timeout_us + 130; + rfp->timer->CC[1] = rfp->config.retransmit.delay - 130; + rfp->timer->TASKS_CLEAR = 1; + rfp->timer->EVENTS_COMPARE[0] = 0; + rfp->timer->EVENTS_COMPARE[1] = 0; + (void)rfp->timer->EVENTS_COMPARE[0]; + (void)rfp->timer->EVENTS_COMPARE[1]; + + NRF_PPI->CHENSET = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT) | + (1 << NRF52_RADIO_PPI_TIMER_STOP); + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + + NRF_RADIO->EVENTS_END = 0; + (void)NRF_RADIO->EVENTS_END; + + if (rfp->config.protocol == NRF52_PROTOCOL_ESB) { + set_rf_payload_format(rfp, 0); + } + + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + rfp->state = NRF52_STATE_PTX_RX_ACK; +} + +static void on_radio_disabled_tx_wait_for_ack(RFDriver *rfp) { + // This marks the completion of a TX_RX sequence (TX with ACK) + + // Make sure the timer will not deactivate the radio if a packet is received + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT) | + (1 << NRF52_RADIO_PPI_TIMER_STOP); + + // If the radio has received a packet and the CRC status is OK + if (NRF_RADIO->EVENTS_END && NRF_RADIO->CRCSTATUS != 0) { + rfp->timer->TASKS_STOP = 1; + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + rfp->tx_attempt++;// = rfp->config.retransmit.count - rfp->tx_remaining + 1; + + tx_fifo_remove_last(); + + if (rfp->config.protocol != NRF52_PROTOCOL_ESB && rx_payload_buffer[0] > 0) { + if (rx_fifo_push_rfbuf(rfp, (uint8_t)NRF_RADIO->TXADDRESS, 0)) { + rfp->flags |= NRF52_INT_RX_DR_MSK; + } + } + + chBSemSignal(&events_sem); + + if ((tx_fifo.count == 0) || (rfp->config.tx_mode == NRF52_TXMODE_MANUAL)) { + rfp->state = NRF52_STATE_IDLE; + } + else { + start_tx_transaction(rfp); + } + } + else { + if (rfp->tx_remaining-- == 0) { + rfp->timer->TASKS_STOP = 1; + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TX_START); + // All retransmits are expended, and the TX operation is suspended + rfp->tx_attempt = rfp->config.retransmit.count + 1; + rfp->flags |= NRF52_INT_TX_FAILED_MSK; + + chBSemSignal(&events_sem); + + rfp->state = NRF52_STATE_IDLE; + } + else { + // There are still have more retransmits left, TX mode should be + // entered again as soon as the system timer reaches CC[1]. + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + set_rf_payload_format(rfp, p_current_payload->length); + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + rfp->state = NRF52_STATE_PTX_TX_ACK; + rfp->timer->TASKS_START = 1; + NRF_PPI->CHENSET = (1 << NRF52_RADIO_PPI_TX_START); + if (rfp->timer->EVENTS_COMPARE[1]) + NRF_RADIO->TASKS_TXEN = 1; + } + } +} + +static void clear_events_restart_rx(RFDriver *rfp) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON; + set_rf_payload_format(rfp, rfp->config.payload_length); + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + NRF_RADIO->INTENCLR = RADIO_INTENCLR_DISABLED_Msk; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->TASKS_DISABLE = 1; + while (NRF_RADIO->EVENTS_DISABLED == 0); + + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + NRF_RADIO->TASKS_RXEN = 1; +} + +static void on_radio_disabled_rx(RFDriver *rfp) { + bool ack = false; + bool retransmit_payload = false; + bool send_rx_event = true; + pipe_info_t * p_pipe_info; + + if (NRF_RADIO->CRCSTATUS == 0) { + clear_events_restart_rx(rfp); + return; + } + + if(rx_fifo.count >= NRF52_RX_FIFO_SIZE) { + clear_events_restart_rx(rfp); + return; + } + + p_pipe_info = &rx_pipe_info[NRF_RADIO->RXMATCH]; + if (NRF_RADIO->RXCRC == p_pipe_info->m_crc && + (rx_payload_buffer[1] >> 1) == p_pipe_info->m_pid ) { + retransmit_payload = true; + send_rx_event = false; + } + + p_pipe_info->m_pid = rx_payload_buffer[1] >> 1; + p_pipe_info->m_crc = NRF_RADIO->RXCRC; + + if(rfp->config.selective_auto_ack == false || ((rx_payload_buffer[1] & 0x01) == 0)) + ack = true; + + if(ack) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_RXEN_Msk; + + switch(rfp->config.protocol) { + case NRF52_PROTOCOL_ESB_DPL: + { + if (tx_fifo.count > 0 && + (tx_fifo.p_payload[tx_fifo.exit_point]->pipe == NRF_RADIO->RXMATCH)) + { + // Pipe stays in ACK with payload until TX fifo is empty + // Do not report TX success on first ack payload or retransmit + if (p_pipe_info->m_ack_payload != 0 && !retransmit_payload) { + if(++tx_fifo.exit_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.exit_point = 0; + } + + tx_fifo.count--; + + // ACK payloads also require TX_DS + // (page 40 of the 'nRF24LE1_Product_Specification_rev1_6.pdf'). + rfp->flags |= NRF52_INT_TX_SUCCESS_MSK; + } + + p_pipe_info->m_ack_payload = 1; + + p_current_payload = tx_fifo.p_payload[tx_fifo.exit_point]; + + set_rf_payload_format(rfp, p_current_payload->length); + tx_payload_buffer[0] = p_current_payload->length; + memcpy(&tx_payload_buffer[2], + p_current_payload->data, + p_current_payload->length); + } + else { + p_pipe_info->m_ack_payload = 0; + set_rf_payload_format(rfp, 0); + tx_payload_buffer[0] = 0; + } + + tx_payload_buffer[1] = rx_payload_buffer[1]; + } + break; + + case NRF52_PROTOCOL_ESB: + { + set_rf_payload_format(rfp, 0); + tx_payload_buffer[0] = rx_payload_buffer[0]; + tx_payload_buffer[1] = 0; + } + break; + } + + rfp->state = NRF52_STATE_PRX_SEND_ACK; + NRF_RADIO->TXADDRESS = NRF_RADIO->RXMATCH; + NRF_RADIO->PACKETPTR = (uint32_t)tx_payload_buffer; + } + else { + clear_events_restart_rx(rfp); + } + + if (send_rx_event) { + // Push the new packet to the RX buffer and trigger a received event if the operation was + // successful. + if (rx_fifo_push_rfbuf(rfp, NRF_RADIO->RXMATCH, p_pipe_info->m_pid)) { + rfp->flags |= NRF52_INT_RX_DR_MSK; + chBSemSignal(&events_sem); + } + } +} + +static void on_radio_disabled_rx_ack(RFDriver *rfp) { + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + set_rf_payload_format(rfp, rfp->config.payload_length); + + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + rfp->state = NRF52_STATE_PRX; +} + +nrf52_error_t radio_disable(void) { + RFD1.state = NRF52_STATE_IDLE; + + // Clear PPI + NRF_PPI->CHENCLR = (1 << NRF52_RADIO_PPI_TIMER_START) | + (1 << NRF52_RADIO_PPI_TIMER_STOP) | + (1 << NRF52_RADIO_PPI_RX_TIMEOUT); + + reset_fifo(); + + memset(rx_pipe_info, 0, sizeof(rx_pipe_info)); + memset(pids, 0, sizeof(pids)); + + // Disable the radio + NRF_RADIO->SHORTS = RADIO_SHORTS_READY_START_Enabled << RADIO_SHORTS_READY_START_Pos | + RADIO_SHORTS_END_DISABLE_Enabled << RADIO_SHORTS_END_DISABLE_Pos; + + nvicDisableVector(RADIO_IRQn); + + // Terminate interrupts handle thread + chThdTerminate(rfIntThread_p); + chBSemSignal(&disable_sem); + chThdWait(rfIntThread_p); + + // Terminate events handle thread + chThdTerminate(rfEvtThread_p); + RFD1.flags = 0; + chBSemSignal(&events_sem); + chThdWait(rfEvtThread_p); + + RFD1.state = NRF52_STATE_UNINIT; + + return NRF52_SUCCESS; +} + +// +nrf52_error_t radio_init(nrf52_config_t const *config) { + osalDbgAssert(config != NULL, + "config must be defined"); + osalDbgAssert(&config->address != NULL, + "address must be defined"); + osalDbgAssert(NRF52_RADIO_IRQ_PRIORITY <= 7, + "wrong radio irq priority"); + + if (RFD1.state != NRF52_STATE_UNINIT) { + nrf52_error_t err = radio_disable(); + if (err != NRF52_SUCCESS) + return err; + } + + RFD1.radio = NRF_RADIO; + RFD1.config = *config; + RFD1.flags = 0; + + init_fifo(); + +#if NRF52_RADIO_USE_TIMER0 + RFD1.timer = NRF_TIMER0; +#endif +#if NRF52_RADIO_USE_TIMER1 + RFD1.timer = NRF_TIMER1; +#endif +#if NRF52_RADIO_USE_TIMER2 + RFD1.timer = NRF_TIMER2; +#endif +#if NRF52_RADIO_USE_TIMER3 + RFD1.timer = NRF_TIMER3; +#endif +#if NRF52_RADIO_USE_TIMER4 + RFD1.timer = NRF_TIMER4; +#endif + + set_parameters(&RFD1); + + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE0); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE1); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_PREFIX); + + ppi_init(&RFD1); + timer_init(&RFD1); + + chBSemObjectInit(&disable_sem, TRUE); + chBSemObjectInit(&events_sem, TRUE); + + chEvtObjectInit(&RFD1.eventsrc); + + // interrupt handle thread + rfIntThread_p = chThdCreateStatic(waRFIntThread, sizeof(waRFIntThread), + NRF52_RADIO_INTTHD_PRIORITY, rfIntThread, NULL); + + // events handle thread + rfEvtThread_p = chThdCreateStatic(waRFEvtThread, sizeof(waRFEvtThread), + NRF52_RADIO_EVTTHD_PRIORITY, rfEvtThread, NULL); + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + RFD1.state = NRF52_STATE_IDLE; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_write_payload(nrf52_payload_t const * p_payload) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if(p_payload == NULL) + return NRF52_ERROR_NULL; + VERIFY_PAYLOAD_LENGTH(p_payload); + if (tx_fifo.count >= NRF52_TX_FIFO_SIZE) + return NRF52_ERROR_INVALID_LENGTH; + + if (RFD1.config.mode == NRF52_MODE_PTX && + p_payload->noack && !RFD1.config.selective_auto_ack ) + { + return NRF52_ERROR_NOT_SUPPORTED; + } + + nvicDisableVector(RADIO_IRQn); + + memcpy(tx_fifo.p_payload[tx_fifo.entry_point], p_payload, sizeof(nrf52_payload_t)); + + pids[p_payload->pipe] = (pids[p_payload->pipe] + 1) % (NRF52_PID_MAX + 1); + tx_fifo.p_payload[tx_fifo.entry_point]->pid = pids[p_payload->pipe]; + + if (++tx_fifo.entry_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.entry_point = 0; + } + + tx_fifo.count++; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + if (RFD1.config.mode == NRF52_MODE_PTX && + RFD1.config.tx_mode == NRF52_TXMODE_AUTO && + RFD1.state == NRF52_STATE_IDLE) + { + start_tx_transaction(&RFD1); + } + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_read_rx_payload(nrf52_payload_t * p_payload) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if (p_payload == NULL) + return NRF52_ERROR_NULL; + + if (rx_fifo.count == 0) { + return NRF52_ERROR_INVALID_LENGTH; + } + + nvicDisableVector(RADIO_IRQn); + + p_payload->length = rx_fifo.p_payload[rx_fifo.exit_point]->length; + p_payload->pipe = rx_fifo.p_payload[rx_fifo.exit_point]->pipe; + p_payload->rssi = rx_fifo.p_payload[rx_fifo.exit_point]->rssi; + p_payload->pid = rx_fifo.p_payload[rx_fifo.exit_point]->pid; + memcpy(p_payload->data, rx_fifo.p_payload[rx_fifo.exit_point]->data, p_payload->length); + + if (++rx_fifo.exit_point >= NRF52_RX_FIFO_SIZE) { + rx_fifo.exit_point = 0; + } + + rx_fifo.count--; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_start_tx(void) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + + if (tx_fifo.count == 0) { + return NRF52_ERROR_INVALID_LENGTH; + } + + start_tx_transaction(&RFD1); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_start_rx(void) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + + NRF_RADIO->INTENCLR = 0xFFFFFFFF; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->SHORTS = RADIO_SHORTS_COMMON | RADIO_SHORTS_DISABLED_TXEN_Msk; + NRF_RADIO->INTENSET = RADIO_INTENSET_DISABLED_Msk; + RFD1.state = NRF52_STATE_PRX; + + NRF_RADIO->RXADDRESSES = RFD1.config.address.rx_pipes; + NRF_RADIO->FREQUENCY = RFD1.config.address.rf_channel; + NRF_RADIO->PACKETPTR = (uint32_t)rx_payload_buffer; + + nvicClearPending(RADIO_IRQn); + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + NRF_RADIO->EVENTS_ADDRESS = 0; + NRF_RADIO->EVENTS_PAYLOAD = 0; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_ADDRESS; + (void) NRF_RADIO->EVENTS_PAYLOAD; + (void) NRF_RADIO->EVENTS_DISABLED; + + NRF_RADIO->TASKS_RXEN = 1; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_stop_rx(void) { + if (RFD1.state != NRF52_STATE_PRX) { + return NRF52_INVALID_STATE; + } + + NRF_RADIO->SHORTS = 0; + NRF_RADIO->INTENCLR = 0xFFFFFFFF; + NRF_RADIO->EVENTS_DISABLED = 0; + (void) NRF_RADIO->EVENTS_DISABLED; + NRF_RADIO->TASKS_DISABLE = 1; + while (NRF_RADIO->EVENTS_DISABLED == 0); + RFD1.state = NRF52_STATE_IDLE; + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_flush_tx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + + nvicDisableVector(RADIO_IRQn); + + tx_fifo.count = 0; + tx_fifo.entry_point = 0; + tx_fifo.exit_point = 0; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_pop_tx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + if (tx_fifo.count == 0) + return NRF52_ERROR_INVALID_LENGTH; + + nvicDisableVector(RADIO_IRQn); + + if (++tx_fifo.entry_point >= NRF52_TX_FIFO_SIZE) { + tx_fifo.entry_point = 0; + } + tx_fifo.count--; + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_flush_rx(void) { + if (RFD1.state == NRF52_STATE_UNINIT) + return NRF52_INVALID_STATE; + + nvicDisableVector(RADIO_IRQn); + + rx_fifo.count = 0; + rx_fifo.entry_point = 0; + rx_fifo.exit_point = 0; + + memset(rx_pipe_info, 0, sizeof(rx_pipe_info)); + + nvicEnableVector(RADIO_IRQn, NRF52_RADIO_IRQ_PRIORITY); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_base_address_0(uint8_t const * p_addr) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_addr == NULL) + return NRF52_ERROR_NULL; + + memcpy(RFD1.config.address.base_addr_p0, p_addr, 4); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE0); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_base_address_1(uint8_t const * p_addr) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_addr == NULL) + return NRF52_ERROR_NULL; + + memcpy(RFD1.config.address.base_addr_p1, p_addr, 4); + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_BASE1); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_prefixes(uint8_t const * p_prefixes, uint8_t num_pipes) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (p_prefixes == NULL) + return NRF52_ERROR_NULL; + if (num_pipes > 8) + return NRF52_ERROR_INVALID_PARAM; + + memcpy(RFD1.config.address.pipe_prefixes, p_prefixes, num_pipes); + RFD1.config.address.num_pipes = num_pipes; + RFD1.config.address.rx_pipes = BIT_MASK_UINT_8(num_pipes); + + set_addresses(&RFD1, NRF52_ADDR_UPDATE_MASK_PREFIX); + + return NRF52_SUCCESS; +} + +nrf52_error_t radio_set_prefix(uint8_t pipe, uint8_t prefix) { + if (RFD1.state != NRF52_STATE_IDLE) + return NRF52_ERROR_BUSY; + if (pipe > 8) + return NRF52_ERROR_INVALID_PARAM; + + RFD1.config.address.pipe_prefixes[pipe] = prefix; + + NRF_RADIO->PREFIX0 = bytewise_bit_swap(&RFD1.config.address.pipe_prefixes[0]); + NRF_RADIO->PREFIX1 = bytewise_bit_swap(&RFD1.config.address.pipe_prefixes[4]); + + return NRF52_SUCCESS; +} diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.h b/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.h new file mode 100644 index 0000000..2f94465 --- /dev/null +++ b/testhal/NRF52/NRF52832/RADIO-ESB/nrf52_radio.h @@ -0,0 +1,256 @@ +/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved. + * + * The information contained herein is property of Nordic Semiconductor ASA. + * Terms and conditions of usage are described in detail in NORDIC + * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. + * + * Licensees are granted free, non-transferable use of the information. NO + * WARRANTY of ANY KIND is provided. This heading must NOT be removed from + * the file. + * + * @brief Enhanced ShockBurst (ESB) is a basic protocol supporting two-way data + * packet communication including packet buffering, packet acknowledgment + * and automatic retransmission of lost packets. + * + * ported on: 25/10/2018, by andru + * + */ + +#ifndef NRF52_RADIO_H_ +#define NRF52_RADIO_H_ + +// Hard coded parameters - change if necessary +#ifndef NRF52_MAX_PAYLOAD_LENGTH +#define NRF52_MAX_PAYLOAD_LENGTH 32 /**< The max size of the payload. Valid values are 1 to 252 */ +#endif + +#define NRF52_CRC_RESET_VALUE 0xFFFF /**< CRC reset value*/ + +#define NRF52_TX_FIFO_SIZE 8 /**< The size of the transmission first in first out buffer. */ +#define NRF52_RX_FIFO_SIZE 8 /**< The size of the reception first in first out buffer. */ + +#define NRF52_RADIO_USE_TIMER0 FALSE /**< TIMER0 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER1 TRUE /**< TIMER1 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER2 FALSE /**< TIMER2 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER3 FALSE /**< TIMER3 will be used by the module. */ +#define NRF52_RADIO_USE_TIMER4 FALSE /**< TIMER4 will be used by the module. */ + +#define NRF52_RADIO_IRQ_PRIORITY 3 /**< RADIO interrupt priority. */ +#define NRF52_RADIO_INTTHD_PRIORITY (NORMALPRIO+2) /**< Interrupts handle thread priority. */ +#define NRF52_RADIO_EVTTHD_PRIORITY (NORMALPRIO+1) /**< Events handle thread priority */ + +#define NRF52_RADIO_PPI_TIMER_START 10 /**< The PPI channel used for timer start. */ +#define NRF52_RADIO_PPI_TIMER_STOP 11 /**< The PPI channel used for timer stop. */ +#define NRF52_RADIO_PPI_RX_TIMEOUT 12 /**< The PPI channel used for RX timeout. */ +#define NRF52_RADIO_PPI_TX_START 13 /**< The PPI channel used for starting TX. */ + + +typedef enum { + NRF52_SUCCESS, /* Call was successful. */ + NRF52_INVALID_STATE, /* Module is not initialized. */ + NRF52_ERROR_BUSY, /* Module was not in idle state. */ + NRF52_ERROR_NULL, /* Required parameter was NULL. */ + NRF52_ERROR_INVALID_PARAM, /* Required parameter is invalid */ + NRF52_ERROR_NOT_SUPPORTED, /* p_payload->noack was false while selective ack was not enabled. */ + NRF52_ERROR_INVALID_LENGTH, /* Payload length was invalid (zero or larger than max allowed). */ +} nrf52_error_t; + +// Internal radio module state. +typedef enum { + NRF52_STATE_UNINIT, /**< Module not initialized. */ + NRF52_STATE_IDLE, /**< Module idle. */ + NRF52_STATE_PTX_TX, /**< Module transmitting without ack. */ + NRF52_STATE_PTX_TX_ACK, /**< Module transmitting with ack. */ + NRF52_STATE_PTX_RX_ACK, /**< Module transmitting with ack and reception of payload with the ack response. */ + NRF52_STATE_PRX, /**< Module receiving packets without ack. */ + NRF52_STATE_PRX_SEND_ACK, /**< Module transmitting ack in RX mode. */ +} nrf52_state_t; + +/**@brief Events to indicate the last transmission/receiving status. */ +typedef enum { + NRF52_EVENT_TX_SUCCESS = 0x01, /**< Event triggered on TX success. */ + NRF52_EVENT_TX_FAILED = 0x02, /**< Event triggered on TX failed. */ + NRF52_EVENT_RX_RECEIVED = 0x04, /**< Event triggered on RX Received. */ +} nrf52_event_t; + +// Interrupt flags +typedef enum { + NRF52_INT_TX_SUCCESS_MSK = 0x01, /**< The flag used to indicate a success since last event. */ + NRF52_INT_TX_FAILED_MSK = 0x02, /**< The flag used to indicate a failiure since last event. */ + NRF52_INT_RX_DR_MSK = 0x04, /**< The flag used to indicate a received packet since last event. */ +} nrf52_int_flags_t; + +/**Macro to create initializer for a TX data packet. + * + * @details This macro generates an initializer. It is more efficient + * than setting the individual parameters dynamically. + * + * @param[in] _pipe The pipe to use for the data packet. + * @param[in] ... Comma separated list of character data to put in the TX buffer. + * Supported values are from 1 to 63 characters. + * + * @return Initializer that sets up pipe, length and the byte array for content of the TX data. + */ +#define NRF52_CREATE_PAYLOAD(_pipe, ...) \ + {.pipe = _pipe, .length = NUM_VA_ARGS(__VA_ARGS__), .data = {__VA_ARGS__}}; \ + STATIC_ASSERT(NUM_VA_ARGS(__VA_ARGS__) > 0 && NUM_VA_ARGS(__VA_ARGS__) <= 63) + +/**@brief Enhanced ShockBurst protocol. */ +typedef enum { + NRF52_PROTOCOL_ESB, /*< Enhanced ShockBurst with fixed payload length. */ + NRF52_PROTOCOL_ESB_DPL /*< Enhanced ShockBurst with dynamic payload length. */ +} nrf52_protocol_t; + +/**@brief Enhanced ShockBurst mode. */ +typedef enum { + NRF52_MODE_PTX, /*< Primary transmitter mode. */ + NRF52_MODE_PRX /*< Primary receiver mode. */ +} nrf52_mode_t; + +/**@brief Enhanced ShockBurst bitrate mode. */ +typedef enum { + NRF52_BITRATE_2MBPS = RADIO_MODE_MODE_Nrf_2Mbit, /**< 2Mbit radio mode. */ + NRF52_BITRATE_1MBPS = RADIO_MODE_MODE_Nrf_1Mbit, /**< 1Mbit radio mode. */ +} nrf52_bitrate_t; + +/**@brief Enhanced ShockBurst CRC modes. */ +typedef enum { + NRF52_CRC_16BIT = RADIO_CRCCNF_LEN_Two, /**< Use two byte CRC. */ + NRF52_CRC_8BIT = RADIO_CRCCNF_LEN_One, /**< Use one byte CRC. */ + NRF52_CRC_OFF = RADIO_CRCCNF_LEN_Disabled /**< Disable CRC. */ +} nrf52_crc_t; + +/**@brief Enhanced ShockBurst radio transmission power modes. */ +typedef enum { + NRF52_TX_POWER_4DBM = RADIO_TXPOWER_TXPOWER_Pos4dBm, /**< 4 dBm radio transmit power. */ + NRF52_TX_POWER_0DBM = RADIO_TXPOWER_TXPOWER_0dBm, /**< 0 dBm radio transmit power. */ + NRF52_TX_POWER_NEG4DBM = RADIO_TXPOWER_TXPOWER_Neg4dBm, /**< -4 dBm radio transmit power. */ + NRF52_TX_POWER_NEG8DBM = RADIO_TXPOWER_TXPOWER_Neg8dBm, /**< -8 dBm radio transmit power. */ + NRF52_TX_POWER_NEG12DBM = RADIO_TXPOWER_TXPOWER_Neg12dBm, /**< -12 dBm radio transmit power. */ + NRF52_TX_POWER_NEG16DBM = RADIO_TXPOWER_TXPOWER_Neg16dBm, /**< -16 dBm radio transmit power. */ + NRF52_TX_POWER_NEG20DBM = RADIO_TXPOWER_TXPOWER_Neg20dBm, /**< -20 dBm radio transmit power. */ + NRF52_TX_POWER_NEG30DBM = RADIO_TXPOWER_TXPOWER_Neg30dBm /**< -30 dBm radio transmit power. */ +} nrf52_tx_power_t; + +/**@brief Enhanced ShockBurst transmission modes. */ +typedef enum { + NRF52_TXMODE_AUTO, /*< Automatic TX mode - When the TX fifo is non-empty and the radio is idle packets will be sent automatically. */ + NRF52_TXMODE_MANUAL, /*< Manual TX mode - Packets will not be sent until radio_start_tx() is called. Can be used to ensure consistent packet timing. */ + NRF52_TXMODE_MANUAL_START /*< Manual start TX mode - Packets will not be sent until radio_start_tx() is called, but transmission will continue automatically until the TX fifo is empty. */ +} nrf52_tx_mode_t; + +/**@brief Enhanced ShockBurst addresses. + * + * @details The module is able to transmit packets with the TX address stored in tx_address. + The module can also receive packets from peers with up to eight different tx_addresses + stored in esb_addr_p0 - esb_addr_p7. esb_addr_p0 can have 5 arbitrary bytes + independent of the other addresses. esb_addr_p1 - esb_addr_p7 will share the + same four byte base address found in the last four bytes of esb_addr_p1. + They have an independent prefix byte found in esb_addr_p1[0] and esb_addr_p2 - + esb_addr_p7. +*/ +typedef struct { + uint8_t base_addr_p0[4]; /**< Base address for pipe 0 encoded in big endian. */ + uint8_t base_addr_p1[4]; /**< Base address for pipe 1-7 encoded in big endian. */ + uint8_t pipe_prefixes[8]; /**< Address prefix for pipe P0 to P7. */ + uint8_t num_pipes; /**< Number of pipes available. */ + uint8_t addr_length; /**< Length of address including prefix */ + uint8_t rx_pipes; /**< Bitfield for enabled RX pipes. */ + uint8_t rf_channel; /**< Which channel is to be used. Must be in range 0 and 125 to be valid. */ +} nrf52_address_t; + +/**@brief Enhanced ShockBurst payload. + * + * @note The payload is used both for transmission and receive with ack and payload. +*/ +typedef struct +{ + uint8_t length; /**< Length of the packet. Should be equal or less than NRF_ESB_MAX_PAYLOAD_LENGTH. */ + uint8_t pipe; /**< Pipe used for this payload. */ + int8_t rssi; /**< RSSI for received packet. */ + uint8_t noack; /**< Flag indicating that this packet will not be acknowledged. */ + uint8_t pid; /**< PID assigned during communication. */ + uint8_t data[NRF52_MAX_PAYLOAD_LENGTH]; /**< The payload data. */ +} nrf52_payload_t; + +/**@brief Retransmit attempts delay and counter. */ +typedef struct { + uint16_t delay; /**< The delay between each retransmission of unacked packets. */ + uint16_t count; /**< The number of retransmissions attempts before transmission fail. */ +} nrf52_retransmit_t; + +/**@brief Main nrf_esb configuration struct. */ +typedef struct { + nrf52_protocol_t protocol; /**< Enhanced ShockBurst protocol. */ + nrf52_mode_t mode; /**< Enhanced ShockBurst default RX or TX mode. */ + + // General RF parameters + nrf52_bitrate_t bitrate; /**< Enhanced ShockBurst bitrate mode. */ + nrf52_crc_t crc; /**< Enhanced ShockBurst CRC mode. */ + nrf52_tx_power_t tx_power; /**< Enhanced ShockBurst radio transmission power mode.*/ + + // Control settings + nrf52_tx_mode_t tx_mode; /**< Enhanced ShockBurst transmit mode. */ + + bool selective_auto_ack; /**< Enable or disable selective auto acknowledgement. */ + + nrf52_retransmit_t retransmit; /**< Packet retransmit parameters */ + + uint8_t payload_length; /**< Enhanced ShockBurst static payload length */ + + nrf52_address_t address; /**< Address parameters structure */ +} nrf52_config_t; + +typedef struct { + /** + * @brief NRF52 radio peripheral. + */ + NRF_RADIO_Type *radio; + /** + * @brief NRF52 timer peripheral. + */ + NRF_TIMER_Type *timer; + /** + * @brief Driver state. + */ + nrf52_state_t state; + /** + * @brief RF parameters. + */ + nrf52_config_t config; + /** + * @brief Interrupts flag. + */ + nrf52_int_flags_t flags; + /** + * @brief TX attempt number. + */ + uint16_t tx_attempt; + /** + * @brief TX retransmits remaining. + */ + uint16_t tx_remaining; + /** + * @brief Radio events source. + */ + event_source_t eventsrc; +} RFDriver; + +extern RFDriver RFD1; + +nrf52_error_t radio_init(nrf52_config_t const *config); +nrf52_error_t radio_disable(void); +nrf52_error_t radio_write_payload(nrf52_payload_t const * p_payload); +nrf52_error_t radio_read_rx_payload(nrf52_payload_t * p_payload); +nrf52_error_t radio_start_tx(void); +nrf52_error_t radio_start_rx(void); +nrf52_error_t radio_stop_rx(void); +nrf52_error_t radio_flush_tx(void); +nrf52_error_t radio_flush_rx(void); +nrf52_error_t radio_pop_tx(void); +nrf52_error_t radio_set_base_address_0(uint8_t const * p_addr); +nrf52_error_t radio_set_base_address_1(uint8_t const * p_addr); +nrf52_error_t radio_set_prefixes(uint8_t const * p_prefixes, uint8_t num_pipes); +nrf52_error_t radio_set_prefix(uint8_t pipe, uint8_t prefix); + +#endif /* NRF52_RADIO_H_ */ -- cgit v1.2.3 From 91e635b08a57e44ce1f7deb0328a5ae78117f8d4 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 8 Jan 2019 20:02:45 +0100 Subject: Adding rudimentary OPAMP Driver --- os/hal/hal.mk | 3 + os/hal/include/hal_community.h | 5 + os/hal/include/hal_opamp.h | 110 ++++ os/hal/ports/STM32/LLD/OPAMPv1/driver.mk | 9 + os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c | 184 ++++++ os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h | 257 ++++++++ os/hal/ports/STM32/STM32F3xx/platform.mk | 1 + os/hal/src/hal_opamp.c | 155 +++++ testhal/STM32/STM32F3xx/OPAMP/Makefile | 214 +++++++ testhal/STM32/STM32F3xx/OPAMP/chconf.h | 696 ++++++++++++++++++++++ testhal/STM32/STM32F3xx/OPAMP/halconf.h | 419 +++++++++++++ testhal/STM32/STM32F3xx/OPAMP/halconf_community.h | 180 ++++++ testhal/STM32/STM32F3xx/OPAMP/main.c | 124 ++++ testhal/STM32/STM32F3xx/OPAMP/mcuconf.h | 255 ++++++++ testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h | 164 +++++ 15 files changed, 2776 insertions(+) create mode 100644 os/hal/include/hal_opamp.h create mode 100644 os/hal/ports/STM32/LLD/OPAMPv1/driver.mk create mode 100644 os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c create mode 100644 os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h create mode 100644 os/hal/src/hal_opamp.c create mode 100644 testhal/STM32/STM32F3xx/OPAMP/Makefile create mode 100644 testhal/STM32/STM32F3xx/OPAMP/chconf.h create mode 100644 testhal/STM32/STM32F3xx/OPAMP/halconf.h create mode 100644 testhal/STM32/STM32F3xx/OPAMP/halconf_community.h create mode 100644 testhal/STM32/STM32F3xx/OPAMP/main.c create mode 100644 testhal/STM32/STM32F3xx/OPAMP/mcuconf.h create mode 100644 testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 377ffa9..f6b4edd 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -72,6 +72,9 @@ endif ifneq ($(findstring HAL_USE_COMP TRUE,$(HALCONF)),) HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c endif +ifneq ($(findstring HAL_USE_OPAMP TRUE,$(HALCONF)),) +HALSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/src/hal_opamp.c +endif else HALSRC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_nand.c \ diff --git a/os/hal/include/hal_community.h b/os/hal/include/hal_community.h index 83b1f02..f84e90a 100644 --- a/os/hal/include/hal_community.h +++ b/os/hal/include/hal_community.h @@ -75,6 +75,10 @@ #define HAL_USE_COMP FALSE #endif +#if !defined(HAL_USE_OPAMP) +#define HAL_USE_OPAMP FALSE +#endif + /* Abstract interfaces.*/ /* Shared headers.*/ @@ -87,6 +91,7 @@ #include "hal_timcap.h" #include "hal_qei.h" #include "hal_comp.h" +#include "hal_opamp.h" /* Complex drivers.*/ #include "hal_onewire.h" diff --git a/os/hal/include/hal_opamp.h b/os/hal/include/hal_opamp.h new file mode 100644 index 0000000..383e928 --- /dev/null +++ b/os/hal/include/hal_opamp.h @@ -0,0 +1,110 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HAL_OPAMP_H_ +#define HAL_OPAMP_H_ + +#include "hal.h" + +#if (HAL_USE_OPAMP == TRUE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver state machine possible states. + */ +typedef enum { + OPAMP_UNINIT = 0, /**< Not initialized. */ + OPAMP_STOP = 1, /**< Stopped. */ + OPAMP_READY = 2, /**< Ready. */ + OPAMP_ACTIVE = 3, /**< Active cycle phase. */ +} opampstate_t; + +/** + * @brief Type of a structure representing an OPAMP driver. + */ +typedef struct OPAMPDriver OPAMPDriver; + +#include "hal_opamp_lld.h" + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @name Macro Functions + * @{ + */ +/** + * @brief Enables the input capture. + * + * @param[in] opamp pointer to the @p OPAMPDriver object + * + * @iclass + */ +#define opampEnableI(opamp) opamp_lld_enable(opamp) + +/** + * @brief Disables the input capture. + * + * @param[in] opamp pointer to the @p OPAMPDriver object + * + * @iclass + */ +#define opampDisableI(opamp) opamp_lld_disable(opamp) +/** @} */ + + +/** + * @name Low Level driver helper macros + * @{ + */ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void opampInit(void); + void opampObjectInit(OPAMPDriver *opamp); + void opampStart(OPAMPDriver *opamp, const OPAMPConfig *config); + void opampStop(OPAMPDriver *opamp); + void opampEnable(OPAMPDriver *opamp); + void opampDisable(OPAMPDriver *opamp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_OPAMP */ + +#endif /* HAL_OPAMP_H_ */ diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk b/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk new file mode 100644 index 0000000..08dc0f4 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_OPAMP TRUE,$(HALCONF)),) +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c +endif +else +PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c +endif + +PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1 diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c new file mode 100644 index 0000000..7251002 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c @@ -0,0 +1,184 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + + +/** + * @file STM32/hal_opamp_lld.c + * @brief STM32 Operational Amplifier subsystem low level driver header. + * + * @addtogroup OPAMP + * @{ + */ + +#include "hal.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + +#include "hal_opamp.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief OPAMPD1 driver identifier. + * @note The driver OPAMPD1 allocates the comparator OPAMP1 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP1 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD1; +#endif + +/** + * @brief OPAMPD2 driver identifier. + * @note The driver OPAMPD2 allocates the comparator OPAMP2 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP2 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD2; +#endif + +/** + * @brief OPAMPD3 driver identifier. + * @note The driver OPAMPD3 allocates the comparator OPAMP3 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP3 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD3; +#endif + +/** + * @brief OPAMPD4 driver identifier. + * @note The driver OPAMPD4 allocates the comparator OPAMP4 when enabled. + */ +#if STM32_OPAMP_USE_OPAMP4 || defined(__DOXYGEN__) +OPAMPDriver OPAMPD4; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level OPAMP driver initialization. + * + * @notapi + */ +void opamp_lld_init(void) { + +#if STM32_OPAMP_USE_OPAMP1 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD1); + OPAMPD1.reg = OPAMP; + OPAMPD1.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP2 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD2); + OPAMPD2.reg = OPAMP2; + OPAMPD2.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP3 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD3); + OPAMPD3.reg = OPAMP3; + OPAMPD3.reg->CSR = 0; +#endif + +#if STM32_OPAMP_USE_OPAMP4 + /* Driver initialization.*/ + opampObjectInit(&OPAMPD4); + OPAMPD4.reg = OPAMP4; + OPAMPD4.reg->CSR = 0; +#endif + +} + +/** + * @brief Configures and activates the OPAMP peripheral. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_start(OPAMPDriver *compp) { + + // Apply CSR Execpt the enable bit. + compp->reg->CSR = compp->config->csr & ~OPAMP_CSR_OPAMPxEN; + +} + +/** + * @brief Deactivates the comp peripheral. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_stop(OPAMPDriver *compp) { + + if (compp->state == OPAMP_READY) { + + compp->reg->CSR = 0; + } + +} + +/** + * @brief Enables the output. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_enable(OPAMPDriver *compp) { + + compp->reg->CSR |= OPAMP_CSR_OPAMPxEN; /* Enable */ +} + +/** + * @brief Disables the output. + * + * @param[in] compp pointer to the @p OPAMPDriver object + * + * @notapi + */ +void opamp_lld_disable(OPAMPDriver *compp) { + + compp->reg->CSR &= ~OPAMP_CSR_OPAMPxEN; /* Disable */ +} + +#endif /* HAL_USE_OPAMP */ + +/** @} */ diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h new file mode 100644 index 0000000..508cea7 --- /dev/null +++ b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h @@ -0,0 +1,257 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file STM32/opamp_lld.h + * @brief STM32 Operational Amplifier subsystem low level driver header. + * + * @addtogroup OPAMP + * @{ + */ + +#ifndef HAL_OPAMP_LLD_H_ +#define HAL_OPAMP_LLD_H_ + +#include "hal.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + + +#define STM32_OPAMP_InvertingInput_IO1 ((uint32_t)0x00000000) /*!< IO1 (PC5 for OPAMP1 and OPAMP2, PB10 for OPAMP3 and OPAMP4) + connected to OPAMPx inverting input */ +#define STM32_OPAMP_InvertingInput_IO2 OPAMP_CSR_VMSEL_0 /*!< IO2 (PA3 for OPAMP1, PA5 for OPAMP2, PB2 for OPAMP3, PD8 for OPAMP4) + connected to OPAMPx inverting input */ +#define STM32_OPAMP_InvertingInput_PGA OPAMP_CSR_VMSEL_1 /*!< Resistor feedback output connected to OPAMPx inverting input (PGA mode) */ +#define STM32_OPAMP_InvertingInput_Vout OPAMP_CSR_VMSEL /*!< Vout connected to OPAMPx inverting input (follower mode) */ + + +#define STM32_OPAMP_NonInvertingInput_IO1 ((uint32_t)0x00000000) /*!< IO1 (PA7 for OPAMP1, PD14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO2 OPAMP_CSR_VPSEL_0 /*!< IO2 (PA5 for OPAMP1, PB14 for OPAMP2, PA5 for OPAMP3, PB11 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO3 OPAMP_CSR_VPSEL_1 /*!< IO3 (PA3 for OPAMP1, PB0 for OPAMP2, PA1 for OPAMP3, PA4 for OPAMP4) + connected to OPAMPx non inverting input */ +#define STM32_OPAMP_NonInvertingInput_IO4 OPAMP_CSR_VPSEL /*!< IO4 (PA1 for OPAMP1, PA7 for OPAMP2, PB0 for OPAMP3, PB13 for OPAMP4) + connected to OPAMPx non inverting input */ + + +#define STM32_OPAMP_PGAGain_2 ((uint32_t)0x00000000) +#define STM32_OPAMP_PGAGain_4 OPAMP_CSR_PGGAIN_0 +#define STM32_OPAMP_PGAGain_8 OPAMP_CSR_PGGAIN_1 +#define STM32_OPAMP_PGAGain_16 ((uint32_t)0x0000C000) + +#define STM32_OPAMP_PGAConnect_No ((uint32_t)0x00000000) +#define STM32_OPAMP_PGAConnect_IO1 OPAMP_CSR_PGGAIN_3 +#define STM32_OPAMP_PGAConnect_IO2 ((uint32_t)0x00030000) + +#define STM32_OPAMP_Input_Inverting ((uint32_t)0x00000018) /*!< Inverting input */ +#define STM32_OPAMP_Input_NonInverting ((uint32_t)0x00000013) /*!< Non inverting input */ + +#define STM32_OPAMP_Vref_3VDDA ((uint32_t)0x00000000) /*!< OPMAP Vref = 3.3% VDDA */ +#define STM32_OPAMP_Vref_10VDDA OPAMP_CSR_CALSEL_0 /*!< OPMAP Vref = 10% VDDA */ +#define STM32_OPAMP_Vref_50VDDA OPAMP_CSR_CALSEL_1 /*!< OPMAP Vref = 50% VDDA */ +#define STM32_OPAMP_Vref_90VDDA OPAMP_CSR_CALSEL /*!< OPMAP Vref = 90% VDDA */ + +#define STM32_OPAMP_Trimming_Factory ((uint32_t)0x00000000) /*!< Factory trimming */ +#define STM32_OPAMP_Trimming_User OPAMP_CSR_USERTRIM /*!< User trimming */ + +#define STM32_OPAMP_OutputLevel_High OPAMP_CSR_OUTCAL +#define STM32_OPAMP_OutputLevel_Low ((uint32_t)0x00000000) + + +#if defined(STM32F302xB) || defined(STM32F302xC) || defined(STM32F302xD) \ +|| defined(STM32F302xE) || defined(STM32F302xc) || defined(STM32F302xe) \ +|| defined(STM32L1XX) || defined(STM32L4XX) || defined(STM32H7XX) +#define STM32_HAS_OPAMP1 TRUE +#define STM32_HAS_OPAMP2 TRUE +#define STM32_HAS_OPAMP3 FALSE +#define STM32_HAS_OPAMP4 FALSE + +#elif defined(STM32F303xB) || defined(STM32F303xC) || defined(STM32F303xE) \ +|| defined(STM32F358xx) || defined(STM32F398xx) +#define STM32_HAS_OPAMP1 TRUE +#define STM32_HAS_OPAMP2 TRUE +#define STM32_HAS_OPAMP3 TRUE +#define STM32_HAS_OPAMP4 TRUE + +#else +#define STM32_HAS_OPAMP1 FALSE +#define STM32_HAS_OPAMP2 FALSE +#define STM32_HAS_OPAMP3 FALSE +#define STM32_HAS_OPAMP4 FALSE + +#endif + + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ + +/** + * @brief OPAMPD1 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD1 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP1) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP1 FALSE +#endif + +/** + * @brief OPAMPD2 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD2 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP2) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP2 FALSE +#endif + +/** + * @brief OPAMPD3 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD3 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP3) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP3 FALSE +#endif + +/** + * @brief OPAMPD4 driver enable switch. + * @details If set to @p TRUE the support for OPAMPD4 is included. + * @note The default is @p FALSE. + */ +#if !defined(STM32_OPAMP_USE_OPAMP4) || defined(__DOXYGEN__) +#define STM32_OPAMP_USE_OPAMP4 FALSE +#endif + + +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + + +#if STM32_OPAMP_USE_OPAMP1 && !STM32_HAS_OPAMP1 +#error "OPAMP1 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP2 && !STM32_HAS_OPAMP2 +#error "OPAMP2 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP3 && !STM32_HAS_OPAMP3 +#error "OPAMP3 not present in the selected device" +#endif + +#if STM32_OPAMP_USE_OPAMP4 && !STM32_HAS_OPAMP4 +#error "OPAMP4 not present in the selected device" +#endif + +#if !STM32_OPAMP_USE_OPAMP1 && !STM32_OPAMP_USE_OPAMP2 && \ + !STM32_OPAMP_USE_OPAMP3 && !STM32_OPAMP_USE_OPAMP4 +#error "OPAMP driver activated but no OPAMP peripheral assigned" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief OPAMP CSR register initialization data. + * @note The value of this field should normally be equal to zero. + */ + uint32_t csr; +} OPAMPConfig; + +/** + * @brief Structure representing an OPAMP driver. + */ +struct OPAMPDriver { + /** + * @brief Driver state. + */ + opampstate_t state; + /** + * @brief Current configuration data. + */ + const OPAMPConfig *config; +#if defined(OPAMP_DRIVER_EXT_FIELDS) + OPAMP_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Pointer to the OPAMPx registers block. + */ + OPAMP_TypeDef *reg; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if STM32_OPAMP_USE_OPAMP1 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD1; +#endif + +#if STM32_OPAMP_USE_OPAMP2 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD2; +#endif + +#if STM32_OPAMP_USE_OPAMP3 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD3; +#endif + +#if STM32_OPAMP_USE_OPAMP4 && !defined(__DOXYGEN__) +extern OPAMPDriver OPAMPD4; +#endif + + +#ifdef __cplusplus +extern "C" { +#endif + void opamp_lld_init(void); + void opamp_lld_start(OPAMPDriver *compp); + void opamp_lld_stop(OPAMPDriver *compp); + void opamp_lld_enable(OPAMPDriver *compp); + void opamp_lld_disable(OPAMPDriver *compp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_OPAMP */ + +#endif /* _opamp_lld_H_ */ + +/** @} */ diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk index f41da95..befe229 100644 --- a/os/hal/ports/STM32/STM32F3xx/platform.mk +++ b/os/hal/ports/STM32/STM32F3xx/platform.mk @@ -15,6 +15,7 @@ endif include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/OPAMPv1/driver.mk # Shared variables ALLCSRC += $(PLATFORMSRC_CONTRIB) diff --git a/os/hal/src/hal_opamp.c b/os/hal/src/hal_opamp.c new file mode 100644 index 0000000..ba718a7 --- /dev/null +++ b/os/hal/src/hal_opamp.c @@ -0,0 +1,155 @@ +/* + ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio + Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_opamp.c + * @brief OPAMP Driver code. + * + * @addtogroup OPAMP + * @{ + */ + +#include "hal_opamp.h" + +#if HAL_USE_OPAMP || defined(__DOXYGEN__) + + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief OPAMP Driver initialization. + * @note This function is implicitly invoked by @p halInit(), there is + * no need to explicitly initialize the driver. + * + * @init + */ +void opampInit(void) { + + opamp_lld_init(); +} + +/** + * @brief Initializes the standard part of a @p OPAMPDriver structure. + * + * @param[out] opampp pointer to the @p OPAMPDriver object + * + * @init + */ +void opampObjectInit(OPAMPDriver *opampp) { + + opampp->state = OPAMP_STOP; + opampp->config = NULL; +} + +/** + * @brief Configures and activates the OPAMP peripheral. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * @param[in] config pointer to the @p OPAMPConfig object + * + * @api + */ +void opampStart(OPAMPDriver *opampp, const OPAMPConfig *config) { + + osalDbgCheck((opampp != NULL) && (config != NULL)); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + "invalid state"); + opampp->config = config; + opamp_lld_start(opampp); + opampp->state = OPAMP_READY; + osalSysUnlock(); +} + +/** + * @brief Deactivates the OPAMP peripheral. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampStop(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + "invalid state"); + opamp_lld_stop(opampp); + opampp->state = OPAMP_STOP; + osalSysUnlock(); +} + +/** + * @brief Activates the opamp. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampEnable(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert(opampp->state == OPAMP_READY, "invalid state"); + opamp_lld_enable(opampp); + opampp->state = OPAMP_ACTIVE; + osalSysUnlock(); +} + +/** + * @brief Deactivates the opamp. + * + * @param[in] opampp pointer to the @p OPAMPDriver object + * + * @api + */ +void opampDisable(OPAMPDriver *opampp) { + + osalDbgCheck(opampp != NULL); + + osalSysLock(); + osalDbgAssert((opampp->state == OPAMP_READY) || (opampp->state == OPAMP_ACTIVE), + "invalid state"); + opamp_lld_disable(opampp); + opampp->state = OPAMP_READY; + osalSysUnlock(); +} + +#endif /* HAL_USE_OPAMP */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/Makefile b/testhal/STM32/STM32F3xx/OPAMP/Makefile new file mode 100644 index 0000000..3730513 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/Makefile @@ -0,0 +1,214 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS_CONTRIB)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Other files (optional). +#include $(CHIBIOS)/test/lib/test.mk +#include $(CHIBIOS)/test/rt/rt_test.mk +#include $(CHIBIOS)/test/oslib/oslib_test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/STM32/STM32F3xx/OPAMP/chconf.h b/testhal/STM32/STM32F3xx/OPAMP/chconf.h new file mode 100644 index 0000000..58cd5db --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/chconf.h @@ -0,0 +1,696 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/halconf.h b/testhal/STM32/STM32F3xx/OPAMP/halconf.h new file mode 100644 index 0000000..9192b27 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/halconf.h @@ -0,0 +1,419 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#include "halconf_community.h" + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h b/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h new file mode 100644 index 0000000..6f56cd8 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/halconf_community.h @@ -0,0 +1,180 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP TRUE +#endif + +/** + * @brief Enables the OPAMP subsystem. + */ +#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__) +#define HAL_USE_OPAMP TRUE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/main.c b/testhal/STM32/STM32F3xx/OPAMP/main.c new file mode 100644 index 0000000..0345f12 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/main.c @@ -0,0 +1,124 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +#define DAC_BUFFER_SIZE 360 + +/* + * DAC test buffer (sine wave). + */ +static const dacsample_t dac_buffer[DAC_BUFFER_SIZE] = { + 2047, 2082, 2118, 2154, 2189, 2225, 2260, 2296, 2331, 2367, 2402, 2437, + 2472, 2507, 2542, 2576, 2611, 2645, 2679, 2713, 2747, 2780, 2813, 2846, + 2879, 2912, 2944, 2976, 3008, 3039, 3070, 3101, 3131, 3161, 3191, 3221, + 3250, 3278, 3307, 3335, 3362, 3389, 3416, 3443, 3468, 3494, 3519, 3544, + 3568, 3591, 3615, 3637, 3660, 3681, 3703, 3723, 3744, 3763, 3782, 3801, + 3819, 3837, 3854, 3870, 3886, 3902, 3917, 3931, 3944, 3958, 3970, 3982, + 3993, 4004, 4014, 4024, 4033, 4041, 4049, 4056, 4062, 4068, 4074, 4078, + 4082, 4086, 4089, 4091, 4092, 4093, 4094, 4093, 4092, 4091, 4089, 4086, + 4082, 4078, 4074, 4068, 4062, 4056, 4049, 4041, 4033, 4024, 4014, 4004, + 3993, 3982, 3970, 3958, 3944, 3931, 3917, 3902, 3886, 3870, 3854, 3837, + 3819, 3801, 3782, 3763, 3744, 3723, 3703, 3681, 3660, 3637, 3615, 3591, + 3568, 3544, 3519, 3494, 3468, 3443, 3416, 3389, 3362, 3335, 3307, 3278, + 3250, 3221, 3191, 3161, 3131, 3101, 3070, 3039, 3008, 2976, 2944, 2912, + 2879, 2846, 2813, 2780, 2747, 2713, 2679, 2645, 2611, 2576, 2542, 2507, + 2472, 2437, 2402, 2367, 2331, 2296, 2260, 2225, 2189, 2154, 2118, 2082, + 2047, 2012, 1976, 1940, 1905, 1869, 1834, 1798, 1763, 1727, 1692, 1657, + 1622, 1587, 1552, 1518, 1483, 1449, 1415, 1381, 1347, 1314, 1281, 1248, + 1215, 1182, 1150, 1118, 1086, 1055, 1024, 993, 963, 933, 903, 873, + 844, 816, 787, 759, 732, 705, 678, 651, 626, 600, 575, 550, + 526, 503, 479, 457, 434, 413, 391, 371, 350, 331, 312, 293, + 275, 257, 240, 224, 208, 192, 177, 163, 150, 136, 124, 112, + 101, 90, 80, 70, 61, 53, 45, 38, 32, 26, 20, 16, + 12, 8, 5, 3, 2, 1, 0, 1, 2, 3, 5, 8, + 12, 16, 20, 26, 32, 38, 45, 53, 61, 70, 80, 90, + 101, 112, 124, 136, 150, 163, 177, 192, 208, 224, 240, 257, + 275, 293, 312, 331, 350, 371, 391, 413, 434, 457, 479, 503, + 526, 550, 575, 600, 626, 651, 678, 705, 732, 759, 787, 816, + 844, 873, 903, 933, 963, 993, 1024, 1055, 1086, 1118, 1150, 1182, + 1215, 1248, 1281, 1314, 1347, 1381, 1415, 1449, 1483, 1518, 1552, 1587, + 1622, 1657, 1692, 1727, 1763, 1798, 1834, 1869, 1905, 1940, 1976, 2012 +}; + +static const DACConfig dac1cfg1 = { + .init = 2047U, + .datamode = DAC_DHRM_12BIT_RIGHT, + .cr = 0 +}; + +static const DACConversionGroup dacgrpcfg1 = { + .num_channels = 1U, + .end_cb = NULL, + .error_cb = NULL, + .trigger = DAC_TRG(0) +}; + +/* + * GPT6 configuration. + */ +static const GPTConfig gpt6cfg1 = { + .frequency = 10000U, + .callback = NULL, + .cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */ + .dier = 0U +}; + +static const OPAMPConfig opamp1_conf = { + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + halInit(); + chSysInit(); + + /* + * Set PA3 - PA1 to Analog (DAC1_CH1, OPAMP1_INP) + * You will have to connect these with a jumper wire + */ + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + + /* + * Start peripherals + */ + dacStart(&DACD1, &dac1cfg1); + opampStart(&OPAMPD1, &opamp1_conf); + gptStart(&GPTD6, &gpt6cfg1); + + /* + * Starting a continuous conversion. + */ + dacStartConversion(&DACD1, &dacgrpcfg1, dac_buffer, DAC_BUFFER_SIZE); + gptStartContinuous(&GPTD6, 2U); + + opampEnable(&OPAMPD1); + + /* + * Normal main() thread activity. + */ + while (true) { + + chThdSleepMilliseconds(250); + palToggleLine(LINE_LED3_RED); + } + return 0; +} diff --git a/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h b/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h new file mode 100644 index 0000000..9b14ad7 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/mcuconf.h @@ -0,0 +1,255 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F3xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F3xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 6 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_22_29_PRIORITY 6 +#define STM32_IRQ_EXTI30_32_PRIORITY 6 +#define STM32_IRQ_EXTI33_PRIORITY 6 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_DUAL_MODE FALSE +#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC4 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC4_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 TRUE +#define STM32_DAC_USE_DAC1_CH2 TRUE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 TRUE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_USE_DMA TRUE +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#include "mcuconf_community.h" + +#endif /* MCUCONF_H */ diff --git a/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h new file mode 100644 index 0000000..76f9429 --- /dev/null +++ b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h @@ -0,0 +1,164 @@ +/* + ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * FSMC driver system settings. + */ +#define STM32_FSMC_USE_FSMC1 FALSE +#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 + +/* + * FSMC NAND driver system settings. + */ +#define STM32_NAND_USE_FSMC_NAND1 FALSE +#define STM32_NAND_USE_FSMC_NAND2 FALSE +#define STM32_NAND_USE_EXT_INT FALSE +#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_NAND_DMA_PRIORITY 0 +#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") + +/* + * FSMC SRAM driver system settings. + */ +#define STM32_USE_FSMC_SRAM FALSE +#define STM32_SRAM_USE_FSMC_SRAM1 FALSE +#define STM32_SRAM_USE_FSMC_SRAM2 FALSE +#define STM32_SRAM_USE_FSMC_SRAM3 FALSE +#define STM32_SRAM_USE_FSMC_SRAM4 FALSE + +/* + * FSMC SDRAM driver system settings. + */ +#define STM32_USE_FSMC_SDRAM FALSE + +/* + * TIMCAP driver system settings. + */ +#define STM32_TIMCAP_USE_TIM1 TRUE +#define STM32_TIMCAP_USE_TIM2 FALSE +#define STM32_TIMCAP_USE_TIM3 TRUE +#define STM32_TIMCAP_USE_TIM4 TRUE +#define STM32_TIMCAP_USE_TIM5 TRUE +#define STM32_TIMCAP_USE_TIM8 TRUE +#define STM32_TIMCAP_USE_TIM9 TRUE +#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3 + +/* + * COMP driver system settings. + */ +#define STM32_COMP_USE_COMP1 TRUE +#define STM32_COMP_USE_COMP2 TRUE +#define STM32_COMP_USE_COMP3 TRUE +#define STM32_COMP_USE_COMP4 TRUE +#define STM32_COMP_USE_COMP5 TRUE +#define STM32_COMP_USE_COMP6 TRUE +#define STM32_COMP_USE_COMP7 TRUE + +#define STM32_COMP_USE_INTERRUPTS TRUE +#define STM32_COMP_1_2_3_IRQ_PRIORITY 5 +#define STM32_COMP_4_5_6_IRQ_PRIORITY 5 +#define STM32_COMP_7_IRQ_PRIORITY 5 + +#if STM32_COMP_USE_INTERRUPTS +#define STM32_DISABLE_EXTI21_22_29_HANDLER +#define STM32_DISABLE_EXTI30_32_HANDLER +#define STM32_DISABLE_EXTI33_HANDLER +#endif + +/* + * OPAMP driver system settings. + */ + +#define STM32_OPAMP_USE_OPAMP1 TRUE +#define STM32_OPAMP_USE_OPAMP2 TRUE +#define STM32_OPAMP_USE_OPAMP3 TRUE +#define STM32_OPAMP_USE_OPAMP4 TRUE + +/* + * USBH driver system settings. + */ +#define STM32_OTG1_CHANNELS_NUMBER 8 +#define STM32_OTG2_CHANNELS_NUMBER 12 + +#define STM32_USBH_USE_OTG1 1 +#define STM32_OTG1_RXFIFO_SIZE 1024 +#define STM32_OTG1_PTXFIFO_SIZE 128 +#define STM32_OTG1_NPTXFIFO_SIZE 128 + +#define STM32_USBH_USE_OTG2 0 +#define STM32_OTG2_RXFIFO_SIZE 2048 +#define STM32_OTG2_PTXFIFO_SIZE 1024 +#define STM32_OTG2_NPTXFIFO_SIZE 1024 + +#define STM32_USBH_MIN_QSPACE 4 +#define STM32_USBH_CHANNELS_NP 4 + +/* + * CRC driver system settings. + */ +#define STM32_CRC_USE_CRC1 TRUE +#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1 +#define STM32_CRC_CRC1_DMA_PRIORITY 2 +#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2 + +#define CRCSW_USE_CRC1 FALSE +#define CRCSW_CRC32_TABLE TRUE +#define CRCSW_CRC16_TABLE TRUE +#define CRCSW_PROGRAMMABLE TRUE + +/* + * EICU driver system settings. + */ +#define STM32_EICU_USE_TIM1 TRUE +#define STM32_EICU_USE_TIM2 FALSE +#define STM32_EICU_USE_TIM3 TRUE +#define STM32_EICU_USE_TIM4 TRUE +#define STM32_EICU_USE_TIM5 TRUE +#define STM32_EICU_USE_TIM8 TRUE +#define STM32_EICU_USE_TIM9 TRUE +#define STM32_EICU_USE_TIM10 TRUE +#define STM32_EICU_USE_TIM11 TRUE +#define STM32_EICU_USE_TIM12 TRUE +#define STM32_EICU_USE_TIM13 TRUE +#define STM32_EICU_USE_TIM14 TRUE +#define STM32_EICU_TIM1_IRQ_PRIORITY 7 +#define STM32_EICU_TIM2_IRQ_PRIORITY 7 +#define STM32_EICU_TIM3_IRQ_PRIORITY 7 +#define STM32_EICU_TIM4_IRQ_PRIORITY 7 +#define STM32_EICU_TIM5_IRQ_PRIORITY 7 +#define STM32_EICU_TIM8_IRQ_PRIORITY 7 +#define STM32_EICU_TIM9_IRQ_PRIORITY 7 +#define STM32_EICU_TIM10_IRQ_PRIORITY 7 +#define STM32_EICU_TIM11_IRQ_PRIORITY 7 +#define STM32_EICU_TIM12_IRQ_PRIORITY 7 +#define STM32_EICU_TIM13_IRQ_PRIORITY 7 +#define STM32_EICU_TIM14_IRQ_PRIORITY 7 + +/* + * QEI driver system settings. + */ +#define STM32_QEI_USE_TIM1 TRUE +#define STM32_QEI_USE_TIM2 FALSE +#define STM32_QEI_USE_TIM3 TRUE +#define STM32_QEI_TIM1_IRQ_PRIORITY 3 +#define STM32_QEI_TIM2_IRQ_PRIORITY 3 +#define STM32_QEI_TIM3_IRQ_PRIORITY 3 -- cgit v1.2.3 From 05faf884a41470970fd9638a1be6a0b76bfb71e2 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 8 Jan 2019 20:15:28 +0100 Subject: Updated opamp example --- testhal/STM32/STM32F3xx/OPAMP/main.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/testhal/STM32/STM32F3xx/OPAMP/main.c b/testhal/STM32/STM32F3xx/OPAMP/main.c index 0345f12..2bdb755 100644 --- a/testhal/STM32/STM32F3xx/OPAMP/main.c +++ b/testhal/STM32/STM32F3xx/OPAMP/main.c @@ -78,8 +78,15 @@ static const GPTConfig gpt6cfg1 = { .dier = 0U }; +/* + * OpAmp configuration. + * We will double the input voltage + */ static const OPAMPConfig opamp1_conf = { - 0 + STM32_OPAMP_NonInvertingInput_IO4 | // INP connectd to PA1 + STM32_OPAMP_InvertingInput_PGA | // INM connected to PGA + STM32_OPAMP_PGAGain_2 | // Gain of 2x + STM32_OPAMP_PGAConnect_No // PGA connected to ground }; /* -- cgit v1.2.3 From 49a3d9b0f7867f7684ff50b03b40a77e4b801bd9 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 10 Jan 2019 11:12:14 +0100 Subject: Adding median library --- os/various/median.c | 129 ++++++++++++++++++++++++++++++++++++++++++++++++++++ os/various/median.h | 42 +++++++++++++++++ 2 files changed, 171 insertions(+) create mode 100644 os/various/median.c create mode 100644 os/various/median.h diff --git a/os/various/median.c b/os/various/median.c new file mode 100644 index 0000000..6e2f99f --- /dev/null +++ b/os/various/median.c @@ -0,0 +1,129 @@ +/* + ChibiOS-Contrib - Copyright (C) 2014...2019 Fabien Poussin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "median.h" + +void median_init(median_t* conf, uint16_t stopper, pair_t* buffer, uint16_t size) +{ + conf->stopper = stopper; + conf->buffer = buffer; + conf->size = size; + pair_t small_tmp = {NULL, conf->stopper}; + pair_t big_tmp = {&conf->small, 0}; + conf->datpoint = conf->buffer; /* Pointer into circular buffer of data */ + conf->small = small_tmp; /* Chain stopper */ + conf->big = big_tmp; /* Pointer to head (largest) of linked list.*/ +} + +uint16_t median_filter(median_t* conf, uint16_t datum) +{ + pair_t *successor; /* Pointer to successor of replaced data item */ + pair_t *scan; /* Pointer used to scan down the sorted list */ + pair_t *scanold; /* Previous value of scan */ + pair_t *median; /* Pointer to median */ + uint16_t i; + + if (datum == conf->stopper) + { + datum = conf->stopper + 1; /* No stoppers allowed. */ + } + + if ( (++conf->datpoint - conf->buffer) >= conf->size) + { + conf->datpoint = conf->buffer; /* Increment and wrap data in pointer.*/ + } + + conf->datpoint->value = datum; /* Copy in new datum */ + successor = conf->datpoint->point; /* Save pointer to old value's successor */ + median = &conf->big; /* Median initially to first in chain */ + scanold = NULL; /* Scanold initially null. */ + scan = &conf->big; /* Points to pointer to first (largest) datum in chain */ + + /* Handle chain-out of first item in chain as special case */ + if (scan->point == conf->datpoint) + { + scan->point = successor; + } + scanold = scan; /* Save this pointer and */ + scan = scan->point ; /* step down chain */ + + /* Loop through the chain, normal loop exit via break. */ + for (i = 0 ; i < conf->size; ++i) + { + /* Handle odd-numbered item in chain */ + if (scan->point == conf->datpoint) + { + scan->point = successor; /* Chain out the old datum.*/ + } + + if (scan->value < datum) /* If datum is larger than scanned value,*/ + { + conf->datpoint->point = scanold->point; /* Chain it in here. */ + scanold->point = conf->datpoint; /* Mark it chained in. */ + datum = conf->stopper; + }; + + /* Step median pointer down chain after doing odd-numbered element */ + median = median->point; /* Step median pointer. */ + if (scan == &conf->small) + { + break; /* Break at end of chain */ + } + scanold = scan; /* Save this pointer and */ + scan = scan->point; /* step down chain */ + + /* Handle even-numbered item in chain. */ + if (scan->point == conf->datpoint) + { + scan->point = successor; + } + + if (scan->value < datum) + { + conf->datpoint->point = scanold->point; + scanold->point = conf->datpoint; + datum = conf->stopper; + } + + if (scan == &conf->small) + { + break; + } + + scanold = scan; + scan = scan->point; + } + return median->value; +} + +uint16_t middle_of_3(uint16_t a, uint16_t b, uint16_t c) +{ + uint16_t middle; + + if ((a <= b) && (a <= c)) + { + middle = (b <= c) ? b : c; + } + else if ((b <= a) && (b <= c)) + { + middle = (a <= c) ? a : c; + } + else + { + middle = (a <= b) ? a : b; + } + return middle; +} diff --git a/os/various/median.h b/os/various/median.h new file mode 100644 index 0000000..c74cb66 --- /dev/null +++ b/os/various/median.h @@ -0,0 +1,42 @@ +/* + ChibiOS-Contrib - Copyright (C) 2014...2019 Fabien Poussin + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MEDIAN_H_ +#define MEDIAN_H_ + +#include "ch.h" + +typedef struct pair_ +{ + struct pair_* point; /* Pointers forming list linked in sorted order */ + uint16_t value; /* Values to sort */ +} pair_t; + +typedef struct +{ + uint16_t stopper; /* Smaller than any datum */ + uint16_t size; /* 3 or more */ + pair_t* buffer; /* Buffer of nwidth pairs */ + pair_t* datpoint; /* Pointer into circular buffer of data */ + pair_t small; /* Chain stopper */ + pair_t big; /* Pointer to head (largest) of linked list.*/ +} median_t; + +void median_init(median_t* conf, uint16_t stopper, pair_t* buffer, uint16_t size); +uint16_t median_filter(median_t* conf, uint16_t datum); +uint16_t middle_of_3(uint16_t a, uint16_t b, uint16_t c); + +#endif /* MEDIAN_H_ */ -- cgit v1.2.3 From bdcee915863d3f4bcc561c192cef1155e1f65b02 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Fri, 25 Jan 2019 13:29:47 +0100 Subject: Missing op amp file for non smart build --- os/hal/hal.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/os/hal/hal.mk b/os/hal/hal.mk index f6b4edd..cd8420b 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -98,7 +98,8 @@ HALSRC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c \ - ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c + ${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c \ + ${CHIBIOS_CONTRIB}/os/hal/src/hal_opamp.c endif HALINC_CONTRIB := ${CHIBIOS_CONTRIB}/os/hal/include -- cgit v1.2.3 From 7b88a716bdb83a06e68e6ac8ab4a3648796a0df6 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Mon, 28 Jan 2019 20:14:57 +0100 Subject: Added ODR setting to mx2board.py --- tools/mx2board.py | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 20dcfb3..1727b12 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -48,7 +48,7 @@ DEFAULT_PAD = {"SIGNAL": "UNUSED", "OTYPER": PIN_OTYPE_PUSHPULL, "OSPEEDR": PIN_OSPEED_VERYLOW, "PUPDR": PIN_PUPDR_FLOATING, - "ODR": PIN_ODR_HIGH} + "ODR": PIN_ODR_LOW} PIN_MODE_TRANSLATE = {"GPIO_MODE_AF_PP": PIN_MODE_ALTERNATE, "GPIO_MODE_ANALOG": PIN_MODE_ANALOG, @@ -70,6 +70,9 @@ PIN_PUPDR_TRANSLATE = {"GPIO_NOPULL": PIN_PUPDR_FLOATING, "GPIO_PULLUP": PIN_PUPDR_PULLUP, "GPIO_PULLDOWN": PIN_PUPDR_PULLDOWN} +PIN_ODR_TRANSLATE = {"GPIO_PIN_SET": PIN_ODR_HIGH, + "GPIO_PIN_CLEAR": PIN_ODR_LOW} + parser = ArgumentParser(description='Generate ChibiOS GPIO header file from STM32CubeMX project files.') group = parser.add_mutually_exclusive_group(required=False) group.add_argument('-m', '--mx', default='', type=str, help='STM32CubeMX path. Invalid if -g is used.') @@ -222,6 +225,7 @@ def read_project(gpio, filename): pad_prop = split[0].split(".")[-1] prop_value = split[-1].rstrip('\r\n') + if pad_prop == "Signal": if 'S_TIM' in prop_value: prop_value = prop_value[2:] @@ -250,6 +254,8 @@ def read_project(gpio, filename): pads[pad_port][pad_num]["MODER"] = PIN_MODE_OUTPUT elif pad_prop == "GPIO_Speed": pads[pad_port][pad_num]["OSPEEDR"] = PIN_OSPEED_TRANSLATE[prop_value] + elif pad_prop == "PinState": + pads[pad_port][pad_num]["ODR"] = PIN_ODR_TRANSLATE[prop_value] return pads -- cgit v1.2.3 From 6076bdf27d3c70675dff3b1866a3bbc82aa1eb00 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 31 Jan 2019 17:52:13 +0100 Subject: Updating OpAmp code with calibration functions, cleaning. --- os/hal/include/hal_opamp.h | 29 +- os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c | 473 +++++++++++++++++++++- os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.h | 153 +++++-- os/hal/src/hal_opamp.c | 12 +- testhal/STM32/STM32F3xx/OPAMP/main.c | 9 +- testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h | 1 + 6 files changed, 588 insertions(+), 89 deletions(-) diff --git a/os/hal/include/hal_opamp.h b/os/hal/include/hal_opamp.h index 383e928..b20c938 100644 --- a/os/hal/include/hal_opamp.h +++ b/os/hal/include/hal_opamp.h @@ -26,6 +26,9 @@ /* Driver constants. */ /*===========================================================================*/ +#define OPAMP_P_BELOW_M (0U) +#define OPAMP_M_BELOW_P (1U) + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -44,8 +47,8 @@ typedef enum { OPAMP_UNINIT = 0, /**< Not initialized. */ OPAMP_STOP = 1, /**< Stopped. */ - OPAMP_READY = 2, /**< Ready. */ - OPAMP_ACTIVE = 3, /**< Active cycle phase. */ + OPAMP_ACTIVE = 2, /**< Active. */ + OPAMP_CALIBRATING = 3, /**< Calibration in progress. */ } opampstate_t; /** @@ -60,29 +63,13 @@ typedef struct OPAMPDriver OPAMPDriver; /*===========================================================================*/ /** - * @name Macro Functions - * @{ - */ -/** - * @brief Enables the input capture. - * - * @param[in] opamp pointer to the @p OPAMPDriver object - * + * @brief Calibrate opamps + * * * @iclass */ -#define opampEnableI(opamp) opamp_lld_enable(opamp) - -/** - * @brief Disables the input capture. - * - * @param[in] opamp pointer to the @p OPAMPDriver object - * - * @iclass - */ -#define opampDisableI(opamp) opamp_lld_disable(opamp) +#define opampCalibrate() opamp_lld_calibrate() /** @} */ - /** * @name Low Level driver helper macros * @{ diff --git a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c index 7251002..db988aa 100644 --- a/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c +++ b/os/hal/ports/STM32/LLD/OPAMPv1/hal_opamp_lld.c @@ -1,6 +1,7 @@ /* ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio Copyright (C) 2019 Fabien Poussin (fabien.poussin (at) google's mail) + Copyright (C) 2019 Alexandre Bustico Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -98,29 +99,29 @@ void opamp_lld_init(void) { #if STM32_OPAMP_USE_OPAMP1 /* Driver initialization.*/ opampObjectInit(&OPAMPD1); - OPAMPD1.reg = OPAMP; - OPAMPD1.reg->CSR = 0; + OPAMPD1.opamp = OPAMP; + OPAMPD1.opamp->CSR = 0; #endif #if STM32_OPAMP_USE_OPAMP2 /* Driver initialization.*/ opampObjectInit(&OPAMPD2); - OPAMPD2.reg = OPAMP2; - OPAMPD2.reg->CSR = 0; + OPAMPD2.opamp = OPAMP2; + OPAMPD2.opamp->CSR = 0; #endif #if STM32_OPAMP_USE_OPAMP3 /* Driver initialization.*/ opampObjectInit(&OPAMPD3); - OPAMPD3.reg = OPAMP3; - OPAMPD3.reg->CSR = 0; + OPAMPD3.opamp = OPAMP3; + OPAMPD3.opamp->CSR = 0; #endif #if STM32_OPAMP_USE_OPAMP4 /* Driver initialization.*/ opampObjectInit(&OPAMPD4); - OPAMPD4.reg = OPAMP4; - OPAMPD4.reg->CSR = 0; + OPAMPD4.opamp = OPAMP4; + OPAMPD4.opamp->CSR = 0; #endif } @@ -128,29 +129,29 @@ void opamp_lld_init(void) { /** * @brief Configures and activates the OPAMP peripheral. * - * @param[in] compp pointer to the @p OPAMPDriver object + * @param[in] opampp pointer to the @p OPAMPDriver object * * @notapi */ -void opamp_lld_start(OPAMPDriver *compp) { +void opamp_lld_start(OPAMPDriver *opampp) { // Apply CSR Execpt the enable bit. - compp->reg->CSR = compp->config->csr & ~OPAMP_CSR_OPAMPxEN; + opampp->opamp->CSR = opampp->config->csr & ~OPAMP_CSR_OPAMPxEN; } /** * @brief Deactivates the comp peripheral. * - * @param[in] compp pointer to the @p OPAMPDriver object + * @param[in] opampp pointer to the @p OPAMPDriver object * * @notapi */ -void opamp_lld_stop(OPAMPDriver *compp) { +void opamp_lld_stop(OPAMPDriver *opampp) { - if (compp->state == OPAMP_READY) { + if (opampp->state == OPAMP_ACTIVE) { - compp->reg->CSR = 0; + opampp->opamp->CSR = 0; } } @@ -158,27 +159,457 @@ void opamp_lld_stop(OPAMPDriver *compp) { /** * @brief Enables the output. * - * @param[in] compp pointer to the @p OPAMPDriver object + * @param[in] opampp pointer to the @p OPAMPDriver object * * @notapi */ -void opamp_lld_enable(OPAMPDriver *compp) { +void opamp_lld_enable(OPAMPDriver *opampp) { - compp->reg->CSR |= OPAMP_CSR_OPAMPxEN; /* Enable */ + opampp->opamp->CSR |= OPAMP_CSR_OPAMPxEN; /* Enable */ } /** * @brief Disables the output. * - * @param[in] compp pointer to the @p OPAMPDriver object + * @param[in] opampp pointer to the @p OPAMPDriver object * * @notapi */ -void opamp_lld_disable(OPAMPDriver *compp) { +void opamp_lld_disable(OPAMPDriver *opampp) { - compp->reg->CSR &= ~OPAMP_CSR_OPAMPxEN; /* Disable */ + opampp->opamp->CSR &= ~OPAMP_CSR_OPAMPxEN; /* Disable */ } +#if STM32_OPAMP_USER_TRIM_ENABLED + +void opamp_lld_calibrate_once(void) +{ +#if STM32_OPAMP_USE_OPAMP1 + uint32_t trimmingvaluen1 = 16U; + uint32_t trimmingvaluep1 = 16U; + OPAMPD1.state = OPAMP_CALIBRATING; +#define CSRm OPAMPD1.opamp->CSR + /* Set Calibration mode */ + /* Non-inverting input connected to calibration reference voltage. */ + CSRm |= OPAMP_CSR_FORCEVP; + /* user trimming values are used for offset calibration */ + CSRm |= OPAMP_CSR_USERTRIM; + /* Enable calibration */ + CSRm |= OPAMP_CSR_CALON; + /* 1st calibration - N Select 90U% VREF */ + MODIFY_REG(CSRm, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_90P); + /* Enable the opamps */ + CSRm |= OPAMP_CSR_OPAMPxEN; +#undef CSRm +#endif + +#if STM32_OPAMP_USE_OPAMP2 + uint32_t trimmingvaluen2 = 16U; + uint32_t trimmingvaluep2 = 16U; + OPAMPD2.state = OPAMP_CALIBRATING; +#define CSRm OPAMPD2.opamp->CSR + CSRm |= OPAMP_CSR_FORCEVP; + CSRm |= OPAMP_CSR_USERTRIM; + CSRm |= OPAMP_CSR_CALON; + MODIFY_REG(CSRm, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_90P); + CSRm |= OPAMP_CSR_OPAMPxEN; +#undef CSRm +#endif + +#if STM32_OPAMP_USE_OPAMP3 + uint32_t trimmingvaluen3 = 16U; + uint32_t trimmingvaluep3 = 16U; + OPAMPD3.state = OPAMP_CALIBRATING; +#define CSRm OPAMPD3.opamp->CSR + CSRm |= OPAMP_CSR_FORCEVP; + CSRm |= OPAMP_CSR_USERTRIM; + CSRm |= OPAMP_CSR_CALON; + MODIFY_REG(CSRm, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_90P); + CSRm |= OPAMP_CSR_OPAMPxEN; +#undef CSRm +#endif + +#if STM32_OPAMP_USE_OPAMP4 + uint32_t trimmingvaluen4 = 16U; + uint32_t trimmingvaluep4 = 16U; + OPAMPD4.state = OPAMP_CALIBRATING; +#define CSRm OPAMPD4.opamp->CSR + CSRm |= OPAMP_CSR_FORCEVP; + CSRm |= OPAMP_CSR_USERTRIM; + CSRm |= OPAMP_CSR_CALON; + MODIFY_REG(CSRm, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_90P); + CSRm |= OPAMP_CSR_OPAMPxEN; +#undef CSRm +#endif + + chSysPolledDelayX(MS2RTC(STM32_SYSCLK, 20)); + uint32_t delta = 8U; + + while (delta != 0U) { +#if STM32_OPAMP_USE_OPAMP1 + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen1<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen2<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen3<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen4<CSR & OPAMP_CSR_OUTCAL) { + /* OPAMP_CSR_OUTCAL is HIGH try higher trimming */ + trimmingvaluen1 += delta; + } else { + /* OPAMP_CSR_OUTCAL is LOW try lower trimming */ + trimmingvaluen1 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP2 + if (OPAMPD2.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen2 += delta; + } else { + trimmingvaluen2 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP3 + if (OPAMPD3.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen3 += delta; + } else { + trimmingvaluen3 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP4 + if (OPAMPD4.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen4 += delta; + } else { + trimmingvaluen4 -= delta; + } +#endif + + delta >>= 1U; + + } + + /* Still need to check if righ calibration is current value or un step below */ + /* Indeed the first value that causes the OUTCAL bit to change from 1 to 0U */ +#if STM32_OPAMP_USE_OPAMP1 + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen1<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen2<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen3<CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen4<CSR & OPAMP_CSR_OUTCAL) { + /* OPAMP_CSR_OUTCAL is HIGH try higher trimming */ + trimmingvaluen1 += (trimmingvaluen1 != 31); + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen1<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen2 += (trimmingvaluen2 != 31); + MODIFY_REG(OPAMPD2.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen2<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen3 += (trimmingvaluen3 != 31); + MODIFY_REG(OPAMPD3.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen3<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluen4 += (trimmingvaluen4 != 31); + MODIFY_REG(OPAMPD4.opamp->CSR, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen4<CSR, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_10P); +#endif +#if STM32_OPAMP_USE_OPAMP2 + MODIFY_REG(OPAMPD2.opamp->CSR, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_10P); +#endif +#if STM32_OPAMP_USE_OPAMP3 + MODIFY_REG(OPAMPD3.opamp->CSR, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_10P); +#endif +#if STM32_OPAMP_USE_OPAMP4 + MODIFY_REG(OPAMPD4.opamp->CSR, OPAMP_CSR_CALSEL, OPAMPx_CSR_CALSEL_10P); +#endif + + delta = 8U; + + while (delta != 0U) { +#if STM32_OPAMP_USE_OPAMP1 + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep1<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep2<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep3<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep4<CSR & OPAMP_CSR_OUTCAL) { + /* OPAMP_CSR_OUTCAL is HIGH try higher trimming */ + trimmingvaluep1 += delta; + } else { + /* OPAMP_CSR_OUTCAL is LOW try lower trimming */ + trimmingvaluep1 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP2 + if (OPAMPD2.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep2 += delta; + } else { + trimmingvaluep2 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP3 + if (OPAMPD3.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep3 += delta; + } else { + trimmingvaluep3 -= delta; + } +#endif + +#if STM32_OPAMP_USE_OPAMP4 + if (OPAMPD4.opamp->CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep4 += delta; + } else { + trimmingvaluep4 -= delta; + } +#endif + + delta >>= 1U; + } + + /* Still need to check if righ calibration is current value or un step below */ + /* Indeed the first value that causes the OUTCAL bit to change from 1 to 0U */ +#if STM32_OPAMP_USE_OPAMP1 + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep1<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep2<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep3<CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep4<CSR & OPAMP_CSR_OUTCAL) { + /* OPAMP_CSR_OUTCAL is HIGH try higher trimming */ + trimmingvaluep1 += (trimmingvaluep1 != 31); + MODIFY_REG(OPAMPD1.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep1<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep2 += (trimmingvaluep2 != 31); + MODIFY_REG(OPAMPD2.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep2<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep3 += (trimmingvaluep3 != 31); + MODIFY_REG(OPAMPD3.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep3<CSR & OPAMP_CSR_OUTCAL) { + trimmingvaluep4 += (trimmingvaluep4 != 31); + MODIFY_REG(OPAMPD4.opamp->CSR, OPAMP_CSR_TRIMOFFSETP, + trimmingvaluep4<CSR + /* Disable calibration */ + CSRm &= ~OPAMP_CSR_CALON; + /* Disable the OPAMPs */ + CSRm &= ~OPAMP_CSR_OPAMPxEN; + /* Set normal operating mode back */ + CSRm &= ~OPAMP_CSR_FORCEVP; + /* Write calibration result N */ + OPAMPD1.trim_n = trimmingvaluen1; + /* Write calibration result P */ + OPAMPD1.trim_p = trimmingvaluep1; + MODIFY_REG(CSRm, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen1<CSR + /* Disable calibration */ + CSRm &= ~OPAMP_CSR_CALON; + /* Disable the OPAMPs */ + CSRm &= ~OPAMP_CSR_OPAMPxEN; + /* Set normal operating mode back */ + CSRm &= ~OPAMP_CSR_FORCEVP; + /* Write calibration result N */ + OPAMPD2.trim_n = trimmingvaluen2; + /* Write calibration result P */ + OPAMPD2.trim_p = trimmingvaluep2; + MODIFY_REG(CSRm, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen2<CSR + /* Disable calibration */ + CSRm &= ~OPAMP_CSR_CALON; + /* Disable the OPAMPs */ + CSRm &= ~OPAMP_CSR_OPAMPxEN; + /* Set normal operating mode back */ + CSRm &= ~OPAMP_CSR_FORCEVP; + /* Write calibration result N */ + OPAMPD3.trim_n = trimmingvaluen3; + /* Write calibration result P */ + OPAMPD3.trim_p = trimmingvaluep3; + MODIFY_REG(CSRm, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen3<CSR + /* Disable calibration */ + CSRm &= ~OPAMP_CSR_CALON; + /* Disable the OPAMPs */ + CSRm &= ~OPAMP_CSR_OPAMPxEN; + /* Set normal operating mode back */ + CSRm &= ~OPAMP_CSR_FORCEVP; + /* Write calibration result N */ + OPAMPD4.trim_n = trimmingvaluen4; + /* Write calibration result P */ + OPAMPD4.trim_p = trimmingvaluep4; + MODIFY_REG(CSRm, OPAMP_CSR_TRIMOFFSETN, + trimmingvaluen4<state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_ACTIVE), "invalid state"); opampp->config = config; opamp_lld_start(opampp); - opampp->state = OPAMP_READY; + opampp->state = OPAMP_ACTIVE; osalSysUnlock(); } @@ -106,7 +106,7 @@ void opampStop(OPAMPDriver *opampp) { osalDbgCheck(opampp != NULL); osalSysLock(); - osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_READY), + osalDbgAssert((opampp->state == OPAMP_STOP) || (opampp->state == OPAMP_ACTIVE), "invalid state"); opamp_lld_stop(opampp); opampp->state = OPAMP_STOP; @@ -125,7 +125,7 @@ void opampEnable(OPAMPDriver *opampp) { osalDbgCheck(opampp != NULL); osalSysLock(); - osalDbgAssert(opampp->state == OPAMP_READY, "invalid state"); + osalDbgAssert(opampp->state == OPAMP_ACTIVE, "invalid state"); opamp_lld_enable(opampp); opampp->state = OPAMP_ACTIVE; osalSysUnlock(); @@ -143,10 +143,10 @@ void opampDisable(OPAMPDriver *opampp) { osalDbgCheck(opampp != NULL); osalSysLock(); - osalDbgAssert((opampp->state == OPAMP_READY) || (opampp->state == OPAMP_ACTIVE), + osalDbgAssert((opampp->state == OPAMP_ACTIVE), "invalid state"); opamp_lld_disable(opampp); - opampp->state = OPAMP_READY; + opampp->state = OPAMP_ACTIVE; osalSysUnlock(); } diff --git a/testhal/STM32/STM32F3xx/OPAMP/main.c b/testhal/STM32/STM32F3xx/OPAMP/main.c index 2bdb755..39af13c 100644 --- a/testhal/STM32/STM32F3xx/OPAMP/main.c +++ b/testhal/STM32/STM32F3xx/OPAMP/main.c @@ -83,10 +83,10 @@ static const GPTConfig gpt6cfg1 = { * We will double the input voltage */ static const OPAMPConfig opamp1_conf = { - STM32_OPAMP_NonInvertingInput_IO4 | // INP connectd to PA1 - STM32_OPAMP_InvertingInput_PGA | // INM connected to PGA - STM32_OPAMP_PGAGain_2 | // Gain of 2x - STM32_OPAMP_PGAConnect_No // PGA connected to ground + OPAMP1_CSR_VPSEL_PA01 | // INP connectd to PA1 + OPAMP1_CSR_VMSEL_PGA | // INM connected to PGA + OPAMPx_CSR_PGAGAIN_x2 | // Gain of 2x + OPAMPx_CSR_PGACONNECT_GROUND // PGA connected to ground }; /* @@ -118,6 +118,7 @@ int main(void) { gptStartContinuous(&GPTD6, 2U); opampEnable(&OPAMPD1); + opampCalibrate(); /* * Normal main() thread activity. diff --git a/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h index 76f9429..2f44dc1 100644 --- a/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h +++ b/testhal/STM32/STM32F3xx/OPAMP/mcuconf_community.h @@ -92,6 +92,7 @@ #define STM32_OPAMP_USE_OPAMP2 TRUE #define STM32_OPAMP_USE_OPAMP3 TRUE #define STM32_OPAMP_USE_OPAMP4 TRUE +#define STM32_OPAMP_USER_TRIM_ENABLED TRUE /* * USBH driver system settings. -- cgit v1.2.3 From e0e7b4270bcbc53e591df8b456f920e404d4158a Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Sun, 10 Feb 2019 21:26:18 +0100 Subject: Added spi and fixed FSMC alternate setup --- tools/mx2board.py | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/tools/mx2board.py b/tools/mx2board.py index 1727b12..6e09d39 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -240,6 +240,11 @@ def read_project(gpio, filename): elif 'GPIO_Input' == prop_value: pads[pad_port][pad_num]["MODER"] = PIN_MODE_INPUT else: + # workaround for different names in project and gpio defs + if "FSMC" in prop_value: + prop_value = re.sub(r"FSMC_D([0-9]+)_DA[0-9]+", + r"FSMC_D\1", prop_value) + pads[pad_port][pad_num]["SIGNAL"] = prop_value pads[pad_port][pad_num]["MODER"] = PIN_MODE_ALTERNATE pads[pad_port][pad_num]["OSPEEDR"] = PIN_OSPEED_MEDIUM @@ -316,6 +321,11 @@ def gen_defines(project): defines['I2C_' + label] = match.group(1) continue + match = re.search(r"SPI(\d)_(MOSI|MISO|SCK|NSS)", signal) + if match: + defines['SPI_' + label] = match.group(1) + continue + match = re.search(r"CAN(\d*)_[RT]X", signal) if match: can = match.group(1) -- cgit v1.2.3 From f014b8da68f162bb06ca88acf0085382a76d8dcd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Sim=C3=B5es?= Date: Tue, 26 Feb 2019 22:38:30 +0000 Subject: Fixes for USB MSD MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Fix return value on succesfull scsi_requestsense. - Fix calls to LL SMT32 API for OTG2. - Port changes from ChibiOS fatfs_diskio. - Rework checks to allow simultaneous use of SD Card and USB MSD. Signed-off-by: José Simões --- os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c | 4 +- os/hal/src/usbh/hal_usbh_msd.c | 2 + os/various/fatfs_bindings/fatfs_diskio.c | 84 ++++++++++++++++++---------- 3 files changed, 57 insertions(+), 33 deletions(-) diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c index 3298c20..192b008 100644 --- a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c +++ b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c @@ -1505,8 +1505,8 @@ static void _usbh_start(USBHDriver *usbh) { #endif { /* OTG HS clock enable and reset.*/ - rccEnableOTG_HS(TRUE); // Enable HS clock when cpu is in sleep mode - rccDisableOTG_HSULPI(TRUE); // Disable HS ULPI clock when cpu is in sleep mode + rccEnableOTG_HS(FALSE); // Disable HS clock when cpu is in sleep mode + rccDisableOTG_HSULPI(); rccResetOTG_HS(); otgp->GINTMSK = 0; diff --git a/os/hal/src/usbh/hal_usbh_msd.c b/os/hal/src/usbh/hal_usbh_msd.c index fe97ff0..3d57934 100644 --- a/os/hal/src/usbh/hal_usbh_msd.c +++ b/os/hal/src/usbh/hal_usbh_msd.c @@ -516,6 +516,8 @@ static msd_result_t _scsi_perform_transaction(USBHMassStorageLUNDriver *lunp, if (scsi_requestsense(lunp, &sense) == MSD_RESULT_OK) { uwarnf("\tMSD: REQUEST SENSE: Sense key=%x, ASC=%02x, ASCQ=%02x", sense.byte[2] & 0xf, sense.byte[12], sense.byte[13]); + + return MSD_RESULT_OK; } } return MSD_RESULT_FAILED; diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c index eb732fd..1b3f0a8 100644 --- a/os/various/fatfs_bindings/fatfs_diskio.c +++ b/os/various/fatfs_bindings/fatfs_diskio.c @@ -14,14 +14,31 @@ #error "cannot specify both MMC_SPI and SDC drivers" #endif -#if HAL_USE_MMC_SPI -extern MMCDriver MMCD1; -#elif HAL_USE_SDC -extern SDCDriver SDCD1; -#elif HAL_USBH_USE_MSD +// sanity check for no FAT option selected +// why is the FAT sources being pulled into the build? +#if !HAL_USE_MMC_SPI && !HAL_USE_SDC & !HAL_USBH_USE_MSD +#error "MMC_SPI, SDC or USBH_MSD driver must be specified. None was." +#endif +#if !defined(FATFS_HAL_DEVICE) +#if HAL_USE_MMC_SPI +#define FATFS_HAL_DEVICE MMCD1 #else -#error "MMC_SPI, SDC or USBH_MSD driver must be specified" +#define FATFS_HAL_DEVICE SDCD1 +#endif +#endif + +#if HAL_USE_MMC_SPI +extern MMCDriver FATFS_HAL_DEVICE; +#endif +#if HAL_USE_SDC +extern SDCDriver FATFS_HAL_DEVICE; +#endif +#if HAL_USBH_USE_MSD +#endif + +#if HAL_USE_RTC +extern RTCDriver RTCD1; #endif /*-----------------------------------------------------------------------*/ @@ -42,11 +59,12 @@ extern SDCDriver SDCD1; #endif #endif + /*-----------------------------------------------------------------------*/ /* Inidialize a Drive */ DSTATUS disk_initialize ( - BYTE pdrv /* Physical drive nmuber (0..) */ + BYTE pdrv /* Physical drive number (0..) */ ) { DSTATUS stat; @@ -56,18 +74,18 @@ DSTATUS disk_initialize ( case MMC: stat = 0; /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&MMCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (mmcIsWriteProtected(&MMCD1)) + if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) stat |= STA_PROTECT; return stat; #elif HAL_USE_SDC case SDC: stat = 0; /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&SDCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (sdcIsWriteProtected(&SDCD1)) + if (sdcIsWriteProtected(&FATFS_HAL_DEVICE)) stat |= STA_PROTECT; return stat; #endif @@ -99,18 +117,18 @@ DSTATUS disk_status ( case MMC: stat = 0; /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&MMCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (mmcIsWriteProtected(&MMCD1)) + if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) stat |= STA_PROTECT; return stat; #elif HAL_USE_SDC case SDC: stat = 0; /* It is initialized externally, just reads the status.*/ - if (blkGetDriverState(&SDCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) stat |= STA_NOINIT; - if (sdcIsWriteProtected(&SDCD1)) + if (sdcIsWriteProtected(&FATFS_HAL_DEVICE)) stat |= STA_PROTECT; return stat; #endif @@ -141,24 +159,24 @@ DRESULT disk_read ( switch (pdrv) { #if HAL_USE_MMC_SPI case MMC: - if (blkGetDriverState(&MMCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (mmcStartSequentialRead(&MMCD1, sector)) + if (mmcStartSequentialRead(&FATFS_HAL_DEVICE, sector)) return RES_ERROR; while (count > 0) { - if (mmcSequentialRead(&MMCD1, buff)) + if (mmcSequentialRead(&FATFS_HAL_DEVICE, buff)) return RES_ERROR; buff += MMCSD_BLOCK_SIZE; count--; } - if (mmcStopSequentialRead(&MMCD1)) + if (mmcStopSequentialRead(&FATFS_HAL_DEVICE)) return RES_ERROR; return RES_OK; #elif HAL_USE_SDC case SDC: - if (blkGetDriverState(&SDCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (sdcRead(&SDCD1, sector, buff, count)) + if (sdcRead(&FATFS_HAL_DEVICE, sector, buff, count)) return RES_ERROR; return RES_OK; #endif @@ -180,6 +198,7 @@ DRESULT disk_read ( /*-----------------------------------------------------------------------*/ /* Write Sector(s) */ +#if !FF_FS_READONLY DRESULT disk_write ( BYTE pdrv, /* Physical drive number (0..) */ const BYTE *buff, /* Data to be written */ @@ -190,26 +209,26 @@ DRESULT disk_write ( switch (pdrv) { #if HAL_USE_MMC_SPI case MMC: - if (blkGetDriverState(&MMCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (mmcIsWriteProtected(&MMCD1)) + if (mmcIsWriteProtected(&FATFS_HAL_DEVICE)) return RES_WRPRT; - if (mmcStartSequentialWrite(&MMCD1, sector)) + if (mmcStartSequentialWrite(&FATFS_HAL_DEVICE, sector)) return RES_ERROR; while (count > 0) { - if (mmcSequentialWrite(&MMCD1, buff)) + if (mmcSequentialWrite(&FATFS_HAL_DEVICE, buff)) return RES_ERROR; buff += MMCSD_BLOCK_SIZE; count--; } - if (mmcStopSequentialWrite(&MMCD1)) + if (mmcStopSequentialWrite(&FATFS_HAL_DEVICE)) return RES_ERROR; return RES_OK; #elif HAL_USE_SDC case SDC: - if (blkGetDriverState(&SDCD1) != BLK_READY) + if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; - if (sdcWrite(&SDCD1, sector, buff, count)) + if (sdcWrite(&FATFS_HAL_DEVICE, sector, buff, count)) return RES_ERROR; return RES_OK; #endif @@ -225,6 +244,7 @@ DRESULT disk_write ( } return RES_PARERR; } +#endif /* _FS_READONLY */ @@ -237,6 +257,8 @@ DRESULT disk_ioctl ( void *buff /* Buffer to send/receive control data */ ) { + (void)buff; + switch (pdrv) { #if HAL_USE_MMC_SPI case MMC: @@ -250,7 +272,7 @@ DRESULT disk_ioctl ( #endif #if FF_USE_TRIM case CTRL_TRIM: - mmcErase(&MMCD1, *((DWORD *)buff), *((DWORD *)buff + 1)); + mmcErase(&FATFS_HAL_DEVICE, *((DWORD *)buff), *((DWORD *)buff + 1)); return RES_OK; #endif default: @@ -262,7 +284,7 @@ DRESULT disk_ioctl ( case CTRL_SYNC: return RES_OK; case GET_SECTOR_COUNT: - *((DWORD *)buff) = mmcsdGetCardCapacity(&SDCD1); + *((DWORD *)buff) = mmcsdGetCardCapacity(&FATFS_HAL_DEVICE); return RES_OK; #if FF_MAX_SS > FF_MIN_SS case GET_SECTOR_SIZE: @@ -274,7 +296,7 @@ DRESULT disk_ioctl ( return RES_OK; #if FF_USE_TRIM case CTRL_TRIM: - sdcErase(&SDCD1, *((DWORD *)buff), *((DWORD *)buff + 1)); + sdcErase(&FATFS_HAL_DEVICE, *((DWORD *)buff), *((DWORD *)buff + 1)); return RES_OK; #endif default: -- cgit v1.2.3 From 1698a158b3ba91bccc1887733e31b19703caf61b Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Wed, 6 Mar 2019 19:54:44 +0100 Subject: Fixed gpio pin reset --- tools/mx2board.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/mx2board.py b/tools/mx2board.py index 6e09d39..4ad3e97 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -71,7 +71,8 @@ PIN_PUPDR_TRANSLATE = {"GPIO_NOPULL": PIN_PUPDR_FLOATING, "GPIO_PULLDOWN": PIN_PUPDR_PULLDOWN} PIN_ODR_TRANSLATE = {"GPIO_PIN_SET": PIN_ODR_HIGH, - "GPIO_PIN_CLEAR": PIN_ODR_LOW} + "GPIO_PIN_CLEAR": PIN_ODR_LOW, + "GPIO_PIN_RESET": PIN_ODR_LOW } parser = ArgumentParser(description='Generate ChibiOS GPIO header file from STM32CubeMX project files.') group = parser.add_mutually_exclusive_group(required=False) -- cgit v1.2.3 From c4f2b98ee139b1659db9ee793194b63f257ec64d Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 21:56:05 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 80 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Jenkinsfile diff --git a/Jenkinsfile b/Jenkinsfile new file mode 100644 index 0000000..b24c08f --- /dev/null +++ b/Jenkinsfile @@ -0,0 +1,80 @@ +pipeline { + agent any + stages { + stage('Prepare ChibiOS') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04' + } + + } + steps { + sh 'exit 0' + } + } + stage('Build STM32') { + parallel { + stage('Build STM32') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' + } + } + stage('Build NRF51') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' + } + } + stage('Build NRF52') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' + } + } + stage('Build TIVA') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' + } + } + stage('Build Kinetis') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' + } + } + } + } + } +} \ No newline at end of file -- cgit v1.2.3 From ca5a2353e5e3e8006db4f0f1ef28c9a5331518cc Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:03:09 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index b24c08f..6956e66 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,7 +9,8 @@ pipeline { } steps { - sh 'exit 0' + sh '''mkdir -p $WORKSPACE/contrib +mv -v $WORKSPACE/* $WORKSPACE/.* contrib/''' } } stage('Build STM32') { @@ -22,8 +23,8 @@ pipeline { } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/STM32/''' } } stage('Build NRF51') { @@ -34,8 +35,8 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF51/''' } } stage('Build NRF52') { @@ -46,8 +47,8 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF52/''' } } stage('Build TIVA') { @@ -58,8 +59,8 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/TIVA/''' } } stage('Build Kinetis') { @@ -70,8 +71,8 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git ../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/KINETIS/''' } } } -- cgit v1.2.3 From bf3fc1d51c639d0990f7b8e2bf6e530d74ed65e7 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:08:30 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 6956e66..96a3337 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,8 +9,9 @@ pipeline { } steps { - sh '''mkdir -p $WORKSPACE/contrib -mv -v $WORKSPACE/* $WORKSPACE/.* contrib/''' + sh '''rm -rf $WORKSPACE/contrib +mkdir -p $WORKSPACE/contrib +mv -v $WORKSPACE/* $WORKSPACE/.git $WORKSPACE/contrib/''' } } stage('Build STM32') { -- cgit v1.2.3 From 1d84bbbbf6c5f173b8351d8be525ae926bde7c4f Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:13:55 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index 96a3337..26ea3ed 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -11,7 +11,7 @@ pipeline { steps { sh '''rm -rf $WORKSPACE/contrib mkdir -p $WORKSPACE/contrib -mv -v $WORKSPACE/* $WORKSPACE/.git $WORKSPACE/contrib/''' +mv -fv $WORKSPACE/* $WORKSPACE/.git $WORKSPACE/contrib/''' } } stage('Build STM32') { -- cgit v1.2.3 From ce4673522bd881f774bee686f0cfc0a313ed69a2 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:34:17 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 39 ++++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 26ea3ed..f7f57d1 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,9 +9,7 @@ pipeline { } steps { - sh '''rm -rf $WORKSPACE/contrib -mkdir -p $WORKSPACE/contrib -mv -fv $WORKSPACE/* $WORKSPACE/.git $WORKSPACE/contrib/''' + sh 'exit 0' } } stage('Build STM32') { @@ -24,8 +22,11 @@ mv -fv $WORKSPACE/* $WORKSPACE/.git $WORKSPACE/contrib/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/STM32/''' + ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' + } + } } stage('Build NRF51') { @@ -36,8 +37,11 @@ bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/STM32/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF51/''' + ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' + } + } } stage('Build NRF52') { @@ -48,8 +52,11 @@ bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF51/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF52/''' + ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' + } + } } stage('Build TIVA') { @@ -60,8 +67,11 @@ bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/NRF52/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/TIVA/''' + ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' + } + } } stage('Build Kinetis') { @@ -72,8 +82,11 @@ bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/TIVA/''' } steps { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/KINETIS/''' + ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT +bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' + } + } } } -- cgit v1.2.3 From c35f46b2c522c0e6c607fa1a43e0661eeed0004d Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:40:54 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index f7f57d1..10d1a1f 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -22,7 +22,7 @@ pipeline { } steps { - ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + ws(dir: '$HOME/workspace/ChibiOS/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } @@ -37,7 +37,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } steps { - ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + ws(dir: '$HOME/workspace/ChibiOS/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } @@ -52,7 +52,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } steps { - ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + ws(dir: '$HOME/workspace/ChibiOS/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } @@ -67,7 +67,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } steps { - ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + ws(dir: '$HOME/workspace/ChibiOS/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } @@ -82,7 +82,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } steps { - ws(dir: '$HOME/workspaces/ChibiOS/Contrib') { + ws(dir: '$HOME/workspace/ChibiOS/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' } -- cgit v1.2.3 From b2434b63c0efa39b1feec7e2f9df2c4301a97f62 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:46:55 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 10d1a1f..46078f1 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -22,7 +22,7 @@ pipeline { } steps { - ws(dir: '$HOME/workspace/ChibiOS/Contrib') { + ws(dir: 'Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } @@ -37,7 +37,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } steps { - ws(dir: '$HOME/workspace/ChibiOS/Contrib') { + ws(dir: 'Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } @@ -52,7 +52,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } steps { - ws(dir: '$HOME/workspace/ChibiOS/Contrib') { + ws(dir: 'Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } @@ -67,7 +67,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } steps { - ws(dir: '$HOME/workspace/ChibiOS/Contrib') { + ws(dir: 'Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } @@ -82,7 +82,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } steps { - ws(dir: '$HOME/workspace/ChibiOS/Contrib') { + ws(dir: 'Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' } -- cgit v1.2.3 From c1928f4bb40461e41181251b4a31a51647634888 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 22:53:25 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 46078f1..36038f6 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -22,7 +22,7 @@ pipeline { } steps { - ws(dir: 'Contrib') { + ws(dir: 'workspace/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } @@ -37,7 +37,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' } steps { - ws(dir: 'Contrib') { + ws(dir: 'workspace/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } @@ -52,7 +52,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' } steps { - ws(dir: 'Contrib') { + ws(dir: 'workspace/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } @@ -67,7 +67,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' } steps { - ws(dir: 'Contrib') { + ws(dir: 'workspace/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } @@ -82,7 +82,7 @@ bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' } steps { - ws(dir: 'Contrib') { + ws(dir: 'workspace/Contrib') { sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' } -- cgit v1.2.3 From 88b07625448b0a8e8741b676af18d7dcd54757d7 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:20:51 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index 36038f6..dfea3a5 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,7 +9,10 @@ pipeline { } steps { - sh 'exit 0' + ws(dir: 'workspace/Contrib') { + sh 'exit 0' + } + } } stage('Build STM32') { -- cgit v1.2.3 From 6f30cc30fe238a296a2cae7c27cf09078b054217 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:35:58 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 87 ++++++++----------------------------------------------------- 1 file changed, 11 insertions(+), 76 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index dfea3a5..be26f9c 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,89 +9,24 @@ pipeline { } steps { - ws(dir: 'workspace/Contrib') { - sh 'exit 0' - } - + sh 'exit 0' } } stage('Build STM32') { - parallel { - stage('Build STM32') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } - - } - steps { - ws(dir: 'workspace/Contrib') { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/STM32/''' - } - - } - } - stage('Build NRF51') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } - - } - steps { - ws(dir: 'workspace/Contrib') { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF51/''' - } - - } - } - stage('Build NRF52') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } - - } - steps { - ws(dir: 'workspace/Contrib') { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/NRF52/''' - } - - } + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' } - stage('Build TIVA') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } - - } - steps { - ws(dir: 'workspace/Contrib') { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/TIVA/''' - } - } - } - stage('Build Kinetis') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } + } + steps { + sh '''mkdir /tmp/contrib +cp -r $WORKSPACE/* $WORKSPACE/*.git /tmp/contrib/ - } - steps { - ws(dir: 'workspace/Contrib') { - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/../ChibiOS-RT -bash $WORKSPACE/tools/chbuild.sh $WORKSPACE/testhal/KINETIS/''' - } - } - } +mv -v /tmp/contrib $WORKSPACE/''' + sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT +bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/STM32/''' } } } -- cgit v1.2.3 From ca01b1216759e77963ad953a62106e872c4592c6 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:37:11 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index be26f9c..ca22b8f 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -21,7 +21,7 @@ pipeline { } steps { sh '''mkdir /tmp/contrib -cp -r $WORKSPACE/* $WORKSPACE/*.git /tmp/contrib/ +cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib/ mv -v /tmp/contrib $WORKSPACE/''' -- cgit v1.2.3 From c5e0d2788e9181f1d8e35e606f4a12861c3c95d2 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:39:14 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index ca22b8f..5e0fb38 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -26,7 +26,8 @@ cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib/ mv -v /tmp/contrib $WORKSPACE/''' sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -bash $WORKSPACE/contrib/tools/chbuild.sh $WORKSPACE/contrib/testhal/STM32/''' +cd $WORKSPACE/contrib +bash ./tools/chbuild.sh ./testhal/STM32/''' } } } -- cgit v1.2.3 From ddebfb236092b0820b56286b4fd25258996af0e9 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:44:46 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 5e0fb38..aa4dbf4 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -20,11 +20,11 @@ pipeline { } steps { - sh '''mkdir /tmp/contrib -cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib/ + sh '''mkdir /tmp/contrib_$EXECUTOR_NUMBER +cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib_$EXECUTOR_NUMBER -mv -v /tmp/contrib $WORKSPACE/''' +cp -r /tmp/contrib_$EXECUTOR_NUMBER $WORKSPACE/''' sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT cd $WORKSPACE/contrib bash ./tools/chbuild.sh ./testhal/STM32/''' -- cgit v1.2.3 From df73c38d3036de04e7bd3867f2b068e8c7ee3569 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:47:55 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index aa4dbf4..a239f6f 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -25,7 +25,7 @@ pipeline { cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib_$EXECUTOR_NUMBER cp -r /tmp/contrib_$EXECUTOR_NUMBER $WORKSPACE/''' - sh '''git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT + sh '''git -C $WORKSPACE/ChibiOS-RT pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT cd $WORKSPACE/contrib bash ./tools/chbuild.sh ./testhal/STM32/''' } -- cgit v1.2.3 From 34701463fcc4d7a0a5a226f9a464de8077cf8744 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Wed, 6 Mar 2019 23:49:01 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index a239f6f..1368b36 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -26,7 +26,7 @@ cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib_$EXECUTOR_NUMBER cp -r /tmp/contrib_$EXECUTOR_NUMBER $WORKSPACE/''' sh '''git -C $WORKSPACE/ChibiOS-RT pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -cd $WORKSPACE/contrib +cd $WORKSPACE/contrib_$EXECUTOR_NUMBER bash ./tools/chbuild.sh ./testhal/STM32/''' } } -- cgit v1.2.3 From 559e7bd1d78c351fc45c4a930b28681699c6f0b9 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 09:24:58 +0000 Subject: Adding ChibiOS path override feature to chbuild.sh --- tools/chbuild.sh | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tools/chbuild.sh b/tools/chbuild.sh index 6323dcb..91bc28a 100755 --- a/tools/chbuild.sh +++ b/tools/chbuild.sh @@ -11,7 +11,6 @@ JOBS=$(grep -c ^processor /proc/cpuinfo) SKIP_ARRAY=(Win32) RETCODE=0 - function test_skip { Array=$1 SKIP=0 @@ -42,7 +41,11 @@ function chbuild { fi pushd $t > /dev/null printf "BUILDING: ${t}\n" - make --quiet -j $JOBS > /dev/null + if [ -z "$CH_PATH" ]; then + make --quiet -j $JOBS > /dev/null + else + make CHIBIOS=$CH_PATH --quiet -j $JOBS > /dev/null + fi if [ $? -ne 0 ]; then ((NOK++)) FAIL+=($t) -- cgit v1.2.3 From 9ca52f9dc3e615b52398821ec674a3a119df92cc Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 10:26:23 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 1368b36..ffb1c7d 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -20,14 +20,9 @@ pipeline { } steps { - sh '''mkdir /tmp/contrib_$EXECUTOR_NUMBER + sh '''git -C $WORKSPACE/ChibiOS pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git -cp -r $WORKSPACE/* $WORKSPACE/.git /tmp/contrib_$EXECUTOR_NUMBER - -cp -r /tmp/contrib_$EXECUTOR_NUMBER $WORKSPACE/''' - sh '''git -C $WORKSPACE/ChibiOS-RT pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git $WORKSPACE/ChibiOS-RT -cd $WORKSPACE/contrib_$EXECUTOR_NUMBER -bash ./tools/chbuild.sh ./testhal/STM32/''' +CH_PATH=$WORKSPACE/ChibiOS ./tools/chbuild.sh ./testhal/STM32/''' } } } -- cgit v1.2.3 From c4adeba80e96cc989091887e0baadcb609c984d5 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 09:34:06 +0000 Subject: Adding path support for ChibiOS-Contrib --- tools/chbuild.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/chbuild.sh b/tools/chbuild.sh index 91bc28a..94a6186 100755 --- a/tools/chbuild.sh +++ b/tools/chbuild.sh @@ -41,10 +41,10 @@ function chbuild { fi pushd $t > /dev/null printf "BUILDING: ${t}\n" - if [ -z "$CH_PATH" ]; then + if [ -z "$CH_PATH" && -z "$CHC_PATH" ]; then make --quiet -j $JOBS > /dev/null else - make CHIBIOS=$CH_PATH --quiet -j $JOBS > /dev/null + make CHIBIOS=$CH_PATH CHIBIOS_CONTRIB=$CHC_PATH --quiet -j $JOBS > /dev/null fi if [ $? -ne 0 ]; then ((NOK++)) -- cgit v1.2.3 From 6509e836ebddfde3652586481b245834ea4d2a87 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 10:36:24 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index ffb1c7d..fd3da41 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -20,9 +20,9 @@ pipeline { } steps { - sh '''git -C $WORKSPACE/ChibiOS pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git - -CH_PATH=$WORKSPACE/ChibiOS ./tools/chbuild.sh ./testhal/STM32/''' + sh 'git -C $WORKSPACE/ChibiOS pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git' + sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' + sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } } } -- cgit v1.2.3 From 22c27bd977fa6f31e9f6401876cb0cbd066387b1 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 09:38:10 +0000 Subject: Script typo --- tools/chbuild.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/chbuild.sh b/tools/chbuild.sh index 94a6186..0340114 100755 --- a/tools/chbuild.sh +++ b/tools/chbuild.sh @@ -41,7 +41,7 @@ function chbuild { fi pushd $t > /dev/null printf "BUILDING: ${t}\n" - if [ -z "$CH_PATH" && -z "$CHC_PATH" ]; then + if [[ -z "$CH_PATH" && -z "$CHC_PATH" ]]; then make --quiet -j $JOBS > /dev/null else make CHIBIOS=$CH_PATH CHIBIOS_CONTRIB=$CHC_PATH --quiet -j $JOBS > /dev/null -- cgit v1.2.3 From 19dd0a51071d1ead97fb149bb677c4aecccf72dc Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 10:43:41 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index fd3da41..b3edf69 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -20,7 +20,9 @@ pipeline { } steps { - sh 'git -C $WORKSPACE/ChibiOS pull || git clone -b stable_19.1.x --single-branch https://github.com/ChibiOS/ChibiOS.git' + sh '''BRANCH=stable_18.2.x + +git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } -- cgit v1.2.3 From c4b16f95b9ce7833ef608e714d847abefaa65866 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 10:45:20 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index b3edf69..28b49e7 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -22,7 +22,7 @@ pipeline { steps { sh '''BRANCH=stable_18.2.x -git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git''' +git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || rm -rf $WORKSPACE/ChibiOS && git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } -- cgit v1.2.3 From d4c95a30aa390c30c0ae2fb10f1acaee2b199315 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 10:56:10 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index 28b49e7..4914eda 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -22,7 +22,9 @@ pipeline { steps { sh '''BRANCH=stable_18.2.x -git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || rm -rf $WORKSPACE/ChibiOS && git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git''' +git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || rm -rf $WORKSPACE/ChibiOS && git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git +cd $WORKSPACE/ChibiOS/ext +z7 x -y *.7z''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } -- cgit v1.2.3 From cabe71bbf51e274cd3ede71818fa5a816d6ec6ac Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 11:00:13 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 4914eda..2544449 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -21,9 +21,12 @@ pipeline { } steps { sh '''BRANCH=stable_18.2.x +CH_PATH=$WORKSPACE/ChibiOS -git -C $WORKSPACE/ChibiOS checkout $BRANCH && git -C $WORKSPACE/ChibiOS pull || rm -rf $WORKSPACE/ChibiOS && git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git -cd $WORKSPACE/ChibiOS/ext +rm -rf $CH_PATH +git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH + +cd $CH_PATH/ext z7 x -y *.7z''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' -- cgit v1.2.3 From a50f85fecfb73fb74c1d5469b953c625407083f1 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 11:01:11 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index 2544449..f9de2b8 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -27,7 +27,7 @@ rm -rf $CH_PATH git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH cd $CH_PATH/ext -z7 x -y *.7z''' +7z x -y *.7z''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } -- cgit v1.2.3 From e80ffbd4dcadc280e66ea8dc2d6c8712094fd341 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 11:15:15 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index f9de2b8..309acaa 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -27,7 +27,7 @@ rm -rf $CH_PATH git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH cd $CH_PATH/ext -7z x -y *.7z''' +for i in *.7z; do 7z x -y $i; done''' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' } -- cgit v1.2.3 From bf1c2b71c2427d7e1bd922e25eb2b2c2de5d839b Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 12:36:45 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Jenkinsfile b/Jenkinsfile index 309acaa..2e32a9f 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -23,6 +23,8 @@ pipeline { sh '''BRANCH=stable_18.2.x CH_PATH=$WORKSPACE/ChibiOS +arm-none-eabi-gcc -v + rm -rf $CH_PATH git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH -- cgit v1.2.3 From ed39bf01d8606c799dcfeec2f5437d2610c12ec6 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 12:55:28 +0100 Subject: USB_HOST fix --- testhal/STM32/STM32F4xx/USB_HOST/halconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/testhal/STM32/STM32F4xx/USB_HOST/halconf.h b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h index 33f3f94..24a2af7 100644 --- a/testhal/STM32/STM32F4xx/USB_HOST/halconf.h +++ b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h @@ -139,7 +139,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE +#define HAL_USE_SDC TRUE #endif /** -- cgit v1.2.3 From 77692a659010a32c5559f665a65ba761d0f77ac0 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 16:06:33 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 2e32a9f..0c790d0 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -20,19 +20,21 @@ pipeline { } steps { - sh '''BRANCH=stable_18.2.x -CH_PATH=$WORKSPACE/ChibiOS - -arm-none-eabi-gcc -v + sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH -git clone -b $BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH +git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH cd $CH_PATH/ext for i in *.7z; do 7z x -y $i; done''' - sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./testhal/STM32/' - sh 'CH_PATH=$WORKSPACE/ChibiOS CHC_PATH=$WORKSPACE ./tools/chbuild.sh ./demos/STM32/' + sh './tools/chbuild.sh ./testhal/STM32/' + sh './tools/chbuild.sh ./demos/STM32/' } } } + environment { + CH_BRANCH = 'stable_18.2.x' + CH_PATH = '$WORKSPACE/ChibiOS' + CHC_PATH = '$WORKSPACE' + } } \ No newline at end of file -- cgit v1.2.3 From 65d37f4b57dc034423a5e4db5170e4cc1eea6928 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 16:25:27 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index 0c790d0..1fe1b83 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -9,7 +9,9 @@ pipeline { } steps { - sh 'exit 0' + sh '''echo $CH_BRANCH +echo $CH_PATH +echo $CHC_PATH''' } } stage('Build STM32') { -- cgit v1.2.3 From 07ec3b242bf7eea0b5d8dfad7b6cd32db055dbbd Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 16:41:17 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 1fe1b83..8304e12 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -21,6 +21,10 @@ echo $CHC_PATH''' } } + environment { + CH_PATH = '$WORKSPACE/ChibiOS' + CHC_PATH = '$WORKSPACE' + } steps { sh '''arm-none-eabi-gcc -v @@ -36,7 +40,5 @@ for i in *.7z; do 7z x -y $i; done''' } environment { CH_BRANCH = 'stable_18.2.x' - CH_PATH = '$WORKSPACE/ChibiOS' - CHC_PATH = '$WORKSPACE' } } \ No newline at end of file -- cgit v1.2.3 From 4f432ac279f8033f949d499921f69648c3d6cbf1 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 17:17:24 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 8304e12..2e7f0e7 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -21,10 +21,6 @@ echo $CHC_PATH''' } } - environment { - CH_PATH = '$WORKSPACE/ChibiOS' - CHC_PATH = '$WORKSPACE' - } steps { sh '''arm-none-eabi-gcc -v @@ -40,5 +36,7 @@ for i in *.7z; do 7z x -y $i; done''' } environment { CH_BRANCH = 'stable_18.2.x' + CH_PATH = './ChibiOS' + CHC_PATH = './' } } \ No newline at end of file -- cgit v1.2.3 From 7c02ec8dea2f9a6f3cd715311544c0d446050094 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 17:20:23 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 2e7f0e7..1d23778 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -36,7 +36,7 @@ for i in *.7z; do 7z x -y $i; done''' } environment { CH_BRANCH = 'stable_18.2.x' - CH_PATH = './ChibiOS' - CHC_PATH = './' + CH_PATH = '$PWD/ChibiOS' + CHC_PATH = '$PWD' } } \ No newline at end of file -- cgit v1.2.3 From 7a7d472bb3915d52d815eb507ed6ebd6f4681a44 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 17:25:16 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 1d23778..d0dea6d 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -11,7 +11,9 @@ pipeline { steps { sh '''echo $CH_BRANCH echo $CH_PATH -echo $CHC_PATH''' +echo $CHC_PATH + +exit 0''' } } stage('Build STM32') { @@ -29,14 +31,19 @@ git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $ cd $CH_PATH/ext for i in *.7z; do 7z x -y $i; done''' - sh './tools/chbuild.sh ./testhal/STM32/' - sh './tools/chbuild.sh ./demos/STM32/' + sh '''export CH_PATH=$WORKSPACE/ChibiOS +export CHC_PATH=$WORKSPACE + +./tools/chbuild.sh ./testhal/STM32/''' + sh '''export CH_PATH=$WORKSPACE/ChibiOS +export CHC_PATH=$WORKSPACE + +./tools/chbuild.sh ./demos/STM32/''' } } } environment { CH_BRANCH = 'stable_18.2.x' - CH_PATH = '$PWD/ChibiOS' - CHC_PATH = '$PWD' + CH_PATH = 'ChibiOS' } } \ No newline at end of file -- cgit v1.2.3 From f60e9ddfc9406724b90a7ef95a810af895c90f76 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Thu, 7 Mar 2019 17:30:01 +0100 Subject: Added Jenkinsfile --- Jenkinsfile | 94 +++++++++++++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 83 insertions(+), 11 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index d0dea6d..ed69d14 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -17,28 +17,100 @@ exit 0''' } } stage('Build STM32') { - agent { - docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' - } + parallel { + stage('Build STM32') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } - } - steps { - sh '''arm-none-eabi-gcc -v + } + steps { + sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH cd $CH_PATH/ext for i in *.7z; do 7z x -y $i; done''' - sh '''export CH_PATH=$WORKSPACE/ChibiOS + sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE -./tools/chbuild.sh ./testhal/STM32/''' - sh '''export CH_PATH=$WORKSPACE/ChibiOS +./tools/chbuild.sh ./testhal/STM32/ +./tools/chbuild.sh ./demos/STM32/''' + } + } + stage('Build NRF51') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''arm-none-eabi-gcc -v + +rm -rf $CH_PATH +git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH + +cd $CH_PATH/ext +for i in *.7z; do 7z x -y $i; done +''' + sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE -./tools/chbuild.sh ./demos/STM32/''' +./tools/chbuild.sh ./testhal/NRF51/ +./tools/chbuild.sh ./demos/NRF51/ +''' + } + } + stage('Build NRF52') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''arm-none-eabi-gcc -v + +rm -rf $CH_PATH +git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH + +cd $CH_PATH/ext +for i in *.7z; do 7z x -y $i; done +''' + sh '''export CH_PATH=$WORKSPACE/ChibiOS +export CHC_PATH=$WORKSPACE + +./tools/chbuild.sh ./testhal/NRF52/ +./tools/chbuild.sh ./demos/NRF52/ +''' + } + } + stage('Build Kinetis') { + agent { + docker { + image 'fpoussin/jenkins:ubuntu-18.04-arm' + } + + } + steps { + sh '''arm-none-eabi-gcc -v + +rm -rf $CH_PATH +git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH + +cd $CH_PATH/ext +for i in *.7z; do 7z x -y $i; done''' + sh '''export CH_PATH=$WORKSPACE/ChibiOS +export CHC_PATH=$WORKSPACE + +./tools/chbuild.sh ./testhal/KINETIS/ +./tools/chbuild.sh ./demos/KINETIS/ +''' + } + } } } } -- cgit v1.2.3 From ab0b1c80d2683ea0e6ce9791e4c3eb327c318b42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Sim=C3=B5es?= Date: Thu, 7 Mar 2019 16:30:13 +0000 Subject: Add call to cache flush on disk write - This is required for F7 targets (and others that feature memory cache). - The call is provided empty for all the other series, so it's OK to use it as it is. --- os/various/fatfs_bindings/fatfs_diskio.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c index 1b3f0a8..39a8658 100644 --- a/os/various/fatfs_bindings/fatfs_diskio.c +++ b/os/various/fatfs_bindings/fatfs_diskio.c @@ -206,6 +206,9 @@ DRESULT disk_write ( UINT count /* Number of sectors to write (1..255) */ ) { + // invalidate cache on buffer + cacheBufferFlush(buff, count * MMCSD_BLOCK_SIZE); + switch (pdrv) { #if HAL_USE_MMC_SPI case MMC: -- cgit v1.2.3 From a3e31145803753b70239f60db6b73597d3a06511 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Sim=C3=B5es?= Date: Sun, 10 Mar 2019 11:33:40 +0000 Subject: Fix F7 cache invalidation on write operation --- os/various/fatfs_bindings/fatfs_diskio.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c index 39a8658..7f510a0 100644 --- a/os/various/fatfs_bindings/fatfs_diskio.c +++ b/os/various/fatfs_bindings/fatfs_diskio.c @@ -206,8 +206,6 @@ DRESULT disk_write ( UINT count /* Number of sectors to write (1..255) */ ) { - // invalidate cache on buffer - cacheBufferFlush(buff, count * MMCSD_BLOCK_SIZE); switch (pdrv) { #if HAL_USE_MMC_SPI @@ -218,11 +216,15 @@ DRESULT disk_write ( return RES_WRPRT; if (mmcStartSequentialWrite(&FATFS_HAL_DEVICE, sector)) return RES_ERROR; + while (count > 0) { - if (mmcSequentialWrite(&FATFS_HAL_DEVICE, buff)) - return RES_ERROR; - buff += MMCSD_BLOCK_SIZE; - count--; + // invalidate cache on buffer + cacheBufferFlush(buff, MMCSD_BLOCK_SIZE); + + if (mmcSequentialWrite(&FATFS_HAL_DEVICE, buff)) + return RES_ERROR; + buff += MMCSD_BLOCK_SIZE; + count--; } if (mmcStopSequentialWrite(&FATFS_HAL_DEVICE)) return RES_ERROR; @@ -231,8 +233,13 @@ DRESULT disk_write ( case SDC: if (blkGetDriverState(&FATFS_HAL_DEVICE) != BLK_READY) return RES_NOTRDY; + + // invalidate cache on buffer + cacheBufferFlush(buff, count * MMCSD_BLOCK_SIZE); + if (sdcWrite(&FATFS_HAL_DEVICE, sector, buff, count)) return RES_ERROR; + return RES_OK; #endif #if HAL_USBH_USE_MSD @@ -240,6 +247,10 @@ DRESULT disk_write ( /* It is initialized externally, just reads the status.*/ if (blkGetDriverState(&MSBLKD[0]) != BLK_READY) return RES_NOTRDY; + + // invalidate cache on buffer + cacheBufferFlush(buff, count * MSBLKD[0].info.blk_size); + if (usbhmsdLUNWrite(&MSBLKD[0], sector, buff, count)) return RES_ERROR; return RES_OK; -- cgit v1.2.3 From a4388d61308f64b7adffeb62417fc0cb2e739a3f Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Mon, 11 Mar 2019 16:38:13 +0100 Subject: Updating JenkinsFile --- Jenkinsfile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Jenkinsfile b/Jenkinsfile index ed69d14..85df24a 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -16,7 +16,7 @@ echo $CHC_PATH exit 0''' } } - stage('Build STM32') { + stage('Build Platforms') { parallel { stage('Build STM32') { agent { -- cgit v1.2.3 From 369b44119ee231b5cb2cbccd7fc0e14dca7314f8 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Mon, 11 Mar 2019 22:06:08 +0100 Subject: Faster jenkins builds --- Jenkinsfile | 46 ++++++++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 16 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 85df24a..03b2d1e 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -21,7 +21,7 @@ exit 0''' stage('Build STM32') { agent { docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' + image 'fpoussin/jenkins:ubuntu-18.04-chibios' } } @@ -29,9 +29,13 @@ exit 0''' sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH -git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH +git clone /var/lib/git/ChibiOS $CH_PATH +cd $CH_PATH +git remote set-url origin https://github.com/ChibiOS/ChibiOS.git +git pull --rebase +git checkout -b $CH_BRANCH -cd $CH_PATH/ext +cd ext for i in *.7z; do 7z x -y $i; done''' sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE @@ -43,7 +47,7 @@ export CHC_PATH=$WORKSPACE stage('Build NRF51') { agent { docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' + image 'fpoussin/jenkins:ubuntu-18.04-chibios' } } @@ -51,11 +55,14 @@ export CHC_PATH=$WORKSPACE sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH -git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH +git clone /var/lib/git/ChibiOS $CH_PATH +cd $CH_PATH +git remote set-url origin https://github.com/ChibiOS/ChibiOS.git +git pull --rebase +git checkout -b $CH_BRANCH -cd $CH_PATH/ext -for i in *.7z; do 7z x -y $i; done -''' +cd ext +for i in *.7z; do 7z x -y $i; done''' sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE @@ -67,7 +74,7 @@ export CHC_PATH=$WORKSPACE stage('Build NRF52') { agent { docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' + image 'fpoussin/jenkins:ubuntu-18.04-chibios' } } @@ -75,11 +82,14 @@ export CHC_PATH=$WORKSPACE sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH -git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH +git clone /var/lib/git/ChibiOS $CH_PATH +cd $CH_PATH +git remote set-url origin https://github.com/ChibiOS/ChibiOS.git +git pull --rebase +git checkout -b $CH_BRANCH -cd $CH_PATH/ext -for i in *.7z; do 7z x -y $i; done -''' +cd ext +for i in *.7z; do 7z x -y $i; done''' sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE @@ -91,7 +101,7 @@ export CHC_PATH=$WORKSPACE stage('Build Kinetis') { agent { docker { - image 'fpoussin/jenkins:ubuntu-18.04-arm' + image 'fpoussin/jenkins:ubuntu-18.04-chibios' } } @@ -99,9 +109,13 @@ export CHC_PATH=$WORKSPACE sh '''arm-none-eabi-gcc -v rm -rf $CH_PATH -git clone -b $CH_BRANCH --single-branch https://github.com/ChibiOS/ChibiOS.git $CH_PATH +git clone /var/lib/git/ChibiOS $CH_PATH +cd $CH_PATH +git remote set-url origin https://github.com/ChibiOS/ChibiOS.git +git pull --rebase +git checkout -b $CH_BRANCH -cd $CH_PATH/ext +cd ext for i in *.7z; do 7z x -y $i; done''' sh '''export CH_PATH=$WORKSPACE/ChibiOS export CHC_PATH=$WORKSPACE -- cgit v1.2.3 From 44dd6f180b8fa18b11789f3ca86552b3188279bf Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Mon, 11 Mar 2019 22:17:17 +0100 Subject: JenkinsFile Fix --- Jenkinsfile | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Jenkinsfile b/Jenkinsfile index 03b2d1e..e086ece 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -34,6 +34,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH +git pull --rebase cd ext for i in *.7z; do 7z x -y $i; done''' @@ -60,6 +61,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH +git pull --rebase cd ext for i in *.7z; do 7z x -y $i; done''' @@ -87,6 +89,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH +git pull --rebase cd ext for i in *.7z; do 7z x -y $i; done''' @@ -114,6 +117,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH +git pull --rebase cd ext for i in *.7z; do 7z x -y $i; done''' -- cgit v1.2.3 From c66b54376b57d00bc38be196f7db906980154983 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Mon, 11 Mar 2019 22:18:47 +0100 Subject: JenkinsFile fix --- Jenkinsfile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index e086ece..86c9437 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -34,7 +34,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH -git pull --rebase +git pull --rebase origin $CH_BRANCH cd ext for i in *.7z; do 7z x -y $i; done''' @@ -61,7 +61,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH -git pull --rebase +git pull --rebase origin $CH_BRANCH cd ext for i in *.7z; do 7z x -y $i; done''' @@ -89,7 +89,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH -git pull --rebase +git pull --rebase origin $CH_BRANCH cd ext for i in *.7z; do 7z x -y $i; done''' @@ -117,7 +117,7 @@ cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git git pull --rebase git checkout -b $CH_BRANCH -git pull --rebase +git pull --rebase origin $CH_BRANCH cd ext for i in *.7z; do 7z x -y $i; done''' -- cgit v1.2.3 From b9872ff13d009e8ea949701e6a496740f1022367 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Mon, 11 Mar 2019 22:22:14 +0100 Subject: Another jenkins fix --- Jenkinsfile | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Jenkinsfile b/Jenkinsfile index 86c9437..6ed3b22 100644 --- a/Jenkinsfile +++ b/Jenkinsfile @@ -32,8 +32,8 @@ rm -rf $CH_PATH git clone /var/lib/git/ChibiOS $CH_PATH cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git -git pull --rebase -git checkout -b $CH_BRANCH +git fetch --all +git checkout -b $CH_BRANCH origin/$CH_BRANCH git pull --rebase origin $CH_BRANCH cd ext @@ -59,8 +59,8 @@ rm -rf $CH_PATH git clone /var/lib/git/ChibiOS $CH_PATH cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git -git pull --rebase -git checkout -b $CH_BRANCH +git fetch --all +git checkout -b $CH_BRANCH origin/$CH_BRANCH git pull --rebase origin $CH_BRANCH cd ext @@ -87,8 +87,8 @@ rm -rf $CH_PATH git clone /var/lib/git/ChibiOS $CH_PATH cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git -git pull --rebase -git checkout -b $CH_BRANCH +git fetch --all +git checkout -b $CH_BRANCH origin/$CH_BRANCH git pull --rebase origin $CH_BRANCH cd ext @@ -115,8 +115,8 @@ rm -rf $CH_PATH git clone /var/lib/git/ChibiOS $CH_PATH cd $CH_PATH git remote set-url origin https://github.com/ChibiOS/ChibiOS.git -git pull --rebase -git checkout -b $CH_BRANCH +git fetch --all +git checkout -b $CH_BRANCH origin/$CH_BRANCH git pull --rebase origin $CH_BRANCH cd ext -- cgit v1.2.3 From f7cdcf592ecaf3545de2afb3d7702c309eda04f0 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 12 Mar 2019 10:50:06 +0100 Subject: Updated ChibiOS path for all Makefiles --- demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile | 2 +- demos/KINETIS/RT-FREEDOM-K20D50M/Makefile | 2 +- demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile | 2 +- demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile | 2 +- demos/KINETIS/RT-FREEDOM-KL25Z/Makefile | 2 +- demos/KINETIS/RT-MCHCK-K20-GPT/Makefile | 2 +- demos/KINETIS/RT-MCHCK-K20-SPI/Makefile | 2 +- demos/KINETIS/RT-TEENSY3/Makefile | 2 +- demos/MSP430X/NIL-EXP430FR5969/Makefile | 2 +- demos/MSP430X/NIL-EXP430FR6989/Makefile | 2 +- demos/NRF51/MICROBIT/Makefile | 2 +- demos/NRF51/OSHCHIP_V1.0/Makefile | 2 +- demos/NRF51/RT-WVSHARE_BLE400/Makefile | 2 +- demos/NRF52/Classic/Makefile | 2 +- demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile | 2 +- demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile | 2 +- demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile | 2 +- demos/TIVA/RT-TM4C123G-LAUNCHPAD/Makefile | 2 +- demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/Makefile | 2 +- demos/TIVA/RT-TM4C1294-LAUNCHPAD/Makefile | 2 +- demos/various/RT-Win32-TriBuf/Makefile | 2 +- testhal/KINETIS/FRDM-K20D50M/I2C/Makefile | 2 +- testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile | 2 +- testhal/KINETIS/FRDM-KL25Z/ADC/Makefile | 2 +- testhal/KINETIS/FRDM-KL25Z/GPT/Makefile | 2 +- testhal/KINETIS/FRDM-KL25Z/PWM/Makefile | 2 +- testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile | 2 +- testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile | 2 +- testhal/KINETIS/FRDM-KL26Z/I2C/Makefile | 2 +- testhal/KINETIS/FRDM-KL26Z/PWM/Makefile | 2 +- testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile | 2 +- testhal/KINETIS/KL27Z/BLINK/Makefile | 2 +- testhal/KINETIS/MCHCK/BOOTLOADER/Makefile | 2 +- testhal/KINETIS/MCHCK/PWM/Makefile | 2 +- testhal/KINETIS/MCHCK/USB_SERIAL/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/ADC/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/EXT/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/GPT/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/PWM/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/SERIAL/Makefile | 2 +- testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile | 2 +- testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile | 2 +- testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile | 2 +- testhal/KINETIS/TEENSY_LC/PWM/Makefile | 2 +- testhal/MSP430X/EXP430FR5969/ADC/Makefile | 2 +- testhal/MSP430X/EXP430FR5969/DMA/Makefile | 2 +- testhal/MSP430X/EXP430FR5969/SPI/Makefile | 2 +- testhal/MSP430X/EXP430FR6989/ADC/Makefile | 2 +- testhal/NRF51/NRF51822/ADC/Makefile | 2 +- testhal/NRF51/NRF51822/EXT/Makefile | 2 +- testhal/NRF51/NRF51822/GPT/Makefile | 2 +- testhal/NRF51/NRF51822/I2C/Makefile | 2 +- testhal/NRF51/NRF51822/PWM/Makefile | 2 +- testhal/NRF51/NRF51822/RNG/Makefile | 2 +- testhal/NRF51/NRF51822/SPI/Makefile | 2 +- testhal/NRF51/NRF51822/WDG/Makefile | 2 +- testhal/NRF52/NRF52832/I2C/Makefile | 2 +- testhal/NRF52/NRF52832/PWM-ICU/Makefile | 2 +- testhal/NRF52/NRF52832/RADIO-ESB/Makefile | 2 +- testhal/STM32/STM32F0xx/crc/Makefile | 2 +- testhal/STM32/STM32F0xx/onewire/Makefile | 2 +- testhal/STM32/STM32F0xx/qei/Makefile | 2 +- testhal/STM32/STM32F1xx/onewire/Makefile | 2 +- testhal/STM32/STM32F1xx/qei/Makefile | 2 +- testhal/STM32/STM32F3xx/COMP/Makefile | 2 +- testhal/STM32/STM32F3xx/EEProm/Makefile | 2 +- testhal/STM32/STM32F3xx/OPAMP/Makefile | 2 +- testhal/STM32/STM32F3xx/TIMCAP/Makefile | 2 +- testhal/STM32/STM32F4xx/EICU/Makefile | 2 +- testhal/STM32/STM32F4xx/FSMC_NAND/Makefile | 2 +- testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile | 2 +- testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile | 2 +- testhal/STM32/STM32F4xx/USB_HOST/Makefile | 2 +- testhal/STM32/STM32F4xx/onewire/Makefile | 2 +- testhal/STM32/STM32F7xx/USB_MSD/Makefile | 2 +- testhal/TIVA/TM4C123x/ADC/Makefile | 2 +- testhal/TIVA/TM4C123x/GPT/Makefile | 2 +- testhal/TIVA/TM4C123x/I2C/Makefile | 2 +- testhal/TIVA/TM4C123x/PWM/Makefile | 2 +- testhal/TIVA/TM4C123x/SPI/Makefile | 2 +- testhal/TIVA/TM4C123x/UART/Makefile | 2 +- testhal/TIVA/TM4C123x/WDG/Makefile | 2 +- 83 files changed, 83 insertions(+), 83 deletions(-) diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile index 7d2224c..f714eaf 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile +++ b/demos/KINETIS/RT-FREEDOM-K20D50M-EXT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile b/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile index 7d2224c..f714eaf 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile index 7616baa..c5ff9c9 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-EXT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile index 6a17c8b..af43f2e 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z-SHELL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile b/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile index 7616baa..c5ff9c9 100644 --- a/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile +++ b/demos/KINETIS/RT-FREEDOM-KL25Z/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile b/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile index 58ebbb3..56680f8 100644 --- a/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile +++ b/demos/KINETIS/RT-MCHCK-K20-GPT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile b/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile index 58ebbb3..56680f8 100644 --- a/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile +++ b/demos/KINETIS/RT-MCHCK-K20-SPI/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/KINETIS/RT-TEENSY3/Makefile b/demos/KINETIS/RT-TEENSY3/Makefile index 65aec1a..21a6ba1 100644 --- a/demos/KINETIS/RT-TEENSY3/Makefile +++ b/demos/KINETIS/RT-TEENSY3/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/MSP430X/NIL-EXP430FR5969/Makefile b/demos/MSP430X/NIL-EXP430FR5969/Makefile index f9a9627..c54f4fe 100644 --- a/demos/MSP430X/NIL-EXP430FR5969/Makefile +++ b/demos/MSP430X/NIL-EXP430FR5969/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = ../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/demos/MSP430X/NIL-EXP430FR6989/Makefile b/demos/MSP430X/NIL-EXP430FR6989/Makefile index fce3946..cfe5911 100644 --- a/demos/MSP430X/NIL-EXP430FR6989/Makefile +++ b/demos/MSP430X/NIL-EXP430FR6989/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = ../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/demos/NRF51/MICROBIT/Makefile b/demos/NRF51/MICROBIT/Makefile index aa516e0..dcf2705 100644 --- a/demos/NRF51/MICROBIT/Makefile +++ b/demos/NRF51/MICROBIT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/NRF51/OSHCHIP_V1.0/Makefile b/demos/NRF51/OSHCHIP_V1.0/Makefile index 27255b8..554a7da 100644 --- a/demos/NRF51/OSHCHIP_V1.0/Makefile +++ b/demos/NRF51/OSHCHIP_V1.0/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/NRF51/RT-WVSHARE_BLE400/Makefile b/demos/NRF51/RT-WVSHARE_BLE400/Makefile index 29949a5..3da8b88 100644 --- a/demos/NRF51/RT-WVSHARE_BLE400/Makefile +++ b/demos/NRF51/RT-WVSHARE_BLE400/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/NRF52/Classic/Makefile b/demos/NRF52/Classic/Makefile index 8742dd3..5cfc011 100644 --- a/demos/NRF52/Classic/Makefile +++ b/demos/NRF52/Classic/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile b/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile index 738a956..fbaae10 100644 --- a/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile +++ b/demos/STM32/RT-STM32F303-DISCOVERY-PID/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile index aa99ec7..4a1d1ea 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile +++ b/demos/STM32/RT-STM32F429-DISCOVERY-DMA2D/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile index ead8513..5d1e52f 100644 --- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile +++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/demos/TIVA/RT-TM4C123G-LAUNCHPAD/Makefile b/demos/TIVA/RT-TM4C123G-LAUNCHPAD/Makefile index 104f62e..a2f0b7a 100644 --- a/demos/TIVA/RT-TM4C123G-LAUNCHPAD/Makefile +++ b/demos/TIVA/RT-TM4C123G-LAUNCHPAD/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/Makefile b/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/Makefile index 4584bdf..232b38d 100644 --- a/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/Makefile +++ b/demos/TIVA/RT-TM4C1294-LAUNCHPAD-LWIP/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/demos/TIVA/RT-TM4C1294-LAUNCHPAD/Makefile b/demos/TIVA/RT-TM4C1294-LAUNCHPAD/Makefile index 11f28f6..2fca345 100644 --- a/demos/TIVA/RT-TM4C1294-LAUNCHPAD/Makefile +++ b/demos/TIVA/RT-TM4C1294-LAUNCHPAD/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/demos/various/RT-Win32-TriBuf/Makefile b/demos/various/RT-Win32-TriBuf/Makefile index a50f45a..c15feec 100644 --- a/demos/various/RT-Win32-TriBuf/Makefile +++ b/demos/various/RT-Win32-TriBuf/Makefile @@ -56,7 +56,7 @@ UDEFS = UADEFS = # Imported source files -CHIBIOS = ../../../../ChibiOS-RT +CHIBIOS = ../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib include $(CHIBIOS)/os/hal/boards/simulator/board.mk include $(CHIBIOS)/os/hal/hal.mk diff --git a/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile index e2ad0c8..cb528f9 100644 --- a/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile +++ b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile @@ -87,7 +87,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile index 1f34aba..4b2ede6 100644 --- a/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-K20D50M/USB_SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile index 0a813ec..b5150d5 100644 --- a/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile b/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile index 0a813ec..b5150d5 100644 --- a/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/GPT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile b/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile index 0a813ec..b5150d5 100644 --- a/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile b/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile index 3c25877..3d4844d 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/USB_HID/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile index 0eab704..038f796 100644 --- a/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-KL25Z/USB_SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile b/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile index 7ce4956..713d772 100644 --- a/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/I2C/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile b/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile index 7ce4956..713d772 100644 --- a/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile index b71d3b1..7327b35 100644 --- a/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile +++ b/testhal/KINETIS/FRDM-KL26Z/USB_SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/KL27Z/BLINK/Makefile b/testhal/KINETIS/KL27Z/BLINK/Makefile index cd6424e..8348654 100644 --- a/testhal/KINETIS/KL27Z/BLINK/Makefile +++ b/testhal/KINETIS/KL27Z/BLINK/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile b/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile index 8ff8acd..c2fa3a0 100644 --- a/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile +++ b/testhal/KINETIS/MCHCK/BOOTLOADER/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/MCHCK/PWM/Makefile b/testhal/KINETIS/MCHCK/PWM/Makefile index 8ff8acd..c2fa3a0 100644 --- a/testhal/KINETIS/MCHCK/PWM/Makefile +++ b/testhal/KINETIS/MCHCK/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile b/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile index cc51364..31862bd 100644 --- a/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile +++ b/testhal/KINETIS/MCHCK/USB_SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/ADC/Makefile b/testhal/KINETIS/TEENSY3_x/ADC/Makefile index d12b346..eee81be 100644 --- a/testhal/KINETIS/TEENSY3_x/ADC/Makefile +++ b/testhal/KINETIS/TEENSY3_x/ADC/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile index 1733c56..626a52f 100644 --- a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile +++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/EXT/Makefile b/testhal/KINETIS/TEENSY3_x/EXT/Makefile index d12b346..eee81be 100644 --- a/testhal/KINETIS/TEENSY3_x/EXT/Makefile +++ b/testhal/KINETIS/TEENSY3_x/EXT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/GPT/Makefile b/testhal/KINETIS/TEENSY3_x/GPT/Makefile index d12b346..eee81be 100644 --- a/testhal/KINETIS/TEENSY3_x/GPT/Makefile +++ b/testhal/KINETIS/TEENSY3_x/GPT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/PWM/Makefile b/testhal/KINETIS/TEENSY3_x/PWM/Makefile index d12b346..eee81be 100644 --- a/testhal/KINETIS/TEENSY3_x/PWM/Makefile +++ b/testhal/KINETIS/TEENSY3_x/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile b/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile index d12b346..eee81be 100644 --- a/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile +++ b/testhal/KINETIS/TEENSY3_x/SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile index 0cd1dbc..4273fc6 100644 --- a/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile +++ b/testhal/KINETIS/TEENSY3_x/USB_SERIAL/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile index 71438e9..ba07396 100644 --- a/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile +++ b/testhal/KINETIS/TEENSY_LC/BOOTLOADER/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile index 812efc4..79b377a 100644 --- a/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile +++ b/testhal/KINETIS/TEENSY_LC/EEPROM_EMU/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/KINETIS/TEENSY_LC/PWM/Makefile b/testhal/KINETIS/TEENSY_LC/PWM/Makefile index 71438e9..ba07396 100644 --- a/testhal/KINETIS/TEENSY_LC/PWM/Makefile +++ b/testhal/KINETIS/TEENSY_LC/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/MSP430X/EXP430FR5969/ADC/Makefile b/testhal/MSP430X/EXP430FR5969/ADC/Makefile index 89c32e0..0169cb1 100644 --- a/testhal/MSP430X/EXP430FR5969/ADC/Makefile +++ b/testhal/MSP430X/EXP430FR5969/ADC/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = ../../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/testhal/MSP430X/EXP430FR5969/DMA/Makefile b/testhal/MSP430X/EXP430FR5969/DMA/Makefile index cf81f18..5fe3473 100644 --- a/testhal/MSP430X/EXP430FR5969/DMA/Makefile +++ b/testhal/MSP430X/EXP430FR5969/DMA/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = ../../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/testhal/MSP430X/EXP430FR5969/SPI/Makefile b/testhal/MSP430X/EXP430FR5969/SPI/Makefile index cf81f18..5fe3473 100644 --- a/testhal/MSP430X/EXP430FR5969/SPI/Makefile +++ b/testhal/MSP430X/EXP430FR5969/SPI/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = ../../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/testhal/MSP430X/EXP430FR6989/ADC/Makefile b/testhal/MSP430X/EXP430FR6989/ADC/Makefile index b86021e..e79020d 100644 --- a/testhal/MSP430X/EXP430FR6989/ADC/Makefile +++ b/testhal/MSP430X/EXP430FR6989/ADC/Makefile @@ -100,7 +100,7 @@ endif PROJECT = nil # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = ../../../.. # Startup files. include $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk diff --git a/testhal/NRF51/NRF51822/ADC/Makefile b/testhal/NRF51/NRF51822/ADC/Makefile index ee5667b..8ee59f9 100644 --- a/testhal/NRF51/NRF51822/ADC/Makefile +++ b/testhal/NRF51/NRF51822/ADC/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF51/NRF51822/EXT/Makefile b/testhal/NRF51/NRF51822/EXT/Makefile index 9cdc41d..79e226d 100644 --- a/testhal/NRF51/NRF51822/EXT/Makefile +++ b/testhal/NRF51/NRF51822/EXT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF51/NRF51822/GPT/Makefile b/testhal/NRF51/NRF51822/GPT/Makefile index ee5667b..8ee59f9 100644 --- a/testhal/NRF51/NRF51822/GPT/Makefile +++ b/testhal/NRF51/NRF51822/GPT/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF51/NRF51822/I2C/Makefile b/testhal/NRF51/NRF51822/I2C/Makefile index 784ba49..ce37f2f 100644 --- a/testhal/NRF51/NRF51822/I2C/Makefile +++ b/testhal/NRF51/NRF51822/I2C/Makefile @@ -80,7 +80,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF51/NRF51822/PWM/Makefile b/testhal/NRF51/NRF51822/PWM/Makefile index cc7bc1b..1924cfb 100644 --- a/testhal/NRF51/NRF51822/PWM/Makefile +++ b/testhal/NRF51/NRF51822/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Startup files. diff --git a/testhal/NRF51/NRF51822/RNG/Makefile b/testhal/NRF51/NRF51822/RNG/Makefile index 9520152..4a71207 100644 --- a/testhal/NRF51/NRF51822/RNG/Makefile +++ b/testhal/NRF51/NRF51822/RNG/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Startup files. diff --git a/testhal/NRF51/NRF51822/SPI/Makefile b/testhal/NRF51/NRF51822/SPI/Makefile index e0fa91b..fa799b9 100644 --- a/testhal/NRF51/NRF51822/SPI/Makefile +++ b/testhal/NRF51/NRF51822/SPI/Makefile @@ -80,7 +80,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF51/NRF51822/WDG/Makefile b/testhal/NRF51/NRF51822/WDG/Makefile index c096d27..8cadfce 100644 --- a/testhal/NRF51/NRF51822/WDG/Makefile +++ b/testhal/NRF51/NRF51822/WDG/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF52/NRF52832/I2C/Makefile b/testhal/NRF52/NRF52832/I2C/Makefile index e5061f7..edb407e 100644 --- a/testhal/NRF52/NRF52832/I2C/Makefile +++ b/testhal/NRF52/NRF52832/I2C/Makefile @@ -80,7 +80,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/NRF52/NRF52832/PWM-ICU/Makefile b/testhal/NRF52/NRF52832/PWM-ICU/Makefile index 6cc0a38..237bcbe 100644 --- a/testhal/NRF52/NRF52832/PWM-ICU/Makefile +++ b/testhal/NRF52/NRF52832/PWM-ICU/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Startup files. diff --git a/testhal/NRF52/NRF52832/RADIO-ESB/Makefile b/testhal/NRF52/NRF52832/RADIO-ESB/Makefile index 481f911..a01eb88 100644 --- a/testhal/NRF52/NRF52832/RADIO-ESB/Makefile +++ b/testhal/NRF52/NRF52832/RADIO-ESB/Makefile @@ -80,7 +80,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F0xx/crc/Makefile b/testhal/STM32/STM32F0xx/crc/Makefile index 6721d80..0c36874 100644 --- a/testhal/STM32/STM32F0xx/crc/Makefile +++ b/testhal/STM32/STM32F0xx/crc/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F0xx/onewire/Makefile b/testhal/STM32/STM32F0xx/onewire/Makefile index c863257..c598f7f 100644 --- a/testhal/STM32/STM32F0xx/onewire/Makefile +++ b/testhal/STM32/STM32F0xx/onewire/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire # Licensing files. diff --git a/testhal/STM32/STM32F0xx/qei/Makefile b/testhal/STM32/STM32F0xx/qei/Makefile index 0e8d92f..3fd75c3 100644 --- a/testhal/STM32/STM32F0xx/qei/Makefile +++ b/testhal/STM32/STM32F0xx/qei/Makefile @@ -81,7 +81,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F1xx/onewire/Makefile b/testhal/STM32/STM32F1xx/onewire/Makefile index 91052f8..4d217ed 100644 --- a/testhal/STM32/STM32F1xx/onewire/Makefile +++ b/testhal/STM32/STM32F1xx/onewire/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire # Licensing files. diff --git a/testhal/STM32/STM32F1xx/qei/Makefile b/testhal/STM32/STM32F1xx/qei/Makefile index 5f16036..ff058da 100644 --- a/testhal/STM32/STM32F1xx/qei/Makefile +++ b/testhal/STM32/STM32F1xx/qei/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F3xx/COMP/Makefile b/testhal/STM32/STM32F3xx/COMP/Makefile index 3730513..e2dac00 100644 --- a/testhal/STM32/STM32F3xx/COMP/Makefile +++ b/testhal/STM32/STM32F3xx/COMP/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F3xx/EEProm/Makefile b/testhal/STM32/STM32F3xx/EEProm/Makefile index 3730513..e2dac00 100644 --- a/testhal/STM32/STM32F3xx/EEProm/Makefile +++ b/testhal/STM32/STM32F3xx/EEProm/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F3xx/OPAMP/Makefile b/testhal/STM32/STM32F3xx/OPAMP/Makefile index 3730513..e2dac00 100644 --- a/testhal/STM32/STM32F3xx/OPAMP/Makefile +++ b/testhal/STM32/STM32F3xx/OPAMP/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F3xx/TIMCAP/Makefile b/testhal/STM32/STM32F3xx/TIMCAP/Makefile index 8c6490e..418518d 100644 --- a/testhal/STM32/STM32F3xx/TIMCAP/Makefile +++ b/testhal/STM32/STM32F3xx/TIMCAP/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/EICU/Makefile b/testhal/STM32/STM32F4xx/EICU/Makefile index d458565..b7a0ff1 100644 --- a/testhal/STM32/STM32F4xx/EICU/Makefile +++ b/testhal/STM32/STM32F4xx/EICU/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile index 2c622eb..d4b6572 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile index b575f08..8e1b5e4 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile index a60eef9..d0d1670 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/USB_HOST/Makefile b/testhal/STM32/STM32F4xx/USB_HOST/Makefile index bf0d11a..f518c5f 100644 --- a/testhal/STM32/STM32F4xx/USB_HOST/Makefile +++ b/testhal/STM32/STM32F4xx/USB_HOST/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/STM32/STM32F4xx/onewire/Makefile b/testhal/STM32/STM32F4xx/onewire/Makefile index 0e13de2..404ee71 100644 --- a/testhal/STM32/STM32F4xx/onewire/Makefile +++ b/testhal/STM32/STM32F4xx/onewire/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire # Licensing files. diff --git a/testhal/STM32/STM32F7xx/USB_MSD/Makefile b/testhal/STM32/STM32F7xx/USB_MSD/Makefile index 30d9bec..870ed6e 100644 --- a/testhal/STM32/STM32F7xx/USB_MSD/Makefile +++ b/testhal/STM32/STM32F7xx/USB_MSD/Makefile @@ -91,7 +91,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. include $(CHIBIOS)/os/license/license.mk diff --git a/testhal/TIVA/TM4C123x/ADC/Makefile b/testhal/TIVA/TM4C123x/ADC/Makefile index f098dc2..bd998ad 100644 --- a/testhal/TIVA/TM4C123x/ADC/Makefile +++ b/testhal/TIVA/TM4C123x/ADC/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/GPT/Makefile b/testhal/TIVA/TM4C123x/GPT/Makefile index 00661de..490c89d 100644 --- a/testhal/TIVA/TM4C123x/GPT/Makefile +++ b/testhal/TIVA/TM4C123x/GPT/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/I2C/Makefile b/testhal/TIVA/TM4C123x/I2C/Makefile index f098dc2..bd998ad 100644 --- a/testhal/TIVA/TM4C123x/I2C/Makefile +++ b/testhal/TIVA/TM4C123x/I2C/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/PWM/Makefile b/testhal/TIVA/TM4C123x/PWM/Makefile index 00661de..490c89d 100644 --- a/testhal/TIVA/TM4C123x/PWM/Makefile +++ b/testhal/TIVA/TM4C123x/PWM/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/SPI/Makefile b/testhal/TIVA/TM4C123x/SPI/Makefile index 00661de..490c89d 100644 --- a/testhal/TIVA/TM4C123x/SPI/Makefile +++ b/testhal/TIVA/TM4C123x/SPI/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/UART/Makefile b/testhal/TIVA/TM4C123x/UART/Makefile index 00661de..490c89d 100644 --- a/testhal/TIVA/TM4C123x/UART/Makefile +++ b/testhal/TIVA/TM4C123x/UART/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. diff --git a/testhal/TIVA/TM4C123x/WDG/Makefile b/testhal/TIVA/TM4C123x/WDG/Makefile index 00661de..490c89d 100644 --- a/testhal/TIVA/TM4C123x/WDG/Makefile +++ b/testhal/TIVA/TM4C123x/WDG/Makefile @@ -86,7 +86,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../../../../ChibiOS-RT +CHIBIOS = ../../../../../ChibiOS CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib # Licensing files. -- cgit v1.2.3 From 609a1cd9c48d90d8331a325f65b05cf5c9db59b1 Mon Sep 17 00:00:00 2001 From: Fabien Poussin Date: Tue, 12 Mar 2019 10:54:24 +0100 Subject: Edited Readme for path changes --- README.md | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/README.md b/README.md index d0ed018..6414aa5 100644 --- a/README.md +++ b/README.md @@ -4,25 +4,35 @@ Code under this directory is not part of the core ChibiOS project and the copyright is retained by the original authors. See copyright notes in file headers. -Code is maintained via Github https://github.com/ChibiOS/ChibiOS-Contrib -Feel free to send pull request there. +Code is maintained via Github: https://github.com/ChibiOS/ChibiOS-Contrib +Feel free to open pull request there. #### Using -```bash -# git clone git@github.com:Chibios/ChibiOS.git ChibiOS-RT -# git clone git@github.com:ChibiOS/ChibiOS-Contrib.git ChibiOS-Contrib +Default makefiles assume this repo will be cloned in the same folder as ChibiOS. +If you use another location, you will have to edit the Makefile, or specify an alternate location to make, ie: + +``` +cd ChibiOS-Contrib/testhal/STM32/STM32F3xx/TIMCAP +make CHIBIOS=~/src/ChibiOS +``` + +A good way to use it is to clone it as a submodule inside your project: + +``` +git submodule add https://github.com/ChibiOS/ChibiOS.git +git submodule add https://github.com/ChibiOS/ChibiOS-Contrib.git ``` -Note: this repos cloned in the same directory side by side (not inside). #### Contributing -When you submit a pull request, make sure all impacted platform tests compile using the tools/build.sh script. +When you submit a pull request, make sure all modified platform tests compile using the tools/build.sh script. +There is an automated check that will report errors if it doesn't. Feel free to update authors.txt with your name. - #### Useful links https://help.github.com/ http://git-scm.com/ -http://chibios.org/dokuwiki/doku.php?id=chibios:guides:style_guide +http://chibios.org/dokuwiki/doku.php?id=chibios:guides:style_guide +http://www.chibios.com/forum/ -- cgit v1.2.3 From 814a79bfaf907508578320c1e9e55fa7c77cd773 Mon Sep 17 00:00:00 2001 From: Jakub Kaderka Date: Wed, 13 Mar 2019 21:09:24 +0100 Subject: I2C not set as opendrain, fixed --- tools/mx2board.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/mx2board.py b/tools/mx2board.py index 4ad3e97..8ab155d 100755 --- a/tools/mx2board.py +++ b/tools/mx2board.py @@ -262,6 +262,10 @@ def read_project(gpio, filename): pads[pad_port][pad_num]["OSPEEDR"] = PIN_OSPEED_TRANSLATE[prop_value] elif pad_prop == "PinState": pads[pad_port][pad_num]["ODR"] = PIN_ODR_TRANSLATE[prop_value] + elif pad_prop == "Mode": + if "I2C" in prop_value: + pads[pad_port][pad_num]["OTYPER"] = PIN_OTYPE_OPENDRAIN + return pads -- cgit v1.2.3 From a9b84aa0361442234a9c664dd06c97b6587e9d8c Mon Sep 17 00:00:00 2001 From: Konstantin Oblaukhov Date: Sat, 24 Nov 2018 21:45:27 +0700 Subject: NRF5: Add support for PAL events, EXT driver removed. --- os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk | 9 -- os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c | 168 --------------------------- os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h | 139 ---------------------- os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c | 82 +++++++++++++ os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h | 69 +++++++++++ os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c | 110 ------------------ os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.h | 79 ------------- os/hal/ports/NRF5/NRF51822/hal_lld.c | 2 + os/hal/ports/NRF5/NRF51822/hal_lld.h | 2 +- os/hal/ports/NRF5/NRF51822/nrf51_isr.c | 96 +++++++++++++++ os/hal/ports/NRF5/NRF51822/nrf51_isr.h | 44 +++++++ os/hal/ports/NRF5/NRF51822/platform.mk | 3 +- os/hal/ports/NRF5/NRF52832/hal_lld.c | 2 + os/hal/ports/NRF5/NRF52832/hal_lld.h | 1 + os/hal/ports/NRF5/NRF52832/nrf52_isr.c | 96 +++++++++++++++ os/hal/ports/NRF5/NRF52832/nrf52_isr.h | 44 +++++++ os/hal/ports/NRF5/NRF52832/platform.mk | 1 + 17 files changed, 439 insertions(+), 508 deletions(-) delete mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk delete mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c delete mode 100644 os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c delete mode 100644 os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.h create mode 100644 os/hal/ports/NRF5/NRF51822/nrf51_isr.c create mode 100644 os/hal/ports/NRF5/NRF51822/nrf51_isr.h create mode 100644 os/hal/ports/NRF5/NRF52832/nrf52_isr.c create mode 100644 os/hal/ports/NRF5/NRF52832/nrf52_isr.h diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk b/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk deleted file mode 100644 index 97e0660..0000000 --- a/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk +++ /dev/null @@ -1,9 +0,0 @@ -ifeq ($(USE_SMART_BUILD),yes) -ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),) -PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c -endif -else -PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c -endif - -PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1 diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c deleted file mode 100644 index f38fa0c..0000000 --- a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file GPIOTEv1/ext_lld.c - * @brief NRF51 EXT subsystem low level driver source. - * - * @addtogroup EXT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -#include "hal_ext_lld_isr.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** - * @brief EXTD1 driver identifier. - */ -EXTDriver EXTD1; - -/*===========================================================================*/ -/* Driver local variables and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level EXT driver initialization. - * - * @notapi - */ -void ext_lld_init(void) { - - /* Driver initialization.*/ - extObjectInit(&EXTD1); -} - -/** - * @brief Configures and activates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_start(EXTDriver *extp) { - - unsigned i; - - ext_lld_exti_irq_enable(); - - /* Configuration of automatic channels.*/ - for (i = 0; i < EXT_MAX_CHANNELS; i++) { - uint32_t config = 0; - uint32_t pad = (extp->config->channels[i].mode & EXT_MODE_GPIO_MASK) - >> EXT_MODE_GPIO_OFFSET; - - if (extp->config->channels[i].mode & EXT_CH_MODE_BOTH_EDGES) - config |= (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); - else if (extp->config->channels[i].mode & EXT_CH_MODE_RISING_EDGE) - config |= (GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos); - else - config |= (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos); - - config |= (pad << GPIOTE_CONFIG_PSEL_Pos); - - NRF_GPIOTE->CONFIG[i] = config; - NRF_GPIOTE->EVENTS_PORT = 0; - NRF_GPIOTE->EVENTS_IN[i] = 0; - - if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART) - ext_lld_channel_enable(extp, i); - else - ext_lld_channel_disable(extp, i); - } -} - -/** - * @brief Deactivates the EXT peripheral. - * - * @param[in] extp pointer to the @p EXTDriver object - * - * @notapi - */ -void ext_lld_stop(EXTDriver *extp) { - - unsigned i; - - (void)extp; - ext_lld_exti_irq_disable(); - - for (i = 0; i < EXT_MAX_CHANNELS; i++) - NRF_GPIOTE->CONFIG[i] = 0; - - NRF_GPIOTE->INTENCLR = - (GPIOTE_INTENCLR_IN3_Msk | GPIOTE_INTENCLR_IN2_Msk | - GPIOTE_INTENCLR_IN1_Msk | GPIOTE_INTENCLR_IN0_Msk); -} - -/** - * @brief Enables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be enabled - * - * @notapi - */ -void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { - - uint32_t config = NRF_GPIOTE->CONFIG[channel] & ~GPIOTE_CONFIG_MODE_Msk; - - (void)extp; - config |= (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos); - - NRF_GPIOTE->CONFIG[channel] = config; - NRF_GPIOTE->INTENSET = (1 << channel); -} - -/** - * @brief Disables an EXT channel. - * - * @param[in] extp pointer to the @p EXTDriver object - * @param[in] channel channel to be disabled - * - * @notapi - */ -void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - NRF_GPIOTE->CONFIG[channel] &= ~GPIOTE_CONFIG_MODE_Msk; - NRF_GPIOTE->INTENCLR = (1 << channel); -} - -#endif /* HAL_USE_EXT */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h b/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h deleted file mode 100644 index 8a93b6d..0000000 --- a/os/hal/ports/NRF5/LLD/GPIOTEv1/hal_ext_lld.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file GPIOTEv1/ext_lld.h - * @brief NRF51 EXT subsystem low level driver header. - * - * @addtogroup EXT - * @{ - */ - -#ifndef HAL_EXT_LLD_H -#define HAL_EXT_LLD_H - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/** - * @brief Available number of EXT channels. - */ -#define EXT_MAX_CHANNELS 4 -#define EXT_MODE_GPIO_MASK 0xF8 /**< @brief Pad field mask. */ -#define EXT_MODE_GPIO_OFFSET 3 /**< @brief Pad field offset. */ -/** @} */ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief EXT channel identifier. - */ -typedef uint32_t expchannel_t; - -/** - * @brief Type of an EXT generic notification callback. - * - * @param[in] extp pointer to the @p EXPDriver object triggering the - * callback - */ -typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); - -/** - * @brief Channel configuration structure. - */ -typedef struct { - /** - * @brief Channel mode. - */ - uint32_t mode; - /** - * @brief Channel callback. - * @details In the STM32 implementation a @p NULL callback pointer is - * valid and configures the channel as an event sources instead - * of an interrupt source. - */ - extcallback_t cb; -} EXTChannelConfig; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - */ -typedef struct { - /** - * @brief Channel configurations. - */ - EXTChannelConfig channels[EXT_MAX_CHANNELS]; - /* End of the mandatory fields.*/ -} EXTConfig; - -/** - * @brief Structure representing an EXT driver. - */ -struct EXTDriver { - /** - * @brief Driver state. - */ - extstate_t state; - /** - * @brief Current configuration data. - */ - const EXTConfig *config; - /* End of the mandatory fields.*/ -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if !defined(__DOXYGEN__) -extern EXTDriver EXTD1; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void ext_lld_init(void); - void ext_lld_start(EXTDriver *extp); - void ext_lld_stop(EXTDriver *extp); - void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); - void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_EXT */ - -#endif /* HAL_EXT_LLD_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c index 9cfad8d..3029367 100644 --- a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.c @@ -1,4 +1,5 @@ /* + Copyright (C) 2018 Konstantin Oblaukhov Copyright (C) 2015 Fabio Utzig Licensed under the Apache License, Version 2.0 (the "License"); @@ -35,6 +36,11 @@ /* Driver exported variables. */ /*===========================================================================*/ +/** + * @brief Event records for the GPIOTE channels. + */ +palevent_t _pal_events[NRF5_GPIOTE_NUM_CHANNELS]; + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -127,6 +133,12 @@ void _pal_lld_init(const PALConfig *config) for (i = 0; i < TOTAL_GPIO_PADS; i++) { pal_lld_setpadmode(IOPORT1, i, config->pads[i]); } + +#if PAL_USE_CALLBACKS || PAL_USE_WAIT || defined(__DOXYGEN__) + for (i = 0; i < NRF5_GPIOTE_NUM_CHANNELS; i++) { + _pal_init_event(i); + } +#endif } /** @@ -153,6 +165,76 @@ void _pal_lld_setgroupmode(ioportid_t port, } } +#if PAL_USE_CALLBACKS || PAL_USE_WAIT || defined(__DOXYGEN__) +/** + * @brief Pad event enable. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad event mode + * + * @notapi + */ +void _pal_lld_enablepadevent(ioportid_t port, + iopadid_t pad, + ioeventmode_t mode) { + (void)port; + + int ch = NRF5_PAL_PAD_TO_EVENT(pad); + uint32_t config = NRF_GPIOTE->CONFIG[ch]; + + osalDbgAssert((((config & GPIOTE_CONFIG_PSEL_Msk) >> GPIOTE_CONFIG_PSEL_Pos) == pad) || + (((config & GPIOTE_CONFIG_MODE_Msk) >> GPIOTE_CONFIG_MODE_Pos) != GPIOTE_CONFIG_MODE_Event), + "channel already in use"); + + if ((mode & PAL_EVENT_MODE_RISING_EDGE) && (mode & PAL_EVENT_MODE_FALLING_EDGE)) + config |= (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); + else if (mode & PAL_EVENT_MODE_RISING_EDGE) + config |= (GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos); + else + config |= (GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos); + + config |= (pad << GPIOTE_CONFIG_PSEL_Pos); + + config |= (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos); + + NRF_GPIOTE->CONFIG[ch] = config; + NRF_GPIOTE->EVENTS_PORT = 0; + NRF_GPIOTE->EVENTS_IN[ch] = 0; + NRF_GPIOTE->INTENSET = (1 << ch); +} + +/** + * @brief Pad event disable. + * @details This function disables previously programmed event callbacks. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) { + (void)port; + int ch = NRF5_PAL_PAD_TO_EVENT(pad); + uint32_t config = NRF_GPIOTE->CONFIG[ch]; + + if (((config & GPIOTE_CONFIG_MODE_Msk) >> GPIOTE_CONFIG_MODE_Pos) == GPIOTE_CONFIG_MODE_Event) + { + osalDbgAssert(((config & GPIOTE_CONFIG_PSEL_Msk) >> GPIOTE_CONFIG_PSEL_Pos) == pad, + "channel mapped on different pad"); + + NRF_GPIOTE->INTENSET &= ~(1 << ch); + NRF_GPIOTE->CONFIG[ch] = 0; + +#if PAL_USE_CALLBACKS || PAL_USE_WAIT + /* Callback cleared and/or thread reset.*/ + _pal_clear_event(pad); +#endif + } +} +#endif /* PAL_USE_CALLBACKS || PAL_USE_WAIT */ + #endif /* HAL_USE_PAL == TRUE */ /** @} */ diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h index a005d50..2df3fd3 100644 --- a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h @@ -1,4 +1,5 @@ /* + Copyright (C) 2018 Konstantin Oblaukhov Copyright (C) 2015 Fabio Utzig Licensed under the Apache License, Version 2.0 (the "License"); @@ -111,6 +112,11 @@ typedef uint8_t iomode_t; */ typedef uint32_t ioline_t; +/** + * @brief Type of an event mode. + */ +typedef uint32_t ioeventmode_t; + /** * @brief Port Identifier. * @details This type can be a scalar or some kind of pointer, do not make @@ -139,6 +145,16 @@ typedef uint32_t iopadid_t; #define IOPORT1 NRF_P0 #endif +/** + * @brief Number of PAL events. + * @details Maximum number of GPIO events supported by GPIOTE peripheral + */ +#if NRF_SERIES == 51 +#define NRF5_GPIOTE_NUM_CHANNELS (4) +#else +#define NRF5_GPIOTE_NUM_CHANNELS (8) +#endif + /*===========================================================================*/ /* Implementation, some of the following macros could be implemented as */ /* functions, if so please put them in pal_lld.c. */ @@ -331,8 +347,55 @@ typedef uint32_t iopadid_t; */ #define pal_lld_setpadmode(port, pad, mode) _pal_lld_setpadmode(port, pad, mode) +/** + * @brief Pad event enable. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * @param[in] mode pad event mode + * + * @notapi + */ +#define pal_lld_enablepadevent(port, pad, mode) \ + _pal_lld_enablepadevent(port, pad, mode) + +/** + * @brief Pad event disable. + * @details This function disables previously programmed event callbacks. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_disablepadevent(port, pad) \ + _pal_lld_disablepadevent(port, pad) + +/** + * @brief Returns a PAL event structure associated to a pad. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_get_pad_event(port, pad) \ + &_pal_events[NRF5_PAL_PAD_TO_EVENT(pad)]; (void)(port) + +/** + * @brief Returns a PAL event structure associated to a line. + * + * @param[in] line line identifier + * + * @notapi + */ +#define pal_lld_get_line_event(line) \ + &_pal_events[NRF5_PAL_PAD_TO_EVENT(PAL_PAD(line))] + #if !defined(__DOXYGEN__) extern const PALConfig pal_default_config; +extern palevent_t _pal_events[NRF5_GPIOTE_NUM_CHANNELS]; #endif #ifdef __cplusplus @@ -345,6 +408,12 @@ extern "C" { void _pal_lld_setpadmode(ioportid_t port, uint8_t pad, iomode_t mode); +#if PAL_USE_CALLBACKS || PAL_USE_WAIT + void _pal_lld_enablepadevent(ioportid_t port, + iopadid_t pad, + ioeventmode_t mode); + void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad); +#endif #ifdef __cplusplus } #endif diff --git a/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c b/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c deleted file mode 100644 index ca8e24d..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51x22/ext_lld_isr.h - * @brief NRF51x22 EXT subsystem low level driver ISR code. - * - * @addtogroup EXT - * @{ - */ - -#include "hal.h" - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -#include "hal_ext_lld_isr.h" - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/** - * @brief EXTI[0]...EXTI[1] interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector58) { - - OSAL_IRQ_PROLOGUE(); - - if (NRF_GPIOTE->EVENTS_IN[0]) - { - NRF_GPIOTE->EVENTS_IN[0] = 0; - EXTD1.config->channels[0].cb(&EXTD1, 0); - } - if (NRF_GPIOTE->EVENTS_IN[1]) - { - NRF_GPIOTE->EVENTS_IN[1] = 0; - EXTD1.config->channels[1].cb(&EXTD1, 1); - } - if (NRF_GPIOTE->EVENTS_IN[2]) - { - NRF_GPIOTE->EVENTS_IN[2] = 0; - EXTD1.config->channels[2].cb(&EXTD1, 2); - } - if (NRF_GPIOTE->EVENTS_IN[3]) - { - NRF_GPIOTE->EVENTS_IN[3] = 0; - EXTD1.config->channels[3].cb(&EXTD1, 3); - } - - OSAL_IRQ_EPILOGUE(); -} - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Enables EXTI IRQ sources. - * - * @notapi - */ -void ext_lld_exti_irq_enable(void) { - - nvicEnableVector(GPIOTE_IRQn, NRF5_EXT_GPIOTE_IRQ_PRIORITY); -} - -/** - * @brief Disables EXTI IRQ sources. - * - * @notapi - */ -void ext_lld_exti_irq_disable(void) { - - nvicDisableVector(GPIOTE_IRQn); -} - -#endif /* HAL_USE_EXT */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.h b/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.h deleted file mode 100644 index d606866..0000000 --- a/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file NRF51x22/ext_lld_isr.h - * @brief NRF51x22 EXT subsystem low level driver ISR header. - * - * @addtogroup EXT - * @{ - */ - -#ifndef HAL_EXT_LLD_ISR_H -#define HAL_EXT_LLD_ISR_H - -#if HAL_USE_EXT || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief GPIOTE interrupt priority level setting. - */ -#if !defined(NRF5_EXT_GPIOTE_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define NRF5_EXT_GPIOTE_IRQ_PRIORITY 3 -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#ifdef __cplusplus -extern "C" { -#endif - void ext_lld_exti_irq_enable(void); - void ext_lld_exti_irq_disable(void); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_EXT */ - -#endif /* HAL_EXT_LLD_ISR_H */ - -/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/hal_lld.c b/os/hal/ports/NRF5/NRF51822/hal_lld.c index f33fdda..412cfea 100644 --- a/os/hal/ports/NRF5/NRF51822/hal_lld.c +++ b/os/hal/ports/NRF5/NRF51822/hal_lld.c @@ -80,6 +80,8 @@ void hal_lld_init(void) (NRF5_SYSTEM_TICKS == NRF5_SYSTEM_TICKS_AS_RTC) NRF_CLOCK->TASKS_LFCLKSTART = 1; #endif + + irqInit(); } /** diff --git a/os/hal/ports/NRF5/NRF51822/hal_lld.h b/os/hal/ports/NRF5/NRF51822/hal_lld.h index a1d2460..178bb42 100644 --- a/os/hal/ports/NRF5/NRF51822/hal_lld.h +++ b/os/hal/ports/NRF5/NRF51822/hal_lld.h @@ -94,7 +94,7 @@ /*===========================================================================*/ #include "nvic.h" - +#include "nrf51_isr.h" #ifdef __cplusplus extern "C" { diff --git a/os/hal/ports/NRF5/NRF51822/nrf51_isr.c b/os/hal/ports/NRF5/NRF51822/nrf51_isr.c new file mode 100644 index 0000000..9a2bd94 --- /dev/null +++ b/os/hal/ports/NRF5/NRF51822/nrf51_isr.c @@ -0,0 +1,96 @@ +/* + Copyright (C) 2018 Konstantin Oblaukhov + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF51822/nrf51_isr.c + * @brief NRF51822 ISR handler code. + * + * @addtogroup NRF51822_ISR + * @{ + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/** + * @brief GPIOTE interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector58) { + + OSAL_IRQ_PROLOGUE(); + + for (int ch = 0; ch < NRF5_GPIOTE_NUM_CHANNELS; ch++) + { + if (NRF_GPIOTE->EVENTS_IN[ch]) + { + NRF_GPIOTE->EVENTS_IN[ch] = 0; + _pal_isr_code(ch); + } + } + + OSAL_IRQ_EPILOGUE(); +} + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ +/** + * @brief Enables IRQ sources. + * + * @notapi + */ +void irqInit(void) { + +#if HAL_USE_PAL + nvicEnableVector(GPIOTE_IRQn, NRF5_IRQ_GPIOTE_PRIORITY); +#endif +} + +/** + * @brief Disables IRQ sources. + * + * @notapi + */ +void irqDeinit(void) { + +#if HAL_USE_PAL + nvicDisableVector(GPIOTE_IRQn); +#endif +} + +/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/nrf51_isr.h b/os/hal/ports/NRF5/NRF51822/nrf51_isr.h new file mode 100644 index 0000000..832d2c3 --- /dev/null +++ b/os/hal/ports/NRF5/NRF51822/nrf51_isr.h @@ -0,0 +1,44 @@ +/* + Copyright (C) 2018 Konstantin Oblaukhov + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF51822/nrf51_isr.h + * @brief NRF51822 ISR handler header. + * + * @addtogroup NRF51822_ISR + * @{ + */ + +#ifndef NRF51_ISR_H +#define NRF51_ISR_H + +#if !defined(NRF5_IRQ_GPIOTE_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_IRQ_GPIOTE_PRIORITY 3 +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void irqInit(void); + void irqDeinit(void); +#ifdef __cplusplus +} +#endif + +#endif /* NRF51_ISR_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/NRF51822/platform.mk b/os/hal/ports/NRF5/NRF51822/platform.mk index 298a85c..711a625 100644 --- a/os/hal/ports/NRF5/NRF51822/platform.mk +++ b/os/hal/ports/NRF5/NRF51822/platform.mk @@ -1,6 +1,6 @@ PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_ext_lld_isr.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/nrf51_isr.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ @@ -21,7 +21,6 @@ endif include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/UARTv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/SPIv1/driver.mk -include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/GPIOTEv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TWIv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/ADCv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/driver.mk diff --git a/os/hal/ports/NRF5/NRF52832/hal_lld.c b/os/hal/ports/NRF5/NRF52832/hal_lld.c index e63e57e..11307f8 100644 --- a/os/hal/ports/NRF5/NRF52832/hal_lld.c +++ b/os/hal/ports/NRF5/NRF52832/hal_lld.c @@ -87,6 +87,8 @@ void hal_lld_init(void) NRF_CLOCK->TASKS_LFCLKSTART = 1; while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0); #endif + + irqInit(); } /** diff --git a/os/hal/ports/NRF5/NRF52832/hal_lld.h b/os/hal/ports/NRF5/NRF52832/hal_lld.h index a2a8cc3..0620b5f 100644 --- a/os/hal/ports/NRF5/NRF52832/hal_lld.h +++ b/os/hal/ports/NRF5/NRF52832/hal_lld.h @@ -115,6 +115,7 @@ #endif #include "nvic.h" +#include "nrf52_isr.h" #ifdef __cplusplus diff --git a/os/hal/ports/NRF5/NRF52832/nrf52_isr.c b/os/hal/ports/NRF5/NRF52832/nrf52_isr.c new file mode 100644 index 0000000..7374f36 --- /dev/null +++ b/os/hal/ports/NRF5/NRF52832/nrf52_isr.c @@ -0,0 +1,96 @@ +/* + Copyright (C) 2018 Konstantin Oblaukhov + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF52832/nrf52_isr.c + * @brief NRF52832 ISR handler code. + * + * @addtogroup NRF52832_ISR + * @{ + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/** + * @brief GPIOTE interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(Vector58) { + + OSAL_IRQ_PROLOGUE(); + + for (int ch = 0; ch < NRF5_GPIOTE_NUM_CHANNELS; ch++) + { + if (NRF_GPIOTE->EVENTS_IN[ch]) + { + NRF_GPIOTE->EVENTS_IN[ch] = 0; + _pal_isr_code(ch); + } + } + + OSAL_IRQ_EPILOGUE(); +} + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ +/** + * @brief Enables IRQ sources. + * + * @notapi + */ +void irqInit(void) { + +#if HAL_USE_PAL + nvicEnableVector(GPIOTE_IRQn, NRF5_IRQ_GPIOTE_PRIORITY); +#endif +} + +/** + * @brief Disables IRQ sources. + * + * @notapi + */ +void irqDeinit(void) { + +#if HAL_USE_PAL + nvicDisableVector(GPIOTE_IRQn); +#endif +} + +/** @} */ diff --git a/os/hal/ports/NRF5/NRF52832/nrf52_isr.h b/os/hal/ports/NRF5/NRF52832/nrf52_isr.h new file mode 100644 index 0000000..b9f81d0 --- /dev/null +++ b/os/hal/ports/NRF5/NRF52832/nrf52_isr.h @@ -0,0 +1,44 @@ +/* + Copyright (C) 2018 Konstantin Oblaukhov + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file NRF52832/nrf52_isr.h + * @brief NRF52832 ISR handler header. + * + * @addtogroup NRF52832_ISR + * @{ + */ + +#ifndef NRF52_ISR_H +#define NRF52_ISR_H + +#if !defined(NRF5_IRQ_GPIOTE_PRIORITY) || defined(__DOXYGEN__) +#define NRF5_IRQ_GPIOTE_PRIORITY 3 +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void irqInit(void); + void irqDeinit(void); +#ifdef __cplusplus +} +#endif + +#endif /* NRF52_ISR_H */ + +/** @} */ diff --git a/os/hal/ports/NRF5/NRF52832/platform.mk b/os/hal/ports/NRF5/NRF52832/platform.mk index f1fcfe7..1e0a1af 100644 --- a/os/hal/ports/NRF5/NRF52832/platform.mk +++ b/os/hal/ports/NRF5/NRF52832/platform.mk @@ -1,5 +1,6 @@ PLATFORMSRC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/nrf52_isr.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/TIMERv1/hal_st_lld.c PLATFORMINC_CONTRIB := ${CHIBIOS}/os/hal/ports/common/ARMCMx \ -- cgit v1.2.3 From 6dc1071c9f5f470dc4956ce78d59040499b76e07 Mon Sep 17 00:00:00 2001 From: "Konstantin K. Oblaukhov" Date: Tue, 9 Apr 2019 13:40:54 +0700 Subject: EXT test rewritten. Add default value for NRF5_PAL_PAD_TO_EVENT macro. --- os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h | 8 + testhal/NRF51/NRF51822/EXT/Makefile | 213 -------- testhal/NRF51/NRF51822/EXT/chconf.h | 696 ------------------------- testhal/NRF51/NRF51822/EXT/halconf.h | 327 ------------ testhal/NRF51/NRF51822/EXT/halconf_community.h | 173 ------ testhal/NRF51/NRF51822/EXT/main.c | 128 ----- testhal/NRF51/NRF51822/EXT/mcuconf.h | 24 - testhal/NRF51/NRF51822/PAL/Makefile | 213 ++++++++ testhal/NRF51/NRF51822/PAL/chconf.h | 696 +++++++++++++++++++++++++ testhal/NRF51/NRF51822/PAL/halconf.h | 327 ++++++++++++ testhal/NRF51/NRF51822/PAL/halconf_community.h | 173 ++++++ testhal/NRF51/NRF51822/PAL/main.c | 117 +++++ testhal/NRF51/NRF51822/PAL/mcuconf.h | 24 + 13 files changed, 1558 insertions(+), 1561 deletions(-) delete mode 100644 testhal/NRF51/NRF51822/EXT/Makefile delete mode 100644 testhal/NRF51/NRF51822/EXT/chconf.h delete mode 100644 testhal/NRF51/NRF51822/EXT/halconf.h delete mode 100644 testhal/NRF51/NRF51822/EXT/halconf_community.h delete mode 100644 testhal/NRF51/NRF51822/EXT/main.c delete mode 100644 testhal/NRF51/NRF51822/EXT/mcuconf.h create mode 100644 testhal/NRF51/NRF51822/PAL/Makefile create mode 100644 testhal/NRF51/NRF51822/PAL/chconf.h create mode 100644 testhal/NRF51/NRF51822/PAL/halconf.h create mode 100644 testhal/NRF51/NRF51822/PAL/halconf_community.h create mode 100644 testhal/NRF51/NRF51822/PAL/main.c create mode 100644 testhal/NRF51/NRF51822/PAL/mcuconf.h diff --git a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h index 2df3fd3..e9021eb 100644 --- a/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h +++ b/os/hal/ports/NRF5/LLD/GPIOv1/hal_pal_lld.h @@ -155,6 +155,14 @@ typedef uint32_t iopadid_t; #define NRF5_GPIOTE_NUM_CHANNELS (8) #endif +/** + * @brief Pad to event number + * @details Converts pad to GPIOTE peripheral pad event number + */ +#if !defined(NRF5_PAL_PAD_TO_EVENT) || defined(__DOXYGEN__) +#define NRF5_PAL_PAD_TO_EVENT(pad) ((pad) % NRF5_GPIOTE_NUM_CHANNELS) +#endif + /*===========================================================================*/ /* Implementation, some of the following macros could be implemented as */ /* functions, if so please put them in pal_lld.c. */ diff --git a/testhal/NRF51/NRF51822/EXT/Makefile b/testhal/NRF51/NRF51822/EXT/Makefile deleted file mode 100644 index 79e226d..0000000 --- a/testhal/NRF51/NRF51822/EXT/Makefile +++ /dev/null @@ -1,213 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# Linker extra options here. -ifeq ($(USE_LDOPT),) - USE_LDOPT = -endif - -# Enable this if you want link time optimizations (LTO) -ifeq ($(USE_LTO),) - USE_LTO = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# If enabled, this option makes the build process faster by not compiling -# modules not used in the current configuration. -ifeq ($(USE_SMART_BUILD),) - USE_SMART_BUILD = yes -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Stack size to be allocated to the Cortex-M process stack. This stack is -# the stack used by the main() thread. -ifeq ($(USE_PROCESS_STACKSIZE),) - USE_PROCESS_STACKSIZE = 0x200 -endif - -# Stack size to the allocated to the Cortex-M main/exceptions stack. This -# stack is used for processing interrupts and exceptions. -ifeq ($(USE_EXCEPTIONS_STACKSIZE),) - USE_EXCEPTIONS_STACKSIZE = 0x400 -endif - -# Enables the use of FPU on Cortex-M4 (no, softfp, hard). -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../../../../ChibiOS -CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib -# Licensing files. -include $(CHIBIOS)/os/license/license.mk -# Startup files. -include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk -# HAL-OSAL files (optional). -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF51822/platform.mk -include $(CHIBIOS_CONTRIB)/os/hal/boards/WVSHARE_BLE400/board.mk -include $(CHIBIOS)/os/hal/osal/rt/osal.mk -# RTOS files (optional). -include $(CHIBIOS)/os/rt/rt.mk -include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk -# Other files (optional). -#include $(CHIBIOS)/test/rt/test.mk - -# Define linker script file here -LDSCRIPT= $(STARTUPLD)/NRF51822.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(ALLCSRC) \ - $(TESTSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = $(ALLCPPSRC) - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(ALLASMSRC) -ASMXSRC = $(ALLXASMSRC) - -INCDIR = $(ALLINC) $(TESTINC) \ - $(TESTHAL) - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m0 - -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -AR = $(TRGT)ar -OD = $(TRGT)objdump -SZ = $(TRGT)size -HEX = $(CP) -O ihex -BIN = $(CP) -O binary -SREC = $(CP) -O srec - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC -include $(RULESPATH)/rules.mk diff --git a/testhal/NRF51/NRF51822/EXT/chconf.h b/testhal/NRF51/NRF51822/EXT/chconf.h deleted file mode 100644 index 0ac7be8..0000000 --- a/testhal/NRF51/NRF51822/EXT/chconf.h +++ /dev/null @@ -1,696 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -#define CHCONF_H - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_5_1_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 -#endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_CFG_ST_FREQUENCY) -#define CH_CFG_ST_FREQUENCY 1000 -#endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -#if !defined(CH_CFG_INTERVALS_SIZE) -#define CH_CFG_INTERVALS_SIZE 32 -#endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_TIME_TYPES_SIZE) -#define CH_CFG_TIME_TYPES_SIZE 32 -#endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -#if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 0 -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -#if !defined(CH_CFG_TIME_QUANTUM) -#define CH_CFG_TIME_QUANTUM 2 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -#if !defined(CH_CFG_MEMCORE_SIZE) -#define CH_CFG_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -#if !defined(CH_CFG_NO_IDLE_THREAD) -#define CH_CFG_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_OPTIMIZE_SPEED) -#define CH_CFG_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TM) -#define CH_CFG_USE_TM FALSE -#endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_REGISTRY) -#define CH_CFG_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_WAITEXIT) -#define CH_CFG_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_SEMAPHORES) -#define CH_CFG_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MUTEXES) -#define CH_CFG_USE_MUTEXES TRUE -#endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_CONDVARS) -#define CH_CFG_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_EVENTS) -#define CH_CFG_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -#define CH_CFG_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MESSAGES) -#define CH_CFG_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -#define CH_CFG_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_MAILBOXES) -#define CH_CFG_USE_MAILBOXES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMCORE) -#define CH_CFG_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_CFG_USE_HEAP) -#define CH_CFG_USE_HEAP TRUE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMPOOLS) -#define CH_CFG_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_OBJ_FIFOS) -#define CH_CFG_USE_OBJ_FIFOS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -#if !defined(CH_CFG_USE_DYNAMIC) -#define CH_CFG_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_CFG_USE_FACTORY) -#define CH_CFG_USE_FACTORY TRUE -#endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -#endif - -/** - * @brief Enables the registry of generic objects. - */ -#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -#endif - -/** - * @brief Enables factory for generic buffers. - */ -#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -#endif - -/** - * @brief Enables factory for semaphores. - */ -#if !defined(CH_CFG_FACTORY_SEMAPHORES) -#define CH_CFG_FACTORY_SEMAPHORES TRUE -#endif - -/** - * @brief Enables factory for mailboxes. - */ -#if !defined(CH_CFG_FACTORY_MAILBOXES) -#define CH_CFG_FACTORY_MAILBOXES TRUE -#endif - -/** - * @brief Enables factory for objects FIFOs. - */ -#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -#define CH_CFG_FACTORY_OBJ_FIFOS TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_STATISTICS) -#define CH_DBG_STATISTICS FALSE -#endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_MASK) -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL -#endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_BUFFER_SIZE) -#define CH_DBG_TRACE_BUFFER_SIZE 128 -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -#if !defined(CH_DBG_THREADS_PROFILING) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -#define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -#define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -#define CH_CFG_THREAD_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -#define CH_CFG_THREAD_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ - /* Idle-enter code here.*/ \ -} - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ - /* Idle-leave code here.*/ \ -} - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#define CH_CFG_IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#define CH_CFG_SYSTEM_TICK_HOOK() { \ - /* System tick event code here.*/ \ -} - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ - /* System halt code here.*/ \ -} - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/testhal/NRF51/NRF51822/EXT/halconf.h b/testhal/NRF51/NRF51822/EXT/halconf.h deleted file mode 100644 index 407dd2f..0000000 --- a/testhal/NRF51/NRF51822/EXT/halconf.h +++ /dev/null @@ -1,327 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2S subsystem. - */ -#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/NRF51/NRF51822/EXT/halconf_community.h b/testhal/NRF51/NRF51822/EXT/halconf_community.h deleted file mode 100644 index 43fdbf8..0000000 --- a/testhal/NRF51/NRF51822/EXT/halconf_community.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef HALCONF_COMMUNITY_H -#define HALCONF_COMMUNITY_H - -/** - * @brief Enables the community overlay. - */ -#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) -#define HAL_USE_COMMUNITY TRUE -#endif - -/** - * @brief Enables the FSMC subsystem. - */ -#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) -#define HAL_USE_FSMC FALSE -#endif - -/** - * @brief Enables the NAND subsystem. - */ -#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) -#define HAL_USE_NAND FALSE -#endif - -/** - * @brief Enables the 1-wire subsystem. - */ -#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) -#define HAL_USE_ONEWIRE FALSE -#endif - -/** - * @brief Enables the EICU subsystem. - */ -#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) -#define HAL_USE_EICU FALSE -#endif - -/** - * @brief Enables the CRC subsystem. - */ -#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) -#define HAL_USE_CRC FALSE -#endif - -/** - * @brief Enables the RNG subsystem. - */ -#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) -#define HAL_USE_RNG FALSE -#endif - -/** - * @brief Enables the EEPROM subsystem. - */ -#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) -#define HAL_USE_EEPROM FALSE -#endif - -/** - * @brief Enables the TIMCAP subsystem. - */ -#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) -#define HAL_USE_TIMCAP FALSE -#endif - -/** - * @brief Enables the TIMCAP subsystem. - */ -#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) -#define HAL_USE_COMP FALSE -#endif - -/** - * @brief Enables the QEI subsystem. - */ -#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) -#define HAL_USE_QEI FALSE -#endif - -/** - * @brief Enables the USBH subsystem. - */ -#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) -#define HAL_USE_USBH FALSE -#endif - -/** - * @brief Enables the USB_MSD subsystem. - */ -#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) -#define HAL_USE_USB_MSD FALSE -#endif - -/*===========================================================================*/ -/* FSMCNAND driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define NAND_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* 1-wire driver related settings. */ -/*===========================================================================*/ -/** - * @brief Enables strong pull up feature. - * @note Disabling this option saves both code and data space. - */ -#define ONEWIRE_USE_STRONG_PULLUP FALSE - -/** - * @brief Enables search ROM feature. - * @note Disabling this option saves both code and data space. - */ -#define ONEWIRE_USE_SEARCH_ROM TRUE - -/*===========================================================================*/ -/* QEI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables discard of overlow - */ -#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) -#define QEI_USE_OVERFLOW_DISCARD FALSE -#endif - -/** - * @brief Enables min max of overlow - */ -#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) -#define QEI_USE_OVERFLOW_MINMAX FALSE -#endif - -/*===========================================================================*/ -/* EEProm driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables 24xx series I2C eeprom device driver. - * @note Disabling this option saves both code and data space. - */ -#define EEPROM_USE_EE24XX FALSE - /** - * @brief Enables 25xx series SPI eeprom device driver. - * @note Disabling this option saves both code and data space. - */ -#define EEPROM_USE_EE25XX FALSE - -#endif /* HALCONF_COMMUNITY_H */ - -/** @} */ diff --git a/testhal/NRF51/NRF51822/EXT/main.c b/testhal/NRF51/NRF51822/EXT/main.c deleted file mode 100644 index f24eb5d..0000000 --- a/testhal/NRF51/NRF51822/EXT/main.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -#ifndef DEBOUNCE_TIME -#define DEBOUNCE_TIME 100 -#endif - -static virtual_timer_t vt1; -static virtual_timer_t vt2; -static bool debouncing1; -static bool debouncing2; - -/* LED1 toggled after debounce.*/ -static void led1toggle(void *arg) { - - (void)arg; - palTogglePad(IOPORT1, LED1); - debouncing1 = false; -} - -/* LED2 toggled after debounce.*/ -static void led2toggle(void *arg) { - - (void)arg; - palTogglePad(IOPORT1, LED2); - debouncing2 = false; -} - -static void extcb1(EXTDriver *extp, expchannel_t channel) -{ - (void)extp; - (void)channel; - - uint8_t pad1 = palReadPad(IOPORT1, KEY1); - - if (!debouncing1 && (pad1 == PAL_LOW)) { - debouncing1 = true; - chSysLockFromISR(); - chVTSetI(&vt1, TIME_MS2I(DEBOUNCE_TIME), led1toggle, NULL); - chSysUnlockFromISR(); - } else if (debouncing1 && (pad1 == PAL_HIGH)) { - chSysLockFromISR(); - if (chVTIsArmedI(&vt1)) - chVTResetI(&vt1); - chSysUnlockFromISR(); - debouncing1 = false; - } -} - -static void extcb2(EXTDriver *extp, expchannel_t channel) -{ - (void)extp; - (void)channel; - - uint8_t pad2 = palReadPad(IOPORT1, KEY2); - - if (!debouncing2 && (pad2 == PAL_LOW)) { - debouncing2 = true; - chSysLockFromISR(); - chVTSetI(&vt2, TIME_MS2I(DEBOUNCE_TIME), led2toggle, NULL); - chSysUnlockFromISR(); - } else if (debouncing2 && (pad2 == PAL_HIGH)) { - chSysLockFromISR(); - if (chVTIsArmedI(&vt2)) - chVTResetI(&vt2); - chSysUnlockFromISR(); - debouncing2 = false; - } -} - -static const EXTConfig extcfg = -{ - { - {EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART | (KEY1 << EXT_MODE_GPIO_OFFSET), extcb1}, - {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART | (KEY2 << EXT_MODE_GPIO_OFFSET), extcb2}, - } -}; - -/* - * Application entry point. - */ -int main(void) -{ - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - extStart(&EXTD1, &extcfg); - - /* - * Normal main() thread activity, in this demo it enables and disables the - * button EXT channel using 5 seconds intervals. - */ - while (TRUE) { - palSetPad(IOPORT1, LED0); - chThdSleepMilliseconds(5000); - extChannelDisable(&EXTD1, 0); - extChannelDisable(&EXTD1, 1); - palClearPad(IOPORT1, LED0); - chThdSleepMilliseconds(5000); - extChannelEnable(&EXTD1, 0); - extChannelEnable(&EXTD1, 1); - } - - return 0; -} diff --git a/testhal/NRF51/NRF51822/EXT/mcuconf.h b/testhal/NRF51/NRF51822/EXT/mcuconf.h deleted file mode 100644 index f3a0d85..0000000 --- a/testhal/NRF51/NRF51822/EXT/mcuconf.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - Copyright (C) 2015 Stephen Caudle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _MCUCONF_H_ -#define _MCUCONF_H_ - -/* - * NRF51 driver settings. - */ - -#endif /* _MCUCONF_H_ */ diff --git a/testhal/NRF51/NRF51822/PAL/Makefile b/testhal/NRF51/NRF51822/PAL/Makefile new file mode 100644 index 0000000..79e226d --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/Makefile @@ -0,0 +1,213 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x200 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU on Cortex-M4 (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../../../../ChibiOS +CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF5/NRF51822/platform.mk +include $(CHIBIOS_CONTRIB)/os/hal/boards/WVSHARE_BLE400/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk +# Other files (optional). +#include $(CHIBIOS)/test/rt/test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/NRF51822.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) $(TESTINC) \ + $(TESTHAL) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +SREC = $(CP) -O srec + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC +include $(RULESPATH)/rules.mk diff --git a/testhal/NRF51/NRF51822/PAL/chconf.h b/testhal/NRF51/NRF51822/PAL/chconf.h new file mode 100644 index 0000000..0ac7be8 --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/chconf.h @@ -0,0 +1,696 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_1_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 1000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 0 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 2 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM FALSE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/PAL/halconf.h b/testhal/NRF51/NRF51822/PAL/halconf.h new file mode 100644 index 0000000..c8c556a --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/halconf.h @@ -0,0 +1,327 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/PAL/halconf_community.h b/testhal/NRF51/NRF51822/PAL/halconf_community.h new file mode 100644 index 0000000..43fdbf8 --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/halconf_community.h @@ -0,0 +1,173 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef HALCONF_COMMUNITY_H +#define HALCONF_COMMUNITY_H + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__) +#define HAL_USE_COMP FALSE +#endif + +/** + * @brief Enables the QEI subsystem. + */ +#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__) +#define HAL_USE_QEI FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD FALSE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM TRUE + +/*===========================================================================*/ +/* QEI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables discard of overlow + */ +#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_DISCARD FALSE +#endif + +/** + * @brief Enables min max of overlow + */ +#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__) +#define QEI_USE_OVERFLOW_MINMAX FALSE +#endif + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables 24xx series I2C eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE24XX FALSE + /** + * @brief Enables 25xx series SPI eeprom device driver. + * @note Disabling this option saves both code and data space. + */ +#define EEPROM_USE_EE25XX FALSE + +#endif /* HALCONF_COMMUNITY_H */ + +/** @} */ diff --git a/testhal/NRF51/NRF51822/PAL/main.c b/testhal/NRF51/NRF51822/PAL/main.c new file mode 100644 index 0000000..313291c --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/main.c @@ -0,0 +1,117 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +#ifndef DEBOUNCE_TIME +#define DEBOUNCE_TIME 100 +#endif + +static virtual_timer_t vt1; +static virtual_timer_t vt2; +static bool debouncing1; +static bool debouncing2; + +/* LED1 toggled after debounce.*/ +static void led1toggle(void *arg) { + + (void)arg; + palTogglePad(IOPORT1, LED1); + debouncing1 = false; +} + +/* LED2 toggled after debounce.*/ +static void led2toggle(void *arg) { + + (void)arg; + palTogglePad(IOPORT1, LED2); + debouncing2 = false; +} + +static void extcb1(void *arg) +{ + (void)arg; + uint8_t pad1 = palReadPad(IOPORT1, KEY1); + + if (!debouncing1 && (pad1 == PAL_LOW)) { + debouncing1 = true; + chSysLockFromISR(); + chVTSetI(&vt1, TIME_MS2I(DEBOUNCE_TIME), led1toggle, NULL); + chSysUnlockFromISR(); + } else if (debouncing1 && (pad1 == PAL_HIGH)) { + chSysLockFromISR(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chSysUnlockFromISR(); + debouncing1 = false; + } +} + +static void extcb2(void *arg) +{ + (void)arg; + uint8_t pad2 = palReadPad(IOPORT1, KEY2); + + if (!debouncing2 && (pad2 == PAL_LOW)) { + debouncing2 = true; + chSysLockFromISR(); + chVTSetI(&vt2, TIME_MS2I(DEBOUNCE_TIME), led2toggle, NULL); + chSysUnlockFromISR(); + } else if (debouncing2 && (pad2 == PAL_HIGH)) { + chSysLockFromISR(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chSysUnlockFromISR(); + debouncing2 = false; + } +} + +/* + * Application entry point. + */ +int main(void) +{ + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + palSetPadCallback(IOPORT1, KEY1, extcb1, NULL); + palSetPadCallback(IOPORT1, KEY2, extcb2, NULL); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + palSetPad(IOPORT1, LED0); + chThdSleepMilliseconds(5000); + palDisablePadEvent(IOPORT1, KEY1); + palDisablePadEvent(IOPORT1, KEY2); + palClearPad(IOPORT1, LED0); + chThdSleepMilliseconds(5000); + palEnablePadEvent(IOPORT1, KEY1, PAL_EVENT_MODE_FALLING_EDGE); + palEnablePadEvent(IOPORT1, KEY2, PAL_EVENT_MODE_RISING_EDGE); + } + + return 0; +} diff --git a/testhal/NRF51/NRF51822/PAL/mcuconf.h b/testhal/NRF51/NRF51822/PAL/mcuconf.h new file mode 100644 index 0000000..f3a0d85 --- /dev/null +++ b/testhal/NRF51/NRF51822/PAL/mcuconf.h @@ -0,0 +1,24 @@ +/* + Copyright (C) 2015 Stephen Caudle + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + +/* + * NRF51 driver settings. + */ + +#endif /* _MCUCONF_H_ */ -- cgit v1.2.3 From 6fab9821ebd6bda8c21654513bcec8dddb46748e Mon Sep 17 00:00:00 2001 From: "Konstantin K. Oblaukhov" Date: Tue, 9 Apr 2019 16:25:54 +0700 Subject: Merge ICU (in GPIOTE mode) and PAL interrupts. --- os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c | 19 ------------------- os/hal/ports/NRF5/NRF52832/nrf52_isr.c | 16 +++++++++++++--- 2 files changed, 13 insertions(+), 22 deletions(-) diff --git a/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c index 4966007..bca8855 100644 --- a/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c +++ b/os/hal/ports/NRF5/LLD/TIMERv1/hal_icu_lld.c @@ -301,25 +301,6 @@ static void start_channels(ICUDriver *icup) { /* Driver interrupt handlers. */ /*===========================================================================*/ -#if NRF5_ICU_USE_GPIOTE_PPI -/** - * @brief GPIOTE events interrupt handler. - * @note It is assumed that the various sources are only activated if the - * associated callback pointer is not equal to @p NULL in order to not - * perform an extra check in a potentially critical interrupt handler. - * - * @isr - */ -OSAL_IRQ_HANDLER(Vector58) { - - OSAL_IRQ_PROLOGUE(); - - icu_lld_serve_gpiote_interrupt(&ICUD1); - - OSAL_IRQ_EPILOGUE(); -} -#endif /* NRF5_ICU_USE_GPIOTE_PPI */ - #if NRF5_ICU_USE_TIMER0 /** * @brief TIMER0 compare interrupt handler. diff --git a/os/hal/ports/NRF5/NRF52832/nrf52_isr.c b/os/hal/ports/NRF5/NRF52832/nrf52_isr.c index 7374f36..431bb3b 100644 --- a/os/hal/ports/NRF5/NRF52832/nrf52_isr.c +++ b/os/hal/ports/NRF5/NRF52832/nrf52_isr.c @@ -41,6 +41,10 @@ /* Driver local functions. */ /*===========================================================================*/ +#if (HAL_USE_ICU && NRF5_ICU_USE_GPIOTE_PPI) +extern void icu_lld_serve_gpiote_interrupt(ICUDriver *icup); +#endif + /*===========================================================================*/ /* Driver interrupt handlers. */ /*===========================================================================*/ @@ -53,15 +57,21 @@ OSAL_IRQ_HANDLER(Vector58) { OSAL_IRQ_PROLOGUE(); - + +#if (HAL_USE_ICU && NRF5_ICU_USE_GPIOTE_PPI) + icu_lld_serve_gpiote_interrupt(&ICUD1); +#endif + +#if (HAL_USE_PAL && (PAL_USE_WAIT || PAL_USE_CALLBACKS)) for (int ch = 0; ch < NRF5_GPIOTE_NUM_CHANNELS; ch++) { if (NRF_GPIOTE->EVENTS_IN[ch]) { - NRF_GPIOTE->EVENTS_IN[ch] = 0; - _pal_isr_code(ch); + NRF_GPIOTE->EVENTS_IN[ch] = 0; + _pal_isr_code(ch); } } +#endif OSAL_IRQ_EPILOGUE(); } -- cgit v1.2.3 From b5332141f06b23c5708adba6b356746e54be665e Mon Sep 17 00:00:00 2001 From: Fabio D'Urso Date: Mon, 22 Jul 2019 12:30:11 +0200 Subject: NRF5: Added support for internal I2C pull-ups --- os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c | 24 ++++++++++++------------ os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h | 4 ++++ os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c | 24 ++++++++++++------------ os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h | 4 ++++ 4 files changed, 32 insertions(+), 24 deletions(-) diff --git a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c index 957c0be..7d5a26d 100644 --- a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c +++ b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.c @@ -38,17 +38,17 @@ #define I2C_INPUT(p) do { IOPORT1->DIRCLR = (1UL << (p)); } while(0) /*!< Configures I2C pin as input */ #define I2C_OUTPUT(p) do { IOPORT1->DIRSET = (1UL << (p)); } while(0) /*!< Configures I2C pin as output */ -#define I2C_PIN_CNF \ +#define I2C_PIN_CNF(internal_pullup) \ ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (((internal_pullup) ? GPIO_PIN_CNF_PULL_Pullup : GPIO_PIN_CNF_PULL_Disabled) << GPIO_PIN_CNF_PULL_Pos) \ | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) -#define I2C_PIN_CNF_CLR \ +#define I2C_PIN_CNF_CLR(internal_pullup) \ ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (((internal_pullup) ? GPIO_PIN_CNF_PULL_Pullup : GPIO_PIN_CNF_PULL_Disabled) << GPIO_PIN_CNF_PULL_Pos) \ | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) @@ -97,14 +97,14 @@ static void i2c_clear_bus(I2CDriver *i2cp) { const I2CConfig *cfg = i2cp->config; uint8_t i; - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF(cfg->sda_pullup); I2C_HIGH(cfg->sda_pad); I2C_HIGH(cfg->scl_pad); - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR(cfg->sda_pullup); nrf_delay_us(4); @@ -233,8 +233,8 @@ void i2c_lld_start(I2CDriver *i2cp) { i2c_clear_bus(i2cp); - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF(cfg->sda_pullup); i2c->SHORTS = 0; @@ -300,8 +300,8 @@ void i2c_lld_stop(I2CDriver *i2cp) { i2c->ENABLE = TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos; - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR(cfg->sda_pullup); } } diff --git a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h index fb88a5e..a73efc7 100644 --- a/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h +++ b/os/hal/ports/NRF5/LLD/TWIMv1/hal_i2c_lld.h @@ -113,6 +113,10 @@ typedef struct { uint8_t scl_pad; /* @brief Pad number for SDA */ uint8_t sda_pad; + /* @brief Whether to use the internal pull-up for SCL */ + bool scl_pullup; + /* @brief Whether to use the internal pull-up for SDA */ + bool sda_pullup; } I2CConfig; diff --git a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c index 9f75906..a9391dd 100644 --- a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c +++ b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.c @@ -38,17 +38,17 @@ #define I2C_INPUT(p) do { IOPORT1->DIRCLR = (1UL << (p)); } while(0) /*!< Configures I2C pin as input */ #define I2C_OUTPUT(p) do { IOPORT1->DIRSET = (1UL << (p)); } while(0) /*!< Configures I2C pin as output */ -#define I2C_PIN_CNF \ +#define I2C_PIN_CNF(internal_pullup) \ ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (((internal_pullup) ? GPIO_PIN_CNF_PULL_Pullup : GPIO_PIN_CNF_PULL_Disabled) << GPIO_PIN_CNF_PULL_Pos) \ | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)) -#define I2C_PIN_CNF_CLR \ +#define I2C_PIN_CNF_CLR(internal_pullup) \ ((GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \ | (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \ - | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) \ + | (((internal_pullup) ? GPIO_PIN_CNF_PULL_Pullup : GPIO_PIN_CNF_PULL_Disabled) << GPIO_PIN_CNF_PULL_Pos) \ | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \ | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)) @@ -102,14 +102,14 @@ static void i2c_clear_bus(I2CDriver *i2cp) const I2CConfig *cfg = i2cp->config; int i; - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF(cfg->sda_pullup); I2C_HIGH(cfg->sda_pad); I2C_HIGH(cfg->scl_pad); - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR(cfg->sda_pullup); nrf_delay_us(4); @@ -290,8 +290,8 @@ void i2c_lld_start(I2CDriver *i2cp) { i2c_clear_bus(i2cp); - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF(cfg->sda_pullup); i2c->EVENTS_RXDREADY = 0; i2c->EVENTS_TXDSENT = 0; @@ -351,8 +351,8 @@ void i2c_lld_stop(I2CDriver *i2cp) { nvicDisableVector(I2C_IRQ_NUM); - IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR; - IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR; + IOPORT1->PIN_CNF[cfg->scl_pad] = I2C_PIN_CNF_CLR(cfg->scl_pullup); + IOPORT1->PIN_CNF[cfg->sda_pad] = I2C_PIN_CNF_CLR(cfg->sda_pullup); } } diff --git a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h index 7a4050b..f126983 100644 --- a/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h +++ b/os/hal/ports/NRF5/LLD/TWIv1/hal_i2c_lld.h @@ -121,6 +121,10 @@ typedef struct { uint8_t scl_pad; /* @brief Pad number for SDA */ uint8_t sda_pad; + /* @brief Whether to use the internal pull-up for SCL */ + bool scl_pullup; + /* @brief Whether to use the internal pull-up for SDA */ + bool sda_pullup; } I2CConfig; -- cgit v1.2.3 From 9b5eba54fb0789b31e967582ab55a307af821b08 Mon Sep 17 00:00:00 2001 From: Fabio D'Urso Date: Tue, 23 Jul 2019 01:02:52 +0200 Subject: NRF: Make the SPI driver compile on NRF52 too --- os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c index 95bb9b7..3e0bc83 100644 --- a/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c +++ b/os/hal/ports/NRF5/LLD/SPIv1/hal_spi_lld.c @@ -26,6 +26,11 @@ #if HAL_USE_SPI || defined(__DOXYGEN__) +#if NRF_SERIES == 52 +#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn +#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn +#endif + /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ -- cgit v1.2.3 From 5ea770676fd1c0e793437b13341f40067a3e5c5d Mon Sep 17 00:00:00 2001 From: markuspetermann Date: Wed, 7 Aug 2019 00:36:02 +0200 Subject: Added hal lld's to platform.mk of STM32F7xx --- os/hal/ports/STM32/STM32F7xx/platform.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/os/hal/ports/STM32/STM32F7xx/platform.mk b/os/hal/ports/STM32/STM32F7xx/platform.mk index 1c806a7..9294c6a 100644 --- a/os/hal/ports/STM32/STM32F7xx/platform.mk +++ b/os/hal/ports/STM32/STM32F7xx/platform.mk @@ -12,7 +12,12 @@ HALCONF := $(strip $(shell cat $(CONFDIR)/halconf.h $(CONFDIR)/halconf_community else endif +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/driver.mk include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/driver.mk +include ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/driver.mk # Shared variables ALLCSRC += $(PLATFORMSRC_CONTRIB) -- cgit v1.2.3