Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fixed typo | barthess | 2015-10-14 | 4 | -4/+4 |
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* | FSMC code cleanup | barthess | 2015-10-14 | 12 | -22/+14 |
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* | Changed the way files are included to a more convenient way. | Fabien Poussin | 2015-08-20 | 2 | -15/+15 |
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* | Add CRC Driver | Michael Spradling | 2015-08-16 | 3 | -0/+583 |
| | | | | | | | | | | | | | | | | | | | | | | This patch includes a high level and two low level drivers. The high level driver is enabled with flag HAL_USE_CRC The low level drivers include: * Hardware CRC for the STM32 cortex processor lines.(when supported) * Enabled with flag STM32_CRC_USE_CRC1 * DMA is enabled with CRC_USE_DMA * SYNC api will use DMA, but put calling thread to sleep * ASYNC api enabled. * DMA Disabled * SYNC api spin while calculating CRC * ASYNC api disabled * Software CRC (3 modes) * CRCSW_CRC32_TABLE - Enables crc32 with lookup table. * CRCSW_CRC16_TABLE - Enables crc16 with lookup tables. * CRCSW_PROGRAMMBLE - Enables any crc done with computation. * Can calculate any crc configuration. * CRC_USE_DMA obviously not support with software CRC | ||||
* | Improved FSMC. | barthess | 2015-08-04 | 3 | -16/+32 |
| | | | | SRAM configuration is much more flexible now. | ||||
* | Removed dependency on ST library for SDRAM | Andrea Zoppi | 2015-06-28 | 2 | -5/+5 |
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* | Minor changes | Andrea Zoppi | 2015-06-27 | 4 | -229/+234 |
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* | Old definitions removed | Andrea Zoppi | 2015-06-27 | 3 | -61/+1 |
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* | LTDC and DMA2D ported to ChibiOS/RT 3 | TexZK | 2015-06-24 | 5 | -2/+8383 |
| | | | | | + LTDC and DMA2D peripheral drivers + LTDC and DMA2D demo project | ||||
* | EICU. Fixed incorrect frequency calculation. | barthess | 2015-06-02 | 1 | -2/+2 |
| | | | | | Timers 9, 10, 11 connected to APB2 but constant in driver initialization code was taken for APB1. | ||||
* | Fixed copypaste error in comment | barthess | 2015-06-02 | 1 | -1/+1 |
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* | NAND code changed to use bitmap class | barthess | 2015-05-02 | 2 | -22/+23 |
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* | EICU. Updated lld according to chibios updates. | barthess | 2015-03-31 | 1 | -12/+12 |
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* | EICU. Updated authors. | barthess | 2015-03-13 | 2 | -1/+9 |
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* | EICU. Low level driver moved to TIMv1 directory | barthess | 2015-03-13 | 3 | -1/+2 |
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* | EICU. Temporal code moved to main chibios repo. | barthess | 2015-03-13 | 1 | -72/+0 |
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* | Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib into HEAD | barthess | 2015-03-13 | 2 | -32/+391 |
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| * | EICU. Added support of single channel timers. | barthess | 2015-03-13 | 2 | -12/+371 |
| | | | | | | | | Tested in hardware with TIM11. | ||||
| * | EICU improvements. | barthess | 2015-03-12 | 2 | -20/+20 |
| | | | | | | | | | | Added field containing available channels into EICU driver structure. This simplified driver code. | ||||
* | | EICU. Minor improvements | barthess | 2015-03-13 | 1 | -4/+3 |
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* | EICU. Added const qualifier for driver pointer in some functions | barthess | 2015-03-05 | 1 | -3/+3 |
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* | EICU. Timer widht (16-32 bits) now stored in driver field and detected ↵ | barthess | 2015-03-05 | 2 | -6/+26 |
| | | | | durign startup | ||||
* | EICU. Cosmetical cleanup | barthess | 2015-03-03 | 2 | -9/+40 |
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* | EICU. Deleted code for "fast" capture. | barthess | 2015-03-03 | 2 | -236/+64 |
| | | | | | | Reasons: 1) It duplicates functionality of "vanilla" ICU driver 2) Fast and slow modes are mutually exclided in single timer | ||||
* | EICU. Cosmetical improvements. | barthess | 2015-03-03 | 2 | -21/+19 |
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* | EICU now able to capture data on all channels | barthess | 2015-03-03 | 2 | -265/+480 |
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* | EICU. Fixed handlign of 32-bit timers. General code cleanup. PWM mode still ↵ | barthess | 2015-03-01 | 2 | -119/+140 |
| | | | | untested. | ||||
* | EICU. Fixed some typos. | barthess | 2015-03-01 | 2 | -2/+2 |
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* | Added EICU driver in HAL. Added STM32 backend for EICU. | barthess | 2015-02-28 | 3 | -1/+1326 |
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* | Fixed copyrights | barthess | 2014-12-06 | 8 | -36/+10 |
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* | FSMC. SDRAM. Fixed bug with registers' memory layout | barthess | 2014-10-31 | 2 | -12/+10 |
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* | FSMC. SDRAM. Fixed some typos | barthess | 2014-10-31 | 2 | -2/+2 |
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* | FSMC. SDRAM. Added safety mask for SDRTR register | barthess | 2014-10-25 | 1 | -1/+1 |
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* | FSMC. SDRAM. Fixed delay code | barthess | 2014-10-25 | 1 | -2/+2 |
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* | FSMC. SDRAM. Improved stop function | barthess | 2014-10-25 | 1 | -12/+22 |
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* | FSMC. SDRAM driver cleanup. Needs review. | barthess | 2014-10-25 | 2 | -218/+55 |
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* | FSMC. SDRAM architecture reworked. Needs review. | barthess | 2014-10-24 | 4 | -240/+119 |
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* | FSMC. SDRAM. Style cleanup | barthess | 2014-10-22 | 5 | -107/+153 |
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* | Added SDRAM support via FSMC | barthess | 2014-10-19 | 2 | -0/+646 |
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* | FSMC. Build fixed after code moving from SVN | barthess | 2014-10-18 | 1 | -4/+4 |
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* | Added fsmc code | barthess | 2014-10-18 | 7 | -0/+1688 |