Commit message (Collapse) | Author | Age | Files | Lines | |
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* | FSMC NAND improvements. | barthess | 2017-01-17 | 3 | -65/+140 |
| | | | | | 1) Implemented 16 bit bus width support 2) Added workaround errata in STM32 | ||||
* | NAND. Added reset function. | barthess | 2017-01-06 | 2 | -8/+21 |
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* | FSMC. Sync mode improvements. | barthess | 2016-12-09 | 1 | -2/+8 |
| | | | | | | | 1) Control registers writes reordered in init sequence to eliminate incorrect output clock frequnency in short period after CCLKEN bit set and B(W)TR registers set. 2) Added reset of CCLEN bit in stop procedure. | ||||
* | add STM32F7 FMC write FIFO disable bit | Nicolas Reinecke | 2016-11-08 | 1 | -0/+3 |
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* | Updated include guards | barthess | 2016-10-17 | 8 | -20/+20 |
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* | [STM32 NAND] Code cleanup. | barthess | 2016-08-18 | 1 | -3/+4 |
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* | [STM32 NAND] Deleted ugly hack with EXTI interrupt instead of NAND one | barthess | 2016-08-16 | 4 | -45/+5 |
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* | [STM32 NAND] Deleted unused defines. | barthess | 2016-08-16 | 1 | -9/+0 |
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* | Added room for STM32F7x | barthess | 2016-07-14 | 2 | -6/+17 |
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* | FSMC: fix build on stm32f1x and stm32f3 | Nicolas Reinecke | 2016-04-29 | 1 | -0/+4 |
| | | | | STM32F1,3 has no fsmc reset function so make it optional | ||||
* | STM32 mass update to current naming convention in ChibiOS | barthess | 2016-04-07 | 8 | -6/+6 |
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* | NAND. Cosmetical improvement | barthess | 2016-03-17 | 1 | -5/+7 |
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* | Updated some testhal projects to new ChibiOS code | barthess | 2016-03-15 | 1 | -6/+0 |
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* | FSMC code cleanup | barthess | 2015-10-14 | 8 | -18/+10 |
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* | Improved FSMC. | barthess | 2015-08-04 | 3 | -16/+32 |
| | | | | SRAM configuration is much more flexible now. | ||||
* | Removed dependency on ST library for SDRAM | Andrea Zoppi | 2015-06-28 | 2 | -5/+5 |
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* | NAND code changed to use bitmap class | barthess | 2015-05-02 | 2 | -22/+23 |
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* | Fixed copyrights | barthess | 2014-12-06 | 8 | -36/+10 |
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* | FSMC. SDRAM. Fixed bug with registers' memory layout | barthess | 2014-10-31 | 2 | -12/+10 |
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* | FSMC. SDRAM. Fixed some typos | barthess | 2014-10-31 | 2 | -2/+2 |
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* | FSMC. SDRAM. Added safety mask for SDRTR register | barthess | 2014-10-25 | 1 | -1/+1 |
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* | FSMC. SDRAM. Fixed delay code | barthess | 2014-10-25 | 1 | -2/+2 |
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* | FSMC. SDRAM. Improved stop function | barthess | 2014-10-25 | 1 | -12/+22 |
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* | FSMC. SDRAM driver cleanup. Needs review. | barthess | 2014-10-25 | 2 | -218/+55 |
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* | FSMC. SDRAM architecture reworked. Needs review. | barthess | 2014-10-24 | 4 | -240/+119 |
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* | FSMC. SDRAM. Style cleanup | barthess | 2014-10-22 | 4 | -106/+151 |
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* | Added SDRAM support via FSMC | barthess | 2014-10-19 | 2 | -0/+646 |
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* | Added fsmc code | barthess | 2014-10-18 | 6 | -0/+1681 |