diff options
Diffstat (limited to 'testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h')
-rw-r--r-- | testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h | 51 |
1 files changed, 28 insertions, 23 deletions
diff --git a/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h b/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h index c7bf7a1..bf40512 100644 --- a/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h +++ b/testhal/STM32/STM32F7xx/USB_MSD/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F4xx drivers configuration. + * STM32F7xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -60,18 +60,21 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV4 -#define STM32_I2SSRC STM32_I2SSRC_PLLI2S +#define STM32_I2SSRC STM32_I2SSRC_OFF #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 #define STM32_PLLI2SR_VALUE 4 +#define STM32_PLLI2SDIVQ_VALUE 2 #define STM32_PLLSAIN_VALUE 192 #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 #define STM32_PLLSAIR_VALUE 4 -#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF +#define STM32_PLLSAIDIVQ_VALUE 2 +#define STM32_PLLSAIDIVR_VALUE 2 #define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_SAI2SEL STM32_SAI2SEL_OFF +#define STM32_LCDTFT_REQUIRED FALSE #define STM32_USART1SEL STM32_USART1SEL_PCLK2 #define STM32_USART2SEL STM32_USART2SEL_PCLK1 #define STM32_USART3SEL STM32_USART3SEL_PCLK1 @@ -87,10 +90,28 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +/* * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 @@ -113,8 +134,10 @@ */ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_USE_CAN3 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 #define STM32_CAN_CAN2_IRQ_PRIORITY 11 +#define STM32_CAN_CAN3_IRQ_PRIORITY 11 /* * DAC driver system settings. @@ -130,24 +153,6 @@ #define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) /* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 - -/* * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE |