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-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile7
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h7
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h15
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/main.c4
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h14
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/membench.h16
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.c10
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.h16
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.cpp246
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.hpp57
10 files changed, 67 insertions, 325 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile
index ec5d18c..e3d83c4 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/Makefile
@@ -10,7 +10,7 @@ endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
- USE_COPT =
+ USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
@@ -114,7 +114,7 @@ CSRC = $(STARTUPSRC) \
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC = $(CHCPPSRC) \
- memtest.cpp
+ $(CHIBIOS)/community/os/various/memtest.cpp
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
@@ -142,7 +142,8 @@ ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
$(CHIBIOS)/os/various/cpp_wrappers \
- $(CHIBIOS)/os/various
+ $(CHIBIOS)/os/various \
+ $(CHIBIOS)/community/os/various
#
# Project, sources and paths
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h
index b284367..b4882dc 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf.h
@@ -45,6 +45,13 @@
#endif
/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC FALSE
+#endif
+
+/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h
index c9b292d..be71357 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h
@@ -38,6 +38,13 @@
#define HAL_USE_ONEWIRE FALSE
#endif
+/**
+ * @brief Enables the EICU subsystem.
+ */
+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
+#define HAL_USE_EICU FALSE
+#endif
+
/*===========================================================================*/
/* FSMCNAND driver related settings. */
/*===========================================================================*/
@@ -50,14 +57,6 @@
#define NAND_USE_MUTUAL_EXCLUSION TRUE
#endif
-/**
- * @brief Enables internal driver map for bad blocks.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_BAD_MAP) || defined(__DOXYGEN__)
-#define NAND_USE_BAD_MAP TRUE
-#endif
-
/*===========================================================================*/
/* 1-wire driver related settings. */
/*===========================================================================*/
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
index 186450f..03d7f1d 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
@@ -41,7 +41,7 @@
******************************************************************************
*/
-static void mem_error_cb(memtest_t *memp, testtype_t e, size_t address);
+static void mem_error_cb(memtest_t *memp, testtype e, size_t address);
/*
******************************************************************************
@@ -110,7 +110,7 @@ static inline void green_led_on(void) {palSetPad(GPIOI, GPIOI_LED_G);}
static inline void green_led_off(void) {palClearPad(GPIOI, GPIOI_LED_G);}
static inline void green_led_toggle(void) {palTogglePad(GPIOI, GPIOI_LED_G);}
-void mem_error_cb(memtest_t *memp, testtype_t e, size_t address) {
+void mem_error_cb(memtest_t *memp, testtype e, size_t address) {
(void)memp;
(void)e;
(void)address;
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h
index d1afed1..ebcb63d 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h
@@ -24,6 +24,7 @@
* FSMC NAND driver system settings.
*/
#define STM32_NAND_USE_FSMC_NAND1 FALSE
+#define STM32_NAND_USE_FSMC_NAND2 FALSE
#define STM32_NAND_USE_EXT_INT FALSE
#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_NAND_DMA_PRIORITY 0
@@ -33,4 +34,17 @@
* FSMC SRAM driver system settings.
*/
#define STM32_USE_FSMC_SRAM TRUE
+#define STM32_SRAM_USE_FSMC_SRAM1 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM2 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM3 FLASE
#define STM32_SRAM_USE_FSMC_SRAM4 TRUE
+
+/*
+ * FSMC PC card driver system settings.
+ */
+#define STM32_USE_FSMC_PCARD FALSE
+
+/*
+ * FSMC SDRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SDRAM FALSE
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/membench.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/membench.h
index 5f23e1c..1169145 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/membench.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/membench.h
@@ -1,3 +1,19 @@
+/*
+ ChibiOS/RT - Copyright (C) 2013-2014 Uladzimir Pylinsky aka barthess
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
#ifndef MEMBENCH_H_
#define MEMBENCH_H_
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.c b/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.c
index 2705382..4961c7c 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.c
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.c
@@ -68,7 +68,7 @@ void memcpy_dma_start(void) {
bool b;
engine.dma = STM32_DMA_STREAM(STM32_MEMCPY_DMA_STREAM);
- b = dmaStreamAllocate(engine.dma, STM32_NAND_DMA_PRIORITY, NULL, NULL);
+ b = dmaStreamAllocate(engine.dma, STM32_MEMCPY_DMA_PRIORITY, NULL, NULL);
osalDbgAssert(!b, "stream already allocated");
}
@@ -103,11 +103,3 @@ void memcpy_dma(void *dest, const void *src, size_t size) {
memcpy(dest+size-remainder, src+size-remainder, remainder);
}
-
-
-
-
-
-
-
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.h
index ceefee1..8d6212c 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/memcpy_dma.h
@@ -1,3 +1,19 @@
+/*
+ ChibiOS/RT - Copyright (C) 2013-2014 Uladzimir Pylinsky aka barthess
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
#ifndef MEMCPY_DMA_H_
#define MEMCPY_DMA_H_
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.cpp b/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.cpp
deleted file mode 100644
index 1be98a2..0000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.cpp
+++ /dev/null
@@ -1,246 +0,0 @@
-#include <stdint.h>
-#include <stddef.h>
-#include <stdlib.h>
-
-#include "memtest.hpp"
-
-/*
- *
- */
-template <typename T>
-class Generator {
-public:
- Generator(void) : pattern(0) {;}
- virtual T get(void) = 0;
- virtual void init(T seed) {
- pattern = seed;
- }
-protected:
- T pattern;
-};
-
-/*
- *
- */
-template <typename T>
-class GeneratorWalkingOne : public Generator<T> {
- T get(void) {
- T ret = this->pattern;
-
- this->pattern <<= 1;
- if (0 == this->pattern)
- this->pattern = 1;
-
- return ret;
- }
-};
-
-/*
- *
- */
-template <typename T>
-class GeneratorWalkingZero : public Generator<T> {
- T get(void) {
- T ret = ~this->pattern;
-
- this->pattern <<= 1;
- if (0 == this->pattern)
- this->pattern = 1;
-
- return ret;
- }
-};
-
-/*
- *
- */
-template <typename T>
-class GeneratorOwnAddress : public Generator<T> {
- T get(void) {
- T ret = this->pattern;
- this->pattern++;
- return ret;
- }
-};
-
-/*
- *
- */
-template <typename T>
-class GeneratorMovingInv : public Generator<T> {
- T get(void) {
- T ret = this->pattern;
- this->pattern = ~this->pattern;
- return ret;
- }
-};
-
-/*
- *
- */
-template <typename T>
-class GeneratorMovingInvRand : public Generator<T> {
-public:
- GeneratorMovingInvRand(void) : step(0), prev(0){;}
- void init(T seed) {
- srand(seed);
- step = 0;
- prev = 0;
- }
-
- T get(void) {
- T ret;
- T mask = -1;
- if ((step & 1) == 0) {
- ret = rand() & mask;
- prev = ret;
- }
- else {
- ret = ~prev & mask;
- }
- step++;
-
- return ret;
- }
-
-private:
- size_t step;
- T prev;
-};
-
-/*
- *
- */
-template <typename T>
-static void memtest_sequential(memtest_t *memp, Generator<T> &generator, T seed) {
- const size_t steps = memp->size / sizeof(T);
- size_t i;
- T *mem = static_cast<T *>(memp->start);
-
- /* fill ram */
- generator.init(seed);
- for (i=0; i<steps; i++)
- mem[i] = generator.get();
-
- /* read back and compare */
- generator.init(seed);
- for (i=0; i<steps; i++) {
- if (mem[i] != generator.get()) {
- memp->ecb(memp, MEMTEST_WALKING_ONE, i*sizeof(T));
- return;
- }
- }
-}
-
-template <typename T>
-static void walking_one(memtest_t *memp) {
- GeneratorWalkingOne<T> generator;
- memtest_sequential<T>(memp, generator, 1);
-}
-
-template <typename T>
-static void walking_zero(memtest_t *memp) {
- GeneratorWalkingZero<T> generator;
- memtest_sequential<T>(memp, generator, 1);
-}
-
-template <typename T>
-static void own_address(memtest_t *memp) {
- GeneratorOwnAddress<T> generator;
- memtest_sequential<T>(memp, generator, 0);
-}
-
-template <typename T>
-static void moving_inversion_zero(memtest_t *memp) {
- GeneratorMovingInv<T> generator;
- T mask = -1;
- memtest_sequential<T>(memp, generator, 0);
- memtest_sequential<T>(memp, generator, 0xFFFFFFFF & mask);
-}
-
-template <typename T>
-static void moving_inversion_55aa(memtest_t *memp) {
- GeneratorMovingInv<T> generator;
- T mask = -1;
- memtest_sequential<T>(memp, generator, 0x55555555 & mask);
- memtest_sequential<T>(memp, generator, 0xAAAAAAAA & mask);
-}
-
-template <typename T>
-static void moving_inversion_rand(memtest_t *memp) {
- GeneratorMovingInvRand<T> generator;
- T mask = -1;
- memtest_sequential<T>(memp, generator, memp->rand_seed & mask);
-}
-
-/*
- *
- */
-static void memtest_wrapper(memtest_t *memp,
- void (*p_u8)(memtest_t *memp),
- void (*p_u16)(memtest_t *memp),
- void (*p_u32)(memtest_t *memp)) {
- switch(memp->width){
- case MEMTEST_WIDTH_32:
- p_u8(memp);
- p_u16(memp);
- p_u32(memp);
- break;
- case MEMTEST_WIDTH_16:
- p_u8(memp);
- p_u16(memp);
- break;
- case MEMTEST_WIDTH_8:
- p_u8(memp);
- break;
- }
-}
-
-/*
- *
- */
-void memtest_run(memtest_t *memp, uint32_t testmask) {
-
- if ((testmask & MEMTEST_WALKING_ONE) == MEMTEST_WALKING_ONE) {
- memtest_wrapper(memp,
- walking_one<uint8_t>,
- walking_one<uint16_t>,
- walking_one<uint32_t>);
- }
-
- if ((testmask & MEMTEST_WALKING_ZERO) == MEMTEST_WALKING_ZERO) {
- memtest_wrapper(memp,
- walking_zero<uint8_t>,
- walking_zero<uint16_t>,
- walking_zero<uint32_t>);
- }
-
- if ((testmask & MEMTEST_OWN_ADDRESS) == MEMTEST_OWN_ADDRESS) {
- memtest_wrapper(memp,
- own_address<uint8_t>,
- own_address<uint16_t>,
- own_address<uint32_t>);
- }
-
- if ((testmask & MEMTEST_MOVING_INVERSION_ZERO) == MEMTEST_MOVING_INVERSION_ZERO) {
- memtest_wrapper(memp,
- moving_inversion_zero<uint8_t>,
- moving_inversion_zero<uint16_t>,
- moving_inversion_zero<uint32_t>);
- }
-
- if ((testmask & MEMTEST_MOVING_INVERSION_55AA) == MEMTEST_MOVING_INVERSION_55AA) {
- memtest_wrapper(memp,
- moving_inversion_55aa<uint8_t>,
- moving_inversion_55aa<uint16_t>,
- moving_inversion_55aa<uint32_t>);
- }
-
- if ((testmask & MEMTEST_MOVING_INVERSION_RAND) == MEMTEST_MOVING_INVERSION_RAND) {
- memtest_wrapper(memp,
- moving_inversion_rand<uint8_t>,
- moving_inversion_rand<uint16_t>,
- moving_inversion_rand<uint32_t>);
- }
-}
-
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.hpp b/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.hpp
deleted file mode 100644
index 4a9e4e3..0000000
--- a/testhal/STM32/STM32F4xx/FSMC_SRAM/memtest.hpp
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef MEMTEST_HPP_
-#define MEMTEST_HPP_
-
-#define MEMTEST_WALKING_ONE (1 << 0)
-#define MEMTEST_WALKING_ZERO (1 << 1)
-#define MEMTEST_OWN_ADDRESS (1 << 2)
-#define MEMTEST_MOVING_INVERSION_ZERO (1 << 3)
-#define MEMTEST_MOVING_INVERSION_55AA (1 << 4)
-#define MEMTEST_MOVING_INVERSION_RAND (1 << 5)
-
-#define MEMTEST_RUN_ALL (MEMTEST_WALKING_ONE | \
- MEMTEST_WALKING_ZERO | \
- MEMTEST_OWN_ADDRESS | \
- MEMTEST_MOVING_INVERSION_ZERO | \
- MEMTEST_MOVING_INVERSION_55AA | \
- MEMTEST_MOVING_INVERSION_RAND)
-
-typedef struct memtest_t memtest_t;
-typedef uint32_t testtype_t;
-
-/*
- * Error call back.
- */
-typedef void (*memtestecb_t)(memtest_t *memp, testtype_t e, size_t address);
-
-/*
- *
- */
-typedef enum {
- MEMTEST_WIDTH_8,
- MEMTEST_WIDTH_16,
- MEMTEST_WIDTH_32
-} memtest_bus_width_t;
-
-/*
- *
- */
-struct memtest_t {
- void *start;
- size_t size;
- memtest_bus_width_t width;
- memtestecb_t ecb;
- unsigned int rand_seed;
-};
-
-/*
- *
- */
-#ifdef __cplusplus
-extern "C" {
-#endif
- void memtest_run(memtest_t *memp, uint32_t testmask);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MEMTEST_HPP_ */
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-20 01:21:09 +0000