3 files changed, 141 insertions, 0 deletions
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/NRF51822.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/NRF51822.ld
new file mode 100644
index 0000000..ba12060
--- /dev/null
+++ b/os/common/ports/ARMCMx/compilers/GCC/ld/NRF51822.ld
@@ -0,0 +1,48 @@
+/*
+    Copyright (C) 2015 Fabio Utzig
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * NRF51822 memory setup.
+ */
+MEMORY
+{
+  flash : org = 0x00000000, len = 256k
+  ram0  : org = 0x20000000, len = 32k
+  ram1  : org = 0x00000000, len = 0
+  ram2  : org = 0x00000000, len = 0
+  ram3  : org = 0x00000000, len = 0
+  ram4  : org = 0x00000000, len = 0
+  ram5  : org = 0x00000000, len = 0
+  ram6  : org = 0x00000000, len = 0
+  ram7  : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+
+INCLUDE rules.ld
diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_nrf51.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_nrf51.mk
new file mode 100644
index 0000000..7433ba2
--- /dev/null
+++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_nrf51.mk
@@ -0,0 +1,11 @@
+# List of the ChibiOS generic NRF51 startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \
+             $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c
+
+STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s
+
+STARTUPINC = $(CHIBIOS)/community/os/common/ports/ARMCMx/devices/NRF51822 \
+             $(CHIBIOS)/os/ext/CMSIS/include
+
+STARTUPLD  = $(CHIBIOS)/community/os/common/ports/ARMCMx/compilers/GCC/ld
+
diff --git a/os/common/ports/ARMCMx/devices/NRF51822/cmparams.h b/os/common/ports/ARMCMx/devices/NRF51822/cmparams.h
new file mode 100644
index 0000000..126acf6
--- /dev/null
+++ b/os/common/ports/ARMCMx/devices/NRF51822/cmparams.h
@@ -0,0 +1,82 @@
+/*
+    Copyright (C) 2015 Fabio Utzig
+
+    This file is part of ChibiOS.
+
+    ChibiOS is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    NRF51822/cmparams.h
+ * @brief   ARM Cortex-M0 parameters for the Nordic Semi NRF51822 family.
+ *
+ * @defgroup ARMCMx_NRF51x Nordic semiconductor NRF51x.
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M0 specific parameters for the
+ *          NRF51x platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief   Cortex core model.
+ */
+#define CORTEX_MODEL            0
+
+/**
+ * @brief   Memory Protection unit presence.
+ */
+#define CORTEX_HAS_MPU          1
+
+/**
+ * @brief   Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU          0
+
+/**
+ * @brief   Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS    2
+
+/**
+ * @brief   Number of interrupt vectors.
+ * @note    This number does not include the 16 system vectors and must be
+ *          rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS      32
+
+/* The following code is not processed when the file is included from an
+   asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+   from this header because we need this file to be usable also from
+   assembler source files. We verify that the info matches instead.*/
+#include "nrf51.h"
+
+#if CORTEX_MODEL != __CORTEX_M
+#error "CMSIS __CORTEX_M mismatch"
+#endif
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */