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author | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-30 12:52:31 +0100 |
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committer | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-30 12:52:31 +0100 |
commit | 915b474b02349add9c17fa43ff0351503c3c5020 (patch) | |
tree | 04e67f6a8838bcf4f96fc930f2c0fdf9cb18f73b /os/hal/ports/STM32 | |
parent | 13ebce61e2f0af08d6ffa0c13397da5ad31292c4 (diff) | |
download | ChibiOS-Contrib-915b474b02349add9c17fa43ff0351503c3c5020.tar.gz ChibiOS-Contrib-915b474b02349add9c17fa43ff0351503c3c5020.tar.bz2 ChibiOS-Contrib-915b474b02349add9c17fa43ff0351503c3c5020.zip |
Re-organised FSMC drivers
Diffstat (limited to 'os/hal/ports/STM32')
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/driver.mk | 18 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.c) | 22 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.h) | 27 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.c (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c) | 52 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.h (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h) | 41 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.c (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c) | 18 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.h (renamed from os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h) | 16 |
7 files changed, 99 insertions, 95 deletions
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/driver.mk b/os/hal/ports/STM32/LLD/FSMCv1/driver.mk index cffa3f7..8c354a5 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/driver.mk +++ b/os/hal/ports/STM32/LLD/FSMCv1/driver.mk @@ -1,17 +1,17 @@ ifeq ($(USE_SMART_BUILD),yes)
-ifneq ($(findstring HAL_USE_FSMC_SDRAM TRUE,$(HALCONF)),)
-PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c
+ifneq ($(findstring HAL_USE_SDRAM TRUE,$(HALCONF)),)
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.c
endif
-ifneq ($(findstring HAL_USE_FSMC_SRAM TRUE,$(HALCONF)),)
-PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c
+ifneq ($(findstring HAL_USE_SRAM TRUE,$(HALCONF)),)
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.c
endif
-ifneq ($(findstring HAL_USE_FSMC_NAND TRUE,$(HALCONF)),)
-PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.c
+ifneq ($(findstring HAL_USE_NAND TRUE,$(HALCONF)),)
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c
endif
else
-PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c \
- ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c \
- ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.c
+PLATFORMSRC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c
endif
PLATFORMINC_CONTRIB += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c index 895fd28..abd5aa3 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c @@ -24,7 +24,9 @@ #include "hal.h" -#if (HAL_USE_FSMC_NAND == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) + +#include "hal_nand_lld.h" /*===========================================================================*/ /* Driver local definitions. */ @@ -53,14 +55,14 @@ /** * @brief NAND1 driver identifier. */ -#if STM32_NAND_USE_FSMC_NAND1 || defined(__DOXYGEN__) +#if STM32_NAND_USE_NAND1 || defined(__DOXYGEN__) NANDDriver NANDD1; #endif /** * @brief NAND2 driver identifier. */ -#if STM32_NAND_USE_FSMC_NAND2 || defined(__DOXYGEN__) +#if STM32_NAND_USE_NAND2 || defined(__DOXYGEN__) NANDDriver NANDD2; #endif @@ -280,9 +282,9 @@ static void nand_lld_serve_transfer_end_irq(NANDDriver *nandp, uint32_t flags) { */ void nand_lld_init(void) { - fsmc_init(); + fsmcInit(); -#if STM32_NAND_USE_FSMC_NAND1 +#if STM32_NAND_USE_NAND1 /* Driver initialization.*/ nandObjectInit(&NANDD1); NANDD1.rxdata = NULL; @@ -294,9 +296,9 @@ void nand_lld_init(void) { NANDD1.map_cmd = (uint16_t *)FSMC_Bank2_MAP_COMMON_CMD; NANDD1.map_addr = (uint16_t *)FSMC_Bank2_MAP_COMMON_ADDR; NANDD1.bb_map = NULL; -#endif /* STM32_NAND_USE_FSMC_NAND1 */ +#endif /* STM32_NAND_USE_NAND1 */ -#if STM32_NAND_USE_FSMC_NAND2 +#if STM32_NAND_USE_NAND2 /* Driver initialization.*/ nandObjectInit(&NANDD2); NANDD2.rxdata = NULL; @@ -308,7 +310,7 @@ void nand_lld_init(void) { NANDD2.map_cmd = (uint16_t *)FSMC_Bank3_MAP_COMMON_CMD; NANDD2.map_addr = (uint16_t *)FSMC_Bank3_MAP_COMMON_ADDR; NANDD2.bb_map = NULL; -#endif /* STM32_NAND_USE_FSMC_NAND2 */ +#endif /* STM32_NAND_USE_NAND2 */ } /** @@ -325,7 +327,7 @@ void nand_lld_start(NANDDriver *nandp) { uint32_t pcr_bus_width; if (FSMCD1.state == FSMC_STOP) - fsmc_start(&FSMCD1); + fsmcStart(&FSMCD1); if (nandp->state == NAND_STOP) { b = dmaStreamAlloc(nandp->dma, @@ -345,7 +347,7 @@ void nand_lld_start(NANDDriver *nandp) { #endif nandp->dmamode = STM32_DMA_CR_CHSEL(NAND_DMA_CHANNEL) | - STM32_DMA_CR_PL(STM32_NAND_NAND1_DMA_PRIORITY) | + STM32_DMA_CR_PL(STM32_NAND_DMA_PRIORITY) | dmasize | STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h index f47ee75..c4f8595 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_nand_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.h @@ -22,12 +22,13 @@ * @{ */ -#ifndef HAL_FSMC_NAND_LLD_H_ -#define HAL_FSMC_NAND_LLD_H_ +#ifndef HAL_NAND_LLD_H_ +#define HAL_NAND_LLD_H_ #include "bitmap.h" +#include "hal_fsmc.h" -#if (HAL_USE_FSMC_NAND == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -54,16 +55,16 @@ * @brief NAND driver enable switch. * @details If set to @p TRUE the support for NAND1 is included. */ -#if !defined(STM32_FSMC_USE_NAND1) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_NAND1 FALSE +#if !defined(STM32_NAND_USE_NAND1) || defined(__DOXYGEN__) +#define STM32_NAND_USE_NAND1 FALSE #endif /** * @brief NAND driver enable switch. * @details If set to @p TRUE the support for NAND2 is included. */ -#if !defined(STM32_FSMC_USE_NAND2) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_NAND2 FALSE +#if !defined(STM32_NAND_USE_NAND2) || defined(__DOXYGEN__) +#define STM32_NAND_USE_NAND2 FALSE #endif /** @@ -111,11 +112,11 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_FSMC_USE_NAND1 && !STM32_FSMC_USE_NAND2 +#if !STM32_NAND_USE_NAND1 && !STM32_NAND_USE_NAND2 #error "NAND driver activated but no NAND peripheral assigned" #endif -#if (STM32_FSMC_USE_NAND1 || STM32_FSMC_USE_NAND2) && !STM32_HAS_FSMC +#if (STM32_NAND_USE_NAND1 || STM32_NAND_USE_NAND2) && !STM32_HAS_FSMC #error "FSMC not present in the selected device" #endif @@ -255,11 +256,11 @@ struct NANDDriver { /* External declarations. */ /*===========================================================================*/ -#if STM32_FSMC_USE_NAND1 && !defined(__DOXYGEN__) +#if STM32_NAND_USE_NAND1 && !defined(__DOXYGEN__) extern NANDDriver NANDD1; #endif -#if STM32_FSMC_USE_NAND2 && !defined(__DOXYGEN__) +#if STM32_NAND_USE_NAND2 && !defined(__DOXYGEN__) extern NANDDriver NANDD2; #endif @@ -282,8 +283,8 @@ extern "C" { } #endif -#endif /* HAL_USE_FSMC_NAND */ +#endif /* HAL_USE_NAND */ -#endif /* HAL_FSMC_NAND_LLD_H_ */ +#endif /* HAL_NAND_LLD_H_ */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.c index 1b0c0db..66f7b80 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.c @@ -34,9 +34,9 @@ defined(STM32F769xx) || defined(STM32F777xx) || \ defined(STM32F779xx)) -#if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SDRAM == TRUE) || defined(__DOXYGEN__) -#include "hal_fsmc_sdram_lld.h" +#include "hal_sdram_lld.h" /*===========================================================================*/ /* Driver local definitions. */ @@ -59,7 +59,7 @@ /** * @brief SDRAM driver identifier. */ -SDRAMDriver SDRAMD; +SDRAMDriver SDRAMD1; /*===========================================================================*/ /* Driver local types. */ @@ -78,9 +78,9 @@ SDRAMDriver SDRAMD; * * @notapi */ -static void lld_sdram_wait_ready(void) { +static void sdram_lld_wait_ready(void) { /* Wait until the SDRAM controller is ready */ - while (SDRAMD.sdram->SDSR & FMC_SDSR_BUSY); + while (SDRAMD1.sdram->SDSR & FMC_SDSR_BUSY); } /** @@ -90,48 +90,48 @@ static void lld_sdram_wait_ready(void) { * * @notapi */ -static void lld_sdram_init_sequence(const SDRAMConfig *cfgp) { +static void sdram_lld_init_sequence(const SDRAMConfig *cfgp) { uint32_t command_target = 0; -#if STM32_FSMC_USE_SDRAM1 +#if STM32_SDRAM_USE_SDRAM1 command_target |= FMC_SDCMR_CTB1; #endif -#if STM32_FSMC_USE_SDRAM2 +#if STM32_SDRAM_USE_SDRAM2 command_target |= FMC_SDCMR_CTB2; #endif /* Step 3: Configure a clock configuration enable command.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDCMR = FMCCM_CLK_ENABLED | command_target; + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDCMR = FMCCM_CLK_ENABLED | command_target; /* Step 4: Insert delay (tipically 100uS).*/ osalThreadSleepMilliseconds(1); /* Step 5: Configure a PALL (precharge all) command.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDCMR = FMCCM_PALL | command_target; + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDCMR = FMCCM_PALL | command_target; /* Step 6.1: Configure a Auto-Refresh command: send the first command.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDCMR = FMCCM_AUTO_REFRESH | command_target | + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDCMR = FMCCM_AUTO_REFRESH | command_target | (cfgp->sdcmr & FMC_SDCMR_NRFS); /* Step 6.2: Send the second command.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDCMR = FMCCM_AUTO_REFRESH | command_target | + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDCMR = FMCCM_AUTO_REFRESH | command_target | (cfgp->sdcmr & FMC_SDCMR_NRFS); /* Step 7: Program the external memory mode register.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDCMR = FMCCM_LOAD_MODE | command_target | + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDCMR = FMCCM_LOAD_MODE | command_target | (cfgp->sdcmr & FMC_SDCMR_MRD); /* Step 8: Set clock.*/ - lld_sdram_wait_ready(); - SDRAMD.sdram->SDRTR = cfgp->sdrtr & FMC_SDRTR_COUNT; + sdram_lld_wait_ready(); + SDRAMD1.sdram->SDRTR = cfgp->sdrtr & FMC_SDRTR_COUNT; - lld_sdram_wait_ready(); + sdram_lld_wait_ready(); } /*===========================================================================*/ @@ -142,23 +142,23 @@ static void lld_sdram_init_sequence(const SDRAMConfig *cfgp) { /* Driver exported functions. */ /*===========================================================================*/ -void lld_sdram_start(SDRAMDriver *sdramp, const SDRAMConfig *cfgp) +void sdram_lld_start(SDRAMDriver *sdramp, const SDRAMConfig *cfgp) { sdramp->sdram->SDCR1 = cfgp->sdcr; sdramp->sdram->SDTR1 = cfgp->sdtr; sdramp->sdram->SDCR2 = cfgp->sdcr; sdramp->sdram->SDTR2 = cfgp->sdtr; - lld_sdram_init_sequence(cfgp); + sdram_lld_init_sequence(cfgp); } -void lld_sdram_stop(SDRAMDriver *sdramp) { +void sdram_lld_stop(SDRAMDriver *sdramp) { uint32_t command_target = 0; -#if STM32_FSMC_USE_SDRAM1 +#if STM32_SDRAM_USE_SDRAM1 command_target |= FMC_SDCMR_CTB1; #endif -#if STM32_FSMC_USE_SDRAM2 +#if STM32_SDRAM_USE_SDRAM2 command_target |= FMC_SDCMR_CTB2; #endif diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.h index 1fc7993..6a19728 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_sdram_lld.h @@ -28,16 +28,9 @@ #ifndef HAL_FMC_SDRAM_H_ #define HAL_FMC_SDRAM_H_ -#if (defined(STM32F427xx) || defined(STM32F437xx) || \ - defined(STM32F429xx) || defined(STM32F439xx) || \ - defined(STM32F745xx) || defined(STM32F746xx) || \ - defined(STM32F756xx) || defined(STM32F767xx) || \ - defined(STM32F769xx) || defined(STM32F777xx) || \ - defined(STM32F779xx)) - #include "hal_fsmc.h" -#if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SDRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -55,8 +48,8 @@ * @brief SDRAM driver enable switch. * @details If set to @p TRUE the support for SDRAM1 is included. */ -#if !defined(STM32_FSMC_USE_SDRAM1) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SDRAM1 FALSE +#if !defined(STM32_SDRAM_USE_SDRAM1) || defined(__DOXYGEN__) +#define STM32_SDRAM_USE_SDRAM1 FALSE #else #define STM32_SDRAM1_MAP_BASE FSMC_Bank5_MAP_BASE #endif @@ -65,8 +58,8 @@ * @brief SDRAM driver enable switch. * @details If set to @p TRUE the support for SDRAM2 is included. */ -#if !defined(STM32_FSMC_USE_SDRAM2) || defined(__DOXYGEN__) -#define STM32_FSMC_USE_SDRAM2 FALSE +#if !defined(STM32_SDRAM_USE_SDRAM2) || defined(__DOXYGEN__) +#define STM32_SDRAM_USE_SDRAM2 FALSE #else #define STM32_SDRAM2_MAP_BASE FSMC_Bank6_MAP_BASE #endif @@ -77,14 +70,24 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_FSMC_USE_SDRAM1 && !STM32_FSMC_USE_SDRAM2 +#if !STM32_SDRAM_USE_SDRAM1 && !STM32_SDRAM_USE_SDRAM2 #error "SDRAM driver activated but no SDRAM peripheral assigned" #endif -#if (STM32_FSMC_USE_SDRAM1 || STM32_FSMC_USE_SDRAM2) && !STM32_HAS_FSMC +#if (STM32_SDRAM_USE_SDRAM1 || STM32_SDRAM_USE_SDRAM2) && !STM32_HAS_FSMC #error "FMC not present in the selected device" #endif +#if (defined(STM32F427xx) || defined(STM32F437xx) || \ + defined(STM32F429xx) || defined(STM32F439xx) || \ + defined(STM32F745xx) || defined(STM32F746xx) || \ + defined(STM32F756xx) || defined(STM32F767xx) || \ + defined(STM32F769xx) || defined(STM32F777xx) || \ + defined(STM32F779xx)) +#else +#error "Device is not compatible with SDRAM" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -97,20 +100,18 @@ /* External declarations. */ /*===========================================================================*/ -extern SDRAMDriver SDRAMD; +extern SDRAMDriver SDRAMD1; #ifdef __cplusplus extern "C" { #endif - void lld_sdram_start(SDRAMDriver *sdramp, const SDRAMConfig *cfgp); - void lld_sdram_stop(SDRAMDriver *sdramp); + void sdram_lld_start(SDRAMDriver *sdramp, const SDRAMConfig *cfgp); + void sdram_lld_stop(SDRAMDriver *sdramp); #ifdef __cplusplus } #endif -#endif /* STM32_FSMC_USE_SDRAM */ - -#endif /* STM32F427xx / STM32F429xx / STM32F437xx / STM32F439xx */ +#endif /* STM32_SDRAM_USE_SDRAM */ #endif /* HAL_FSMC_SDRAM_H_ */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.c index 49b7826..71ecacd 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.c @@ -23,9 +23,9 @@ */ #include "hal.h" -#if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SRAM == TRUE) || defined(__DOXYGEN__) -#include "hal_fsmc_sram_lld.h" +#include "hal_sram_lld.h" /*===========================================================================*/ /* Driver local definitions. */ @@ -37,28 +37,28 @@ /** * @brief SRAM1 driver identifier. */ -#if STM32_FSMC_USE_SRAM1 || defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM1 || defined(__DOXYGEN__) SRAMDriver SRAMD1; #endif /** * @brief SRAM2 driver identifier. */ -#if STM32_FSMC_USE_SRAM2 || defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM2 || defined(__DOXYGEN__) SRAMDriver SRAMD2; #endif /** * @brief SRAM3 driver identifier. */ -#if STM32_FSMC_USE_SRAM3 || defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM3 || defined(__DOXYGEN__) SRAMDriver SRAMD3; #endif /** * @brief SRAM4 driver identifier. */ -#if STM32_FSMC_USE_SRAM4 || defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM4 || defined(__DOXYGEN__) SRAMDriver SRAMD4; #endif @@ -90,7 +90,7 @@ SRAMDriver SRAMD4; * * @notapi */ -void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp) { +void sram_lld_start(SRAMDriver *sramp, const SRAMConfig *cfgp) { sramp->sram->BTR = cfgp->btr; sramp->sram->BWTR = cfgp->bwtr; @@ -104,7 +104,7 @@ void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp) { * * @notapi */ -void lld_sram_stop(SRAMDriver *sramp) { +void sram_lld_stop(SRAMDriver *sramp) { uint32_t mask = FSMC_BCR_MBKEN; #if (defined(STM32F427xx) || defined(STM32F437xx) || \ @@ -118,7 +118,7 @@ void lld_sram_stop(SRAMDriver *sramp) { sramp->sram->BCR &= ~mask; } -#endif /* STM32_FSMC_USE_SRAM */ +#endif /* STM32_SRAM_USE_SRAM */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.h index bfd878f..7af18c4 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_sram_lld.h @@ -27,7 +27,7 @@ #include "hal_fsmc.h" -#if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_SRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -59,32 +59,32 @@ /* External declarations. */ /*===========================================================================*/ -#if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM1 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD1; #endif -#if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM2 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD2; #endif -#if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM3 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD3; #endif -#if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__) +#if STM32_SRAM_USE_SRAM4 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD4; #endif #ifdef __cplusplus extern "C" { #endif - void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp); - void lld_sram_stop(SRAMDriver *sramp); + void sram_lld_start(SRAMDriver *sramp, const SRAMConfig *cfgp); + void sram_lld_stop(SRAMDriver *sramp); #ifdef __cplusplus } #endif -#endif /* STM32_FSMC_USE_SRAM */ +#endif /* STM32_SRAM_USE_SRAM */ #endif /* HAL_FSMC_SRAM_H_ */ |