From a84f9b262f0b9218356f261277f19208eea60904 Mon Sep 17 00:00:00 2001 From: cpldcpu Date: Fri, 9 Oct 2015 20:02:29 +0200 Subject: firmware: ATiny45 build --- firmware/configuration/t45_default/Makefile.inc | 60 +++++ .../configuration/t45_default/bootloaderconfig.h | 259 +++++++++++++++++++++ firmware/makerelease.bat | 3 + firmware/releases/t45_default.hex | 102 ++++++++ 4 files changed, 424 insertions(+) create mode 100644 firmware/configuration/t45_default/Makefile.inc create mode 100644 firmware/configuration/t45_default/bootloaderconfig.h create mode 100644 firmware/releases/t45_default.hex diff --git a/firmware/configuration/t45_default/Makefile.inc b/firmware/configuration/t45_default/Makefile.inc new file mode 100644 index 0000000..87c22a6 --- /dev/null +++ b/firmware/configuration/t45_default/Makefile.inc @@ -0,0 +1,60 @@ +# Name: Makefile +# Project: Micronucleus +# License: GNU GPL v2 (see License.txt) + +# Controller type: ATtiny 45 - 16.5 MHz +# Configuration: Default +# Last Change: Oct 9,2015 + + +F_CPU = 16500000 +DEVICE = attiny45 + +# hexadecimal address for bootloader section to begin. To calculate the best value: +# - make clean; make main.hex; ### output will list data: 2124 (or something like that) +# - for the size of your device (8kb = 1024 * 8 = 8192) subtract above value 2124... = 6068 +# - How many pages in is that? 6068 / 64 (tiny85 page size in bytes) = 94.8125 +# - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780 +BOOTLOADER_ADDRESS = 980 + +FUSEOPT = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m +FUSEOPT_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m + +#--------------------------------------------------------------------- +# ATtiny85 +#--------------------------------------------------------------------- +# Fuse extended byte: +# 0xFE = - - - - - 1 1 0 +# ^ +# | +# +---- SELFPRGEN (enable self programming flash) +# +# Fuse high byte: +# 0xdd = 1 1 0 1 1 1 0 1 +# ^ ^ ^ ^ ^ \-+-/ +# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) +# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) +# | | | +-------------- WDTON (watchdog timer always on -> disable) +# | | +---------------- SPIEN (enable serial programming -> enabled) +# | +------------------ DWEN (debug wire enable) +# +-------------------- RSTDISBL (disable external reset -> enabled) +# +# Fuse high byte ("no reset": external reset disabled, can't program through SPI anymore) +# 0x5d = 0 1 0 1 1 1 0 1 +# ^ ^ ^ ^ ^ \-+-/ +# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) +# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) +# | | | +-------------- WDTON (watchdog timer always on -> disable) +# | | +---------------- SPIEN (enable serial programming -> enabled) +# | +------------------ DWEN (debug wire enable) +# +-------------------- RSTDISBL (disable external reset -> disabled!) +# +# Fuse low byte: +# 0xe1 = 1 1 1 0 0 0 0 1 +# ^ ^ \+/ \--+--/ +# | | | +------- CKSEL 3..0 (clock selection -> HF PLL) +# | | +--------------- SUT 1..0 (BOD enabled, fast rising power) +# | +------------------ CKOUT (clock output on CKOUT pin -> disabled) +# +-------------------- CKDIV8 (divide clock by 8 -> don't divide) + +############################################################################### diff --git a/firmware/configuration/t45_default/bootloaderconfig.h b/firmware/configuration/t45_default/bootloaderconfig.h new file mode 100644 index 0000000..ecd6261 --- /dev/null +++ b/firmware/configuration/t45_default/bootloaderconfig.h @@ -0,0 +1,259 @@ +/* Name: bootloaderconfig.h + * Micronucleus configuration file. + * This file (together with some settings in Makefile.inc) configures the boot loader + * according to the hardware. + * + * Controller type: ATtiny 45 - 16.5 MHz + * Configuration: Default configuration + * USB D- : PB3 + * USB D+ : PB4 + * Entry : Always + * LED : None + * OSCCAL : Stays at 16 MHz + * Note: Uses 16.5 MHz V-USB implementation with PLL + * Last Change: Mar 16,2014 + * + * License: GNU GPL v2 (see License.txt + */ +#ifndef __bootloaderconfig_h_included__ +#define __bootloaderconfig_h_included__ + +/* ------------------------------------------------------------------------- */ +/* Hardware configuration. */ +/* Change this according to your CPU and USB configuration */ +/* ------------------------------------------------------------------------- */ + +#define USB_CFG_IOPORTNAME B + /* This is the port where the USB bus is connected. When you configure it to + * "B", the registers PORTB, PINB and DDRB will be used. + */ + +#define USB_CFG_DMINUS_BIT 3 +/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected. + * This may be any bit in the port. + */ +#define USB_CFG_DPLUS_BIT 4 +/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected. + * This may be any bit in the port, but must be configured as a pin change interrupt. + */ + +#define USB_CFG_CLOCK_KHZ (F_CPU/1000) +/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000, + * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code + * require no crystal, they tolerate +/- 1% deviation from the nominal + * frequency. All other rates require a precision of 2000 ppm and thus a + * crystal! + * Since F_CPU should be defined to your actual clock rate anyway, you should + * not need to modify this setting. + */ + +/* ------------- Set up interrupt configuration (CPU specific) -------------- */ +/* The register names change quite a bit in the ATtiny family. Pay attention */ +/* to the manual. Note that the interrupt flag system is still used even though */ +/* interrupts are disabled. So this has to be configured correctly. */ + + +// setup interrupt for Pin Change for D+ +#define USB_INTR_CFG PCMSK +#define USB_INTR_CFG_SET (1 << USB_CFG_DPLUS_BIT) +#define USB_INTR_CFG_CLR 0 +#define USB_INTR_ENABLE GIMSK +#define USB_INTR_ENABLE_BIT PCIE +#define USB_INTR_PENDING GIFR +#define USB_INTR_PENDING_BIT PCIF +#define USB_INTR_VECTOR PCINT0_vect + +/* ------------------------------------------------------------------------- */ +/* Configuration relevant to the CPU the bootloader is running on */ +/* ------------------------------------------------------------------------- */ + +// how many milliseconds should host wait till it sends another erase or write? +// needs to be above 4.5 (and a whole integer) as avr freezes for 4.5ms +#define MICRONUCLEUS_WRITE_SLEEP 5 + + +/* ---------------------- feature / code size options ---------------------- */ +/* Configure the behavior of the bootloader here */ +/* ------------------------------------------------------------------------- */ + +/* + * Define Bootloader entry condition + * + * If the entry condition is not met, the bootloader will not be activated and the user program + * is executed directly after a reset. If no user program has been loaded, the bootloader + * is always active. + * + * ENTRY_ALWAYS Always activate the bootloader after reset. Requires the least + * amount of code. + * + * ENTRY_WATCHDOG Activate the bootloader after a watchdog reset. This can be used + * to enter the bootloader from the user program. + * Adds 22 bytes. + * + * ENTRY_EXT_RESET Activate the bootloader after an external reset was issued by + * pulling the reset pin low. It may be necessary to add an external + * pull-up resistor to the reset pin if this entry method appears to + * behave unreliably. + * Adds 22 bytes. + * + * ENTRY_JUMPER Activate the bootloader when a specific pin is pulled low by an + * external jumper. + * Adds 34 bytes. + * + * JUMPER_PIN Pin the jumper is connected to. (e.g. PB0) + * JUMPER_PORT Port out register for the jumper (e.g. PORTB) + * JUMPER_DDR Port data direction register for the jumper (e.g. DDRB) + * JUMPER_INP Port inout register for the jumper (e.g. PINB) + * + */ + +#define ENTRYMODE ENTRY_ALWAYS + +#define JUMPER_PIN PB0 +#define JUMPER_PORT PORTB +#define JUMPER_DDR DDRB +#define JUMPER_INP PINB + +/* + Internal implementation, don't change this unless you want to add an entrymode. +*/ + +#define ENTRY_ALWAYS 1 +#define ENTRY_WATCHDOG 2 +#define ENTRY_EXT_RESET 3 +#define ENTRY_JUMPER 4 + +#if ENTRYMODE==ENTRY_ALWAYS + #define bootLoaderInit() + #define bootLoaderExit() + #define bootLoaderStartCondition() 1 +#elif ENTRYMODE==ENTRY_WATCHDOG + #define bootLoaderInit() + #define bootLoaderExit() + #define bootLoaderStartCondition() (MCUSR&_BV(WDRF)) +#elif ENTRYMODE==ENTRY_EXT_RESET + #define bootLoaderInit() + #define bootLoaderExit() + #define bootLoaderStartCondition() (MCUSR&_BV(EXTRF)) +#elif ENTRYMODE==ENTRY_JUMPER + // Enable pull up on jumper pin and delay to stabilize input + #define bootLoaderInit() {JUMPER_DDR&=~_BV(JUMPER_PIN);JUMPER_PORT|=_BV(JUMPER_PIN);_delay_ms(1);} + #define bootLoaderExit() {JUMPER_PORT&=~_BV(JUMPER_PIN);} + #define bootLoaderStartCondition() (!(JUMPER_INP&_BV(JUMPER_PIN))) +#else + #error "No entry mode defined" +#endif + +/* + * Define bootloader timeout value. + * + * The bootloader will only time out if a user program was loaded. + * + * AUTO_EXIT_NO_USB_MS The bootloader will exit after this delay if no USB is connected. + * Set to 0 to disable + * Adds ~6 bytes. + * (This will wait for an USB SE0 reset from the host) + * + * AUTO_EXIT_MS The bootloader will exit after this delay if no USB communication + * from the host tool was received. + * Set to 0 to disable + * + * All values are approx. in milliseconds + */ + +#define AUTO_EXIT_NO_USB_MS 0 +#define AUTO_EXIT_MS 6000 + + /* + * Defines the setting of the RC-oscillator calibration after quitting the bootloader. (OSCCAL) + * + * OSCCAL_RESTORE_DEFAULT Set this to '1' to revert to OSCCAL factore calibration after bootlaoder exit. + * This is 8 MHz +/-2% on most devices or 16 MHz on the ATtiny 85 with activated PLL. + * Adds ~14 bytes. + * + * OSCCAL_SAVE_CALIB Set this to '1' to save the OSCCAL calibration during program upload. + * This value will be reloaded after reset and will also be used for the user + * program unless "OSCCAL_RESTORE_DEFAULT" is active. This allows calibrate the internal + * RC oscillator to the F_CPU target frequency +/-1% from the USB timing. Please note + * that only true if the ambient temperature does not change. + * Adds ~38 bytes. + * + * OSCCAL_HAVE_XTAL Set this to '1' if you have an external crystal oscillator. In this case no attempt + * will be made to calibrate the oscillator. You should deactivate both options above + * if you use this to avoid redundant code. + * + * If both options are selected, OSCCAL_RESTORE_DEFAULT takes precedence. + * + * If no option is selected, OSCCAL will be left untouched and stays at either factory calibration or F_CPU depending + * on whether the bootloader was activated. This will take the least memory. You can use this if your program + * comes with its own OSCCAL calibration or an external clock source is used. + */ + +#define OSCCAL_RESTORE_DEFAULT 0 +#define OSCCAL_SAVE_CALIB 1 +#define OSCCAL_HAVE_XTAL 0 + +/* + * Defines handling of an indicator LED while the bootloader is active. + * + * LED_MODE Define behavior of attached LED or suppress LED code. + * + * NONE Do not generate LED code (gains 18 bytes). + * ACTIVE_HIGH LED is on when output pin is high. This will toggle bettwen 1 and 0. + * ACTIVE_LOW LED is on when output pin is low. This will toggle between Z and 0. + * + * LED_DDR,LED_PORT,LED_PIN Where is your LED connected? + * + */ + +#define LED_MODE NONE + +#define LED_DDR DDRB +#define LED_PORT PORTB +#define LED_PIN PB1 + +/* + * This is the implementation of the LED code. Change the configuration above unless you want to + * change the led behavior + * + * LED_INIT Called once after bootloader entry + * LED_EXIT Called once during bootloader exit + * LED_MACRO Called in the main loop with the idle counter as parameter. + * Use to define pattern. +*/ + +#define NONE 0 +#define ACTIVE_HIGH 1 +#define ACTIVE_LOW 2 + +#if LED_MODE==ACTIVE_HIGH + #define LED_INIT(x) LED_DDR = _BV(LED_PIN); + #define LED_EXIT(x) {LED_DDR &=~_BV(LED_PIN);LED_PORT &=~_BV(LED_PIN);} + #define LED_MACRO(x) if ( x & 0x4c ) {LED_PORT&=~_BV(LED_PIN);} else {LED_PORT|=_BV(LED_PIN);} +#elif LED_MODE==ACTIVE_LOW + #define LED_INIT(x) LED_PORT &=~_BV(LED_PIN); + #define LED_EXIT(x) LED_DDR &=~_BV(LED_PIN); + #define LED_MACRO(x) if ( x & 0x4c ) {LED_DDR&=~_BV(LED_PIN);} else {LED_DDR|=_BV(LED_PIN);} +#elif LED_MODE==NONE + #define LED_INIT(x) + #define LED_EXIT(x) + #define LED_MACRO(x) +#endif + +/* --------------------------------------------------------------------------- */ +/* Micronucleus internal configuration. Do not change anything below this line */ +/* --------------------------------------------------------------------------- */ + +// Microcontroller vectortable entries in the flash +#define RESET_VECTOR_OFFSET 0 + +// number of bytes before the boot loader vectors to store the tiny application vector table +#define TINYVECTOR_RESET_OFFSET 4 +#define TINYVECTOR_OSCCAL_OFFSET 6 + +/* ------------------------------------------------------------------------ */ +// postscript are the few bytes at the end of programmable memory which store tinyVectors +#define POSTSCRIPT_SIZE 6 +#define PROGMEM_SIZE (BOOTLOADER_ADDRESS - POSTSCRIPT_SIZE) /* max size of user program */ + +#endif /* __bootloader_h_included__ */ diff --git a/firmware/makerelease.bat b/firmware/makerelease.bat index 908d40c..0f57e48 100644 --- a/firmware/makerelease.bat +++ b/firmware/makerelease.bat @@ -5,6 +5,9 @@ make clean make CONFIG=t85_default cp main.hex releases/t85_default.hex make clean +make CONFIG=t45_default +cp main.hex releases/t45_default.hex +make clean make CONFIG=t85_aggressive cp main.hex releases/t85_aggressive.hex make clean diff --git a/firmware/releases/t45_default.hex b/firmware/releases/t45_default.hex new file mode 100644 index 0000000..d24cfb4 --- /dev/null +++ b/firmware/releases/t45_default.hex @@ -0,0 +1,102 @@ +:1009800017C0097A40059206090212000101008091 +:100990003209040000000000000012011001FF00F5 +:1009A0000008D016530702020000000104030904E6 +:1009B00011241FBECFE5D1E0CDBFDEBF20E0A0E611 +:1009C000B0E001C01D92AC38B207E1F7BFC1A82F5B +:1009D000B92F80E090E041E050EA609530E009C036 +:1009E0002D9182279795879510F084279527305E63 +:1009F000C8F36F5FA8F30895EADF8D939D93089580 +:100A0000CF93CFB7CF93C395B39BE9F7B39B0BC0FD +:100A1000B39B09C0B39B07C0B39B05C0B39B03C086 +:100A2000B39B01C0D9C00F92DF93C0916E00DD2748 +:100A3000CA58DF4F012EB39B03C0DF910F90E6CF62 +:100A40002F930F931F934F932FEF4F6F06B303FB1B +:100A500020F95F933F9350E03BE065C016B3012659 +:100A6000502953FDC89556B3012703FB25F92F7371 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