From 8776f9f2fa627d79ebf1a52f58bb2a413b0a5584 Mon Sep 17 00:00:00 2001 From: cpldcpu Date: Wed, 27 Apr 2016 09:01:32 +0200 Subject: firmware: Enable BOD in ATtiny841 fuse settings --- firmware/configuration/Nanite841/Makefile.inc | 43 ++---------------------- firmware/configuration/t841_default/Makefile.inc | 42 ++--------------------- 2 files changed, 5 insertions(+), 80 deletions(-) diff --git a/firmware/configuration/Nanite841/Makefile.inc b/firmware/configuration/Nanite841/Makefile.inc index e147248..bea42da 100644 --- a/firmware/configuration/Nanite841/Makefile.inc +++ b/firmware/configuration/Nanite841/Makefile.inc @@ -17,44 +17,5 @@ DEVICE = attiny841 # - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780 BOOTLOADER_ADDRESS = 1980 -FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m -FUSEOPT_DISABLERESET = # TODO - -#--------------------------------------------------------------------- -# ATtiny841 -#--------------------------------------------------------------------- -# Fuse extended byte: -# 0xFE = 1 1 1 1 1 1 1 0 -# ^ -# | -# +---- SELFPRGEN (enable self programming flash) -# -# Fuse high byte: -# 0xdd = 1 1 0 1 1 1 0 1 -# ^ ^ ^ ^ ^ \-+-/ -# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) -# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) -# | | | +-------------- WDTON (watchdog timer always on -> disable) -# | | +---------------- SPIEN (enable serial programming -> enabled) -# | +------------------ DWEN (debug wire enable) -# +-------------------- RSTDISBL (disable external reset -> enabled) -# -# Fuse high byte ("no reset": external reset disabled, can't program through SPI anymore) -# 0x5d = 0 1 0 1 1 1 0 1 -# ^ ^ ^ ^ ^ \-+-/ -# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) -# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) -# | | | +-------------- WDTON (watchdog timer always on -> disable) -# | | +---------------- SPIEN (enable serial programming -> enabled) -# | +------------------ DWEN (debug wire enable) -# +-------------------- RSTDISBL (disable external reset -> disabled!) -# -# Fuse low byte: -# 0xe2 = 1 1 1 0 0 0 1 0 -# ^ ^ \+/ \--+--/ -# | | | +------- CKSEL 3..0 (clock selection -> RC Oscillator) -# | | +--------------- SUT 1..0 (BOD enabled, fast rising power) -# | +------------------ CKOUT (clock output on CKOUT pin -> disabled) -# +-------------------- CKDIV8 (divide clock by 8 -> don't divide) - - +FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xf4:m +FUSEOPT_DISABLERESET = # Not supported diff --git a/firmware/configuration/t841_default/Makefile.inc b/firmware/configuration/t841_default/Makefile.inc index e147248..47fd747 100644 --- a/firmware/configuration/t841_default/Makefile.inc +++ b/firmware/configuration/t841_default/Makefile.inc @@ -4,7 +4,7 @@ # # Controller type: ATtiny 841 # Configuration: Default configuration - 12 Mhz RC oscillator -# Last Change: Mar 16,2014 +# Last Change: April 27,2016 F_CPU = 12000000 @@ -17,44 +17,8 @@ DEVICE = attiny841 # - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780 BOOTLOADER_ADDRESS = 1980 -FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m -FUSEOPT_DISABLERESET = # TODO +FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xf4:m +FUSEOPT_DISABLERESET = # Not implemented -#--------------------------------------------------------------------- -# ATtiny841 -#--------------------------------------------------------------------- -# Fuse extended byte: -# 0xFE = 1 1 1 1 1 1 1 0 -# ^ -# | -# +---- SELFPRGEN (enable self programming flash) -# -# Fuse high byte: -# 0xdd = 1 1 0 1 1 1 0 1 -# ^ ^ ^ ^ ^ \-+-/ -# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) -# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) -# | | | +-------------- WDTON (watchdog timer always on -> disable) -# | | +---------------- SPIEN (enable serial programming -> enabled) -# | +------------------ DWEN (debug wire enable) -# +-------------------- RSTDISBL (disable external reset -> enabled) -# -# Fuse high byte ("no reset": external reset disabled, can't program through SPI anymore) -# 0x5d = 0 1 0 1 1 1 0 1 -# ^ ^ ^ ^ ^ \-+-/ -# | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) -# | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) -# | | | +-------------- WDTON (watchdog timer always on -> disable) -# | | +---------------- SPIEN (enable serial programming -> enabled) -# | +------------------ DWEN (debug wire enable) -# +-------------------- RSTDISBL (disable external reset -> disabled!) -# -# Fuse low byte: -# 0xe2 = 1 1 1 0 0 0 1 0 -# ^ ^ \+/ \--+--/ -# | | | +------- CKSEL 3..0 (clock selection -> RC Oscillator) -# | | +--------------- SUT 1..0 (BOD enabled, fast rising power) -# | +------------------ CKOUT (clock output on CKOUT pin -> disabled) -# +-------------------- CKDIV8 (divide clock by 8 -> don't divide) -- cgit v1.2.3