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authorcpldcpu <cpldcpu@gmail.com>2014-03-16 08:13:29 +0100
committercpldcpu <cpldcpu@gmail.com>2014-03-16 08:13:29 +0100
commitca5b4534b621a0100cc5aa2ea9babb6f7bafd037 (patch)
tree0457a37c46dd0a6af4661048a98ec5a9d95828d9 /firmware
parentc6fd947a101dfc5f0cf021b4892d00abaa9fa252 (diff)
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firmware: Attiny841 first working config
Diffstat (limited to 'firmware')
-rw-r--r--firmware/configuration/t841_default/Makefile.inc26
-rw-r--r--firmware/configuration/t841_default/bootloaderconfig.h29
-rw-r--r--firmware/configuration/t85_aggressive/Makefile.inc6
-rw-r--r--firmware/configuration/t85_default/Makefile.inc6
-rw-r--r--firmware/main.c7
-rw-r--r--firmware/osccalASM.S30
6 files changed, 62 insertions, 42 deletions
diff --git a/firmware/configuration/t841_default/Makefile.inc b/firmware/configuration/t841_default/Makefile.inc
index 8b856a3..d6198e4 100644
--- a/firmware/configuration/t841_default/Makefile.inc
+++ b/firmware/configuration/t841_default/Makefile.inc
@@ -2,31 +2,29 @@
# Project: Micronucleus
# License: GNU GPL v2 (see License.txt)
#
-# Controller type: ATtiny 85
-# Configuration: Digispark default configuration.
+# Controller type: ATtiny 841
+# Configuration: Default configuration - 12 Mhz RC oscillator
# Last Change: Mar 16,2014
-F_CPU = 16500000
-DEVICE = attiny85
-FUSEOPT = $(FUSEOPT_t85)
-LOCKOPT = -U lock:w:0x2f:m
+F_CPU = 12000000
+DEVICE = attiny841
# hexadecimal address for bootloader section to begin. To calculate the best value:
# - make clean; make main.hex; ### output will list data: 2124 (or something like that)
# - for the size of your device (8kb = 1024 * 8 = 8192) subtract above value 2124... = 6068
# - How many pages in is that? 6068 / 64 (tiny85 page size in bytes) = 94.8125
# - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780
-BOOTLOADER_ADDRESS = 19C0
+BOOTLOADER_ADDRESS = 1800
-FUSEOPT_t85 = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
-FUSEOPT_t85_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
+FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
+FUSEOPT_DISABLERESET = # TODO
#---------------------------------------------------------------------
-# ATtiny85
+# ATtiny841
#---------------------------------------------------------------------
# Fuse extended byte:
-# 0xFE = - - - - - 1 1 0
+# 0xFE = 1 1 1 1 1 1 1 0
# ^
# |
# +---- SELFPRGEN (enable self programming flash)
@@ -52,11 +50,11 @@ FUSEOPT_t85_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
# +-------------------- RSTDISBL (disable external reset -> disabled!)
#
# Fuse low byte:
-# 0xe1 = 1 1 1 0 0 0 0 1
+# 0xe2 = 1 1 1 0 0 0 1 0
# ^ ^ \+/ \--+--/
-# | | | +------- CKSEL 3..0 (clock selection -> HF PLL)
+# | | | +------- CKSEL 3..0 (clock selection -> RC Oscillator)
# | | +--------------- SUT 1..0 (BOD enabled, fast rising power)
# | +------------------ CKOUT (clock output on CKOUT pin -> disabled)
# +-------------------- CKDIV8 (divide clock by 8 -> don't divide)
-###############################################################################
+
diff --git a/firmware/configuration/t841_default/bootloaderconfig.h b/firmware/configuration/t841_default/bootloaderconfig.h
index 4ea59dd..80f6522 100644
--- a/firmware/configuration/t841_default/bootloaderconfig.h
+++ b/firmware/configuration/t841_default/bootloaderconfig.h
@@ -23,11 +23,11 @@
* "B", the registers PORTB, PINB and DDRB will be used.
*/
-#define USB_CFG_DMINUS_BIT 3
+#define USB_CFG_DMINUS_BIT 0
/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
* This may be any bit in the port.
*/
-#define USB_CFG_DPLUS_BIT 4
+#define USB_CFG_DPLUS_BIT 1
/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
* This may be any bit in the port, but must be configured as a pin change interrupt.
*/
@@ -49,23 +49,30 @@
// setup interrupt for Pin Change for D+
-#define USB_INTR_CFG PCMSK
+#define USB_INTR_CFG PCMSK1
#define USB_INTR_CFG_SET (1 << USB_CFG_DPLUS_BIT)
#define USB_INTR_CFG_CLR 0
#define USB_INTR_ENABLE GIMSK
-#define USB_INTR_ENABLE_BIT PCIE
+#define USB_INTR_ENABLE_BIT PCIE1
#define USB_INTR_PENDING GIFR
-#define USB_INTR_PENDING_BIT PCIF
-#define USB_INTR_VECTOR PCINT0_vect
-
+#define USB_INTR_PENDING_BIT PCIF1
+#define USB_INTR_VECTOR PCINT1_vect
+
/* ------------------------------------------------------------------------- */
/* Configuration relevant to the CPU the bootloader is running on */
/* ------------------------------------------------------------------------- */
// how many milliseconds should host wait till it sends another erase or write?
// needs to be above 4.5 (and a whole integer) as avr freezes for 4.5ms
+
+// ATtiny841 erases four pages at once
#define MICRONUCLEUS_WRITE_SLEEP 5
+#define MICRONUCLEUS_ERASE_SLEEP 1
+// ATtiny841 does not know OSCCAL
+#ifndef OSCCAL
+#define OSCCAL OSCCAL0
+#endif
/* ---------------------- feature / code size options ---------------------- */
/* Configure the behavior of the bootloader here */
@@ -183,8 +190,8 @@
* comes with its own OSCCAL calibration or an external clock source is used.
*/
-#define OSCCAL_RESTORE 0
-#define OSCCAL_16_5MHz 1
+#define OSCCAL_RESTORE 1
+#define OSCCAL_16_5MHz 0
#define OSCCAL_HAVE_XTAL 0
/*
@@ -200,11 +207,11 @@
*
*/
-#define LED_MODE ACTIVE_HIGH
+#define LED_MODE ACTIVE_LOW
#define LED_DDR DDRB
#define LED_PORT PORTB
-#define LED_PIN PB1
+#define LED_PIN PB2
/*
* This is the implementation of the LED code. Change the configuration above unless you want to
diff --git a/firmware/configuration/t85_aggressive/Makefile.inc b/firmware/configuration/t85_aggressive/Makefile.inc
index 016f848..7ac110d 100644
--- a/firmware/configuration/t85_aggressive/Makefile.inc
+++ b/firmware/configuration/t85_aggressive/Makefile.inc
@@ -9,8 +9,6 @@
F_CPU = 16000000
DEVICE = attiny85
-FUSEOPT = $(FUSEOPT_t85)
-LOCKOPT = -U lock:w:0x2f:m
# hexadecimal address for bootloader section to begin. To calculate the best value:
# - make clean; make main.hex; ### output will list data: 2124 (or something like that)
@@ -19,8 +17,8 @@ LOCKOPT = -U lock:w:0x2f:m
# - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780
BOOTLOADER_ADDRESS = 1A40
-FUSEOPT_t85 = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
-FUSEOPT_t85_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
+FUSEOPT = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
+FUSEOPT_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
#---------------------------------------------------------------------
# ATtiny85
diff --git a/firmware/configuration/t85_default/Makefile.inc b/firmware/configuration/t85_default/Makefile.inc
index 8b856a3..d933082 100644
--- a/firmware/configuration/t85_default/Makefile.inc
+++ b/firmware/configuration/t85_default/Makefile.inc
@@ -9,8 +9,6 @@
F_CPU = 16500000
DEVICE = attiny85
-FUSEOPT = $(FUSEOPT_t85)
-LOCKOPT = -U lock:w:0x2f:m
# hexadecimal address for bootloader section to begin. To calculate the best value:
# - make clean; make main.hex; ### output will list data: 2124 (or something like that)
@@ -19,8 +17,8 @@ LOCKOPT = -U lock:w:0x2f:m
# - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780
BOOTLOADER_ADDRESS = 19C0
-FUSEOPT_t85 = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
-FUSEOPT_t85_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
+FUSEOPT = -U lfuse:w:0xe1:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
+FUSEOPT_DISABLERESET = -U lfuse:w:0xe1:m -U efuse:w:0xfe:m -U hfuse:w:0x5d:m
#---------------------------------------------------------------------
# ATtiny85
diff --git a/firmware/main.c b/firmware/main.c
index 486a26b..13484d3 100644
--- a/firmware/main.c
+++ b/firmware/main.c
@@ -169,9 +169,16 @@ static uint8_t usbFunctionSetup(uint8_t data[8]) {
static void initHardware (void)
{
// Disable watchdog and set timeout to maximum in case the WDT is fused on
+#ifdef WDTCSR
+ // New ATtinies841/441 use a different unlock sequence and renamed registers
+ MCUSR=0;
+ CCP = 0xD8;
+ WDTCSR = 1<<WDP2 | 1<<WDP1 | 1<<WDP0;
+#else
MCUSR=0;
WDTCR = 1<<WDCE | 1<<WDE;
WDTCR = 1<<WDP2 | 1<<WDP1 | 1<<WDP0;
+#endif
/* initialize */
#if OSCCAL_RESTORE
diff --git a/firmware/osccalASM.S b/firmware/osccalASM.S
index 6b24b50..e8e174e 100644
--- a/firmware/osccalASM.S
+++ b/firmware/osccalASM.S
@@ -106,7 +106,11 @@ calibrateOscillatorASM:
usbCOloop:
- out OSCCAL, try
+#if OSCCAL <64
+ out OSCCAL, try
+#else
+ sts OSCCAL, try
+#endif
nop
; Delay values = F_CPU * 999e-6 / 5 + 0.5
@@ -153,13 +157,17 @@ usbCOclocktoohigh:
; stp = 2^x (x=0..6) during binary search,
; stp = 1 during neighbourhood search
- brne usbCObinarysearch
- ldi stp, 64 ; stp=64 to initiate binary search.
+ brne usbCObinarysearch
+ ldi stp, 64 ; stp=64 to initiate binary search.
; If we are in neighbourhood search (c=1), it is changed to 1 below
- brcc usbCObinarysearch
- cp opD, cnt16L
- brcs usbCOnoimprovement
- in opV, OSCCAL
+ brcc usbCObinarysearch
+ cp opD, cnt16L
+ brcs usbCOnoimprovement
+#if OSCCAL <64
+ in opV, OSCCAL
+#else
+ lds opV, OSCCAL
+#endif
mov opD, cnt16L
usbCOnoimprovement:
ldi stp, 1 ; stp=1 to continue with neighbourhood search
@@ -167,8 +175,12 @@ usbCObinarysearch:
subi i, 1
brne usbCOloop
- out OSCCAL, opV
- nop
+#if OSCCAL <64
+ out OSCCAL, opV
+#else
+ sts OSCCAL, opV
+#endif
+ nop
ret
#endif //OSCCAL_HAVE_XTAL