// gpuv2.v

// This file was auto-generated as a prototype implementation of a module
// created in component editor.  It ties off all outputs to ground and
// ignores all inputs.  It needs to be edited to make it do something
// useful.
// 
// This file will not be automatically regenerated.  You should check it in
// to your version control system if you want to keep it.

`timescale 1 ps / 1 ps
module gpuv2 #(
		parameter AUTO_CLOCK_CLOCK_RATE = "-1"
	) (
		input  wire       clk,       //        clock.clk
		input  wire       rst_n,     //        reset.reset_n
		input  wire       vga_clk,   //      vga_out.export
		output reg [2:0] vga_red,    //             .export
		output reg [2:0] vga_green,  //             .export
		output reg [2:0] vga_blue,   //             .export
		output reg        vga_hs,    //             .export
		output reg        vga_vs,    //             .export
		input  wire [31:0] data,     // avalon_slave.writedata
		input  wire       wr_n,      //             .write_n
		input  wire       cs_n,      //             .chipselect_n
		input  wire [6:0] address    //             .address
	);


  reg [9:0] sprite_x;
  reg [9:0] sprite_y;
  reg [9:0] bat0_y;
  reg [9:0] bat1_y;

  reg [15:0] sprite[0:15];
  
  wire [4:0] reg_addr;
 
  assign reg_addr = address[6:2];
  
  wire [9:0] offset;
  
  assign offset = 10'h80;
  
  reg [2:0] sprite_red;
  reg [2:0] sprite_green;
  reg [2:0] sprite_blue;
  
  reg blanking;
  
  always @(posedge clk or negedge rst_n)
  begin
	if (rst_n == 0) begin
		   blanking <= 0;
			sprite_x <= 10'd127+offset;
			sprite_y <= 10'd127+offset;
			bat0_y <= 10'd100+offset;
			bat1_y <= 10'd200+offset;
			
			sprite[0]=16'b1111111111111111;
			sprite[1]=16'b1000000000000001;
			sprite[2]=16'b1000000000000001;
			sprite[3]=16'b1000000000000001;
			sprite[4]=16'b1000000000000001;
			sprite[5]=16'b1000000000000001;
			sprite[6]=16'b1000000000000001;
			sprite[7]=16'b1000000000000001;
			sprite[8]=16'b1000000000000001;
			sprite[9]=16'b1000000000000001;
			sprite[10]=16'b1000000000000001;
			sprite[11]=16'b1000000000000001;
			sprite[12]=16'b1000000000000001;
			sprite[13]=16'b1000000000000001;
			sprite[14]=16'b1000000000000001;
			sprite[15]=16'b1111111111111111;
			
			sprite_red[2:0]=3'b111;
			sprite_green[2:0]=3'b000;
			sprite_blue[2:0]=3'b111;
			
	end else if (~cs_n && ~wr_n) begin
		if (reg_addr[4]) begin
			sprite[reg_addr[3:0]]<=data[15:0];
		end else begin
			case (reg_addr[2:0]) 
				3'd0:
					blanking <= data[0];
				3'd1:
					sprite_x <= data[9:0];
				3'd2:
					sprite_y <= data[9:0];
				3'd3:
					bat0_y <= data[9:0];
				3'd4:
					bat1_y <= data[9:0];
				3'd5:
					begin
						sprite_red <= data[8:6];
						sprite_green <= data[5:3];
						sprite_blue <= data[2:0];
					end
			endcase
		end
	end
  end


  reg trig_25M;
  always @ (posedge vga_clk)
  begin
    if(!rst_n)
      trig_25M <= 1'b0;
    else
      trig_25M <= ~trig_25M;
  end 
  
  reg [9:0] vector_x;
  always @ (posedge vga_clk or negedge rst_n)
  begin
    if(!rst_n)
      vector_x <= offset;
    else if(trig_25M)
      begin
        if(vector_x != (10'd799 + offset))
			vector_x <= vector_x + 1'b1;
        else
          vector_x <= offset;
      end
  end 
  
  reg [9:0] vector_y;
  always @ (posedge vga_clk or negedge rst_n)
  begin
    if(!rst_n)
      vector_y <= offset;
    else if(trig_25M)
      begin
        if(vector_x == (10'd799 + offset))
          begin
            if(vector_y != (10'd524 + offset))
              vector_y <= vector_y + 1'b1;
            else
              vector_y <= offset;
          end
      end
  end
  
  always @ (posedge vga_clk or negedge rst_n)
  begin
    if(!rst_n)
      vga_hs <= 1'b0;
    else if(trig_25M)
      begin
        if(vector_x >= (10'd656 + offset) && vector_x < (10'd752+offset))
          vga_hs <= 1'b0;
        else
          vga_hs <= 1'b1;
      end
  end
  
  always @ (posedge vga_clk or negedge rst_n)
  begin
    if(!rst_n)
      vga_vs <= 1'b0;
    else if(trig_25M)
      begin
        if(vector_y >= (10'd490+offset) && vector_y < (10'd492+offset))
          vga_vs <= 1'b0;
        else
          vga_vs <= 1'b1;
      end
  end
  
  
  
  reg px_bat;
  reg px_net;
  reg px_sprite;
  reg px_blank;
  
  always @ (posedge vga_clk or negedge rst_n)
  begin
    if(!rst_n) begin
		px_bat <= 0;
		px_net <= 0;
		px_sprite <= 0;
		px_blank <= 1;
    end else if(trig_25M) begin
        if(vector_x>= offset && vector_x < (10'd640+offset) && vector_y >= offset && vector_y < (10'd480+offset)) 
				px_blank<= blanking;
			else
				px_blank<=1;
				
			if(vector_x >= (sprite_x - 8 )&& vector_x <=( sprite_x + 7 )
				&& vector_y >= (sprite_y - 8) && vector_y <= (sprite_y + 7))
				px_sprite <= sprite[(vector_y - (sprite_y - 8)) & 15 ][(vector_x - (sprite_x -8))& 15 ];
			else
				px_sprite <= 0;
				
		  if (vector_x  < (10'd4+offset)  && vector_y >=( bat0_y - 20 ) && vector_y <= (bat0_y + 20) )
					px_bat <= 1;
		   else if (vector_x >= (10'd636 + offset) && vector_y >=( bat1_y - 20 ) && vector_y <= (bat1_y + 20) )
				px_bat <=1 ;
			else	
				px_bat <=0;
			
					
			if (vector_x >= (10'd318 +offset) && vector_x < (10'd322+offset))
			  px_net <= {3{vector_y[3]}};
			else 
				px_net <= 0;
				
     end
  end
  
  always begin
	if (px_blank) begin
		vga_red = 3'b000;
		vga_green = 3'b000;
		vga_blue = 3'b000;
	end else if (px_bat) begin
   	vga_red= 3'b111;
		vga_green=3'b111;
		vga_blue=3'b111;
   end else if (px_sprite) begin
		vga_red = sprite_red;
		vga_green= sprite_green;
		vga_blue = sprite_blue;
	end else if (px_net) begin
		vga_red= 3'b111;
		vga_green=3'b111;
		vga_blue=3'b111;
	end else begin
		vga_red = 3'b000;
		vga_green = 3'b000;
		vga_blue = 3'b000;
	end
		
  
  end
  
endmodule