From 99614c1b15a1830308053c2fb8403a5c7cca2ed1 Mon Sep 17 00:00:00 2001 From: James Date: Sun, 13 Oct 2013 10:54:15 +0100 Subject: rename project --- .gitignore | 8 +-- Makefile | 10 ++-- pong.qpf | 30 ++++++++++++ pong.qsf | 154 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ pong.v | 112 ++++++++++++++++++++++++++++++++++++++++++ pong3.qpf | 30 ------------ pong3.qsf | 154 ---------------------------------------------------------- pong3.v | 112 ------------------------------------------ pong_mcu.qsys | 2 +- 9 files changed, 306 insertions(+), 306 deletions(-) create mode 100644 pong.qpf create mode 100644 pong.qsf create mode 100644 pong.v delete mode 100644 pong3.qpf delete mode 100644 pong3.qsf delete mode 100644 pong3.v diff --git a/.gitignore b/.gitignore index 625c8e6..dfe3217 100644 --- a/.gitignore +++ b/.gitignore @@ -10,12 +10,12 @@ incremental_db *.jdi *.map.summary *.sta.summary -my_sys.sopcinfo +*.sopcinfo script/ *~ -src/pong3.elf -src/pong3.objdump -src/pong3.map +src/*.elf +src/*.objdump +src/*.map bsp *.swp elf.flash diff --git a/Makefile b/Makefile index 2933d51..61d6b04 100644 --- a/Makefile +++ b/Makefile @@ -1,4 +1,4 @@ -PROJ=pong3 +PROJ=pong SRCS=$(wildcard *.vhd *.v *.qsf *.qpf ) SRCS += $(shell find DM9000A -type f -print ) @@ -18,17 +18,17 @@ SOF=${PROJ}.sof default: load_elf.stamp sta.stamp:asm.stamp - tools/wrap quartus_sta pong3 -c pong3 + tools/wrap quartus_sta ${PROJ} -c ${PROJ} touch $@ asm.stamp:fit.stamp - tools/wrap quartus_asm --read_settings_files=off --write_settings_files=off pong3 -c pong3 + tools/wrap quartus_asm --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ} touch $@ ${SOF}:asm.stamp fit.stamp: ans.stamp - tools/wrap quartus_fit --read_settings_files=off --write_settings_files=off pong3 -c pong3 + tools/wrap quartus_fit --read_settings_files=off --write_settings_files=off ${PROJ} -c ${PROJ} touch $@ ans.stamp: source.stamp @@ -81,7 +81,7 @@ flash: load_sof.stamp sof.flash elf.flash ${BSP_DIR}/system.h clean: /bin/rm -rf ${BSP_DIR} db incremental_db src/obj - /bin/rm -f ${SOPC_FILE} src/Makefile elf.flash sof.flash *.stamp ${SOF} ${ELF} *.rpt *.html *.summary *.pin *.jdi *.qws + /bin/rm -f ${SOPC_FILE} src/Makefile elf.flash sof.flash *.stamp ${SOF} ${ELF} *.rpt *.html *.summary *.pin *.jdi *.qws *.pof /bin/rm -f src/${PROJ}.objdump src/${PROJ}.map /bin/rm -f sopc_builder_log.txt diff --git a/pong.qpf b/pong.qpf new file mode 100644 index 0000000..9c8980b --- /dev/null +++ b/pong.qpf @@ -0,0 +1,30 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2012 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 32-bit +# Version 12.0 Build 178 05/31/2012 SJ Web Edition +# Date created = 21:48:38 September 12, 2013 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "12.0" +DATE = "21:48:38 September 12, 2013" + +# Revisions + +PROJECT_REVISION = "pong" diff --git a/pong.qsf b/pong.qsf new file mode 100644 index 0000000..b88b0ca --- /dev/null +++ b/pong.qsf @@ -0,0 +1,154 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2012 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 32-bit +# Version 12.0 Build 178 05/31/2012 SJ Web Edition +# Date created = 21:48:38 September 12, 2013 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# pong.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone II" +set_global_assignment -name DEVICE EP2C8Q208C8 +set_global_assignment -name TOP_LEVEL_ENTITY pong +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38 SEPTEMBER 12, 2013" +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208 +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_location_assignment PIN_41 -to seven_seg[7] +set_location_assignment PIN_40 -to seven_seg[6] +set_location_assignment PIN_37 -to seven_seg[5] +set_location_assignment PIN_43 -to seven_seg[4] +set_location_assignment PIN_44 -to seven_seg[3] +set_location_assignment PIN_39 -to seven_seg[2] +set_location_assignment PIN_35 -to seven_seg[1] +set_location_assignment PIN_34 -to seven_seg[0] +set_location_assignment PIN_23 -to clk +set_location_assignment PIN_27 -to rst_n +set_location_assignment PIN_92 -to sdram_addr[12] +set_location_assignment PIN_90 -to sdram_addr[11] +set_location_assignment PIN_75 -to sdram_addr[10] +set_location_assignment PIN_89 -to sdram_addr[9] +set_location_assignment PIN_88 -to sdram_addr[8] +set_location_assignment PIN_87 -to sdram_addr[7] +set_location_assignment PIN_86 -to sdram_addr[6] +set_location_assignment PIN_84 -to sdram_addr[5] +set_location_assignment PIN_82 -to sdram_addr[4] +set_location_assignment PIN_81 -to sdram_addr[3] +set_location_assignment PIN_80 -to sdram_addr[2] +set_location_assignment PIN_77 -to sdram_addr[1] +set_location_assignment PIN_76 -to sdram_addr[0] +set_location_assignment PIN_74 -to sdram_ba[1] +set_location_assignment PIN_72 -to sdram_ba[0] +set_location_assignment PIN_69 -to sdram_cas_n +set_location_assignment PIN_46 -to sdram_cke +set_location_assignment PIN_47 -to sdram_clk +set_location_assignment PIN_45 -to sdram_cs_n +set_location_assignment PIN_94 -to sdram_dq[15] +set_location_assignment PIN_95 -to sdram_dq[14] +set_location_assignment PIN_96 -to sdram_dq[13] +set_location_assignment PIN_97 -to sdram_dq[12] +set_location_assignment PIN_99 -to sdram_dq[11] +set_location_assignment PIN_101 -to sdram_dq[10] +set_location_assignment PIN_102 -to sdram_dq[9] +set_location_assignment PIN_103 -to sdram_dq[8] +set_location_assignment PIN_57 -to sdram_dq[7] +set_location_assignment PIN_58 -to sdram_dq[6] +set_location_assignment PIN_59 -to sdram_dq[5] +set_location_assignment PIN_60 -to sdram_dq[4] +set_location_assignment PIN_61 -to sdram_dq[3] +set_location_assignment PIN_63 -to sdram_dq[2] +set_location_assignment PIN_64 -to sdram_dq[1] +set_location_assignment PIN_67 -to sdram_dq[0] +set_location_assignment PIN_104 -to sdram_dqm[1] +set_location_assignment PIN_56 -to sdram_dqm[0] +set_location_assignment PIN_70 -to sdram_ras_n +set_location_assignment PIN_68 -to sdram_we_n +set_location_assignment PIN_41 -to seg[7] +set_location_assignment PIN_160 -to dm9000_cmd +set_location_assignment PIN_165 -to dm9000_cs_n +set_location_assignment PIN_144 -to dm9000_data[15] +set_location_assignment PIN_145 -to dm9000_data[14] +set_location_assignment PIN_146 -to dm9000_data[13] +set_location_assignment PIN_147 -to dm9000_data[12] +set_location_assignment PIN_149 -to dm9000_data[11] +set_location_assignment PIN_150 -to dm9000_data[10] +set_location_assignment PIN_151 -to dm9000_data[9] +set_location_assignment PIN_152 -to dm9000_data[8] +set_location_assignment PIN_135 -to dm9000_data[7] +set_location_assignment PIN_134 -to dm9000_data[6] +set_location_assignment PIN_138 -to dm9000_data[5] +set_location_assignment PIN_137 -to dm9000_data[4] +set_location_assignment PIN_141 -to dm9000_data[3] +set_location_assignment PIN_139 -to dm9000_data[2] +set_location_assignment PIN_143 -to dm9000_data[1] +set_location_assignment PIN_142 -to dm9000_data[0] +set_location_assignment PIN_162 -to dm9000_rd_n +set_location_assignment PIN_163 -to dm9000_wr_n +set_location_assignment PIN_164 -to dm9000_rst_n +set_location_assignment PIN_161 -to dm9000_int +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/ -tag from_archive +set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/submodules/ -tag from_archive +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" +set_location_assignment PIN_108 -to vga_red[0] +set_location_assignment PIN_113 -to vga_red[1] +set_location_assignment PIN_112 -to vga_red[2] +set_location_assignment PIN_128 -to vga_hs +set_location_assignment PIN_115 -to vga_green[0] +set_location_assignment PIN_114 -to vga_green[1] +set_location_assignment PIN_117 -to vga_green[2] +set_location_assignment PIN_116 -to vga_blue[0] +set_location_assignment PIN_127 -to vga_blue[1] +set_location_assignment PIN_118 -to vga_blue[2] +set_location_assignment PIN_133 -to vga_vs + +set_global_assignment -name USE_CONFIGURATION_DEVICE ON +set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" +set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO" + + +set_global_assignment -name VERILOG_FILE DM9000A/hdl/DM9000A_IF.v +set_global_assignment -name VERILOG_FILE GPU/hdl/GPU_IF.v +set_global_assignment -name PIN_FILE pong.pin +set_global_assignment -name VERILOG_FILE pong.v +set_global_assignment -name QSYS_FILE pong_mcu.qsys + + + +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top diff --git a/pong.v b/pong.v new file mode 100644 index 0000000..fa6ee91 --- /dev/null +++ b/pong.v @@ -0,0 +1,112 @@ +module pong( + clk, + rst_n, + + sdram_clk, //connected to the CLK port of SDRAM + sdram_cke, //connected to the CKE port of SDRAM + sdram_cs_n, //connected to the CS_n port of SDRAM + sdram_ras_n, //connected to the RAS_n port of SDRAM + sdram_cas_n, //connected to the CAS_n port of SDRAM + sdram_we_n, //connected to the WE_n port of SDRAM + sdram_ba, //connected to the BA port of SDRAM + sdram_addr, //connected to the ADDR port of SDRAM + sdram_dqm, //connected to the DQM port of SDRAM + sdram_dq, //connected to the DQ port of SDRAM + + dm9000_int , + dm9000_rst_n, + dm9000_cs_n , + dm9000_cmd , + dm9000_rd_n , + dm9000_wr_n , + dm9000_data , + + vga_hs, + vga_vs, + vga_red, + vga_green, + vga_blue, + + seven_seg +); + +input clk; +input rst_n; + +output sdram_clk ; +output sdram_cke ; +output sdram_cs_n ; +output sdram_ras_n; +output sdram_cas_n; +output sdram_we_n ; +output [ 1 : 0] sdram_ba ; +output [12 : 0] sdram_addr ; +output [ 1 : 0] sdram_dqm ; +inout [15 : 0] sdram_dq ; + +input dm9000_int ; +output dm9000_rst_n; +output dm9000_cs_n ; +output dm9000_cmd ; +output dm9000_rd_n ; +output dm9000_wr_n ; +inout [15:0] dm9000_data ; + +output [ 7:0] seven_seg; + + +output vga_hs; +output vga_vs; +output [2:0] vga_red; +output [2:0] vga_green; +output [2:0] vga_blue; + + +wire sclk; + + +pll u_pll( + .inclk0(clk ), + .c0 (sclk ), + .c1 (sdram_clk) +); + + + +pong_mcu u_pong_mcu( + .reset_reset_n (rst_n ), + .clk_clk (sclk ), + .sdram_0_wire_addr (sdram_addr ), + .sdram_0_wire_ba (sdram_ba ), + .sdram_0_wire_cas_n(sdram_cas_n), + .sdram_0_wire_cke (sdram_cke ), + .sdram_0_wire_cs_n (sdram_cs_n ), + .sdram_0_wire_dq (sdram_dq ), + .sdram_0_wire_dqm (sdram_dqm ), + .sdram_0_wire_ras_n(sdram_ras_n), + .sdram_0_wire_we_n (sdram_we_n ), + .pio_0_d_export (seven_seg ), + + + .gpu_0_vga_red(vga_red), + .gpu_0_vga_green(vga_green), + .gpu_0_vga_blue(vga_blue), + .gpu_0_vga_hs(vga_hs), + .gpu_0_vga_vs(vga_vs), + .gpu_0_vga_clk(clk), + + .dm9000a_0_conduit_end_iOSC_50 ( ), + .dm9000a_0_conduit_end_ENET_DATA (dm9000_data ), + .dm9000a_0_conduit_end_ENET_CMD (dm9000_cmd ), + .dm9000a_0_conduit_end_ENET_RD_N (dm9000_rd_n ), + .dm9000a_0_conduit_end_ENET_WR_N (dm9000_wr_n ), + .dm9000a_0_conduit_end_ENET_CS_N (dm9000_cs_n ), + .dm9000a_0_conduit_end_ENET_RST_N(dm9000_rst_n), + .dm9000a_0_conduit_end_ENET_INT (dm9000_int ), + .dm9000a_0_conduit_end_ENET_CLK ( ) +); + + + + +endmodule diff --git a/pong3.qpf b/pong3.qpf deleted file mode 100644 index f9a4fa2..0000000 --- a/pong3.qpf +++ /dev/null @@ -1,30 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 1991-2012 Altera Corporation -# Your use of Altera Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License -# Subscription Agreement, Altera MegaCore Function License -# Agreement, or other applicable license agreement, including, -# without limitation, that your use is for the sole purpose of -# programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the -# applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus II 32-bit -# Version 12.0 Build 178 05/31/2012 SJ Web Edition -# Date created = 21:48:38 September 12, 2013 -# -# -------------------------------------------------------------------------- # - -QUARTUS_VERSION = "12.0" -DATE = "21:48:38 September 12, 2013" - -# Revisions - -PROJECT_REVISION = "pong3" diff --git a/pong3.qsf b/pong3.qsf deleted file mode 100644 index e8af12b..0000000 --- a/pong3.qsf +++ /dev/null @@ -1,154 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 1991-2012 Altera Corporation -# Your use of Altera Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License -# Subscription Agreement, Altera MegaCore Function License -# Agreement, or other applicable license agreement, including, -# without limitation, that your use is for the sole purpose of -# programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the -# applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus II 32-bit -# Version 12.0 Build 178 05/31/2012 SJ Web Edition -# Date created = 21:48:38 September 12, 2013 -# -# -------------------------------------------------------------------------- # -# -# Notes: -# -# 1) The default values for assignments are stored in the file: -# pong3.qdf -# If this file doesn't exist, see file: -# assignment_defaults.qdf -# -# 2) Altera recommends that you do not modify this file. This -# file is updated automatically by the Quartus II software -# and any changes you make may be lost or overwritten. -# -# -------------------------------------------------------------------------- # - - -set_global_assignment -name FAMILY "Cyclone II" -set_global_assignment -name DEVICE EP2C8Q208C8 -set_global_assignment -name TOP_LEVEL_ENTITY pong3 -set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0 -set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38 SEPTEMBER 12, 2013" -set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" -set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 -set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 -set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" -set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208 -set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 -set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 -set_location_assignment PIN_41 -to seven_seg[7] -set_location_assignment PIN_40 -to seven_seg[6] -set_location_assignment PIN_37 -to seven_seg[5] -set_location_assignment PIN_43 -to seven_seg[4] -set_location_assignment PIN_44 -to seven_seg[3] -set_location_assignment PIN_39 -to seven_seg[2] -set_location_assignment PIN_35 -to seven_seg[1] -set_location_assignment PIN_34 -to seven_seg[0] -set_location_assignment PIN_23 -to clk -set_location_assignment PIN_27 -to rst_n -set_location_assignment PIN_92 -to sdram_addr[12] -set_location_assignment PIN_90 -to sdram_addr[11] -set_location_assignment PIN_75 -to sdram_addr[10] -set_location_assignment PIN_89 -to sdram_addr[9] -set_location_assignment PIN_88 -to sdram_addr[8] -set_location_assignment PIN_87 -to sdram_addr[7] -set_location_assignment PIN_86 -to sdram_addr[6] -set_location_assignment PIN_84 -to sdram_addr[5] -set_location_assignment PIN_82 -to sdram_addr[4] -set_location_assignment PIN_81 -to sdram_addr[3] -set_location_assignment PIN_80 -to sdram_addr[2] -set_location_assignment PIN_77 -to sdram_addr[1] -set_location_assignment PIN_76 -to sdram_addr[0] -set_location_assignment PIN_74 -to sdram_ba[1] -set_location_assignment PIN_72 -to sdram_ba[0] -set_location_assignment PIN_69 -to sdram_cas_n -set_location_assignment PIN_46 -to sdram_cke -set_location_assignment PIN_47 -to sdram_clk -set_location_assignment PIN_45 -to sdram_cs_n -set_location_assignment PIN_94 -to sdram_dq[15] -set_location_assignment PIN_95 -to sdram_dq[14] -set_location_assignment PIN_96 -to sdram_dq[13] -set_location_assignment PIN_97 -to sdram_dq[12] -set_location_assignment PIN_99 -to sdram_dq[11] -set_location_assignment PIN_101 -to sdram_dq[10] -set_location_assignment PIN_102 -to sdram_dq[9] -set_location_assignment PIN_103 -to sdram_dq[8] -set_location_assignment PIN_57 -to sdram_dq[7] -set_location_assignment PIN_58 -to sdram_dq[6] -set_location_assignment PIN_59 -to sdram_dq[5] -set_location_assignment PIN_60 -to sdram_dq[4] -set_location_assignment PIN_61 -to sdram_dq[3] -set_location_assignment PIN_63 -to sdram_dq[2] -set_location_assignment PIN_64 -to sdram_dq[1] -set_location_assignment PIN_67 -to sdram_dq[0] -set_location_assignment PIN_104 -to sdram_dqm[1] -set_location_assignment PIN_56 -to sdram_dqm[0] -set_location_assignment PIN_70 -to sdram_ras_n -set_location_assignment PIN_68 -to sdram_we_n -set_location_assignment PIN_41 -to seg[7] -set_location_assignment PIN_160 -to dm9000_cmd -set_location_assignment PIN_165 -to dm9000_cs_n -set_location_assignment PIN_144 -to dm9000_data[15] -set_location_assignment PIN_145 -to dm9000_data[14] -set_location_assignment PIN_146 -to dm9000_data[13] -set_location_assignment PIN_147 -to dm9000_data[12] -set_location_assignment PIN_149 -to dm9000_data[11] -set_location_assignment PIN_150 -to dm9000_data[10] -set_location_assignment PIN_151 -to dm9000_data[9] -set_location_assignment PIN_152 -to dm9000_data[8] -set_location_assignment PIN_135 -to dm9000_data[7] -set_location_assignment PIN_134 -to dm9000_data[6] -set_location_assignment PIN_138 -to dm9000_data[5] -set_location_assignment PIN_137 -to dm9000_data[4] -set_location_assignment PIN_141 -to dm9000_data[3] -set_location_assignment PIN_139 -to dm9000_data[2] -set_location_assignment PIN_143 -to dm9000_data[1] -set_location_assignment PIN_142 -to dm9000_data[0] -set_location_assignment PIN_162 -to dm9000_rd_n -set_location_assignment PIN_163 -to dm9000_wr_n -set_location_assignment PIN_164 -to dm9000_rst_n -set_location_assignment PIN_161 -to dm9000_int -set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top -set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top -set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top -set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/ -tag from_archive -set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/submodules/ -tag from_archive -set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" -set_location_assignment PIN_108 -to vga_red[0] -set_location_assignment PIN_113 -to vga_red[1] -set_location_assignment PIN_112 -to vga_red[2] -set_location_assignment PIN_128 -to vga_hs -set_location_assignment PIN_115 -to vga_green[0] -set_location_assignment PIN_114 -to vga_green[1] -set_location_assignment PIN_117 -to vga_green[2] -set_location_assignment PIN_116 -to vga_blue[0] -set_location_assignment PIN_127 -to vga_blue[1] -set_location_assignment PIN_118 -to vga_blue[2] -set_location_assignment PIN_133 -to vga_vs - -set_global_assignment -name USE_CONFIGURATION_DEVICE ON -set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" -set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO" - - -set_global_assignment -name VERILOG_FILE DM9000A/hdl/DM9000A_IF.v -set_global_assignment -name VERILOG_FILE GPU/hdl/GPU_IF.v -set_global_assignment -name PIN_FILE pong3.pin -set_global_assignment -name VERILOG_FILE pong3.v -set_global_assignment -name QSYS_FILE pong_mcu.qsys - - - -set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top diff --git a/pong3.v b/pong3.v deleted file mode 100644 index 1015b64..0000000 --- a/pong3.v +++ /dev/null @@ -1,112 +0,0 @@ -module pong3( - clk, - rst_n, - - sdram_clk, //connected to the CLK port of SDRAM - sdram_cke, //connected to the CKE port of SDRAM - sdram_cs_n, //connected to the CS_n port of SDRAM - sdram_ras_n, //connected to the RAS_n port of SDRAM - sdram_cas_n, //connected to the CAS_n port of SDRAM - sdram_we_n, //connected to the WE_n port of SDRAM - sdram_ba, //connected to the BA port of SDRAM - sdram_addr, //connected to the ADDR port of SDRAM - sdram_dqm, //connected to the DQM port of SDRAM - sdram_dq, //connected to the DQ port of SDRAM - - dm9000_int , - dm9000_rst_n, - dm9000_cs_n , - dm9000_cmd , - dm9000_rd_n , - dm9000_wr_n , - dm9000_data , - - vga_hs, - vga_vs, - vga_red, - vga_green, - vga_blue, - - seven_seg -); - -input clk; -input rst_n; - -output sdram_clk ; -output sdram_cke ; -output sdram_cs_n ; -output sdram_ras_n; -output sdram_cas_n; -output sdram_we_n ; -output [ 1 : 0] sdram_ba ; -output [12 : 0] sdram_addr ; -output [ 1 : 0] sdram_dqm ; -inout [15 : 0] sdram_dq ; - -input dm9000_int ; -output dm9000_rst_n; -output dm9000_cs_n ; -output dm9000_cmd ; -output dm9000_rd_n ; -output dm9000_wr_n ; -inout [15:0] dm9000_data ; - -output [ 7:0] seven_seg; - - -output vga_hs; -output vga_vs; -output [2:0] vga_red; -output [2:0] vga_green; -output [2:0] vga_blue; - - -wire sclk; - - -pll u_pll( - .inclk0(clk ), - .c0 (sclk ), - .c1 (sdram_clk) -); - - - -pong_mcu u_pong_mcu( - .reset_reset_n (rst_n ), - .clk_clk (sclk ), - .sdram_0_wire_addr (sdram_addr ), - .sdram_0_wire_ba (sdram_ba ), - .sdram_0_wire_cas_n(sdram_cas_n), - .sdram_0_wire_cke (sdram_cke ), - .sdram_0_wire_cs_n (sdram_cs_n ), - .sdram_0_wire_dq (sdram_dq ), - .sdram_0_wire_dqm (sdram_dqm ), - .sdram_0_wire_ras_n(sdram_ras_n), - .sdram_0_wire_we_n (sdram_we_n ), - .pio_0_d_export (seven_seg ), - - - .gpu_0_vga_red(vga_red), - .gpu_0_vga_green(vga_green), - .gpu_0_vga_blue(vga_blue), - .gpu_0_vga_hs(vga_hs), - .gpu_0_vga_vs(vga_vs), - .gpu_0_vga_clk(clk), - - .dm9000a_0_conduit_end_iOSC_50 ( ), - .dm9000a_0_conduit_end_ENET_DATA (dm9000_data ), - .dm9000a_0_conduit_end_ENET_CMD (dm9000_cmd ), - .dm9000a_0_conduit_end_ENET_RD_N (dm9000_rd_n ), - .dm9000a_0_conduit_end_ENET_WR_N (dm9000_wr_n ), - .dm9000a_0_conduit_end_ENET_CS_N (dm9000_cs_n ), - .dm9000a_0_conduit_end_ENET_RST_N(dm9000_rst_n), - .dm9000a_0_conduit_end_ENET_INT (dm9000_int ), - .dm9000a_0_conduit_end_ENET_CLK ( ) -); - - - - -endmodule diff --git a/pong_mcu.qsys b/pong_mcu.qsys index 1366ce2..5b860cb 100644 --- a/pong_mcu.qsys +++ b/pong_mcu.qsys @@ -170,7 +170,7 @@ - + -- cgit v1.2.3