From 4b7ba2f7366194608aac59b47d0f3c7cd9f21fb1 Mon Sep 17 00:00:00 2001 From: James Date: Thu, 10 Oct 2013 11:40:39 +0100 Subject: remove-path --- .gitignore | 2 + DM9000A/dm9000a_hw.tcl | 141 ++++ DM9000A/hdl/DM9000A_IF.v | 85 +++ GPU/gpu_hw.tcl | 138 ++++ GPU/hdl/GPU_IF.v | 219 ++++++ hardware/.gitignore | 2 - hardware/DM9000A/dm9000a_hw.tcl | 141 ---- hardware/DM9000A/hdl/DM9000A_IF.v | 85 --- hardware/GPU/gpu_hw.tcl | 138 ---- hardware/GPU/hdl/GPU_IF.v | 219 ------ hardware/my_sys.qsys | 745 ------------------ hardware/pll.v | 326 -------- hardware/pong3.pin | 274 ------- hardware/pong3.qpf | 30 - hardware/pong3.qsf | 151 ---- hardware/pong3.v | 112 --- hardware/software/pong3/.cproject | 375 --------- hardware/software/pong3/.project | 96 --- hardware/software/pong3/DM9000A.C | 239 ------ hardware/software/pong3/DM9000A.H | 72 -- hardware/software/pong3/Makefile | 1088 --------------------------- hardware/software/pong3/create-this-app | 114 --- hardware/software/pong3/hello_led.c | 148 ---- hardware/software/pong3/pong3.c | 151 ---- hardware/software/pong3/readme.txt | 11 - hardware/software/pong3_bsp/.cproject | 348 --------- hardware/software/pong3_bsp/.project | 85 --- hardware/software/pong3_bsp/Makefile | 786 ------------------- hardware/software/pong3_bsp/create-this-bsp | 49 -- hardware/software/pong3_bsp/settings.bsp | 937 ----------------------- my_sys.qsys | 745 ++++++++++++++++++ pll.v | 326 ++++++++ pong3.pin | 274 +++++++ pong3.qpf | 30 + pong3.qsf | 151 ++++ pong3.v | 112 +++ software/pong3/.cproject | 51 +- software/pong3/Makefile | 8 +- software/pong3/Nios II/makefile | 58 -- software/pong3/Nios II/objects.mk | 8 - software/pong3/Nios II/sources.mk | 27 - software/pong3/Nios II/subdir.mk | 41 - software/pong3/create-this-app | 16 +- software/pong3/readme.txt | 37 +- software/pong3_bsp/.cproject | 48 +- software/pong3_bsp/Makefile | 2 +- software/pong3_bsp/create-this-bsp | 4 +- software/pong3_bsp/settings.bsp | 12 +- 48 files changed, 2304 insertions(+), 6953 deletions(-) create mode 100644 .gitignore create mode 100644 DM9000A/dm9000a_hw.tcl create mode 100644 DM9000A/hdl/DM9000A_IF.v create mode 100644 GPU/gpu_hw.tcl create mode 100644 GPU/hdl/GPU_IF.v delete mode 100644 hardware/.gitignore delete mode 100644 hardware/DM9000A/dm9000a_hw.tcl delete mode 100644 hardware/DM9000A/hdl/DM9000A_IF.v delete mode 100644 hardware/GPU/gpu_hw.tcl delete mode 100644 hardware/GPU/hdl/GPU_IF.v delete mode 100644 hardware/my_sys.qsys delete mode 100644 hardware/pll.v delete mode 100644 hardware/pong3.pin delete mode 100644 hardware/pong3.qpf delete mode 100644 hardware/pong3.qsf delete mode 100644 hardware/pong3.v delete mode 100644 hardware/software/pong3/.cproject delete mode 100644 hardware/software/pong3/.project delete mode 100644 hardware/software/pong3/DM9000A.C delete mode 100644 hardware/software/pong3/DM9000A.H delete mode 100644 hardware/software/pong3/Makefile delete mode 100755 hardware/software/pong3/create-this-app delete mode 100644 hardware/software/pong3/hello_led.c delete mode 100644 hardware/software/pong3/pong3.c delete mode 100644 hardware/software/pong3/readme.txt delete mode 100644 hardware/software/pong3_bsp/.cproject delete mode 100644 hardware/software/pong3_bsp/.project delete mode 100644 hardware/software/pong3_bsp/Makefile delete mode 100755 hardware/software/pong3_bsp/create-this-bsp delete mode 100644 hardware/software/pong3_bsp/settings.bsp create mode 100644 my_sys.qsys create mode 100644 pll.v create mode 100644 pong3.pin create mode 100644 pong3.qpf create mode 100644 pong3.qsf create mode 100644 pong3.v delete mode 100644 software/pong3/Nios II/makefile delete mode 100644 software/pong3/Nios II/objects.mk delete mode 100644 software/pong3/Nios II/sources.mk delete mode 100644 software/pong3/Nios II/subdir.mk diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..7f7563f --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +db +pong3.qws diff --git a/DM9000A/dm9000a_hw.tcl b/DM9000A/dm9000a_hw.tcl new file mode 100644 index 0000000..ea89ec5 --- /dev/null +++ b/DM9000A/dm9000a_hw.tcl @@ -0,0 +1,141 @@ +# TCL File Generated by Component Editor 12.0 +# Thu Sep 12 21:20:16 CST 2013 +# DO NOT MODIFY + + +# +# dm9000a "dm9000a" v1.0 +# null 2013.09.12.21:20:16 +# +# + +# +# request TCL package from ACDS 12.0 +# +package require -exact qsys 12.0 + + +# +# module dm9000a +# +set_module_property NAME dm9000a +set_module_property VERSION 1.0 +set_module_property INTERNAL false +set_module_property OPAQUE_ADDRESS_MAP true +set_module_property GROUP my_lib +set_module_property DISPLAY_NAME dm9000a +set_module_property INSTANTIATE_IN_SYSTEM_MODULE true +set_module_property EDITABLE true +set_module_property ANALYZE_HDL AUTO +set_module_property REPORT_TO_TALKBACK false +set_module_property ALLOW_GREYBOX_GENERATION false + + +# +# file sets +# +add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" +set_fileset_property QUARTUS_SYNTH TOP_LEVEL DM9000A_IF +set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false +add_fileset_file DM9000A_IF.v VERILOG PATH hdl/DM9000A_IF.v + +add_fileset SIM_VHDL SIM_VHDL "" "" +set_fileset_property SIM_VHDL TOP_LEVEL DM9000A_IF +set_fileset_property SIM_VHDL ENABLE_RELATIVE_INCLUDE_PATHS false +add_fileset_file dm9000a_hw.tcl OTHER PATH dm9000a_hw.tcl + + +# +# parameters +# + + +# +# display items +# + + +# +# connection point avalon_slave_0 +# +add_interface avalon_slave_0 avalon end +set_interface_property avalon_slave_0 addressAlignment DYNAMIC +set_interface_property avalon_slave_0 addressUnits WORDS +set_interface_property avalon_slave_0 associatedClock clock_sink +set_interface_property avalon_slave_0 associatedReset clock_sink_reset +set_interface_property avalon_slave_0 burstOnBurstBoundariesOnly false +set_interface_property avalon_slave_0 explicitAddressSpan 0 +set_interface_property avalon_slave_0 holdTime 1 +set_interface_property avalon_slave_0 isMemoryDevice false +set_interface_property avalon_slave_0 isNonVolatileStorage false +set_interface_property avalon_slave_0 linewrapBursts false +set_interface_property avalon_slave_0 maximumPendingReadTransactions 0 +set_interface_property avalon_slave_0 printableDevice false +set_interface_property avalon_slave_0 readLatency 0 +set_interface_property avalon_slave_0 readWaitStates 4 +set_interface_property avalon_slave_0 readWaitTime 4 +set_interface_property avalon_slave_0 setupTime 1 +set_interface_property avalon_slave_0 timingUnits Cycles +set_interface_property avalon_slave_0 writeWaitStates 4 +set_interface_property avalon_slave_0 writeWaitTime 4 +set_interface_property avalon_slave_0 ENABLED true + +add_interface_port avalon_slave_0 iDATA writedata Input 32 +add_interface_port avalon_slave_0 iCMD address Input 1 +add_interface_port avalon_slave_0 iRD_N read_n Input 1 +add_interface_port avalon_slave_0 iWR_N write_n Input 1 +add_interface_port avalon_slave_0 iCS_N chipselect_n Input 1 +add_interface_port avalon_slave_0 oDATA readdata Output 32 + + +# +# connection point clock_sink +# +add_interface clock_sink clock end +set_interface_property clock_sink clockRate 0 +set_interface_property clock_sink ENABLED true + +add_interface_port clock_sink iCLK clk Input 1 + + +# +# connection point clock_sink_reset +# +add_interface clock_sink_reset reset end +set_interface_property clock_sink_reset associatedClock clock_sink +set_interface_property clock_sink_reset synchronousEdges DEASSERT +set_interface_property clock_sink_reset ENABLED true + +add_interface_port clock_sink_reset iRST_N reset_n Input 1 + + +# +# connection point conduit_end +# +add_interface conduit_end conduit end +set_interface_property conduit_end associatedClock "" +set_interface_property conduit_end associatedReset "" +set_interface_property conduit_end ENABLED true + +add_interface_port conduit_end iOSC_50 export Input 1 +add_interface_port conduit_end ENET_DATA export Bidir 16 +add_interface_port conduit_end ENET_CMD export Output 1 +add_interface_port conduit_end ENET_RD_N export Output 1 +add_interface_port conduit_end ENET_WR_N export Output 1 +add_interface_port conduit_end ENET_CS_N export Output 1 +add_interface_port conduit_end ENET_RST_N export Output 1 +add_interface_port conduit_end ENET_INT export Input 1 +add_interface_port conduit_end ENET_CLK export Output 1 + + +# +# connection point interrupt_sender +# +add_interface interrupt_sender interrupt end +set_interface_property interrupt_sender associatedAddressablePoint avalon_slave_0 +set_interface_property interrupt_sender associatedClock clock_sink +set_interface_property interrupt_sender associatedReset clock_sink_reset +set_interface_property interrupt_sender ENABLED true + +add_interface_port interrupt_sender oINT irq Output 1 + diff --git a/DM9000A/hdl/DM9000A_IF.v b/DM9000A/hdl/DM9000A_IF.v new file mode 100644 index 0000000..3fd22e0 --- /dev/null +++ b/DM9000A/hdl/DM9000A_IF.v @@ -0,0 +1,85 @@ +module DM9000A_IF( // HOST Side + iDATA, + oDATA, + iCMD, + iRD_N, + iWR_N, + iCS_N, + iRST_N, + iCLK, + iOSC_50, + oINT, + // DM9000A Side + ENET_DATA, + ENET_CMD, + ENET_RD_N, + ENET_WR_N, + ENET_CS_N, + ENET_RST_N, + ENET_INT, + ENET_CLK ); +// HOST Side +input [31:0] iDATA; +input iCMD; +input iRD_N; +input iWR_N; +input iCS_N; +input iRST_N; +input iCLK; +input iOSC_50; +output [31:0] oDATA; +output oINT; +// DM9000A Side +inout [15:0] ENET_DATA; +output ENET_CMD; +output ENET_RD_N; +output ENET_WR_N; +output ENET_CS_N; +output ENET_RST_N; +output ENET_CLK; +input ENET_INT; + +reg [15:0] TMP_DATA; +reg ENET_CMD; +reg ENET_RD_N; +reg ENET_WR_N; +reg ENET_CS_N; +reg ENET_CLK; +reg [31:0] oDATA; +reg oINT; + +assign ENET_DATA = ENET_WR_N ? 16'hzzzz : TMP_DATA; + +always@(posedge iCLK or negedge iRST_N) +begin + if(!iRST_N) + begin + TMP_DATA <= 0; + ENET_CMD <= 0; + ENET_RD_N <= 1; + ENET_WR_N <= 1; + ENET_CS_N <= 1; + oDATA <= 0; + oINT <= 0; + end + else + begin + oDATA <= ENET_DATA; + oINT <= ENET_INT; + TMP_DATA <= iDATA; + ENET_CMD <= iCMD; + ENET_CS_N <= iCS_N; + ENET_RD_N <= iRD_N; + ENET_WR_N <= iWR_N; + end +end + +always@(posedge iOSC_50) +ENET_CLK <= ~ENET_CLK; + +assign ENET_RST_N = iRST_N; + +endmodule + + + diff --git a/GPU/gpu_hw.tcl b/GPU/gpu_hw.tcl new file mode 100644 index 0000000..5eae01e --- /dev/null +++ b/GPU/gpu_hw.tcl @@ -0,0 +1,138 @@ +# TCL File Generated by Component Editor 13.0sp1 +# Wed Oct 09 17:56:27 BST 2013 +# DO NOT MODIFY + + +# +# gpu "gpu" v1.0 +# 2013.10.09.17:56:27 +# +# + +# +# request TCL package from ACDS 13.1 +# +package require -exact qsys 13.1 + + +# +# module gpu +# +set_module_property DESCRIPTION "" +set_module_property NAME gpu +set_module_property VERSION 1.0 +set_module_property INTERNAL false +set_module_property OPAQUE_ADDRESS_MAP true +set_module_property GROUP my_lib +set_module_property AUTHOR "" +set_module_property DISPLAY_NAME gpu +set_module_property INSTANTIATE_IN_SYSTEM_MODULE true +set_module_property EDITABLE true +set_module_property ANALYZE_HDL AUTO +set_module_property REPORT_TO_TALKBACK false +set_module_property ALLOW_GREYBOX_GENERATION false + + +# +# file sets +# +add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" +set_fileset_property QUARTUS_SYNTH TOP_LEVEL gpuv2 +set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false +add_fileset_file GPU_IF.v VERILOG PATH hdl/GPU_IF.v + +add_fileset SIM_VHDL SIM_VHDL "" "" +set_fileset_property SIM_VHDL TOP_LEVEL gpuv2 +set_fileset_property SIM_VHDL ENABLE_RELATIVE_INCLUDE_PATHS false +add_fileset_file gpu_hw.tcl OTHER PATH gpu_hw.tcl + + +# +# parameters +# + + +# +# display items +# + + +# +# connection point clock +# +add_interface clock clock end +set_interface_property clock clockRate 0 +set_interface_property clock ENABLED true +set_interface_property clock EXPORT_OF "" +set_interface_property clock PORT_NAME_MAP "" +set_interface_property clock SVD_ADDRESS_GROUP "" + +add_interface_port clock clk clk Input 1 + + +# +# connection point reset +# +add_interface reset reset end +set_interface_property reset associatedClock clock +set_interface_property reset synchronousEdges DEASSERT +set_interface_property reset ENABLED true +set_interface_property reset EXPORT_OF "" +set_interface_property reset PORT_NAME_MAP "" +set_interface_property reset SVD_ADDRESS_GROUP "" + +add_interface_port reset rst_n reset_n Input 1 + + +# +# connection point vga +# +add_interface vga conduit end +set_interface_property vga associatedClock "" +set_interface_property vga associatedReset "" +set_interface_property vga ENABLED true +set_interface_property vga EXPORT_OF "" +set_interface_property vga PORT_NAME_MAP "" +set_interface_property vga SVD_ADDRESS_GROUP "" + +add_interface_port vga vga_red export Output 3 +add_interface_port vga vga_green export Output 3 +add_interface_port vga vga_blue export Output 3 +add_interface_port vga vga_hs export Output 1 +add_interface_port vga vga_vs export Output 1 +add_interface_port vga vga_clk export Input 1 + + +# +# connection point avalon_slave +# +add_interface avalon_slave avalon end +set_interface_property avalon_slave addressUnits WORDS +set_interface_property avalon_slave associatedClock clock +set_interface_property avalon_slave associatedReset reset +set_interface_property avalon_slave bitsPerSymbol 8 +set_interface_property avalon_slave burstOnBurstBoundariesOnly false +set_interface_property avalon_slave burstcountUnits WORDS +set_interface_property avalon_slave explicitAddressSpan 0 +set_interface_property avalon_slave holdTime 0 +set_interface_property avalon_slave linewrapBursts false +set_interface_property avalon_slave maximumPendingReadTransactions 0 +set_interface_property avalon_slave readLatency 0 +set_interface_property avalon_slave readWaitTime 1 +set_interface_property avalon_slave setupTime 0 +set_interface_property avalon_slave timingUnits Cycles +set_interface_property avalon_slave writeWaitTime 0 +set_interface_property avalon_slave ENABLED true +set_interface_property avalon_slave EXPORT_OF "" +set_interface_property avalon_slave PORT_NAME_MAP "" +set_interface_property avalon_slave SVD_ADDRESS_GROUP "" + +add_interface_port avalon_slave cs_n chipselect_n Input 1 +add_interface_port avalon_slave address address Input 7 +add_interface_port avalon_slave data writedata Input 32 +add_interface_port avalon_slave wr_n write_n Input 1 +set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0 +set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0 +set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0 +set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0 + diff --git a/GPU/hdl/GPU_IF.v b/GPU/hdl/GPU_IF.v new file mode 100644 index 0000000..f32de1e --- /dev/null +++ b/GPU/hdl/GPU_IF.v @@ -0,0 +1,219 @@ +// gpuv2.v + +// This file was auto-generated as a prototype implementation of a module +// created in component editor. It ties off all outputs to ground and +// ignores all inputs. It needs to be edited to make it do something +// useful. +// +// This file will not be automatically regenerated. You should check it in +// to your version control system if you want to keep it. + +`timescale 1 ps / 1 ps +module gpuv2 #( + parameter AUTO_CLOCK_CLOCK_RATE = "-1" + ) ( + input wire clk, // clock.clk + input wire rst_n, // reset.reset_n + input wire vga_clk, // vga_out.export + output reg [2:0] vga_red, // .export + output reg [2:0] vga_green, // .export + output reg [2:0] vga_blue, // .export + output reg vga_hs, // .export + output reg vga_vs, // .export + input wire [31:0] data, // avalon_slave.writedata + input wire wr_n, // .write_n + input wire cs_n, // .chipselect_n + input wire [6:0] address // .address + ); + + + reg [9:0] ball_x; + reg [8:0] ball_y; + reg [8:0] bat0_y; + reg [8:0] bat1_y; + + reg [15:0] sprite[0:15]; + + wire [4:0] reg_addr; + + assign reg_addr = address[6:2]; + + + reg [2:0] sprite_red; + reg [2:0] sprite_green; + reg [2:0] sprite_blue; + + always @(posedge clk or negedge rst_n) + begin + if (rst_n == 0) begin + ball_x <= 10'd127; + ball_y <= 10'd127; + bat0_y <= 10'd100; + bat1_y <= 10'd200; + + sprite[0]=16'b1111111111111111; + sprite[1]=16'b1000000000000001; + sprite[2]=16'b1000000000000001; + sprite[3]=16'b1000000000000001; + sprite[4]=16'b1000000000000001; + sprite[5]=16'b1000000000000001; + sprite[6]=16'b1000000000000001; + sprite[7]=16'b1000000000000001; + sprite[8]=16'b1000000000000001; + sprite[9]=16'b1000000000000001; + sprite[10]=16'b1000000000000001; + sprite[11]=16'b1000000000000001; + sprite[12]=16'b1000000000000001; + sprite[13]=16'b1000000000000001; + sprite[14]=16'b1000000000000001; + sprite[15]=16'b1111111111111111; + + sprite_red[2:0]=3'b111; + sprite_green[2:0]=3'b000; + sprite_blue[2:0]=3'b111; + + end else if (~cs_n && ~wr_n) begin + if (reg_addr[4]) begin + sprite[reg_addr[3:0]]<=data[15:0]; + end else begin + case (reg_addr[2:0]) + 3'b000: + ball_x <= data[9:0]; + 3'b001: + ball_y <= data[8:0]; + 3'b010: + bat0_y <= data[8:0]; + 3'b011: + bat1_y <= data[8:0]; + 3'b100: + begin + sprite_red <= data[8:6]; + sprite_green <= data[5:3]; + sprite_blue <= data[2:0]; + end + endcase + end + end + end + + + reg trig_25M; + always @ (posedge vga_clk) + begin + if(!rst_n) + trig_25M <= 1'b0; + else + trig_25M <= ~trig_25M; + end + + reg [9:0] vector_x; + always @ (posedge vga_clk or negedge rst_n) + begin + if(!rst_n) + vector_x <= 10'd0; + else if(trig_25M) + begin + if(vector_x != 10'd799) + vector_x <= vector_x + 1'b1; + else + vector_x <= 10'd0; + end + end + + reg [9:0] vector_y; + always @ (posedge vga_clk or negedge rst_n) + begin + if(!rst_n) + vector_y <= 10'd0; + else if(trig_25M) + begin + if(vector_x == 10'd799) + begin + if(vector_y != 10'd524) + vector_y <= vector_y + 1'b1; + else + vector_y <= 10'd0; + end + end + end + + always @ (posedge vga_clk or negedge rst_n) + begin + if(!rst_n) + vga_hs <= 1'b0; + else if(trig_25M) + begin + if(vector_x >= 10'd656 && vector_x < 10'd752) + vga_hs <= 1'b0; + else + vga_hs <= 1'b1; + end + end + + always @ (posedge vga_clk or negedge rst_n) + begin + if(!rst_n) + vga_vs <= 1'b0; + else if(trig_25M) + begin + if(vector_y >= 10'd490 && vector_y < 10'd492) + vga_vs <= 1'b0; + else + vga_vs <= 1'b1; + end + end + + + + reg [2:0] index; + always @ (posedge vga_clk or negedge rst_n) + begin + if(!rst_n) + index <= 3'b000; + else if(trig_25M) + begin + if(vector_x < 10'd640 && vector_y < 10'd480) + if(vector_x >= (ball_x - 8 )&& vector_x <=( ball_x + 7 ) + && vector_y >= (ball_y - 8) && vector_y <= (ball_y + 7)) begin + if (sprite[(vector_y - (ball_y - 8)) & 15 ][(vector_x - (ball_x -8))& 15 ]) + index <= 3'b001; + else + index <= 3'b000; + end else if (vector_x < 10'd4) + if (vector_y >=( bat0_y - 20 ) && vector_y <= (bat0_y + 20) ) + index <= 3'b111; + else + index <= 3'b000; + else if (vector_x >= 10'd318 && vector_x < 10'd322) + index <= {3{vector_y[3]}}; + else if (vector_x >= 10'd636 && vector_x < 10'd640) + if (vector_y >=( bat1_y - 20 ) && vector_y <= (bat1_y + 20) ) + index <= 3'b111; + else + index <= 3'b000; + else + index <= 3'b000; + else + index <= 3'b000; + end + end + + always begin + if (index == 3'b000) begin + vga_red = 3'b000; + vga_green = 3'b000; + vga_blue = 3'b000; + end else if (index == 3'b001) begin + vga_red = sprite_red; + vga_green= sprite_green; + vga_blue = sprite_blue; + end else begin + vga_red= 3'b111; + vga_green=3'b111; + vga_blue=3'b111; + end + + + end + +endmodule diff --git a/hardware/.gitignore b/hardware/.gitignore deleted file mode 100644 index 7f7563f..0000000 --- a/hardware/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -db -pong3.qws diff --git a/hardware/DM9000A/dm9000a_hw.tcl b/hardware/DM9000A/dm9000a_hw.tcl deleted file mode 100644 index ea89ec5..0000000 --- a/hardware/DM9000A/dm9000a_hw.tcl +++ /dev/null @@ -1,141 +0,0 @@ -# TCL File Generated by Component Editor 12.0 -# Thu Sep 12 21:20:16 CST 2013 -# DO NOT MODIFY - - -# -# dm9000a "dm9000a" v1.0 -# null 2013.09.12.21:20:16 -# -# - -# -# request TCL package from ACDS 12.0 -# -package require -exact qsys 12.0 - - -# -# module dm9000a -# -set_module_property NAME dm9000a -set_module_property VERSION 1.0 -set_module_property INTERNAL false -set_module_property OPAQUE_ADDRESS_MAP true -set_module_property GROUP my_lib -set_module_property DISPLAY_NAME dm9000a -set_module_property INSTANTIATE_IN_SYSTEM_MODULE true -set_module_property EDITABLE true -set_module_property ANALYZE_HDL AUTO -set_module_property REPORT_TO_TALKBACK false -set_module_property ALLOW_GREYBOX_GENERATION false - - -# -# file sets -# -add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" -set_fileset_property QUARTUS_SYNTH TOP_LEVEL DM9000A_IF -set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false -add_fileset_file DM9000A_IF.v VERILOG PATH hdl/DM9000A_IF.v - -add_fileset SIM_VHDL SIM_VHDL "" "" -set_fileset_property SIM_VHDL TOP_LEVEL DM9000A_IF -set_fileset_property SIM_VHDL ENABLE_RELATIVE_INCLUDE_PATHS false -add_fileset_file dm9000a_hw.tcl OTHER PATH dm9000a_hw.tcl - - -# -# parameters -# - - -# -# display items -# - - -# -# connection point avalon_slave_0 -# -add_interface avalon_slave_0 avalon end -set_interface_property avalon_slave_0 addressAlignment DYNAMIC -set_interface_property avalon_slave_0 addressUnits WORDS -set_interface_property avalon_slave_0 associatedClock clock_sink -set_interface_property avalon_slave_0 associatedReset clock_sink_reset -set_interface_property avalon_slave_0 burstOnBurstBoundariesOnly false -set_interface_property avalon_slave_0 explicitAddressSpan 0 -set_interface_property avalon_slave_0 holdTime 1 -set_interface_property avalon_slave_0 isMemoryDevice false -set_interface_property avalon_slave_0 isNonVolatileStorage false -set_interface_property avalon_slave_0 linewrapBursts false -set_interface_property avalon_slave_0 maximumPendingReadTransactions 0 -set_interface_property avalon_slave_0 printableDevice false -set_interface_property avalon_slave_0 readLatency 0 -set_interface_property avalon_slave_0 readWaitStates 4 -set_interface_property avalon_slave_0 readWaitTime 4 -set_interface_property avalon_slave_0 setupTime 1 -set_interface_property avalon_slave_0 timingUnits Cycles -set_interface_property avalon_slave_0 writeWaitStates 4 -set_interface_property avalon_slave_0 writeWaitTime 4 -set_interface_property avalon_slave_0 ENABLED true - -add_interface_port avalon_slave_0 iDATA writedata Input 32 -add_interface_port avalon_slave_0 iCMD address Input 1 -add_interface_port avalon_slave_0 iRD_N read_n Input 1 -add_interface_port avalon_slave_0 iWR_N write_n Input 1 -add_interface_port avalon_slave_0 iCS_N chipselect_n Input 1 -add_interface_port avalon_slave_0 oDATA readdata Output 32 - - -# -# connection point clock_sink -# -add_interface clock_sink clock end -set_interface_property clock_sink clockRate 0 -set_interface_property clock_sink ENABLED true - -add_interface_port clock_sink iCLK clk Input 1 - - -# -# connection point clock_sink_reset -# -add_interface clock_sink_reset reset end -set_interface_property clock_sink_reset associatedClock clock_sink -set_interface_property clock_sink_reset synchronousEdges DEASSERT -set_interface_property clock_sink_reset ENABLED true - -add_interface_port clock_sink_reset iRST_N reset_n Input 1 - - -# -# connection point conduit_end -# -add_interface conduit_end conduit end -set_interface_property conduit_end associatedClock "" -set_interface_property conduit_end associatedReset "" -set_interface_property conduit_end ENABLED true - -add_interface_port conduit_end iOSC_50 export Input 1 -add_interface_port conduit_end ENET_DATA export Bidir 16 -add_interface_port conduit_end ENET_CMD export Output 1 -add_interface_port conduit_end ENET_RD_N export Output 1 -add_interface_port conduit_end ENET_WR_N export Output 1 -add_interface_port conduit_end ENET_CS_N export Output 1 -add_interface_port conduit_end ENET_RST_N export Output 1 -add_interface_port conduit_end ENET_INT export Input 1 -add_interface_port conduit_end ENET_CLK export Output 1 - - -# -# connection point interrupt_sender -# -add_interface interrupt_sender interrupt end -set_interface_property interrupt_sender associatedAddressablePoint avalon_slave_0 -set_interface_property interrupt_sender associatedClock clock_sink -set_interface_property interrupt_sender associatedReset clock_sink_reset -set_interface_property interrupt_sender ENABLED true - -add_interface_port interrupt_sender oINT irq Output 1 - diff --git a/hardware/DM9000A/hdl/DM9000A_IF.v b/hardware/DM9000A/hdl/DM9000A_IF.v deleted file mode 100644 index 3fd22e0..0000000 --- a/hardware/DM9000A/hdl/DM9000A_IF.v +++ /dev/null @@ -1,85 +0,0 @@ -module DM9000A_IF( // HOST Side - iDATA, - oDATA, - iCMD, - iRD_N, - iWR_N, - iCS_N, - iRST_N, - iCLK, - iOSC_50, - oINT, - // DM9000A Side - ENET_DATA, - ENET_CMD, - ENET_RD_N, - ENET_WR_N, - ENET_CS_N, - ENET_RST_N, - ENET_INT, - ENET_CLK ); -// HOST Side -input [31:0] iDATA; -input iCMD; -input iRD_N; -input iWR_N; -input iCS_N; -input iRST_N; -input iCLK; -input iOSC_50; -output [31:0] oDATA; -output oINT; -// DM9000A Side -inout [15:0] ENET_DATA; -output ENET_CMD; -output ENET_RD_N; -output ENET_WR_N; -output ENET_CS_N; -output ENET_RST_N; -output ENET_CLK; -input ENET_INT; - -reg [15:0] TMP_DATA; -reg ENET_CMD; -reg ENET_RD_N; -reg ENET_WR_N; -reg ENET_CS_N; -reg ENET_CLK; -reg [31:0] oDATA; -reg oINT; - -assign ENET_DATA = ENET_WR_N ? 16'hzzzz : TMP_DATA; - -always@(posedge iCLK or negedge iRST_N) -begin - if(!iRST_N) - begin - TMP_DATA <= 0; - ENET_CMD <= 0; - ENET_RD_N <= 1; - ENET_WR_N <= 1; - ENET_CS_N <= 1; - oDATA <= 0; - oINT <= 0; - end - else - begin - oDATA <= ENET_DATA; - oINT <= ENET_INT; - TMP_DATA <= iDATA; - ENET_CMD <= iCMD; - ENET_CS_N <= iCS_N; - ENET_RD_N <= iRD_N; - ENET_WR_N <= iWR_N; - end -end - -always@(posedge iOSC_50) -ENET_CLK <= ~ENET_CLK; - -assign ENET_RST_N = iRST_N; - -endmodule - - - diff --git a/hardware/GPU/gpu_hw.tcl b/hardware/GPU/gpu_hw.tcl deleted file mode 100644 index 5eae01e..0000000 --- a/hardware/GPU/gpu_hw.tcl +++ /dev/null @@ -1,138 +0,0 @@ -# TCL File Generated by Component Editor 13.0sp1 -# Wed Oct 09 17:56:27 BST 2013 -# DO NOT MODIFY - - -# -# gpu "gpu" v1.0 -# 2013.10.09.17:56:27 -# -# - -# -# request TCL package from ACDS 13.1 -# -package require -exact qsys 13.1 - - -# -# module gpu -# -set_module_property DESCRIPTION "" -set_module_property NAME gpu -set_module_property VERSION 1.0 -set_module_property INTERNAL false -set_module_property OPAQUE_ADDRESS_MAP true -set_module_property GROUP my_lib -set_module_property AUTHOR "" -set_module_property DISPLAY_NAME gpu -set_module_property INSTANTIATE_IN_SYSTEM_MODULE true -set_module_property EDITABLE true -set_module_property ANALYZE_HDL AUTO -set_module_property REPORT_TO_TALKBACK false -set_module_property ALLOW_GREYBOX_GENERATION false - - -# -# file sets -# -add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" -set_fileset_property QUARTUS_SYNTH TOP_LEVEL gpuv2 -set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false -add_fileset_file GPU_IF.v VERILOG PATH hdl/GPU_IF.v - -add_fileset SIM_VHDL SIM_VHDL "" "" -set_fileset_property SIM_VHDL TOP_LEVEL gpuv2 -set_fileset_property SIM_VHDL ENABLE_RELATIVE_INCLUDE_PATHS false -add_fileset_file gpu_hw.tcl OTHER PATH gpu_hw.tcl - - -# -# parameters -# - - -# -# display items -# - - -# -# connection point clock -# -add_interface clock clock end -set_interface_property clock clockRate 0 -set_interface_property clock ENABLED true -set_interface_property clock EXPORT_OF "" -set_interface_property clock PORT_NAME_MAP "" -set_interface_property clock SVD_ADDRESS_GROUP "" - -add_interface_port clock clk clk Input 1 - - -# -# connection point reset -# -add_interface reset reset end -set_interface_property reset associatedClock clock -set_interface_property reset synchronousEdges DEASSERT -set_interface_property reset ENABLED true -set_interface_property reset EXPORT_OF "" -set_interface_property reset PORT_NAME_MAP "" -set_interface_property reset SVD_ADDRESS_GROUP "" - -add_interface_port reset rst_n reset_n Input 1 - - -# -# connection point vga -# -add_interface vga conduit end -set_interface_property vga associatedClock "" -set_interface_property vga associatedReset "" -set_interface_property vga ENABLED true -set_interface_property vga EXPORT_OF "" -set_interface_property vga PORT_NAME_MAP "" -set_interface_property vga SVD_ADDRESS_GROUP "" - -add_interface_port vga vga_red export Output 3 -add_interface_port vga vga_green export Output 3 -add_interface_port vga vga_blue export Output 3 -add_interface_port vga vga_hs export Output 1 -add_interface_port vga vga_vs export Output 1 -add_interface_port vga vga_clk export Input 1 - - -# -# connection point avalon_slave -# -add_interface avalon_slave avalon end -set_interface_property avalon_slave addressUnits WORDS -set_interface_property avalon_slave associatedClock clock -set_interface_property avalon_slave associatedReset reset -set_interface_property avalon_slave bitsPerSymbol 8 -set_interface_property avalon_slave burstOnBurstBoundariesOnly false -set_interface_property avalon_slave burstcountUnits WORDS -set_interface_property avalon_slave explicitAddressSpan 0 -set_interface_property avalon_slave holdTime 0 -set_interface_property avalon_slave linewrapBursts false -set_interface_property avalon_slave maximumPendingReadTransactions 0 -set_interface_property avalon_slave readLatency 0 -set_interface_property avalon_slave readWaitTime 1 -set_interface_property avalon_slave setupTime 0 -set_interface_property avalon_slave timingUnits Cycles -set_interface_property avalon_slave writeWaitTime 0 -set_interface_property avalon_slave ENABLED true -set_interface_property avalon_slave EXPORT_OF "" -set_interface_property avalon_slave PORT_NAME_MAP "" -set_interface_property avalon_slave SVD_ADDRESS_GROUP "" - -add_interface_port avalon_slave cs_n chipselect_n Input 1 -add_interface_port avalon_slave address address Input 7 -add_interface_port avalon_slave data writedata Input 32 -add_interface_port avalon_slave wr_n write_n Input 1 -set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0 -set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0 -set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0 -set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0 - diff --git a/hardware/GPU/hdl/GPU_IF.v b/hardware/GPU/hdl/GPU_IF.v deleted file mode 100644 index f32de1e..0000000 --- a/hardware/GPU/hdl/GPU_IF.v +++ /dev/null @@ -1,219 +0,0 @@ -// gpuv2.v - -// This file was auto-generated as a prototype implementation of a module -// created in component editor. It ties off all outputs to ground and -// ignores all inputs. It needs to be edited to make it do something -// useful. -// -// This file will not be automatically regenerated. You should check it in -// to your version control system if you want to keep it. - -`timescale 1 ps / 1 ps -module gpuv2 #( - parameter AUTO_CLOCK_CLOCK_RATE = "-1" - ) ( - input wire clk, // clock.clk - input wire rst_n, // reset.reset_n - input wire vga_clk, // vga_out.export - output reg [2:0] vga_red, // .export - output reg [2:0] vga_green, // .export - output reg [2:0] vga_blue, // .export - output reg vga_hs, // .export - output reg vga_vs, // .export - input wire [31:0] data, // avalon_slave.writedata - input wire wr_n, // .write_n - input wire cs_n, // .chipselect_n - input wire [6:0] address // .address - ); - - - reg [9:0] ball_x; - reg [8:0] ball_y; - reg [8:0] bat0_y; - reg [8:0] bat1_y; - - reg [15:0] sprite[0:15]; - - wire [4:0] reg_addr; - - assign reg_addr = address[6:2]; - - - reg [2:0] sprite_red; - reg [2:0] sprite_green; - reg [2:0] sprite_blue; - - always @(posedge clk or negedge rst_n) - begin - if (rst_n == 0) begin - ball_x <= 10'd127; - ball_y <= 10'd127; - bat0_y <= 10'd100; - bat1_y <= 10'd200; - - sprite[0]=16'b1111111111111111; - sprite[1]=16'b1000000000000001; - sprite[2]=16'b1000000000000001; - sprite[3]=16'b1000000000000001; - sprite[4]=16'b1000000000000001; - sprite[5]=16'b1000000000000001; - sprite[6]=16'b1000000000000001; - sprite[7]=16'b1000000000000001; - sprite[8]=16'b1000000000000001; - sprite[9]=16'b1000000000000001; - sprite[10]=16'b1000000000000001; - sprite[11]=16'b1000000000000001; - sprite[12]=16'b1000000000000001; - sprite[13]=16'b1000000000000001; - sprite[14]=16'b1000000000000001; - sprite[15]=16'b1111111111111111; - - sprite_red[2:0]=3'b111; - sprite_green[2:0]=3'b000; - sprite_blue[2:0]=3'b111; - - end else if (~cs_n && ~wr_n) begin - if (reg_addr[4]) begin - sprite[reg_addr[3:0]]<=data[15:0]; - end else begin - case (reg_addr[2:0]) - 3'b000: - ball_x <= data[9:0]; - 3'b001: - ball_y <= data[8:0]; - 3'b010: - bat0_y <= data[8:0]; - 3'b011: - bat1_y <= data[8:0]; - 3'b100: - begin - sprite_red <= data[8:6]; - sprite_green <= data[5:3]; - sprite_blue <= data[2:0]; - end - endcase - end - end - end - - - reg trig_25M; - always @ (posedge vga_clk) - begin - if(!rst_n) - trig_25M <= 1'b0; - else - trig_25M <= ~trig_25M; - end - - reg [9:0] vector_x; - always @ (posedge vga_clk or negedge rst_n) - begin - if(!rst_n) - vector_x <= 10'd0; - else if(trig_25M) - begin - if(vector_x != 10'd799) - vector_x <= vector_x + 1'b1; - else - vector_x <= 10'd0; - end - end - - reg [9:0] vector_y; - always @ (posedge vga_clk or negedge rst_n) - begin - if(!rst_n) - vector_y <= 10'd0; - else if(trig_25M) - begin - if(vector_x == 10'd799) - begin - if(vector_y != 10'd524) - vector_y <= vector_y + 1'b1; - else - vector_y <= 10'd0; - end - end - end - - always @ (posedge vga_clk or negedge rst_n) - begin - if(!rst_n) - vga_hs <= 1'b0; - else if(trig_25M) - begin - if(vector_x >= 10'd656 && vector_x < 10'd752) - vga_hs <= 1'b0; - else - vga_hs <= 1'b1; - end - end - - always @ (posedge vga_clk or negedge rst_n) - begin - if(!rst_n) - vga_vs <= 1'b0; - else if(trig_25M) - begin - if(vector_y >= 10'd490 && vector_y < 10'd492) - vga_vs <= 1'b0; - else - vga_vs <= 1'b1; - end - end - - - - reg [2:0] index; - always @ (posedge vga_clk or negedge rst_n) - begin - if(!rst_n) - index <= 3'b000; - else if(trig_25M) - begin - if(vector_x < 10'd640 && vector_y < 10'd480) - if(vector_x >= (ball_x - 8 )&& vector_x <=( ball_x + 7 ) - && vector_y >= (ball_y - 8) && vector_y <= (ball_y + 7)) begin - if (sprite[(vector_y - (ball_y - 8)) & 15 ][(vector_x - (ball_x -8))& 15 ]) - index <= 3'b001; - else - index <= 3'b000; - end else if (vector_x < 10'd4) - if (vector_y >=( bat0_y - 20 ) && vector_y <= (bat0_y + 20) ) - index <= 3'b111; - else - index <= 3'b000; - else if (vector_x >= 10'd318 && vector_x < 10'd322) - index <= {3{vector_y[3]}}; - else if (vector_x >= 10'd636 && vector_x < 10'd640) - if (vector_y >=( bat1_y - 20 ) && vector_y <= (bat1_y + 20) ) - index <= 3'b111; - else - index <= 3'b000; - else - index <= 3'b000; - else - index <= 3'b000; - end - end - - always begin - if (index == 3'b000) begin - vga_red = 3'b000; - vga_green = 3'b000; - vga_blue = 3'b000; - end else if (index == 3'b001) begin - vga_red = sprite_red; - vga_green= sprite_green; - vga_blue = sprite_blue; - end else begin - vga_red= 3'b111; - vga_green=3'b111; - vga_blue=3'b111; - end - - - end - -endmodule diff --git a/hardware/my_sys.qsys b/hardware/my_sys.qsys deleted file mode 100644 index 5431cf0..0000000 --- a/hardware/my_sys.qsys +++ /dev/null @@ -1,745 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - epcs_flash_controller_0.epcs_control_port - - - nios2_qsys_0.jtag_debug_module - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ]]> - ]]> - - - - - ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - $${FILENAME}_onchip_memory2_0 - - ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 - - - - - - - - - - - - - - - - - - - - - - - - - $${FILENAME}_sdram_0 - - - - - - - $${FILENAME}_epcs_flash_controller_0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - INTERACTIVE_ASCII_OUTPUT - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/hardware/pll.v b/hardware/pll.v deleted file mode 100644 index 7dc9ba3..0000000 --- a/hardware/pll.v +++ /dev/null @@ -1,326 +0,0 @@ -// megafunction wizard: %ALTPLL% -// GENERATION: STANDARD -// VERSION: WM1.0 -// MODULE: altpll - -// ============================================================ -// File Name: pll.v -// Megafunction Name(s): -// altpll -// -// Simulation Library Files(s): -// altera_mf -// ============================================================ -// ************************************************************ -// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! -// -// 12.0 Build 178 05/31/2012 SJ Web Edition -// ************************************************************ - - -//Copyright (C) 1991-2012 Altera Corporation -//Your use of Altera Corporation's design tools, logic functions -//and other software and tools, and its AMPP partner logic -//functions, and any output files from any of the foregoing -//(including device programming or simulation files), and any -//associated documentation or information are expressly subject -//to the terms and conditions of the Altera Program License -//Subscription Agreement, Altera MegaCore Function License -//Agreement, or other applicable license agreement, including, -//without limitation, that your use is for the sole purpose of -//programming logic devices manufactured by Altera and sold by -//Altera or its authorized distributors. Please refer to the -//applicable agreement for further details. - - -// synopsys translate_off -`timescale 1 ps / 1 ps -// synopsys translate_on -module pll ( - inclk0, - c0, - c1); - - input inclk0; - output c0; - output c1; - - wire [5:0] sub_wire0; - wire [0:0] sub_wire5 = 1'h0; - wire [1:1] sub_wire2 = sub_wire0[1:1]; - wire [0:0] sub_wire1 = sub_wire0[0:0]; - wire c0 = sub_wire1; - wire c1 = sub_wire2; - wire sub_wire3 = inclk0; - wire [1:0] sub_wire4 = {sub_wire5, sub_wire3}; - - altpll altpll_component ( - .inclk (sub_wire4), - .clk (sub_wire0), - .activeclock (), - .areset (1'b0), - .clkbad (), - .clkena ({6{1'b1}}), - .clkloss (), - .clkswitch (1'b0), - .configupdate (1'b0), - .enable0 (), - .enable1 (), - .extclk (), - .extclkena ({4{1'b1}}), - .fbin (1'b1), - .fbmimicbidir (), - .fbout (), - .fref (), - .icdrclk (), - .locked (), - .pfdena (1'b1), - .phasecounterselect ({4{1'b1}}), - .phasedone (), - .phasestep (1'b1), - .phaseupdown (1'b1), - .pllena (1'b1), - .scanaclr (1'b0), - .scanclk (1'b0), - .scanclkena (1'b1), - .scandata (1'b0), - .scandataout (), - .scandone (), - .scanread (1'b0), - .scanwrite (1'b0), - .sclkout0 (), - .sclkout1 (), - .vcooverrange (), - .vcounderrange ()); - defparam - altpll_component.clk0_divide_by = 5, - altpll_component.clk0_duty_cycle = 50, - altpll_component.clk0_multiply_by = 8, - altpll_component.clk0_phase_shift = "0", - altpll_component.clk1_divide_by = 5, - altpll_component.clk1_duty_cycle = 50, - altpll_component.clk1_multiply_by = 8, - altpll_component.clk1_phase_shift = "-3000", - altpll_component.compensate_clock = "CLK0", - altpll_component.inclk0_input_frequency = 20000, - altpll_component.intended_device_family = "Cyclone II", - altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll", - altpll_component.lpm_type = "altpll", - altpll_component.operation_mode = "NORMAL", - altpll_component.port_activeclock = "PORT_UNUSED", - altpll_component.port_areset = "PORT_UNUSED", - altpll_component.port_clkbad0 = "PORT_UNUSED", - altpll_component.port_clkbad1 = "PORT_UNUSED", - altpll_component.port_clkloss = "PORT_UNUSED", - altpll_component.port_clkswitch = "PORT_UNUSED", - altpll_component.port_configupdate = "PORT_UNUSED", - altpll_component.port_fbin = "PORT_UNUSED", - altpll_component.port_inclk0 = "PORT_USED", - altpll_component.port_inclk1 = "PORT_UNUSED", - altpll_component.port_locked = "PORT_UNUSED", - altpll_component.port_pfdena = "PORT_UNUSED", - altpll_component.port_phasecounterselect = "PORT_UNUSED", - altpll_component.port_phasedone = "PORT_UNUSED", - altpll_component.port_phasestep = "PORT_UNUSED", - altpll_component.port_phaseupdown = "PORT_UNUSED", - altpll_component.port_pllena = "PORT_UNUSED", - altpll_component.port_scanaclr = "PORT_UNUSED", - altpll_component.port_scanclk = "PORT_UNUSED", - altpll_component.port_scanclkena = "PORT_UNUSED", - altpll_component.port_scandata = "PORT_UNUSED", - altpll_component.port_scandataout = "PORT_UNUSED", - altpll_component.port_scandone = "PORT_UNUSED", - altpll_component.port_scanread = "PORT_UNUSED", - altpll_component.port_scanwrite = "PORT_UNUSED", - altpll_component.port_clk0 = "PORT_USED", - altpll_component.port_clk1 = "PORT_USED", - altpll_component.port_clk2 = "PORT_UNUSED", - altpll_component.port_clk3 = "PORT_UNUSED", - altpll_component.port_clk4 = "PORT_UNUSED", - altpll_component.port_clk5 = "PORT_UNUSED", - altpll_component.port_clkena0 = "PORT_UNUSED", - altpll_component.port_clkena1 = "PORT_UNUSED", - altpll_component.port_clkena2 = "PORT_UNUSED", - altpll_component.port_clkena3 = "PORT_UNUSED", - altpll_component.port_clkena4 = "PORT_UNUSED", - altpll_component.port_clkena5 = "PORT_UNUSED", - altpll_component.port_extclk0 = "PORT_UNUSED", - altpll_component.port_extclk1 = "PORT_UNUSED", - altpll_component.port_extclk2 = "PORT_UNUSED", - altpll_component.port_extclk3 = "PORT_UNUSED"; - - -endmodule - -// ============================================================ -// CNX file retrieval info -// ============================================================ -// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" -// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" -// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" -// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" -// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" -// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" -// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" -// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" -// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1" -// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" -// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" -// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" -// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" -// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" -// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" -// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" -// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" -// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" -// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" -// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "80.000000" -// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "80.000000" -// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" -// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" -// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1" -// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" -// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" -// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" -// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" -// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" -// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" -// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" -// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" -// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II" -// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" -// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" -// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" -// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" -// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" -// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" -// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" -// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" -// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" -// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" -// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" -// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1" -// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" -// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "80.00000000" -// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "80.00000000" -// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" -// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1" -// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" -// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" -// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" -// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" -// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-3.00000000" -// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" -// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" -// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns" -// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" -// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" -// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" -// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" -// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif" -// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" -// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" -// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" -// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" -// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" -// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" -// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" -// Retrieval info: PRIVATE: SPREAD_USE STRING "0" -// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" -// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" -// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" -// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" -// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" -// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" -// Retrieval info: PRIVATE: USE_CLK0 STRING "1" -// Retrieval info: PRIVATE: USE_CLK1 STRING "1" -// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" -// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" -// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" -// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" -// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all -// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "5" -// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" -// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "8" -// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" -// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "5" -// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" -// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "8" -// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-3000" -// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" -// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" -// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II" -// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" -// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" -// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" -// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" -// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]" -// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]" -// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" -// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" -// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" -// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 -// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 -// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 -// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 -// Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.v FALSE -// Retrieval info: GEN_FILE: TYPE_NORMAL pll_bb.v FALSE -// Retrieval info: LIB_FILE: altera_mf -// Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/hardware/pong3.pin b/hardware/pong3.pin deleted file mode 100644 index 06ed0ce..0000000 --- a/hardware/pong3.pin +++ /dev/null @@ -1,274 +0,0 @@ - -- Copyright (C) 1991-2013 Altera Corporation - -- Your use of Altera Corporation's design tools, logic functions - -- and other software and tools, and its AMPP partner logic - -- functions, and any output files from any of the foregoing - -- (including device programming or simulation files), and any - -- associated documentation or information are expressly subject - -- to the terms and conditions of the Altera Program License - -- Subscription Agreement, Altera MegaCore Function License - -- Agreement, or other applicable license agreement, including, - -- without limitation, that your use is for the sole purpose of - -- programming logic devices manufactured by Altera and sold by - -- Altera or its authorized distributors. Please refer to the - -- applicable agreement for further details. - -- - -- This is a Quartus II output file. It is for reporting purposes only, and is - -- not intended for use as a Quartus II input file. This file cannot be used - -- to make Quartus II pin assignments - for instructions on how to make pin - -- assignments, please see Quartus II help. - --------------------------------------------------------------------------------- - - - - --------------------------------------------------------------------------------- - -- NC : No Connect. This pin has no internal connection to the device. - -- DNU : Do Not Use. This pin MUST NOT be connected. - -- VCCINT : Dedicated power pin, which MUST be connected to VCC (1.2V). - -- VCCIO : Dedicated power pin, which MUST be connected to VCC - -- of its bank. - -- Bank 1: 3.3V - -- Bank 2: 3.3V - -- Bank 3: 3.3V - -- Bank 4: 3.3V - -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND. - -- It can also be used to report unused dedicated pins. The connection - -- on the board for unused dedicated pins depends on whether this will - -- be used in a future design. One example is device migration. When - -- using device migration, refer to the device pin-tables. If it is a - -- GND pin in the pin table or if it will not be used in a future design - -- for another purpose the it MUST be connected to GND. If it is an unused - -- dedicated pin, then it can be connected to a valid signal on the board - -- (low, high, or toggling) if that signal is required for a different - -- revision of the design. - -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins. - -- This pin should be connected to GND. It may also be connected to a - -- valid signal on the board (low, high, or toggling) if that signal - -- is required for a different revision of the design. - -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND - -- or leave it unconnected. - -- RESERVED : Unused I/O pin, which MUST be left unconnected. - -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board. - -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor. - -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry. - -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high. - --------------------------------------------------------------------------------- - - - - --------------------------------------------------------------------------------- - -- Pin directions (input, output or bidir) are based on device operating in user mode. - --------------------------------------------------------------------------------- - -Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition -CHIP "pong3" ASSIGNED TO AN: EP2C8Q208C8 - -Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment -------------------------------------------------------------------------------------------------------------- -~ASDO~ / RESERVED_INPUT : 1 : input : 3.3-V LVTTL : : 1 : N -~nCSO~ / RESERVED_INPUT : 2 : input : 3.3-V LVTTL : : 1 : N -GND* : 3 : : : : 1 : -GND* : 4 : : : : 1 : -GND* : 5 : : : : 1 : -GND* : 6 : : : : 1 : -VCCIO1 : 7 : power : : 3.3V : 1 : -GND* : 8 : : : : 1 : -GND : 9 : gnd : : : : -GND* : 10 : : : : 1 : -GND* : 11 : : : : 1 : -GND* : 12 : : : : 1 : -GND* : 13 : : : : 1 : -GND* : 14 : : : : 1 : -GND* : 15 : : : : 1 : -altera_reserved_tdo : 16 : output : 3.3-V LVTTL : : 1 : N -altera_reserved_tms : 17 : input : 3.3-V LVTTL : : 1 : N -altera_reserved_tck : 18 : input : 3.3-V LVTTL : : 1 : N -altera_reserved_tdi : 19 : input : 3.3-V LVTTL : : 1 : N -DATA0 : 20 : input : : : 1 : -DCLK : 21 : : : : 1 : -nCE : 22 : : : : 1 : -clk : 23 : input : 3.3-V LVTTL : : 1 : Y -GND+ : 24 : : : : 1 : -GND : 25 : gnd : : : : -nCONFIG : 26 : : : : 1 : -rst_n : 27 : input : 3.3-V LVTTL : : 1 : Y -GND+ : 28 : : : : 1 : -VCCIO1 : 29 : power : : 3.3V : 1 : -seven_seg[2] : 30 : output : 3.3-V LVTTL : : 1 : N -GND* : 31 : : : : 1 : -VCCINT : 32 : power : : 1.2V : : -GND* : 33 : : : : 1 : -GND* : 34 : : : : 1 : -GND* : 35 : : : : 1 : -GND : 36 : gnd : : : : -GND* : 37 : : : : 1 : -GND : 38 : gnd : : : : -GND* : 39 : : : : 1 : -GND* : 40 : : : : 1 : -GND* : 41 : : : : 1 : -VCCIO1 : 42 : power : : 3.3V : 1 : -seven_seg[0] : 43 : output : 3.3-V LVTTL : : 1 : N -GND* : 44 : : : : 1 : -sdram_cs_n : 45 : output : 3.3-V LVTTL : : 1 : Y -sdram_cke : 46 : output : 3.3-V LVTTL : : 1 : Y -sdram_clk : 47 : output : 3.3-V LVTTL : : 1 : Y -GND* : 48 : : : : 1 : -GND : 49 : gnd : : : : -GND_PLL1 : 50 : gnd : : : : -VCCD_PLL1 : 51 : power : : 1.2V : : -GND_PLL1 : 52 : gnd : : : : -VCCA_PLL1 : 53 : power : : 1.2V : : -GNDA_PLL1 : 54 : gnd : : : : -GND : 55 : gnd : : : : -sdram_dqm[0] : 56 : output : 3.3-V LVTTL : : 4 : Y -sdram_dq[7] : 57 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[6] : 58 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[5] : 59 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[4] : 60 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[3] : 61 : bidir : 3.3-V LVTTL : : 4 : Y -VCCIO4 : 62 : power : : 3.3V : 4 : -sdram_dq[2] : 63 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[1] : 64 : bidir : 3.3-V LVTTL : : 4 : Y -GND : 65 : gnd : : : : -VCCINT : 66 : power : : 1.2V : : -sdram_dq[0] : 67 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_we_n : 68 : output : 3.3-V LVTTL : : 4 : Y -sdram_cas_n : 69 : output : 3.3-V LVTTL : : 4 : Y -sdram_ras_n : 70 : output : 3.3-V LVTTL : : 4 : Y -VCCIO4 : 71 : power : : 3.3V : 4 : -sdram_ba[0] : 72 : output : 3.3-V LVTTL : : 4 : Y -GND : 73 : gnd : : : : -sdram_ba[1] : 74 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[10] : 75 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[0] : 76 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[1] : 77 : output : 3.3-V LVTTL : : 4 : Y -GND : 78 : gnd : : : : -VCCINT : 79 : power : : 1.2V : : -sdram_addr[2] : 80 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[3] : 81 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[4] : 82 : output : 3.3-V LVTTL : : 4 : Y -VCCIO4 : 83 : power : : 3.3V : 4 : -sdram_addr[5] : 84 : output : 3.3-V LVTTL : : 4 : Y -GND : 85 : gnd : : : : -sdram_addr[6] : 86 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[7] : 87 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[8] : 88 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[9] : 89 : output : 3.3-V LVTTL : : 4 : Y -sdram_addr[11] : 90 : output : 3.3-V LVTTL : : 4 : Y -VCCIO4 : 91 : power : : 3.3V : 4 : -sdram_addr[12] : 92 : output : 3.3-V LVTTL : : 4 : Y -GND : 93 : gnd : : : : -sdram_dq[15] : 94 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[14] : 95 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[13] : 96 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[12] : 97 : bidir : 3.3-V LVTTL : : 4 : Y -VCCIO4 : 98 : power : : 3.3V : 4 : -sdram_dq[11] : 99 : bidir : 3.3-V LVTTL : : 4 : Y -GND : 100 : gnd : : : : -sdram_dq[10] : 101 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[9] : 102 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dq[8] : 103 : bidir : 3.3-V LVTTL : : 4 : Y -sdram_dqm[1] : 104 : output : 3.3-V LVTTL : : 4 : Y -GND* : 105 : : : : 3 : -GND* : 106 : : : : 3 : -GND* : 107 : : : : 3 : -vga_red[0] : 108 : output : 3.3-V LVTTL : : 3 : Y -VCCIO3 : 109 : power : : 3.3V : 3 : -GND* : 110 : : : : 3 : -GND : 111 : gnd : : : : -vga_red[2] : 112 : output : 3.3-V LVTTL : : 3 : Y -vga_red[1] : 113 : output : 3.3-V LVTTL : : 3 : Y -vga_green[1] : 114 : output : 3.3-V LVTTL : : 3 : Y -vga_green[0] : 115 : output : 3.3-V LVTTL : : 3 : Y -vga_blue[0] : 116 : output : 3.3-V LVTTL : : 3 : Y -vga_green[2] : 117 : output : 3.3-V LVTTL : : 3 : Y -vga_blue[2] : 118 : output : 3.3-V LVTTL : : 3 : Y -GND : 119 : gnd : : : : -VCCINT : 120 : power : : 1.2V : : -nSTATUS : 121 : : : : 3 : -VCCIO3 : 122 : power : : 3.3V : 3 : -CONF_DONE : 123 : : : : 3 : -GND : 124 : gnd : : : : -MSEL1 : 125 : : : : 3 : -MSEL0 : 126 : : : : 3 : -vga_blue[1] : 127 : output : 3.3-V LVTTL : : 3 : Y -vga_hs : 128 : output : 3.3-V LVTTL : : 3 : Y -GND+ : 129 : : : : 3 : -GND+ : 130 : : : : 3 : -GND+ : 131 : : : : 3 : -GND+ : 132 : : : : 3 : -vga_vs : 133 : output : 3.3-V LVTTL : : 3 : Y -dm9000_data[6] : 134 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[7] : 135 : bidir : 3.3-V LVTTL : : 3 : Y -VCCIO3 : 136 : power : : 3.3V : 3 : -dm9000_data[4] : 137 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[5] : 138 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[2] : 139 : bidir : 3.3-V LVTTL : : 3 : Y -GND : 140 : gnd : : : : -dm9000_data[3] : 141 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[0] : 142 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[1] : 143 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[15] : 144 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[14] : 145 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[13] : 146 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[12] : 147 : bidir : 3.3-V LVTTL : : 3 : Y -VCCIO3 : 148 : power : : 3.3V : 3 : -dm9000_data[11] : 149 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[10] : 150 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[9] : 151 : bidir : 3.3-V LVTTL : : 3 : Y -dm9000_data[8] : 152 : bidir : 3.3-V LVTTL : : 3 : Y -GND : 153 : gnd : : : : -GND_PLL2 : 154 : gnd : : : : -VCCD_PLL2 : 155 : power : : 1.2V : : -GND_PLL2 : 156 : gnd : : : : -VCCA_PLL2 : 157 : power : : 1.2V : : -GNDA_PLL2 : 158 : gnd : : : : -GND : 159 : gnd : : : : -dm9000_cmd : 160 : output : 3.3-V LVTTL : : 2 : Y -dm9000_int : 161 : input : 3.3-V LVTTL : : 2 : Y -dm9000_rd_n : 162 : output : 3.3-V LVTTL : : 2 : Y -dm9000_wr_n : 163 : output : 3.3-V LVTTL : : 2 : Y -dm9000_rst_n : 164 : output : 3.3-V LVTTL : : 2 : Y -dm9000_cs_n : 165 : output : 3.3-V LVTTL : : 2 : Y -VCCIO2 : 166 : power : : 3.3V : 2 : -GND : 167 : gnd : : : : -GND* : 168 : : : : 2 : -GND* : 169 : : : : 2 : -GND* : 170 : : : : 2 : -GND* : 171 : : : : 2 : -VCCIO2 : 172 : power : : 3.3V : 2 : -GND* : 173 : : : : 2 : -GND : 174 : gnd : : : : -GND* : 175 : : : : 2 : -GND* : 176 : : : : 2 : -GND : 177 : gnd : : : : -VCCINT : 178 : power : : 1.2V : : -GND* : 179 : : : : 2 : -seven_seg[7] : 180 : output : 3.3-V LVTTL : : 2 : N -GND* : 181 : : : : 2 : -GND* : 182 : : : : 2 : -VCCIO2 : 183 : power : : 3.3V : 2 : -GND : 184 : gnd : : : : -seven_seg[3] : 185 : output : 3.3-V LVTTL : : 2 : N -GND : 186 : gnd : : : : -seven_seg[5] : 187 : output : 3.3-V LVTTL : : 2 : N -GND* : 188 : : : : 2 : -GND* : 189 : : : : 2 : -VCCINT : 190 : power : : 1.2V : : -GND* : 191 : : : : 2 : -GND* : 192 : : : : 2 : -seven_seg[1] : 193 : output : 3.3-V LVTTL : : 2 : N -VCCIO2 : 194 : power : : 3.3V : 2 : -seven_seg[4] : 195 : output : 3.3-V LVTTL : : 2 : N -GND : 196 : gnd : : : : -GND* : 197 : : : : 2 : -GND* : 198 : : : : 2 : -seven_seg[6] : 199 : output : 3.3-V LVTTL : : 2 : N -GND* : 200 : : : : 2 : -GND* : 201 : : : : 2 : -VCCIO2 : 202 : power : : 3.3V : 2 : -GND* : 203 : : : : 2 : -GND : 204 : gnd : : : : -GND* : 205 : : : : 2 : -GND* : 206 : : : : 2 : -GND* : 207 : : : : 2 : -GND* : 208 : : : : 2 : diff --git a/hardware/pong3.qpf b/hardware/pong3.qpf deleted file mode 100644 index f9a4fa2..0000000 --- a/hardware/pong3.qpf +++ /dev/null @@ -1,30 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 1991-2012 Altera Corporation -# Your use of Altera Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License -# Subscription Agreement, Altera MegaCore Function License -# Agreement, or other applicable license agreement, including, -# without limitation, that your use is for the sole purpose of -# programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the -# applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus II 32-bit -# Version 12.0 Build 178 05/31/2012 SJ Web Edition -# Date created = 21:48:38 September 12, 2013 -# -# -------------------------------------------------------------------------- # - -QUARTUS_VERSION = "12.0" -DATE = "21:48:38 September 12, 2013" - -# Revisions - -PROJECT_REVISION = "pong3" diff --git a/hardware/pong3.qsf b/hardware/pong3.qsf deleted file mode 100644 index 0523c4d..0000000 --- a/hardware/pong3.qsf +++ /dev/null @@ -1,151 +0,0 @@ -# -------------------------------------------------------------------------- # -# -# Copyright (C) 1991-2012 Altera Corporation -# Your use of Altera Corporation's design tools, logic functions -# and other software and tools, and its AMPP partner logic -# functions, and any output files from any of the foregoing -# (including device programming or simulation files), and any -# associated documentation or information are expressly subject -# to the terms and conditions of the Altera Program License -# Subscription Agreement, Altera MegaCore Function License -# Agreement, or other applicable license agreement, including, -# without limitation, that your use is for the sole purpose of -# programming logic devices manufactured by Altera and sold by -# Altera or its authorized distributors. Please refer to the -# applicable agreement for further details. -# -# -------------------------------------------------------------------------- # -# -# Quartus II 32-bit -# Version 12.0 Build 178 05/31/2012 SJ Web Edition -# Date created = 21:48:38 September 12, 2013 -# -# -------------------------------------------------------------------------- # -# -# Notes: -# -# 1) The default values for assignments are stored in the file: -# pong3.qdf -# If this file doesn't exist, see file: -# assignment_defaults.qdf -# -# 2) Altera recommends that you do not modify this file. This -# file is updated automatically by the Quartus II software -# and any changes you make may be lost or overwritten. -# -# -------------------------------------------------------------------------- # - - -set_global_assignment -name FAMILY "Cyclone II" -set_global_assignment -name DEVICE EP2C8Q208C8 -set_global_assignment -name TOP_LEVEL_ENTITY pong3 -set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0 -set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38 SEPTEMBER 12, 2013" -set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" -set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 -set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 -set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" -set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208 -set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 -set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 -set_location_assignment PIN_40 -to seg[6] -set_location_assignment PIN_37 -to seg[5] -set_location_assignment PIN_43 -to seg[4] -set_location_assignment PIN_44 -to seg[3] -set_location_assignment PIN_39 -to seg[2] -set_location_assignment PIN_35 -to seg[1] -set_location_assignment PIN_34 -to seg[0] -set_location_assignment PIN_23 -to clk -set_location_assignment PIN_27 -to rst_n -set_location_assignment PIN_92 -to sdram_addr[12] -set_location_assignment PIN_90 -to sdram_addr[11] -set_location_assignment PIN_75 -to sdram_addr[10] -set_location_assignment PIN_89 -to sdram_addr[9] -set_location_assignment PIN_88 -to sdram_addr[8] -set_location_assignment PIN_87 -to sdram_addr[7] -set_location_assignment PIN_86 -to sdram_addr[6] -set_location_assignment PIN_84 -to sdram_addr[5] -set_location_assignment PIN_82 -to sdram_addr[4] -set_location_assignment PIN_81 -to sdram_addr[3] -set_location_assignment PIN_80 -to sdram_addr[2] -set_location_assignment PIN_77 -to sdram_addr[1] -set_location_assignment PIN_76 -to sdram_addr[0] -set_location_assignment PIN_74 -to sdram_ba[1] -set_location_assignment PIN_72 -to sdram_ba[0] -set_location_assignment PIN_69 -to sdram_cas_n -set_location_assignment PIN_46 -to sdram_cke -set_location_assignment PIN_47 -to sdram_clk -set_location_assignment PIN_45 -to sdram_cs_n -set_location_assignment PIN_94 -to sdram_dq[15] -set_location_assignment PIN_95 -to sdram_dq[14] -set_location_assignment PIN_96 -to sdram_dq[13] -set_location_assignment PIN_97 -to sdram_dq[12] -set_location_assignment PIN_99 -to sdram_dq[11] -set_location_assignment PIN_101 -to sdram_dq[10] -set_location_assignment PIN_102 -to sdram_dq[9] -set_location_assignment PIN_103 -to sdram_dq[8] -set_location_assignment PIN_57 -to sdram_dq[7] -set_location_assignment PIN_58 -to sdram_dq[6] -set_location_assignment PIN_59 -to sdram_dq[5] -set_location_assignment PIN_60 -to sdram_dq[4] -set_location_assignment PIN_61 -to sdram_dq[3] -set_location_assignment PIN_63 -to sdram_dq[2] -set_location_assignment PIN_64 -to sdram_dq[1] -set_location_assignment PIN_67 -to sdram_dq[0] -set_location_assignment PIN_104 -to sdram_dqm[1] -set_location_assignment PIN_56 -to sdram_dqm[0] -set_location_assignment PIN_70 -to sdram_ras_n -set_location_assignment PIN_68 -to sdram_we_n -set_location_assignment PIN_41 -to seg[7] -set_location_assignment PIN_160 -to dm9000_cmd -set_location_assignment PIN_165 -to dm9000_cs_n -set_location_assignment PIN_144 -to dm9000_data[15] -set_location_assignment PIN_145 -to dm9000_data[14] -set_location_assignment PIN_146 -to dm9000_data[13] -set_location_assignment PIN_147 -to dm9000_data[12] -set_location_assignment PIN_149 -to dm9000_data[11] -set_location_assignment PIN_150 -to dm9000_data[10] -set_location_assignment PIN_151 -to dm9000_data[9] -set_location_assignment PIN_152 -to dm9000_data[8] -set_location_assignment PIN_135 -to dm9000_data[7] -set_location_assignment PIN_134 -to dm9000_data[6] -set_location_assignment PIN_138 -to dm9000_data[5] -set_location_assignment PIN_137 -to dm9000_data[4] -set_location_assignment PIN_141 -to dm9000_data[3] -set_location_assignment PIN_139 -to dm9000_data[2] -set_location_assignment PIN_143 -to dm9000_data[1] -set_location_assignment PIN_142 -to dm9000_data[0] -set_location_assignment PIN_162 -to dm9000_rd_n -set_location_assignment PIN_163 -to dm9000_wr_n -set_location_assignment PIN_164 -to dm9000_rst_n -set_location_assignment PIN_161 -to dm9000_int -set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top -set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top -set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top -set_global_assignment -name SEARCH_PATH db/ip/my_sys/ -tag from_archive -set_global_assignment -name SEARCH_PATH db/ip/my_sys/submodules/ -tag from_archive -set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" -set_location_assignment PIN_108 -to vga_red[0] -set_location_assignment PIN_113 -to vga_red[1] -set_location_assignment PIN_112 -to vga_red[2] -set_location_assignment PIN_128 -to vga_hs -set_location_assignment PIN_115 -to vga_green[0] -set_location_assignment PIN_114 -to vga_green[1] -set_location_assignment PIN_117 -to vga_green[2] -set_location_assignment PIN_116 -to vga_blue[0] -set_location_assignment PIN_127 -to vga_blue[1] -set_location_assignment PIN_118 -to vga_blue[2] -set_location_assignment PIN_133 -to vga_vs - -set_global_assignment -name USE_CONFIGURATION_DEVICE ON -set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" -set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO" - - -set_global_assignment -name VERILOG_FILE DM9000A/hdl/DM9000A_IF.v -set_global_assignment -name VERILOG_FILE GPU/hdl/GPU_IF.v -set_global_assignment -name PIN_FILE pong3.pin -set_global_assignment -name VERILOG_FILE pong3.v -set_global_assignment -name QSYS_FILE my_sys.qsys - -set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/hardware/pong3.v b/hardware/pong3.v deleted file mode 100644 index 0328dcc..0000000 --- a/hardware/pong3.v +++ /dev/null @@ -1,112 +0,0 @@ -module pong3( - clk, - rst_n, - - sdram_clk ,//connected to the CLK port of SDRAM - sdram_cke ,//connected to the CKE port of SDRAM - sdram_cs_n ,//connected to the CS_n port of SDRAM - sdram_ras_n ,//connected to the RAS_n port of SDRAM - sdram_cas_n ,//connected to the CAS_n port of SDRAM - sdram_we_n ,//connected to the WE_n port of SDRAM - sdram_ba ,//connected to the BA port of SDRAM - sdram_addr ,//connected to the ADDR port of SDRAM - sdram_dqm ,//connected to the DQM port of SDRAM - sdram_dq ,//connected to the DQ port of SDRAM - - dm9000_int , - dm9000_rst_n, - dm9000_cs_n , - dm9000_cmd , - dm9000_rd_n , - dm9000_wr_n , - dm9000_data , - - vga_hs, - vga_vs, - vga_red, - vga_green, - vga_blue, - - seven_seg - ); - - input clk; - input rst_n; - - output sdram_clk ; - output sdram_cke ; - output sdram_cs_n ; - output sdram_ras_n; - output sdram_cas_n; - output sdram_we_n ; - output [ 1 : 0] sdram_ba ; - output [12 : 0] sdram_addr ; - output [ 1 : 0] sdram_dqm ; - inout [15 : 0] sdram_dq ; - - input dm9000_int ; - output dm9000_rst_n; - output dm9000_cs_n ; - output dm9000_cmd ; - output dm9000_rd_n ; - output dm9000_wr_n ; - inout [15:0] dm9000_data ; - - output [ 7:0] seven_seg; - - - output vga_hs; - output vga_vs; - output [2:0] vga_red; - output [2:0] vga_green; - output [2:0] vga_blue; - - - wire sclk; - - - pll u_pll( - .inclk0(clk ), - .c0 (sclk ), - .c1 (sdram_clk) - ); - - - - my_sys u_my_sys( - .reset_reset_n (rst_n ), - .clk_clk (sclk ), - .sdram_0_wire_addr (sdram_addr ), - .sdram_0_wire_ba (sdram_ba ), - .sdram_0_wire_cas_n(sdram_cas_n), - .sdram_0_wire_cke (sdram_cke ), - .sdram_0_wire_cs_n (sdram_cs_n ), - .sdram_0_wire_dq (sdram_dq ), - .sdram_0_wire_dqm (sdram_dqm ), - .sdram_0_wire_ras_n(sdram_ras_n), - .sdram_0_wire_we_n (sdram_we_n ), - .pio_0_d_export (SEG ), - - - .gpu_0_vga_red(vga_red), - .gpu_0_vga_green(vga_green), - .gpu_0_vga_blue(vga_blue), - .gpu_0_vga_hs(vga_hs), - .gpu_0_vga_vs(vga_vs), - .gpu_0_vga_clk(clk), - - .dm9000a_0_conduit_end_iOSC_50 ( ), - .dm9000a_0_conduit_end_ENET_DATA (dm9000_data ), - .dm9000a_0_conduit_end_ENET_CMD (dm9000_cmd ), - .dm9000a_0_conduit_end_ENET_RD_N (dm9000_rd_n ), - .dm9000a_0_conduit_end_ENET_WR_N (dm9000_wr_n ), - .dm9000a_0_conduit_end_ENET_CS_N (dm9000_cs_n ), - .dm9000a_0_conduit_end_ENET_RST_N(dm9000_rst_n), - .dm9000a_0_conduit_end_ENET_INT (dm9000_int ), - .dm9000a_0_conduit_end_ENET_CLK ( ) - ); - - - - -endmodule diff --git a/hardware/software/pong3/.cproject b/hardware/software/pong3/.cproject deleted file mode 100644 index ae6d1bc..0000000 --- a/hardware/software/pong3/.cproject +++ /dev/null @@ -1,375 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - make - - mem_init_install - true - false - false - - - make - - mem_init_generate - true - false - false - - - make - - help - true - false - false - - - - diff --git a/hardware/software/pong3/.project b/hardware/software/pong3/.project deleted file mode 100644 index 7ab77c7..0000000 --- a/hardware/software/pong3/.project +++ /dev/null @@ -1,96 +0,0 @@ - - - pong3 - - - - - - com.altera.sbtgui.project.makefileBuilder - - - - - com.altera.sbtgui.project.makefileBuilder - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc://pong3} - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.cdt.core.ccnature - com.altera.sbtgui.project.SBTGUINature - com.altera.sbtgui.project.SBTGUIAppNature - com.altera.sbtgui.project.SBTGUIManagedNature - - diff --git a/hardware/software/pong3/DM9000A.C b/hardware/software/pong3/DM9000A.C deleted file mode 100644 index 7380729..0000000 --- a/hardware/software/pong3/DM9000A.C +++ /dev/null @@ -1,239 +0,0 @@ -#include -#include "DM9000A.H" - -#define msleep(msec) usleep(1000*msec); - - -#if 0 -//------------------------------------------------------------------------- -void iow(unsigned int reg, unsigned int data) -{ - IOWR(DM9000A_0_BASE,IO_addr,reg); - //usleep(STD_DELAY); - IOWR(DM9000A_0_BASE,IO_data,data); -} -//------------------------------------------------------------------------- -unsigned int ior(unsigned int reg) -{ - IOWR(DM9000A_0_BASE,IO_addr,reg); - //usleep(STD_DELAY); - return IORD(DM9000A_0_BASE,IO_data); -} -//------------------------------------------------------------------------- -void phy_write (unsigned int reg, unsigned int value) -{ - /* set PHY register address into EPAR REG. 0CH */ - iow(0x0C, reg | 0x40); /* PHY register address setting, and DM9000_PHY offset = 0x40 */ - - /* fill PHY WRITE data into EPDR REG. 0EH & REG. 0DH */ - iow(0x0E, ((value >> 8) & 0xFF)); /* PHY data high_byte */ - iow(0x0D, value & 0xFF); /* PHY data low_byte */ - - /* issue PHY + WRITE command = 0xa into EPCR REG. 0BH */ - iow(0x0B, 0x8); /* clear PHY command first */ - IOWR(DM9000A_0_BASE, IO_data, 0x0A); /* issue PHY + WRITE command */ - usleep(STD_DELAY); - IOWR(DM9000A_0_BASE, IO_data, 0x08); /* clear PHY command again */ - usleep(50); /* wait 1~30 us (>20 us) for PHY + WRITE completion */ -} -//------------------------------------------------------------------------- -/* DM9000_init I/O routine */ -unsigned int DM9000_init (void) /* initialize DM9000 LAN chip */ -{ - unsigned int i; - - /* set the internal PHY power-on (GPIOs normal settings) */ - iow(0x1E, 0x01); /* GPCR REG. 1EH = 1 selected GPIO0 "output" port for internal PHY */ - iow(0x1F, 0x00); /* GPR REG. 1FH GEPIO0 Bit [0] = 0 to activate internal PHY */ - msleep(5); /* wait > 2 ms for PHY power-up ready */ - - /* software-RESET NIC */ - iow(NCR, 0x03); /* NCR REG. 00 RST Bit [0] = 1 reset on, and LBK Bit [2:1] = 01b MAC loopback on */ - usleep(20); /* wait > 10us for a software-RESET ok */ - iow(NCR, 0x00); /* normalize */ - iow(NCR, 0x03); - usleep(20); - iow(NCR, 0x00); - - /* set GPIO0=1 then GPIO0=0 to turn off and on the internal PHY */ - iow(0x1F, 0x01); /* GPR PHYPD Bit [0] = 1 turn-off PHY */ - iow(0x1F, 0x00); /* PHYPD Bit [0] = 0 activate phyxcer */ - msleep(10); /* wait >4 ms for PHY power-up */ - - /* set PHY operation mode */ - phy_write(0,PHY_reset); /* reset PHY: registers back to the default states */ - usleep(50); /* wait >30 us for PHY software-RESET ok */ - phy_write(16, 0x404); /* turn off PHY reduce-power-down mode only */ - phy_write(4, PHY_txab); /* set PHY TX advertised ability: ALL + Flow_control */ - phy_write(0, 0x1200); /* PHY auto-NEGO re-start enable (RESTART_AUTO_NEGOTIATION + AUTO_NEGOTIATION_ENABLE) to auto sense and recovery PHY registers */ - //phy_write(0, 0x2000); - msleep(5); /* wait >2 ms for PHY auto-sense linking to partner */ - - /* store MAC address into NIC */ - for (i = 0; i < 6; i++) - iow(16 + i, ether_addr[i]); - - /* clear any pending interrupt */ - iow(ISR, 0x3F); /* clear the ISR status: PRS, PTS, ROS, ROOS 4 bits, by RW/C1 */ - iow(NSR, 0x2C); /* clear the TX status: TX1END, TX2END, WAKEUP 3 bits, by RW/C1 */ - - /* program operating registers~ */ - iow(NCR, NCR_set); /* NCR REG. 00 enable the chip functions (and disable this MAC loopback mode back to normal) */ - iow(0x08, BPTR_set); /* BPTR REG.08 (if necessary) RX Back Pressure Threshold in Half duplex moe only: High Water 3KB, 200 us */ - iow(0x09, FCTR_set); /* FCTR REG.09 (if necessary) Flow Control Threshold setting High/ Low Water Overflow 3KB/ 8KB */ - iow(0x0A, RTFCR_set); /* RTFCR REG.0AH (if necessary) RX/TX Flow Control Register enable TXPEN, BKPM (TX_Half), FLCE (RX) */ - iow(0x0F, 0x00); /* Clear the all Event */ - iow(0x2D, 0x80); /* Switch LED to mode 1 */ - iow(OTCR, OTCR_set); /* 100Mhz Internal clock */ - - //dong added - //iow(0x31, 0x01);//checksum generation enable - //iow(0x32, 0x02);//checksum checking enable, package will not be disscard even if CRC error - - /* set other registers depending on applications */ - iow(ETXCSR, ETXCSR_set); /* Early Transmit 12.5% */ - //iow(TCSCR, TCSCR_set); /* UDP and not IP Checksum activ. */ - - /* enable interrupts to activate DM9000 ~on */ - iow(IMR, INTR_set); /* IMR REG. FFH PAR=1 only, or + PTM=1& PRM=1 enable RxTx interrupts */ - - /* enable RX (Broadcast/ ALL_MULTICAST) ~go */ - iow(RCR , RCR_set | RX_ENABLE | PASS_MULTICAST); /* RCR REG. 05 RXEN Bit [0] = 1 to enable the RX machine/ filter */ - - /* RETURN "DEVICE_SUCCESS" back to upper layer */ - return (ior(0x2D)==0x80) ? DMFE_SUCCESS : DMFE_FAIL; -} -//------------------------------------------------------------------------- -/* Transmit one Packet TX I/O routine */ -unsigned int TransmitPacket(unsigned char *data_ptr,unsigned int tx_len) -{ - unsigned int i; - - /* mask NIC interrupts IMR: PAR only */ - iow(IMR, PAR_set); - - /* issue TX packet's length into TXPLH REG. FDH & TXPLL REG. FCH */ - iow(0xFD, (tx_len >> 8) & 0xFF); /* TXPLH High_byte length */ - iow(0xFC, tx_len & 0xFF); /* TXPLL Low_byte length */ - - /* wirte transmit data to chip SRAM */ - IOWR(DM9000A_0_BASE, IO_addr, MWCMD); /* set MWCMD REG. F8H TX I/O port ready */ - for (i = 0; i < tx_len; i += 2) - { - usleep(STD_DELAY); - IOWR(DM9000A_0_BASE, IO_data, (data_ptr[i+1]<<8)|data_ptr[i] ); - } - - usleep(100); - - /* issue TX polling command activated */ - iow(TCR , TCR_set | TX_REQUEST); /* TXCR Bit [0] TXREQ auto clear after TX completed */ - - /* wait TX transmit done */ - char tx_done = 0; - do - { - tx_done = ior(NSR)&0x0C; - } - while(!tx_done); - //usleep(STD_DELAY); - - /* clear the NSR Register */ - //iow(NSR,0x00); - - /* re-enable NIC interrupts */ - iow(IMR, INTR_set); - - /* RETURN "TX_SUCCESS" to upper layer */ - return DMFE_SUCCESS; -} -//------------------------------------------------------------------------- -/* Receive One Packet I/O routine */ -unsigned int ReceivePacket (unsigned char *data_ptr,unsigned int *rx_len) -{ - unsigned char rx_READY,GoodPacket; - unsigned int Tmp, RxStatus, i; - - RxStatus = rx_len[0] = 0; - GoodPacket=FALSE; - - iow(ISR, 0x01); - - /* mask NIC interrupts IMR: PAR only */ - iow(IMR, PAR_set); - - /* dummy read a byte from MRCMDX REG. F0H */ - rx_READY = ior(MRCMDX)&0x03; - - /* got most updated byte: rx_READY */ - rx_READY = IORD(DM9000A_0_BASE,IO_data)&0x03; - usleep(STD_DELAY); - - /* check if (rx_READY == 0x01): Received Packet READY? */ - if (rx_READY == DM9000_PKT_READY) - { - /* got RX_Status & RX_Length from RX SRAM */ - IOWR(DM9000A_0_BASE, IO_addr, MRCMD); /* set MRCMD REG. F2H RX I/O port ready */ - usleep(STD_DELAY); - RxStatus = IORD(DM9000A_0_BASE,IO_data); - usleep(STD_DELAY); - rx_len[0] = IORD(DM9000A_0_BASE,IO_data); - - /* Check this packet_status GOOD or BAD? */ - if ( !(RxStatus & 0xBF00) && (rx_len[0] < MAX_PACKET_SIZE) ) - { - /* read 1 received packet from RX SRAM into RX buffer */ - for (i = 0; i < rx_len[0]; i += 2) - { - usleep(STD_DELAY); - Tmp = IORD(DM9000A_0_BASE, IO_data); - data_ptr[i] = Tmp&0xFF; - data_ptr[i+1] = (Tmp>>8)&0xFF; - } - GoodPacket=TRUE; - } /* end if (GoodPacket) */ - else - { - printf("\nError\n"); - /* this packet is bad, dump it from RX SRAM */ - for (i = 0; i < rx_len[0]; i += 2) - { - usleep(STD_DELAY); - Tmp = IORD(DM9000A_0_BASE, IO_data); - } - rx_len[0] = 0; - } /* end if (!GoodPacket) */ - } /* end if (rx_READY == DM9000_PKT_READY) ok */ - else if(rx_READY) /* status check first byte: rx_READY Bit[1:0] must be "00"b or "01"b */ - { - printf(" RX failure!\n"); - /* software-RESET NIC */ - iow(NCR, 0x03); /* NCR REG. 00 RST Bit [0] = 1 reset on, and LBK Bit [2:1] = 01b MAC loopback on */ - usleep(20); /* wait > 10us for a software-RESET ok */ - iow(NCR, 0x00); /* normalize */ - iow(NCR, 0x03); - usleep(20); - iow(NCR, 0x00); - /* program operating registers~ */ - iow(NCR, NCR_set); /* NCR REG. 00 enable the chip functions (and disable this MAC loopback mode back to normal) */ - iow(0x08, BPTR_set); /* BPTR REG.08 (if necessary) RX Back Pressure Threshold in Half duplex moe only: High Water 3KB, 600 us */ - iow(0x09, FCTR_set); /* FCTR REG.09 (if necessary) Flow Control Threshold setting High/ Low Water Overflow 5KB/ 10KB */ - iow(0x0A, RTFCR_set); /* RTFCR REG.0AH (if necessary) RX/TX Flow Control Register enable TXPEN, BKPM (TX_Half), FLCE (RX) */ - iow(0x0F, 0x00); /* Clear the all Event */ - iow(0x2D, 0x80); /* Switch LED to mode 1 */ - iow(OTCR, OTCR_set); /* 100Mhz Internal clock */ - /* set other registers depending on applications */ - iow(ETXCSR, ETXCSR_set); /* Early Transmit 12.5% */ - /* enable interrupts to activate DM9000 ~on */ - iow(IMR, INTR_set); /* IMR REG. FFH PAR=1 only, or + PTM=1& PRM=1 enable RxTx interrupts */ - /* enable RX (Broadcast/ ALL_MULTICAST) ~go */ - iow(RCR , RCR_set | RX_ENABLE | PASS_MULTICAST); /* RCR REG. 05 RXEN Bit [0] = 1 to enable the RX machine/ filter */ - } /* end NIC H/W system Data-Bus error */ - - /* re-enable NIC interrupts */ - iow(IMR, INTR_set); - - return GoodPacket ? DMFE_SUCCESS : DMFE_FAIL; -} -//------------------------------------------------------------------------- -#endif diff --git a/hardware/software/pong3/DM9000A.H b/hardware/software/pong3/DM9000A.H deleted file mode 100644 index 47401f1..0000000 --- a/hardware/software/pong3/DM9000A.H +++ /dev/null @@ -1,72 +0,0 @@ -#ifndef __DM9000A_H__ -#define __DM9000A_H__ - -#define IO_addr 0 -#define IO_data 1 - -#define NCR 0x00 /* Network Control Register REG. 00 */ -#define NSR 0x01 /* Network Status Register REG. 01 */ -#define TCR 0x02 /* Transmit Control Register REG. 02 */ -#define RCR 0x05 /* Receive Control Register REG. 05 */ -#define ETXCSR 0x30 /* TX early Control Register REG. 30 */ -#define MRCMDX 0xF0 /* RX FIFO I/O port command READ for dummy read a byte from RX SRAM */ -#define MRCMD 0xF2 /* RX FIFO I/O port command READ from RX SRAM */ -#define MWCMD 0xF8 /* TX FIFO I/O port command WRITE into TX FIFO */ -#define ISR 0xFE /* NIC Interrupt Status Register REG. FEH */ -#define IMR 0xFF /* NIC Interrupt Mask Register REG. FFH */ -#define OTCR 0x2E /* NIC Operation Test Control Register REG. 2EH */ -#define TCSCR 0x31 /* Transmit Check Sum Control Register REG. 31H */ - -#define NCR_set 0x00 -#define TCR_set 0x00 -#define TX_REQUEST 0x01 /* TCR REG. 02 TXREQ Bit [0] = 1 polling Transmit Request command */ -#define TCR_long 0x40 /* packet disable TX Jabber Timer */ -#define RCR_set 0x30 /* skip CRC_packet and skip LONG_packet */ -#define RX_ENABLE 0x01 /* RCR REG. 05 RXEN Bit [0] = 1 to enable RX machine */ -#define RCR_long 0x40 /* packet disable RX Watchdog Timer */ -#define PASS_MULTICAST 0x08 /* RCR REG. 05 PASS_ALL_MULTICAST Bit [3] = 1: RCR_set value ORed 0x08 */ -#define BPTR_set 0x37 /* BPTR REG. 08 RX Back Pressure Threshold: High Water Overflow Threshold setting 3KB and Jam_Pattern_Time = 200 us */ -#define FCTR_set 0x38 /* FCTR REG. 09 High/ Low Water Overflow Threshold setting 3KB/ 8KB */ -#define RTFCR_set 0x29 /* RTFCR REG. 0AH RX/TX Flow Control Register enable TXPEN + BKPM(TX_Half) + FLCE(RX) */ -#define ETXCSR_set 0x80 /* Early Transmit Bit [7] Enable and Threshold 0~3: 12.5%, 25%, 50%, 75% */ -#define INTR_set 0x81 /* IMR REG. FFH: PAR +PRM, or 0x81: PAR + PRM + PTM */ -#define PAR_set 0x80 /* IMR REG. FFH: PAR only, RX/TX FIFO R/W Pointer Auto Return enable */ -#define OTCR_set 0x80 /* System Clock set = 100Mhz */ -#define TCSCR_set 0x00 /* UDP TCP IP auto send check */ - -#define PHY_reset 0x8000 /* PHY reset: some registers back to default value */ -#define PHY_txab 0x05e1 /* set PHY TX advertised ability: Full-capability + Flow-control (if necessary) */ -#define PHY_mode 0x3100 /* set PHY media mode: Auto negotiation (AUTO sense) */ - -#define STD_DELAY 20 /* standard delay 20 us */ - -#define DMFE_SUCCESS 0 -#define DMFE_FAIL 1 - -#define TRUE 1 -#define FALSE 0 - -#define DM9000_PKT_READY 0x01 /* packets ready to receive */ -#define PACKET_MIN_SIZE 0x40 /* Received packet min size */ -#define MAX_PACKET_SIZE 1522 /* RX largest legal size packet with fcs & QoS */ -#define DM9000_PKT_MAX 3072 /* TX 1 packet max size without 4-byte CRC */ -//------------------------------------------------------------------------- -unsigned char ether_addr[6]={ 0x01, 0x60, 0x6E, 0x11, 0x02, 0x0F }; -//------------------------------------------------------------------------- -void iow(unsigned int reg, unsigned int data); -unsigned int ior(unsigned int reg); -void phy_write(unsigned int reg, unsigned int value); -/* DM9000_init I/O routine */ -unsigned int DM9000_init (void); -/* Transmit One Packet TX I/O routine */ -unsigned int TransmitPacket(unsigned char *data_ptr,unsigned int tx_len); -/* Receive One Packet I/O routine */ -unsigned int ReceivePacket (unsigned char *data_ptr,unsigned int *rx_len); -//------------------------------------------------------------------------- - -#endif - - - - - diff --git a/hardware/software/pong3/Makefile b/hardware/software/pong3/Makefile deleted file mode 100644 index 0aeadd9..0000000 --- a/hardware/software/pong3/Makefile +++ /dev/null @@ -1,1088 +0,0 @@ -#------------------------------------------------------------------------------ -# VARIABLES APPENDED TO BY INCLUDED MAKEFILE FRAGMENTS -#------------------------------------------------------------------------------ - -# List of include directories for -I compiler option (-I added when used). -# Includes the BSP. -ALT_INCLUDE_DIRS := - -# List of library directories for -L linker option (-L added when used). -# Includes the BSP. -ALT_LIBRARY_DIRS := - -# List of library names for -l linker option (-l added when used). -# Includes the BSP. -ALT_LIBRARY_NAMES := - -# List of library names for -msys-lib linker option (-msys-lib added when used). -# These are libraries that might be located in the BSP and depend on the BSP -# library, or vice versa -ALT_BSP_DEP_LIBRARY_NAMES := - -# List of dependencies for the linker. This is usually the full pathname -# of each library (*.a) file. -# Includes the BSP. -ALT_LDDEPS := - -# List of root library directories that support running make to build them. -# Includes the BSP and any ALT libraries. -MAKEABLE_LIBRARY_ROOT_DIRS := - -# Generic flags passed to the compiler for different types of input files. -ALT_CFLAGS := -ALT_CXXFLAGS := -ALT_CPPFLAGS := -ALT_ASFLAGS := -ALT_LDFLAGS := - - -#------------------------------------------------------------------------------ -# The adjust-path macro -# -# If COMSPEC/ComSpec is defined, Make is launched from Windows through -# Cygwin. The adjust-path macro converts absolute windows paths into -# unix style paths (Example: c:/dir -> /c/dir). This will ensture -# paths are readable by GNU Make. -# -# If COMSPEC/ComSpec is not defined, Make is launched from linux, and no -# adjustment is necessary -# -#------------------------------------------------------------------------------ - -ifndef COMSPEC -ifdef ComSpec -COMSPEC = $(ComSpec) -endif # ComSpec -endif # COMSPEC - -ifdef COMSPEC # if Windows OS - -ifeq ($(MAKE_VERSION),3.81) -# -# adjust-path/adjust-path-mixed for Mingw Gnu Make on Windows -# -# Example Usage: -# $(call adjust-path,c:/aaa/bbb) => /c/aaa/bbb -# $(call adjust-path-mixed,/c/aaa/bbb) => c:/aaa/bbb -# $(call adjust-path-mixed,/cygdrive/c/aaa/bbb) => c:/aaa/bbb -# - -# -# adjust-path -# - converts back slash characters into forward slashes -# - if input arg ($1) is an empty string then return the empty string -# - if input arg ($1) does not contain the string ":/", then return input arg -# - using sed, convert mixed path [c:/...] into mingw path [/c/...] -define adjust-path -$(strip \ -$(if $1,\ -$(if $(findstring :/,$(subst \,/,$1)),\ -$(shell echo $(subst \,/,$1) | sed -e 's,^\([a-zA-Z]\):/,/\1/,'),\ -$(subst \,/,$1)))) -endef - -# -# adjust-path-mixed -# - converts back slash characters into forward slashes -# - if input arg ($1) is an empty string then return the empty string -# - if input arg ($1) does not begin with a forward slash '/' char, then -# return input arg -# - using sed, convert mingw path [/c/...] or cygwin path [/c/cygdrive/...] -# into a mixed path [c:/...] -define adjust-path-mixed -$(strip \ -$(if $1,\ -$(if $(findstring $(subst \,/,$1),$(patsubst /%,%,$(subst \,/,$1))),\ -$(subst \,/,$1),\ -$(shell echo $(subst \,/,$1) | sed -e 's,^/cygdrive/\([a-zA-Z]\)/,\1:/,' -e 's,^/\([a-zA-Z]\)/,\1:/,')))) -endef - -else # MAKE_VERSION != 3.81 (MAKE_VERSION == 3.80 or MAKE_VERSION == 3.79) -# -# adjust-path for Cygwin Gnu Make -# $(call adjust-path,c:/aaa/bbb) = /cygdrive/c/aaa/bbb -# $(call adjust-path-mixed,/cygdrive/c/aaa/bbb) = c:/aaa/bbb -# -adjust-path = $(if $1,$(shell cygpath -u "$1"),) -adjust-path-mixed = $(if $1,$(shell cygpath -m "$1"),) -endif - -else # !COMSPEC - -adjust-path = $1 -adjust-path-mixed = $1 - -endif # COMSPEC - - -#vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv -# GENERATED SETTINGS START v -#vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv - -#START GENERATED -ACTIVE_BUILD_CONFIG := default -BUILD_CONFIGS := default - -# The following TYPE comment allows tools to identify the 'type' of target this -# makefile is associated with. -# TYPE: APP_MAKEFILE - -# This following VERSION comment indicates the version of the tool used to -# generate this makefile. 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This is required -# to provide the initial memory contents of FPGA memories that can be -# initialized by the programming file (.sof) or Hardcopy ROMs. It is also used -# for VHDL simulation of on-chip memories. - -# Defining SOPC_NAME causes the mem_init_install target to copy memory -# initialization files into your RTL simulation directory. This is required -# to provide the initial memory contents of all memories that can be -# initialized by RTL simulation. This variable should be set to the same name -# as your SOPC Builder system name. For example, if you have a system called -# "foo.sopc", this variable should be set to "foo". - -# If SOPC_NAME is not set and QUARTUS_PROJECT_DIR is set, then derive SOPC_NAME. -ifeq ($(SOPC_NAME),) -ifneq ($(QUARTUS_PROJECT_DIR),) -SOPC_NAME := $(basename $(notdir $(wildcard $(QUARTUS_PROJECT_DIR)/*.sopcinfo))) -endif -endif - -# Defining JDI_FILE is required to specify the JTAG Debug Information File -# path. This file is generated by Quartus, and is needed along with the -# .sopcinfo file to resolve processor instance ID's from names in a multi-CPU -# systems. For multi-CPU systems, the processor instance ID is used to select -# from multiple CPU's during ELF download. - -# Both JDI_FILE and SOPCINFO_FILE are provided by the BSP if they found during -# BSP creation. If JDI_FILE is not set and QUARTUS_PROJECT_DIR is set, then -# derive JDI_FILE. We do not attempt to derive SOPCINFO_FILE since there may be -# multiple .sopcinfo files in a Quartus project. -ifeq ($(JDI_FILE),) -ifneq ($(QUARTUS_PROJECT_DIR),) -JDI_FILE := $(wildcard $(QUARTUS_PROJECT_DIR)/*.jdi) -endif -endif - -# Path to root runtime directory used for hdl simulation -RUNTIME_ROOT_DIR := $(CONFIG_OBJ_DIR)/runtime - - - -#------------------------------------------------------------------------------ -# MAKEFILE INCLUDES DEPENDENT ON GENERATED CONTENT -#------------------------------------------------------------------------------ -# mem_init.mk is a generated makefile fragment. This file defines all targets -# used to generate HDL initialization simulation files and pre-initialized -# onchip memory files. -MEM_INIT_FILE := $(BSP_ROOT_DIR)/mem_init.mk -include $(MEM_INIT_FILE) - -# Create list of object files to be built using the list of source files. -# The source file hierarchy is preserved in the object tree. -# The supported file extensions are: -# -# .c - for C files -# .cxx .cc .cpp - for C++ files -# .S .s - for assembler files -# -# Handle source files specified by --src-dir & --src-rdir differently, to -# save some processing time in calling the adjust-path macro. - -OBJ_LIST_C := $(patsubst %.c,%.o,$(filter %.c,$(C_SRCS))) -OBJ_LIST_CPP := $(patsubst %.cpp,%.o,$(filter %.cpp,$(CXX_SRCS))) -OBJ_LIST_CXX := $(patsubst %.cxx,%.o,$(filter %.cxx,$(CXX_SRCS))) -OBJ_LIST_CC := $(patsubst %.cc,%.o,$(filter %.cc,$(CXX_SRCS))) -OBJ_LIST_S := $(patsubst %.S,%.o,$(filter %.S,$(ASM_SRCS))) -OBJ_LIST_SS := $(patsubst %.s,%.o,$(filter %.s,$(ASM_SRCS))) - -OBJ_LIST := $(sort $(OBJ_LIST_C) $(OBJ_LIST_CPP) $(OBJ_LIST_CXX) \ - $(OBJ_LIST_CC) $(OBJ_LIST_S) $(OBJ_LIST_SS)) - -SDIR_OBJ_LIST_C := $(patsubst %.c,%.o,$(filter %.c,$(SDIR_C_SRCS))) -SDIR_OBJ_LIST_CPP := $(patsubst %.cpp,%.o,$(filter %.cpp,$(SDIR_CXX_SRCS))) -SDIR_OBJ_LIST_CXX := $(patsubst %.cxx,%.o,$(filter %.cxx,$(SDIR_CXX_SRCS))) -SDIR_OBJ_LIST_CC := $(patsubst %.cc,%.o,$(filter %.cc,$(SDIR_CXX_SRCS))) -SDIR_OBJ_LIST_S := $(patsubst %.S,%.o,$(filter %.S,$(SDIR_ASM_SRCS))) -SDIR_OBJ_LIST_SS := $(patsubst %.s,%.o,$(filter %.s,$(SDIR_ASM_SRCS))) - -SDIR_OBJ_LIST := $(sort $(SDIR_OBJ_LIST_C) $(SDIR_OBJ_LIST_CPP) \ - $(SDIR_OBJ_LIST_CXX) $(SDIR_OBJ_LIST_CC) $(SDIR_OBJ_LIST_S) \ - $(SDIR_OBJ_LIST_SS)) - -# Relative-pathed objects that being with "../" are handled differently. -# -# Regular objects are created as -# $(CONFIG_OBJ_DIR)//.o -# where the path structure is maintained under the obj directory. This -# applies for both absolute and relative paths; in the absolute path -# case this means the entire source path will be recreated under the obj -# directory. This is done to allow two source files with the same name -# to be included as part of the project. -# -# Note: On Cygwin, the path recreated under the obj directory will be -# the cygpath -u output path. -# -# Relative-path objects that begin with "../" cause problems under this -# scheme, as $(CONFIG_OBJ_DIR)/..// can potentially put the object -# files anywhere in the system, creating clutter and polluting the source tree. -# As such, their paths are flattened - the object file created will be -# $(CONFIG_OBJ_DIR)/.o. Due to this, two files specified with -# "../" in the beginning cannot have the same name in the project. VPATH -# will be set for these sources to allow make to relocate the source file -# via %.o rules. -# -# The following lines separate the object list into the flatten and regular -# lists, and then handles them as appropriate. - -FLATTEN_OBJ_LIST := $(filter ../%,$(OBJ_LIST)) -FLATTEN_APP_OBJS := $(addprefix $(CONFIG_OBJ_DIR)/,$(notdir $(FLATTEN_OBJ_LIST))) - -REGULAR_OBJ_LIST := $(filter-out $(FLATTEN_OBJ_LIST),$(OBJ_LIST)) -REGULAR_OBJ_LIST_C := $(filter $(OBJ_LIST_C),$(REGULAR_OBJ_LIST)) -REGULAR_OBJ_LIST_CPP := $(filter $(OBJ_LIST_CPP),$(REGULAR_OBJ_LIST)) -REGULAR_OBJ_LIST_CXX := $(filter $(OBJ_LIST_CXX),$(REGULAR_OBJ_LIST)) -REGULAR_OBJ_LIST_CC := $(filter $(OBJ_LIST_CC),$(REGULAR_OBJ_LIST)) -REGULAR_OBJ_LIST_S := $(filter $(OBJ_LIST_S),$(REGULAR_OBJ_LIST)) -REGULAR_OBJ_LIST_SS := $(filter $(OBJ_LIST_SS),$(REGULAR_OBJ_LIST)) - -FLATTEN_SDIR_OBJ_LIST := $(filter ../%,$(SDIR_OBJ_LIST)) -FLATTEN_SDIR_APP_OBJS := $(addprefix $(CONFIG_OBJ_DIR)/,$(notdir $(FLATTEN_SDIR_OBJ_LIST))) - -REGULAR_SDIR_OBJ_LIST := $(filter-out $(FLATTEN_SDIR_OBJ_LIST),$(SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_C := $(filter $(SDIR_OBJ_LIST_C),$(REGULAR_SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_CPP := $(filter $(SDIR_OBJ_LIST_CPP),$(REGULAR_SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_CXX := $(filter $(SDIR_OBJ_LIST_CXX),$(REGULAR_SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_CC := $(filter $(SDIR_OBJ_LIST_CC),$(REGULAR_SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_S := $(filter $(SDIR_OBJ_LIST_S),$(REGULAR_SDIR_OBJ_LIST)) -REGULAR_SDIR_OBJ_LIST_SS := $(filter $(SDIR_OBJ_LIST_SS),$(REGULAR_SDIR_OBJ_LIST)) - -VPATH := $(sort $(dir $(FLATTEN_OBJ_LIST)) $(dir $(FLATTEN_SDIR_OBJ_LIST))) - -APP_OBJS_C := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_C) \ - $(foreach s,$(REGULAR_OBJ_LIST_C),$(call adjust-path,$s))) - -APP_OBJS_CPP := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_CPP) \ - $(foreach s,$(REGULAR_OBJ_LIST_CPP),$(call adjust-path,$s))) - -APP_OBJS_CXX := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_CXX) \ - $(foreach s,$(REGULAR_OBJ_LIST_CXX),$(call adjust-path,$s))) - -APP_OBJS_CC := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_CC) \ - $(foreach s,$(REGULAR_OBJ_LIST_CC),$(call adjust-path,$s))) - -APP_OBJS_S := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_S) \ - $(foreach s,$(REGULAR_OBJ_LIST_S),$(call adjust-path,$s))) - -APP_OBJS_SS := $(addprefix $(CONFIG_OBJ_DIR)/,\ - $(REGULAR_SDIR_OBJ_LIST_SS) \ - $(foreach s,$(REGULAR_OBJ_LIST_SS),$(call adjust-path,$s))) - -APP_OBJS := $(APP_OBJS_C) $(APP_OBJS_CPP) $(APP_OBJS_CXX) $(APP_OBJS_CC) \ - $(APP_OBJS_S) $(APP_OBJS_SS) \ - $(FLATTEN_APP_OBJS) $(FLATTEN_SDIR_APP_OBJS) - -# Add any extra user-provided object files. -APP_OBJS += $(OBJS) - -# Create list of dependancy files for each object file. -APP_DEPS := $(APP_OBJS:.o=.d) - -# Patch the Elf file with system specific information - -# Patch the Elf with the name of the sopc system -ifneq ($(SOPC_NAME),) -ELF_PATCH_FLAG += --sopc_system_name $(SOPC_NAME) -endif - -# Patch the Elf with the absolute path to the Quartus Project Directory -ifneq ($(QUARTUS_PROJECT_DIR),) -ABS_QUARTUS_PROJECT_DIR := $(call adjust-path-mixed,$(shell cd "$(QUARTUS_PROJECT_DIR)"; pwd)) -ELF_PATCH_FLAG += --quartus_project_dir "$(ABS_QUARTUS_PROJECT_DIR)" -endif - -# Patch the Elf and download args with the JDI_FILE if specified -ifneq ($(wildcard $(JDI_FILE)),) -ELF_PATCH_FLAG += --jdi $(JDI_FILE) -DOWNLOAD_JDI_FLAG := --jdi $(JDI_FILE) -endif - -# Patch the Elf with the SOPCINFO_FILE if specified -ifneq ($(wildcard $(SOPCINFO_FILE)),) -ELF_PATCH_FLAG += --sopcinfo $(SOPCINFO_FILE) -endif - -# Use the DOWNLOAD_CABLE variable to specify which JTAG cable to use. -# This is not needed if you only have one cable. -ifneq ($(DOWNLOAD_CABLE),) -DOWNLOAD_CABLE_FLAG := --cable '$(DOWNLOAD_CABLE)' -endif - - -#------------------------------------------------------------------------------ -# BUILD PRE/POST PROCESS -#------------------------------------------------------------------------------ -build_pre_process : - $(BUILD_PRE_PROCESS) - -build_post_process : - $(BUILD_POST_PROCESS) - -.PHONY: build_pre_process build_post_process - - -#------------------------------------------------------------------------------ -# TOOLS -#------------------------------------------------------------------------------ - -# -# Set tool default variables if not already defined. -# If these are defined, they would typically be defined in an -# included makefile fragment. -# -ifeq ($(DEFAULT_CROSS_COMPILE),) -DEFAULT_CROSS_COMPILE := nios2-elf- -endif - -ifeq ($(DEFAULT_STACK_REPORT),) -DEFAULT_STACKREPORT := nios2-stackreport -endif - -ifeq ($(DEFAULT_DOWNLOAD),) -DEFAULT_DOWNLOAD := nios2-download -endif - -ifeq ($(DEFAULT_FLASHPROG),) -DEFAULT_FLASHPROG := nios2-flash-programmer -endif - -ifeq ($(DEFAULT_ELFPATCH),) -DEFAULT_ELFPATCH := nios2-elf-insert -endif - -ifeq ($(DEFAULT_RM),) -DEFAULT_RM := rm -f -endif - -ifeq ($(DEFAULT_CP),) -DEFAULT_CP := cp -f -endif - -ifeq ($(DEFAULT_MKDIR),) -DEFAULT_MKDIR := mkdir -p -endif - -# -# Set tool variables to defaults if not already defined. -# If these are defined, they would typically be defined by a -# setting in the generated portion of this makefile. -# -ifeq ($(CROSS_COMPILE),) -CROSS_COMPILE := $(DEFAULT_CROSS_COMPILE) -endif - -ifeq ($(origin CC),default) -CC := $(CROSS_COMPILE)gcc -xc -endif - -ifeq ($(origin CXX),default) -CXX := $(CROSS_COMPILE)gcc -xc++ -endif - -ifeq ($(origin AS),default) -AS := $(CROSS_COMPILE)gcc -endif - -ifeq ($(origin AR),default) -AR := $(CROSS_COMPILE)ar -endif - -ifeq ($(origin LD),default) -LD := $(CROSS_COMPILE)g++ -endif - -ifeq ($(origin NM),default) -NM := $(CROSS_COMPILE)nm -endif - -ifeq ($(origin RM),default) -RM := $(DEFAULT_RM) -endif - -ifeq ($(origin CP),default) -CP := $(DEFAULT_CP) -endif - -ifeq ($(OBJDUMP),) -OBJDUMP := $(CROSS_COMPILE)objdump -endif - -ifeq ($(OBJCOPY),) -OBJCOPY := $(CROSS_COMPILE)objcopy -endif - -ifeq ($(STACKREPORT),) -ifeq ($(CROSS_COMPILE),nios2-elf-) -STACKREPORT := $(DEFAULT_STACKREPORT) -else -DISABLE_STACKREPORT := 1 -endif -endif - -ifeq ($(DOWNLOAD),) -DOWNLOAD := $(DEFAULT_DOWNLOAD) -endif - -ifeq ($(FLASHPROG),) -FLASHPROG := $(DEFAULT_FLASHPROG) -endif - -ifeq ($(ELFPATCH),) -ELFPATCH := $(DEFAULT_ELFPATCH) -endif - -ifeq ($(MKDIR),) -MKDIR := $(DEFAULT_MKDIR) -endif - -#------------------------------------------------------------------------------ -# PATTERN RULES TO BUILD OBJECTS -#------------------------------------------------------------------------------ - -define compile.c -@$(ECHO) Info: Compiling $< to $@ -@$(MKDIR) $(@D) -$(CC) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $< -$(CC_POST_PROCESS) -endef - -define compile.cpp -@$(ECHO) Info: Compiling $< to $@ -@$(MKDIR) $(@D) -$(CXX) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< -$(CXX_POST_PROCESS) -endef - -# If assembling with the compiler, ensure "-Wa," is prepended to all APP_ASFLAGS -ifeq ($(AS),$(patsubst %as,%,$(AS))) -COMMA := , -APP_ASFLAGS := $(filter-out $(APP_CFLAGS),$(addprefix -Wa$(COMMA),$(patsubst -Wa$(COMMA)%,%,$(APP_ASFLAGS)))) -endif - -define compile.s -@$(ECHO) Info: Assembling $< to $@ -@$(MKDIR) $(@D) -$(AS) -MP -MMD -c $(APP_CPPFLAGS) $(APP_CFLAGS) $(APP_ASFLAGS) -o $@ $< -$(AS_POST_PROCESS) -endef - -ifeq ($(MAKE_VERSION),3.81) -.SECONDEXPANSION: - -$(APP_OBJS_C): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.c) - $(compile.c) - -$(APP_OBJS_CPP): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cpp) - $(compile.cpp) - -$(APP_OBJS_CC): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cc) - $(compile.cpp) - -$(APP_OBJS_CXX): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.cxx) - $(compile.cpp) - -$(APP_OBJS_S): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.S) - $(compile.s) - -$(APP_OBJS_SS): $(CONFIG_OBJ_DIR)/%.o: $$(call adjust-path-mixed,%.s) - $(compile.s) - -endif # MAKE_VERSION != 3.81 - -$(CONFIG_OBJ_DIR)/%.o: %.c - $(compile.c) - -$(CONFIG_OBJ_DIR)/%.o: %.cpp - $(compile.cpp) - -$(CONFIG_OBJ_DIR)/%.o: %.cc - $(compile.cpp) - -$(CONFIG_OBJ_DIR)/%.o: %.cxx - $(compile.cpp) - -$(CONFIG_OBJ_DIR)/%.o: %.S - $(compile.s) - -$(CONFIG_OBJ_DIR)/%.o: %.s - $(compile.s) - - -#------------------------------------------------------------------------------ -# PATTERN RULES TO INTERMEDIATE FILES -#------------------------------------------------------------------------------ - -$(CONFIG_OBJ_DIR)/%.s: %.c - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CC) -S $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.s: %.cpp - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.s: %.cc - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.s: %.cxx - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -S $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.i: %.c - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CC) -E $(APP_CPPFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.i: %.cpp - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.i: %.cc - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - -$(CONFIG_OBJ_DIR)/%.i: %.cxx - @$(ECHO) Info: Compiling $< to $@ - @$(MKDIR) $(@D) - $(CXX) -E $(APP_CPPFLAGS) $(APP_CXXFLAGS) $(APP_CFLAGS) -o $@ $< - - -#------------------------------------------------------------------------------ -# TARGET RULES -#------------------------------------------------------------------------------ - -.PHONY : help -help : - @$(ECHO) "Summary of Makefile targets" - @$(ECHO) " Build targets:" - @$(ECHO) " all (default) - Application and all libraries (including BSP)" - @$(ECHO) " bsp - Just the BSP" - @$(ECHO) " libs - All libraries (including BSP)" - @$(ECHO) " flash - All flash files" - @$(ECHO) " mem_init_generate - All memory initialization files" -ifeq ($(QSYS),1) - @$(ECHO) " mem_init_install - This target is deprecated for QSys Systems" - @$(ECHO) " --> Use the mem_init_generate target and then" - @$(ECHO) " add the generated meminit.qip file to your" - @$(ECHO) " Quartus II Project." -else # if QSYS != 1 - @$(ECHO) " mem_init_install - Copy memory initialization files to Quartus II project" -endif # QSYS == 1 - @$(ECHO) - @$(ECHO) " Clean targets:" - @$(ECHO) " clean_all - Application and all libraries (including BSP)" - @$(ECHO) " clean - Just the application" - @$(ECHO) " clean_bsp - Just the BSP" - @$(ECHO) " clean_libs - All libraries (including BSP)" - @$(ECHO) - @$(ECHO) " Run targets:" - @$(ECHO) " download-elf - Download and run your elf executable" - @$(ECHO) " program-flash - Program flash contents to the board" - -# Handy rule to skip making libraries and just make application. -.PHONY : app -app : $(ELF) - -ifeq ($(CREATE_OBJDUMP), 1) -app : $(OBJDUMP_NAME) -endif - -ifeq ($(CREATE_ELF_DERIVED_FILES),1) -app : elf_derived_files -endif - -.PHONY: elf_derived_files -elf_derived_files: default_mem_init - -# Handy rule for making just the BSP. -.PHONY : bsp -bsp : - @$(ECHO) Info: Building $(BSP_ROOT_DIR) - @$(MAKE) --no-print-directory -C $(BSP_ROOT_DIR) - - -# Make sure all makeable libraries (including the BSP) are up-to-date. -LIB_TARGETS := $(patsubst %,%-recurs-make-lib,$(MAKEABLE_LIBRARY_ROOT_DIRS)) - -.PHONY : libs -libs : $(LIB_TARGETS) - -ifneq ($(strip $(LIB_TARGETS)),) -$(LIB_TARGETS): %-recurs-make-lib: - @$(ECHO) Info: Building $* - $(MAKE) --no-print-directory -C $* -endif - -ifneq ($(strip $(APP_LDDEPS)),) -$(APP_LDDEPS): libs - @true -endif - -# Rules to force your project to rebuild or relink -# .force_relink file will cause any application that depends on this project to relink -# .force_rebuild file will cause this project to rebuild object files -# .force_rebuild_all file will cause this project and any project that depends on this project to rebuild object files - -FORCE_RELINK_DEP := .force_relink -FORCE_REBUILD_DEP := .force_rebuild -FORCE_REBUILD_ALL_DEP := .force_rebuild_all -FORCE_REBUILD_DEP_LIST := $(CONFIG_OBJ_DIR)/$(FORCE_RELINK_DEP) $(CONFIG_OBJ_DIR)/$(FORCE_REBUILD_DEP) $(FORCE_REBUILD_ALL_DEP) - -$(FORCE_REBUILD_DEP_LIST): - -$(APP_OBJS): $(wildcard $(CONFIG_OBJ_DIR)/$(FORCE_REBUILD_DEP)) $(wildcard $(addsuffix /$(FORCE_REBUILD_ALL_DEP), . $(ALT_LIBRARY_DIRS))) - -$(ELF): $(wildcard $(addsuffix /$(FORCE_RELINK_DEP), $(CONFIG_OBJ_DIR) $(ALT_LIBRARY_DIRS))) - - -# Clean just the application. -.PHONY : clean -ifeq ($(CREATE_ELF_DERIVED_FILES),1) -clean : clean_elf_derived_files -endif - -clean : - @$(RM) -r $(ELF) $(OBJDUMP_NAME) $(LINKER_MAP_NAME) $(OBJ_ROOT_DIR) $(RUNTIME_ROOT_DIR) $(FORCE_REBUILD_DEP_LIST) - @$(ECHO) [$(APP_NAME) clean complete] - -# Clean just the BSP. -.PHONY : clean_bsp -clean_bsp : - @$(ECHO) Info: Cleaning $(BSP_ROOT_DIR) - @$(MAKE) --no-print-directory -C $(BSP_ROOT_DIR) clean - -# Clean all makeable libraries including the BSP. -LIB_CLEAN_TARGETS := $(patsubst %,%-recurs-make-clean-lib,$(MAKEABLE_LIBRARY_ROOT_DIRS)) - -.PHONY : clean_libs -clean_libs : $(LIB_CLEAN_TARGETS) - -ifneq ($(strip $(LIB_CLEAN_TARGETS)),) -$(LIB_CLEAN_TARGETS): %-recurs-make-clean-lib: - @$(ECHO) Info: Cleaning $* - $(MAKE) --no-print-directory -C $* clean -endif - -.PHONY: clean_elf_derived_files -clean_elf_derived_files: mem_init_clean - -# Clean application and all makeable libraries including the BSP. -.PHONY : clean_all -clean_all : clean mem_init_clean clean_libs - -# Include the dependency files unless the make goal is performing a clean -# of the application. -ifneq ($(firstword $(MAKECMDGOALS)),clean) -ifneq ($(firstword $(MAKECMDGOALS)),clean_all) --include $(APP_DEPS) -endif -endif - -.PHONY : download-elf -download-elf : $(ELF) - @if [ "$(DOWNLOAD)" = "none" ]; \ - then \ - $(ECHO) Downloading $(ELF) not supported; \ - else \ - $(ECHO) Info: Downloading $(ELF); \ - $(DOWNLOAD) --go --cpu_name=$(CPU_NAME) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) $(DOWNLOAD_JDI_FLAG) $(WRITE_GMON_OPTION) $(ELF); \ - fi - -# Delete the target of a rule if it has changed and its commands exit -# with a nonzero exit status. -.DELETE_ON_ERROR: - -# Rules for flash programming commands -PROGRAM_FLASH_SUFFIX := -program -PROGRAM_FLASH_TARGET := $(addsuffix $(PROGRAM_FLASH_SUFFIX), $(FLASH_FILES)) - -.PHONY : program-flash -program-flash : $(PROGRAM_FLASH_TARGET) - -.PHONY : $(PROGRAM_FLASH_TARGET) -$(PROGRAM_FLASH_TARGET) : flash - @if [ "$(FLASHPROG)" = "none" ]; \ - then \ - $(ECHO) Programming flash not supported; \ - else \ - $(ECHO) Info: Programming $(basename $@).flash; \ - if [ -z "$($(basename $@)_EPCS_FLAGS)" ]; \ - then \ - $(ECHO) $(FLASHPROG) $(SOPC_SYSID_FLAG) --base=$($(basename $@)_START) $(basename $@).flash; \ - $(FLASHPROG) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) --base=$($(basename $@)_START) $(basename $@).flash; \ - else \ - $(ECHO) $(FLASHPROG) $(SOPC_SYSID_FLAG) --epcs --base=$($(basename $@)_START) $(basename $@).flash; \ - $(FLASHPROG) $(DOWNLOAD_CABLE_FLAG) $(SOPC_SYSID_FLAG) --epcs --base=$($(basename $@)_START) $(basename $@).flash; \ - fi \ - fi - - -# Rules for simulating with an HDL Simulator [QSYS only] -ifeq ($(QSYS),1) -IP_MAKE_SIMSCRIPT := ip-make-simscript - -ifeq ($(VSIM),) -VSIM_EXE := "$(if $(VSIM_DIR),$(VSIM_DIR)/,)vsim" -ifeq ($(ENABLE_VSIM_GUI),1) -VSIM := $(VSIM_EXE) -gui -else -VSIM := $(VSIM_EXE) -c -endif # ENABLE_VSIM_GUI == 1 -endif # VSIM not set - -ifeq ($(SPD),) -ifneq ($(ABS_QUARTUS_PROJECT_DIR),) -ifneq ($(SOPC_NAME),) -SPD := $(ABS_QUARTUS_PROJECT_DIR)/$(SOPC_NAME)_tb.spd -endif # SOPC_NAME set -endif # ABS_QUARTUS_PROJECT_DIR set -endif # SPD == empty string - -ifeq ($(MSIM_SCRIPT),) -SIM_SCRIPT_DIR := $(RUNTIME_ROOT_DIR)/sim -MSIM_SCRIPT := $(SIM_SCRIPT_DIR)/mentor/msim_setup.tcl -endif # MSIM_SCRIPT == empty string - -ifeq ($(MAKE_VERSION),3.81) -ABS_MEM_INIT_DESCRIPTOR_FILE := $(abspath $(MEM_INIT_DESCRIPTOR_FILE)) -else -ABS_MEM_INIT_DESCRIPTOR_FILE := $(call adjust-path-mixed,$(shell pwd))/$(MEM_INIT_DESCRIPTOR_FILE) -endif - -$(MSIM_SCRIPT): $(SPD) $(MEM_INIT_DESCRIPTOR_FILE) -ifeq ($(SPD),) - $(error No SPD file specified. Ensure QUARTUS_PROJECT_DIR variable is set) -endif - @$(MKDIR) $(SIM_SCRIPT_DIR) - $(IP_MAKE_SIMSCRIPT) --spd=$(SPD) --spd=$(MEM_INIT_DESCRIPTOR_FILE) --output-directory=$(SIM_SCRIPT_DIR) - -VSIM_COMMAND = \ - cd $(dir $(MSIM_SCRIPT)) && \ - $(VSIM) -do "do $(notdir $(MSIM_SCRIPT)); ld; $(if $(VSIM_RUN_TIME),run ${VSIM_RUN_TIME};quit;)" - -.PHONY: sim -sim: $(MSIM_SCRIPT) mem_init_generate -ifeq ($(MSIM_SCRIPT),) - $(error MSIM_SCRIPT not set) -endif - $(VSIM_COMMAND) - -endif # QSYS == 1 - - -#------------------------------------------------------------------------------ -# ELF TARGET RULE -#------------------------------------------------------------------------------ -# Rule for constructing the executable elf file. -$(ELF) : $(APP_OBJS) $(LINKER_SCRIPT) $(APP_LDDEPS) - @$(ECHO) Info: Linking $@ - $(LD) $(APP_LDFLAGS) $(APP_CFLAGS) -o $@ $(filter-out $(CRT0),$(APP_OBJS)) $(APP_LIBS) $(APP_BSP_DEP_LIBS) -ifneq ($(DISABLE_ELFPATCH),1) - $(ELFPATCH) $@ $(ELF_PATCH_FLAG) -endif -ifneq ($(DISABLE_STACKREPORT),1) - @bash -c "$(STACKREPORT) $@" -endif - -$(OBJDUMP_NAME) : $(ELF) - @$(ECHO) Info: Creating $@ - $(OBJDUMP) $(OBJDUMP_FLAGS) $< >$@ - -# Rule for printing the name of the elf file -.PHONY: print-elf-name -print-elf-name: - @$(ECHO) $(ELF) - - diff --git a/hardware/software/pong3/create-this-app b/hardware/software/pong3/create-this-app deleted file mode 100755 index fe6b3f4..0000000 --- a/hardware/software/pong3/create-this-app +++ /dev/null @@ -1,114 +0,0 @@ -#!/bin/bash -# -# This script creates the blank_project application in this directory. - - -BSP_DIR=../pong3_bsp -QUARTUS_PROJECT_DIR=../../ -NIOS2_APP_GEN_ARGS="--elf-name pong3.elf --no-src --set OBJDUMP_INCLUDE_SOURCE 1" - - -# First, check to see if $SOPC_KIT_NIOS2 environmental variable is set. -# This variable is required for the command line tools to execute correctly. -if [ -z "${SOPC_KIT_NIOS2}" ] -then - echo Required \$SOPC_KIT_NIOS2 Environmental Variable is not set! - exit 1 -fi - - -# Also make sure that the APP has not been created already. Check for -# existence of Makefile in the app directory -if [ -f ./Makefile ] -then - echo Application has already been created! Delete Makefile if you want to create a new application makefile - exit 1 -fi - - -# We are selecting hal_default bsp because it supports this application. -# Check to see if the hal_default has already been generated by checking for -# existence of the public.mk file. If not, we need to run -# create-this-bsp file to generate the bsp. -if [ ! -f ${BSP_DIR}/public.mk ]; then - # Since BSP doesn't exist, create the BSP - # Pass any command line arguments passed to this script to the BSP. - pushd ${BSP_DIR} >> /dev/null - ./create-this-bsp "$@" || { - echo "create-this-bsp failed" - exit 1 - } - popd >> /dev/null -fi - - -# Don't run make if create-this-app script is called with --no-make arg -SKIP_MAKE= -while [ $# -gt 0 ] -do - case "$1" in - --no-make) - SKIP_MAKE=1 - ;; - esac - shift -done - - -# Now we also need to go copy the sources for this application to the -# local directory. -find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name '*.c' -or -name '*.h' -or -name 'hostfs*' | xargs -i cp -L {} ./ || { - echo "failed during copying example source files" - exit 1 -} - -find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name 'readme.txt' -or -name 'Readme.txt' | xargs -i cp -L {} ./ || { - echo "failed copying readme file" -} - -if [ -d "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" ] -then - cp -RL "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" . || { - echo "failed during copying project support files" - exit 1 - } -fi - -chmod -R +w . || { - echo "failed during changing file permissions" - exit 1 -} - -cmd="nios2-app-generate-makefile --bsp-dir ${BSP_DIR} --set QUARTUS_PROJECT_DIR=${QUARTUS_PROJECT_DIR} ${NIOS2_APP_GEN_ARGS}" - -echo "create-this-app: Running \"${cmd}\"" -$cmd || { - echo "nios2-app-generate-makefile failed" - exit 1 -} - -if [ -z "$SKIP_MAKE" ]; then - cmd="make" - - echo "create-this-app: Running \"$cmd\"" - $cmd || { - echo "make failed" - exit 1 - } - - echo - echo "To download and run the application:" - echo " 1. Make sure the board is connected to the system." - echo " 2. Run 'nios2-configure-sof ' to configure the FPGA with the hardware design." - echo " 3. If you have a stdio device, run 'nios2-terminal' in a different shell." - echo " 4. Run 'make download-elf' from the application directory." - echo - echo "To debug the application:" - echo " Import the project into Nios II Software Build Tools for Eclipse." - echo " Refer to Nios II Software Build Tools for Eclipse Documentation for more information." - echo - echo -e "" -fi - - -exit 0 diff --git a/hardware/software/pong3/hello_led.c b/hardware/software/pong3/hello_led.c deleted file mode 100644 index 9f472d7..0000000 --- a/hardware/software/pong3/hello_led.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * - * - * - * - */ -#include -#include -#include -#include -#include -#include "system.h" -#include "DM9000A.H" -#include "DM9000A.C" -//#include "sys/alt_irq.h" -#include <../src/alt_irq_register.c> - -#if 0 -unsigned int rx_len,i,packet_num,rx_cnt,tx_cnt; - - -#define data_lenght 1468 // Maximun Data lenght 1468 bytes -#define flenght (data_lenght+0x2E) //Total packet lenght - - unsigned char SND[flenght]; // Payload buffer - - unsigned char RX_DATA[flenght]; // Payload buffer - -//------------------------------------------------------------------------- -/* DM9000_init I/O routine */ - -//------------------------------------------------------------------------- -//------------------------------------------------------------------------- -//------------------------------------------------------------------------- - -void UDP_Init(void) - { - unsigned int IPsource_1,IPsource_2,IPsource_3,IPsource_4; - unsigned int IPdestination_1,IPdestination_2,IPdestination_3,IPdestination_4; - unsigned int IPchecksum1,IPchecksum2,IPchecksum3,IPchecksum4,IPchecksum5; - unsigned int Mac_source1, Mac_source2, Mac_source3, Mac_source4, Mac_source5, Mac_source6; - unsigned int Mac_dest1, Mac_dest2, Mac_dest3, Mac_dest4, Mac_dest5, Mac_dest6; - unsigned int lenght_h, lenght_l; - unsigned int IPlenght_h, IPlenght_l, IPlenght; - - IPsource_1 = 192; // Assign ie: 192.168.0.44 IP for the CD0 - IPsource_2 = 168; - IPsource_3 = 0; - IPsource_4 = 44; - - IPdestination_1 = 192; // Insert your IP data here - IPdestination_2 = 168; - IPdestination_3 = 0; - IPdestination_4 = 55; - - Mac_dest1 = 0xF4; // Insert your MAC address data here - Mac_dest2 = 0x6D; - Mac_dest3 = 0x04; - Mac_dest4 = 0x20; - Mac_dest5 = 0x9F; - Mac_dest6 = 0xF1; -// Mac_dest1 = 0XFF; // Insert your MAC address data here -// Mac_dest2 = 0xFF; -// Mac_dest3 = 0xFF; -// Mac_dest4 = 0xFF; -// Mac_dest5 = 0xFF; -// Mac_dest6 = 0xFF; - Mac_source1 = 0x01; // Assign an MAC address for DE2 - Mac_source2 = 0x60; - Mac_source3 = 0x6E; - Mac_source4 = 0x11; - Mac_source5 = 0x02; - Mac_source6 = 0x0F; - - lenght_h = ((data_lenght+8) & 0xFF00)>>8; // Convert in H byte and L byte - lenght_l = ((data_lenght+8) & 0x00FF); - - IPlenght = data_lenght + 8 + 20; // IP Lenght for IP header - IPlenght_h = (IPlenght & 0xFF00)>>8; // Convert in H byte and L byte - IPlenght_l = (IPlenght & 0x00FF); - // Calculating the IP checksum - IPchecksum1 = 0x0000C511 + (IPsource_1<<8)+IPsource_2+(IPsource_3<<8)+IPsource_4+ - (IPdestination_1<<8)+IPdestination_2+(IPdestination_3<<8)+(IPdestination_4)+ - (IPlenght_h<<8) + IPlenght_l; - IPchecksum2 = ((IPchecksum1&0x0000FFFF)+(IPchecksum1>>16)); - IPchecksum3 = 0x0000FFFF - IPchecksum2; - IPchecksum4 = (IPchecksum3 & 0xFF00)>>8; - IPchecksum5 = (IPchecksum3 & 0x00FF); - - unsigned char TXT[flenght] = { Mac_dest1, Mac_dest2, Mac_dest3, Mac_dest4 ,Mac_dest5, Mac_dest6, - Mac_source1, Mac_source2, Mac_source3, Mac_source4, Mac_source5, Mac_source6, - 0x08, 0x00, 0x45, 0x00, IPlenght_h, IPlenght_l, - 0x00, 0x00, 0x00, 0x00, 0x80, 0x11, - IPchecksum4, IPchecksum5, IPsource_1, IPsource_2, IPsource_3, IPsource_4, - IPdestination_1, IPdestination_2, IPdestination_3, IPdestination_4, 0x04, 0x00, - 0x04, 0x00, lenght_h, lenght_l, 0x00, 0x00}; - - for (i = 0; i < 42; i++) // Load the TXT[] in the SND (ethernet packet). - SND[i] = TXT[i]; - - for (i = 42; i < flenght-4; i++) // generating the data to send. - SND[i] = i-42; - - SND[i++] = 0x35; // This checksum is not correct... but also the net recieve the packets correctly. - SND[i++] = 0x15; // To do, calculate checksum. - SND[i++] = 0xF0; - SND[i++] = 0x13; - - - } - -void ethernet_interrupts(void) -{ - - ReceivePacket(RX_DATA,&rx_len); - rx_cnt++; - int j; - for(j=0;j -#include -#include -#include -#include -#include "system.h" - -#define msleep(msec) usleep(1000*msec); - -static void -gpu_write (unsigned int reg, unsigned int data) -{ - IOWR (GPU_0_BASE, reg << 2, data); -} - -static int -find_intersection (int x, int y, int xd, int yd, int t) -{ - - // super lazy - we should use the power of MATHS - - while (x != t) - { - x += xd; - y += yd; - - if (y < 0) - y = 0; - if (y > 479) - y = 479; - if ((y == 479) || (y == 0)) - yd = -yd; - - if ((x == 639) || (x == 0)) - xd = -xd; - } - - return y; -} - -static int -dir (int a, int b) -{ - if (a > b) - return 1; - if (a < b) - return -1; - return 0; -} - -static void -move_bat (int *b, int db) -{ - - *b += dir (db, *b); - if (*b < 20) - *b = 20; - if (*b > 459) - *b = 459; - -} - -static void -load_sprite (void) -{ - // RRR GGG BBB - // set the sprite color 111 010 000 - orange - gpu_write (4, 0x01D0); - - // squirt the bromium logo into the sprite - gpu_write (0x10, 0x00C0); - gpu_write (0x11, 0x03E0); - gpu_write (0x12, 0x0FF8); - gpu_write (0x13, 0x1FFE); - gpu_write (0x14, 0x3FC7); - gpu_write (0x15, 0x3F83); - gpu_write (0x16, 0x3933); - gpu_write (0x17, 0x3987); - gpu_write (0x18, 0x3D37); - gpu_write (0x19, 0x3D37); - gpu_write (0x1a, 0x3D87); - gpu_write (0x1b, 0x3FFF); - gpu_write (0x1c, 0x1FFE); - gpu_write (0x1d, 0x07F8); - gpu_write (0x1e, 0x01E0); - gpu_write (0x1f, 0x00C0); -} - -int -main (void) -{ - int x, y, xd, yd; - int bat0, dbat0; - int bat1, dbat1; - int missed = 0; - - printf ("Working...\n"); - msleep (500); - srand (12392184); - - bat0 = 100; - bat1 = 200; - - load_sprite (); - - while (1) - { - x = 1; - y = 1; - xd = 1; - yd = 1; - - dbat0 = find_intersection (x + xd, y + yd, xd, yd, 0); - dbat1 = find_intersection (x + xd, y + yd, xd, yd, 639); - - while (!missed) - { - x += xd; - y += yd; - if (y < 0) - y = 0; - if (y > 479) - y = 479; - if ((y == 479) || (y == 0)) - yd = -yd; - - if ((x == 639) || (x == 0)) - { - xd = -xd; - yd = rand () % 7; - yd -= 3; - dbat0 = find_intersection (x + xd, y + yd, xd, yd, 0); - dbat1 = find_intersection (x + xd, y + yd, xd, yd, 639); - } - - move_bat (&bat0, dbat0); - move_bat (&bat1, dbat1); - - - gpu_write (0, x); - gpu_write (1, y); - - gpu_write (2, bat0); - gpu_write (3, bat1); - - msleep (2); - } - } -} - -//------------------------------------------------------------------------- diff --git a/hardware/software/pong3/readme.txt b/hardware/software/pong3/readme.txt deleted file mode 100644 index 57f6738..0000000 --- a/hardware/software/pong3/readme.txt +++ /dev/null @@ -1,11 +0,0 @@ -This template is starting point for creating a project based on your custom C code. -It will provide you a default project to which you can add your software files. To -add files to a project, manually copy the file into the application directory (e.g. -using Windows Explorer), then right click on your application project and select -refresh. - -You can also add files to the project using the Nios II Software Build Tools for Eclipse import function. -Select File -> Import. -Expand General and select File System in the Import Window and click Next. -Identify the appropriate source and destination directories. -Check the files you want to add and click Finish. diff --git a/hardware/software/pong3_bsp/.cproject b/hardware/software/pong3_bsp/.cproject deleted file mode 100644 index e441cd1..0000000 --- a/hardware/software/pong3_bsp/.cproject +++ /dev/null @@ -1,348 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/hardware/software/pong3_bsp/.project b/hardware/software/pong3_bsp/.project deleted file mode 100644 index 16e64e8..0000000 --- a/hardware/software/pong3_bsp/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - pong3_bsp - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc://pong3_bsp} - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - org.eclipse.cdt.core.ccnature - com.altera.sbtgui.project.SBTGUINature - com.altera.sbtgui.project.SBTGUIBspNature - - diff --git a/hardware/software/pong3_bsp/Makefile b/hardware/software/pong3_bsp/Makefile deleted file mode 100644 index d40fcef..0000000 --- a/hardware/software/pong3_bsp/Makefile +++ /dev/null @@ -1,786 +0,0 @@ -#------------------------------------------------------------------------------ -# BSP MAKEFILE -# -# This makefile was automatically generated by the nios2-bsp-generate-files -# command. Its purpose is to build a custom Board Support Package (BSP) -# targeting a specific Nios II processor in an SOPC Builder-based design. -# -# To create an application or library Makefile which uses this BSP, try the -# nios2-app-generate-makefile or nios2-lib-generate-makefile commands. -#------------------------------------------------------------------------------ - -#------------------------------------------------------------------------------ -# TOOLS -#------------------------------------------------------------------------------ - -MKDIR := mkdir -p -ECHO := echo -SPACE := $(empty) $(empty) - -#------------------------------------------------------------------------------ -# The adjust-path macro -# -# If COMSPEC is defined, Make is launched from Windows through -# Cygwin. This adjust-path macro will call 'cygpath -u' on all -# paths to ensure they are readable by Make. -# -# If COMSPEC is not defined, Make is launched from *nix, and no adjustment -# is necessary -#------------------------------------------------------------------------------ - -ifndef COMSPEC -ifdef ComSpec -COMSPEC = $(ComSpec) -endif # ComSpec -endif # !COMSPEC - -ifdef COMSPEC - adjust-path = $(subst $(SPACE),\$(SPACE),$(shell cygpath -u "$1")) - adjust-path-mixed = $(subst $(SPACE),\$(SPACE),$(shell cygpath -m "$1")) -else - adjust-path = $(subst $(SPACE),\$(SPACE),$1) - adjust-path-mixed = $(subst $(SPACE),\$(SPACE),$1) -endif - -#------------------------------------------------------------------------------ -# DEFAULT TARGET -# -# The default target, "all", must appear before any other target in the -# Makefile. Note that extra prerequisites are added to the "all" rule later. -#------------------------------------------------------------------------------ -.PHONY: all -all: - @$(ECHO) [BSP build complete] - - -#------------------------------------------------------------------------------ -# PATHS & DIRECTORY NAMES -# -# Explicitly locate absolute path of the BSP root -#------------------------------------------------------------------------------ - -BSP_ROOT_DIR := . - -# Define absolute path to the root of the BSP. -ABS_BSP_ROOT := $(call adjust-path-mixed,$(shell pwd)) - -# Stash all BSP object files here -OBJ_DIR := ./obj - -NEWLIB_DIR = $(BSP_ROOT_DIR)/newlib - - -#------------------------------------------------------------------------------ -# MANAGED CONTENT -# -# All content between the lines "START MANAGED" and "END MANAGED" below is -# generated based on variables in the BSP settings file when the -# nios2-bsp-generate-files command is invoked. If you wish to persist any -# information pertaining to the build process, it is recomended that you -# utilize the BSP settings mechanism to do so. -# -# Note that most variable assignments in this section have a corresponding BSP -# setting that can be changed by using the nios2-bsp-create-settings or -# nios2-bsp-update-settings command before nios2-bsp-generate-files; if you -# want any variable set to a specific value when this Makefile is re-generated -# (to prevent hand-edits from being over-written), use the BSP settings -# facilities above. -#------------------------------------------------------------------------------ - -#START MANAGED - -# The following TYPE comment allows tools to identify the 'type' of target this -# makefile is associated with. -# TYPE: BSP_PRIVATE_MAKEFILE - -# This following VERSION comment indicates the version of the tool used to -# generate this makefile. A makefile variable is provided for VERSION as well. -# ACDS_VERSION: 13.0sp1 -ACDS_VERSION := 13.0sp1 - -# This following BUILD_NUMBER comment indicates the build number of the tool -# used to generate this makefile. -# BUILD_NUMBER: 232 - -SETTINGS_FILE := settings.bsp -SOPC_FILE := ../../my_sys.sopcinfo - -#------------------------------------------------------------------------------- -# TOOL & COMMAND DEFINITIONS -# -# The base command for each build operation are expressed here. Additional -# switches may be expressed here. They will run for all instances of the -# utility. -#------------------------------------------------------------------------------- - -# Archiver command. Creates library files. -AR = nios2-elf-ar - -# Assembler command. Note that CC is used for .S files. -AS = nios2-elf-gcc - -# Custom flags only passed to the archiver. This content of this variable is -# directly passed to the archiver rather than the more standard "ARFLAGS". The -# reason for this is that GNU Make assumes some default content in ARFLAGS. -# This setting defines the value of BSP_ARFLAGS in Makefile. -BSP_ARFLAGS = -src - -# Custom flags only passed to the assembler. This setting defines the value of -# BSP_ASFLAGS in Makefile. -BSP_ASFLAGS = -Wa,-gdwarf2 - -# C/C++ compiler debug level. '-g' provides the default set of debug symbols -# typically required to debug a typical application. Omitting '-g' removes -# debug symbols from the ELF. This setting defines the value of -# BSP_CFLAGS_DEBUG in Makefile. -BSP_CFLAGS_DEBUG = -g - -# C/C++ compiler optimization level. "-O0" = no optimization,"-O2" = "normal" -# optimization, etc. "-O0" is recommended for code that you want to debug since -# compiler optimization can remove variables and produce non-sequential -# execution of code while debugging. This setting defines the value of -# BSP_CFLAGS_OPTIMIZATION in Makefile. -BSP_CFLAGS_OPTIMIZATION = -O0 - -# C/C++ compiler warning level. "-Wall" is commonly used.This setting defines -# the value of BSP_CFLAGS_WARNINGS in Makefile. -BSP_CFLAGS_WARNINGS = -Wall - -# C compiler command. -CC = nios2-elf-gcc -xc - -# C++ compiler command. -CXX = nios2-elf-gcc -xc++ - -# Command used to remove files during 'clean' target. -RM = rm -f - - -#------------------------------------------------------------------------------- -# BUILD PRE & POST PROCESS COMMANDS -# -# The following variables are treated as shell commands in the rule -# definitions for each file-type associated with the BSP build, as well as -# commands run at the beginning and end of the entire BSP build operation. -# Pre-process commands are executed before the relevant command (for example, -# a command defined in the "CC_PRE_PROCESS" variable executes before the C -# compiler for building .c files), while post-process commands are executed -# immediately afterwards. -# -# You can view each pre/post-process command in the "Build Rules: All & -# Clean", "Pattern Rules to Build Objects", and "Library Rules" sections of -# this Makefile. -#------------------------------------------------------------------------------- - - -#------------------------------------------------------------------------------- -# BSP SOURCE BUILD SETTINGS (FLAG GENERATION) -# -# Software build settings such as compiler optimization, debug level, warning -# flags, etc., may be defined in the following variables. The variables below -# are concatenated together in the 'Flags' section of this Makefile to form -# final variables of flags passed to the build tools. -# -# These settings are considered private to the BSP and apply to all library & -# driver files in it; they do NOT automatically propagate to, for example, the -# build settings for an application. -# # For additional detail and syntax requirements, please refer to GCC help -# (example: "nios2-elf-gcc --help --verbose"). -# -# Unless indicated otherwise, multiple entries in each variable should be -# space-separated. -#------------------------------------------------------------------------------- - -# Altera HAL alt_sys_init.c generated source file -GENERATED_C_FILES := $(ABS_BSP_ROOT)/alt_sys_init.c -GENERATED_C_LIB_SRCS += alt_sys_init.c - - -#------------------------------------------------------------------------------- -# BSP SOURCE FILE LISTING -# -# All source files that comprise the BSP are listed here, along with path -# information to each file expressed relative to the BSP root. The precise -# list and location of each file is derived from the driver, operating system, -# or software package source file declarations. -# -# Following specification of the source files for each component, driver, etc., -# each source file type (C, assembly, etc.) is concatenated together and used -# to construct a list of objects. Pattern rules to build each object are then -# used to build each file. -#------------------------------------------------------------------------------- - -# altera_avalon_epcs_flash_controller_driver sources root -altera_avalon_epcs_flash_controller_driver_SRCS_ROOT := drivers - -# altera_avalon_epcs_flash_controller_driver sources -altera_avalon_epcs_flash_controller_driver_C_LIB_SRCS := \ - $(altera_avalon_epcs_flash_controller_driver_SRCS_ROOT)/src/altera_avalon_epcs_flash_controller.c \ - $(altera_avalon_epcs_flash_controller_driver_SRCS_ROOT)/src/epcs_commands.c \ - $(altera_avalon_epcs_flash_controller_driver_SRCS_ROOT)/src/altera_avalon_spi.c - -# altera_avalon_jtag_uart_driver sources root -altera_avalon_jtag_uart_driver_SRCS_ROOT := drivers - -# altera_avalon_jtag_uart_driver sources -altera_avalon_jtag_uart_driver_C_LIB_SRCS := \ - $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_init.c \ - $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_read.c \ - $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_write.c \ - $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_ioctl.c \ - $(altera_avalon_jtag_uart_driver_SRCS_ROOT)/src/altera_avalon_jtag_uart_fd.c - -# altera_avalon_pio_driver sources root -altera_avalon_pio_driver_SRCS_ROOT := drivers - -# altera_avalon_pio_driver sources -# altera_avalon_timer_driver sources root -altera_avalon_timer_driver_SRCS_ROOT := drivers - -# altera_avalon_timer_driver sources -altera_avalon_timer_driver_C_LIB_SRCS := \ - $(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_sc.c \ - $(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_ts.c \ - $(altera_avalon_timer_driver_SRCS_ROOT)/src/altera_avalon_timer_vars.c - -# altera_nios2_qsys_hal_driver sources root -altera_nios2_qsys_hal_driver_SRCS_ROOT := HAL - -# altera_nios2_qsys_hal_driver sources -altera_nios2_qsys_hal_driver_C_LIB_SRCS := \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/altera_nios2_qsys_irq.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_usleep.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_busy_sleep.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_irq_vars.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_icache_flush.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_icache_flush_all.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_dcache_flush.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_all.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_dcache_flush_no_writeback.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_instruction_exception_entry.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_irq_register.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_iic.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_remap_cached.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_remap_uncached.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_uncached_free.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_uncached_malloc.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_do_ctors.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_do_dtors.c \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_gmon.c - -altera_nios2_qsys_hal_driver_ASM_LIB_SRCS := \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_exception_entry.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_exception_trap.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_exception_muldiv.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_irq_entry.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_software_exception.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_mcount.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/alt_log_macro.S \ - $(altera_nios2_qsys_hal_driver_SRCS_ROOT)/src/crt0.S - -# hal sources root -hal_SRCS_ROOT := HAL - -# hal sources -hal_C_LIB_SRCS := \ - $(hal_SRCS_ROOT)/src/alt_alarm_start.c \ - $(hal_SRCS_ROOT)/src/alt_close.c \ - $(hal_SRCS_ROOT)/src/alt_dev.c \ - $(hal_SRCS_ROOT)/src/alt_dev_llist_insert.c \ - $(hal_SRCS_ROOT)/src/alt_dma_rxchan_open.c \ - $(hal_SRCS_ROOT)/src/alt_dma_txchan_open.c \ - $(hal_SRCS_ROOT)/src/alt_environ.c \ - $(hal_SRCS_ROOT)/src/alt_env_lock.c \ - $(hal_SRCS_ROOT)/src/alt_errno.c \ - $(hal_SRCS_ROOT)/src/alt_execve.c \ - $(hal_SRCS_ROOT)/src/alt_exit.c \ - $(hal_SRCS_ROOT)/src/alt_fcntl.c \ - $(hal_SRCS_ROOT)/src/alt_fd_lock.c \ - $(hal_SRCS_ROOT)/src/alt_fd_unlock.c \ - $(hal_SRCS_ROOT)/src/alt_find_dev.c \ - $(hal_SRCS_ROOT)/src/alt_find_file.c \ - $(hal_SRCS_ROOT)/src/alt_flash_dev.c \ - $(hal_SRCS_ROOT)/src/alt_fork.c \ - $(hal_SRCS_ROOT)/src/alt_fs_reg.c \ - $(hal_SRCS_ROOT)/src/alt_fstat.c \ - $(hal_SRCS_ROOT)/src/alt_get_fd.c \ - $(hal_SRCS_ROOT)/src/alt_getchar.c \ - $(hal_SRCS_ROOT)/src/alt_getpid.c \ - $(hal_SRCS_ROOT)/src/alt_gettod.c \ - $(hal_SRCS_ROOT)/src/alt_iic_isr_register.c \ - $(hal_SRCS_ROOT)/src/alt_instruction_exception_register.c \ - $(hal_SRCS_ROOT)/src/alt_ioctl.c \ - $(hal_SRCS_ROOT)/src/alt_io_redirect.c \ - $(hal_SRCS_ROOT)/src/alt_irq_handler.c \ - $(hal_SRCS_ROOT)/src/alt_isatty.c \ - $(hal_SRCS_ROOT)/src/alt_kill.c \ - $(hal_SRCS_ROOT)/src/alt_link.c \ - $(hal_SRCS_ROOT)/src/alt_load.c \ - $(hal_SRCS_ROOT)/src/alt_log_printf.c \ - $(hal_SRCS_ROOT)/src/alt_lseek.c \ - $(hal_SRCS_ROOT)/src/alt_main.c \ - $(hal_SRCS_ROOT)/src/alt_malloc_lock.c \ - $(hal_SRCS_ROOT)/src/alt_open.c \ - $(hal_SRCS_ROOT)/src/alt_printf.c \ - $(hal_SRCS_ROOT)/src/alt_putchar.c \ - $(hal_SRCS_ROOT)/src/alt_putstr.c \ - $(hal_SRCS_ROOT)/src/alt_read.c \ - $(hal_SRCS_ROOT)/src/alt_release_fd.c \ - $(hal_SRCS_ROOT)/src/alt_rename.c \ - $(hal_SRCS_ROOT)/src/alt_sbrk.c \ - $(hal_SRCS_ROOT)/src/alt_settod.c \ - $(hal_SRCS_ROOT)/src/alt_stat.c \ - $(hal_SRCS_ROOT)/src/alt_tick.c \ - $(hal_SRCS_ROOT)/src/alt_times.c \ - $(hal_SRCS_ROOT)/src/alt_unlink.c \ - $(hal_SRCS_ROOT)/src/alt_wait.c \ - $(hal_SRCS_ROOT)/src/alt_write.c - - -# Assemble all component C source files -COMPONENT_C_LIB_SRCS += \ - $(altera_avalon_epcs_flash_controller_driver_C_LIB_SRCS) \ - $(altera_avalon_jtag_uart_driver_C_LIB_SRCS) \ - $(altera_avalon_timer_driver_C_LIB_SRCS) \ - $(altera_nios2_qsys_hal_driver_C_LIB_SRCS) \ - $(hal_C_LIB_SRCS) - -# Assemble all component assembly source files -COMPONENT_ASM_LIB_SRCS += \ - $(altera_nios2_qsys_hal_driver_ASM_LIB_SRCS) - -# Assemble all component C++ source files -COMPONENT_CPP_LIB_SRCS += \ - -#END MANAGED - -#------------------------------------------------------------------------------ -# PUBLIC.MK -# -# The generated public.mk file contains BSP information that is shared with -# other external makefiles, such as a Nios II application makefile. System- -# dependent information such as hardware-specific compiler flags and -# simulation file generation are stored here. -# -# In addition, public.mk contains include paths that various software, -# such as a device driver, may need for the C compiler. These paths are -# written to public.mk with respect to the BSP root. In public.mk, each -# path is prefixed with a special variable, $(ALT_LIBRARY_ROOT_DIR). The -# purpose of this variable is to allow an external Makefile to append on -# path information to precisely locate paths expressed in public.mk -# Since this is the BSP Makefile, we set ALT_LIBRARY_ROOT_DIR to point right -# here ("."), at the BSP root. -# -# ALT_LIBRARY_ROOT_DIR must always be set before public.mk is included. -#------------------------------------------------------------------------------ -ALT_LIBRARY_ROOT_DIR := . -include public.mk - - -#------------------------------------------------------------------------------ -# FLAGS -# -# Include paths for BSP files are written into the public.mk file and must -# be added to the existing list of pre-processor flags. In addition, "hooks" -# for standard flags left intentionally empty (CFLAGS, CPPFLAGS, ASFLAGS, -# and CXXFLAGS) are provided for conveniently adding to the relevant flags -# on the command-line or via script that calls make. -#------------------------------------------------------------------------------ -# Assemble final list of compiler flags from generated content -BSP_CFLAGS += \ - $(BSP_CFLAGS_DEFINED_SYMBOLS) \ - $(BSP_CFLAGS_UNDEFINED_SYMBOLS) \ - $(BSP_CFLAGS_OPTIMIZATION) \ - $(BSP_CFLAGS_DEBUG) \ - $(BSP_CFLAGS_WARNINGS) \ - $(BSP_CFLAGS_USER_FLAGS) \ - $(ALT_CFLAGS) \ - $(CFLAGS) - -# Make ready the final list of include directories and other C pre-processor -# flags. Each include path is made ready by prefixing it with "-I". -BSP_CPPFLAGS += \ - $(addprefix -I, $(BSP_INC_DIRS)) \ - $(addprefix -I, $(ALT_INCLUDE_DIRS)) \ - $(ALT_CPPFLAGS) \ - $(CPPFLAGS) - -# Finish off assembler flags with any user-provided flags -BSP_ASFLAGS += $(ASFLAGS) - -# Finish off C++ flags with any user-provided flags -BSP_CXXFLAGS += $(CXXFLAGS) - -# And finally, the ordered list -C_SRCS += $(GENERATED_C_LIB_SRCS) \ - $(COMPONENT_C_LIB_SRCS) - -CXX_SRCS += $(GENERATED_CPP_LIB_SRCS) \ - $(COMPONENT_CPP_LIB_SRCS) - -ASM_SRCS += $(GENERATED_ASM_LIB_SRCS) \ - $(COMPONENT_ASM_LIB_SRCS) - - -#------------------------------------------------------------------------------ -# LIST OF GENERATED FILES -# -# A Nios II BSP relies on the generation of several source files used -# by both the BSP and any applications referencing the BSP. -#------------------------------------------------------------------------------ - - -GENERATED_H_FILES := $(ABS_BSP_ROOT)/system.h - -GENERATED_LINKER_SCRIPT := $(ABS_BSP_ROOT)/linker.x - -GENERATED_FILES += $(GENERATED_H_FILES) \ - $(GENERATED_LINKER_SCRIPT) - - -#------------------------------------------------------------------------------ -# SETUP TO BUILD OBJECTS -# -# List of object files which are to be built. This is constructed from the input -# list of C source files (C_SRCS), C++ source files (CXX_SRCS), and assembler -# source file (ASM_SRCS). The permitted file extensions are: -# -# .c .C - for C files -# .cxx .cc .cpp .CXX .CC .CPP - for C++ files -# .S .s - for assembly files -# -# Extended description: The list of objects is a sorted list (duplicates -# removed) of all possible objects, placed beneath the ./obj directory, -# including any path information stored in the "*_SRCS" variable. The -# "patsubst" commands are used to concatenate together multiple file suffix -# types for common files (i.e. c++ as .cxx, .cc, .cpp). -# -# File extensions are case-insensitive in build rules with the exception of -# assembly sources. Nios II assembly sources with the ".S" extension are first -# run through the C preprocessor. Sources with the ".s" extension are not. -#------------------------------------------------------------------------------ -OBJS = $(sort $(addprefix $(OBJ_DIR)/, \ - $(patsubst %.c, %.o, $(patsubst %.C, %.o, $(C_SRCS))) \ - $(patsubst %.cxx, %.o, $(patsubst %.CXX, %.o, \ - $(patsubst %.cc, %.o, $(patsubst %.CC, %.o, \ - $(patsubst %.cpp, %.o, $(patsubst %.CPP, %.o, \ - $(CXX_SRCS) )))))) \ - $(patsubst %.S, %.o, $(patsubst %.s, %.o, $(ASM_SRCS))) )) - -# List of dependancy files for each object file. -DEPS = $(OBJS:.o=.d) - - -# Rules to force your project to rebuild or relink -# .force_relink file will cause any application that depends on this project to relink -# .force_rebuild file will cause this project to rebuild object files -# .force_rebuild_all file will cause this project and any project that depends on this project to rebuild object files - -FORCE_RELINK_DEP := .force_relink -FORCE_REBUILD_DEP := .force_rebuild -FORCE_REBUILD_ALL_DEP := .force_rebuild_all -FORCE_REBUILD_DEP_LIST := $(FORCE_RELINK_DEP) $(FORCE_REBUILD_DEP) $(FORCE_REBUILD_ALL_DEP) - -$(FORCE_REBUILD_DEP_LIST): - -$(OBJS): $(wildcard $(FORCE_REBUILD_DEP)) $(wildcard $(FORCE_REBUILD_ALL_DEP)) - - -#------------------------------------------------------------------------------ -# BUILD RULES: ALL & CLEAN -#------------------------------------------------------------------------------ -.DELETE_ON_ERROR: - -.PHONY: all -all: build_pre_process -all: Makefile $(GENERATED_FILES) $(BSP_LIB) $(NEWLIB_DIR) -all: build_post_process - - -# clean: remove .o/.a/.d -.PHONY: clean -clean: - @$(RM) -r $(BSP_LIB) $(OBJ_DIR) $(FORCE_REBUILD_DEP_LIST) -ifneq ($(wildcard $(NEWLIB_DIR)),) - @$(RM) -r $(NEWLIB_DIR) -endif - @$(ECHO) [BSP clean complete] - - -#------------------------------------------------------------------------------ -# BUILD PRE/POST PROCESS -#------------------------------------------------------------------------------ -build_pre_process : - $(BUILD_PRE_PROCESS) - -build_post_process : - $(BUILD_POST_PROCESS) - -.PHONY: build_pre_process build_post_process - - - -#------------------------------------------------------------------------------ -# MAKEFILE UP TO DATE? -# -# Is this very Makefile up to date? Someone may have changed the BSP settings -# file or the associated target hardware. -#------------------------------------------------------------------------------ -# Skip this check when clean is the only target -ifneq ($(MAKECMDGOALS),clean) - -ifneq ($(wildcard $(SETTINGS_FILE)),$(SETTINGS_FILE)) -$(warning Warning: BSP Settings File $(SETTINGS_FILE) could not be found.) -endif - -Makefile: $(wildcard $(SETTINGS_FILE)) - @$(ECHO) Makefile not up to date. - @$(ECHO) $(SETTINGS_FILE) has been modified since the BSP Makefile was generated. - @$(ECHO) - @$(ECHO) Generate the BSP to update the Makefile, and then build again. - @$(ECHO) - @$(ECHO) To generate from Eclipse: - @$(ECHO) " 1. Right-click the BSP project." - @$(ECHO) " 2. In the Nios II Menu, click Generate BSP." - @$(ECHO) - @$(ECHO) To generate from the command line: - @$(ECHO) " nios2-bsp-generate-files --settings= --bsp-dir=" - @$(ECHO) - @exit 1 - -ifneq ($(wildcard $(SOPC_FILE)),$(SOPC_FILE)) -$(warning Warning: SOPC File $(SOPC_FILE) could not be found.) -endif - -public.mk: $(wildcard $(SOPC_FILE)) - @$(ECHO) Makefile not up to date. - @$(ECHO) $(SOPC_FILE) has been modified since the BSP was generated. - @$(ECHO) - @$(ECHO) Generate the BSP to update the Makefile, and then build again. - @$(ECHO) - @$(ECHO) To generate from Eclipse: - @$(ECHO) " 1. Right-click the BSP project." - @$(ECHO) " 2. In the Nios II Menu, click Generate BSP." - @$(ECHO) - @$(ECHO) To generate from the command line: - @$(ECHO) " nios2-bsp-generate-files --settings= --bsp-dir=" - @$(ECHO) - @exit 1 - -endif # $(MAKECMDGOALS) != clean - -#------------------------------------------------------------------------------ -# PATTERN RULES TO BUILD OBJECTS -#------------------------------------------------------------------------------ -$(OBJ_DIR)/%.o: %.c - @$(ECHO) Compiling $( - - hal - default - Oct 10, 2013 11:34:52 AM - 1381401292694 - /home/root/projects/altera/pong3/hardware/software/pong3_bsp - ./settings.bsp - ../../my_sys.sopcinfo - default - nios2_qsys_0 - 1.9 - - hal.sys_clk_timer - ALT_SYS_CLK - UnquotedString - timer_0 - none - system_h_define - Slave descriptor of the system clock timer device. This device provides a periodic interrupt ("tick") and is typically required for RTOS use. This setting defines the value of ALT_SYS_CLK in system.h. - none - false - common - - - hal.timestamp_timer - ALT_TIMESTAMP_CLK - UnquotedString - none - none - system_h_define - Slave descriptor of timestamp timer device. This device is used by Altera HAL timestamp drivers for high-resolution time measurement. This setting defines the value of ALT_TIMESTAMP_CLK in system.h. - none - false - common - - - hal.max_file_descriptors - ALT_MAX_FD - DecimalNumber - 32 - 32 - system_h_define - Determines the number of file descriptors statically allocated. This setting defines the value of ALT_MAX_FD in system.h. - If hal.enable_lightweight_device_driver_api is true, there are no file descriptors so this setting is ignored. If hal.enable_lightweight_device_driver_api is false, this setting must be at least 4 because HAL needs a file descriptor for /dev/null, /dev/stdin, /dev/stdout, and /dev/stderr. - false - - - - hal.enable_instruction_related_exceptions_api - ALT_INCLUDE_INSTRUCTION_RELATED_EXCEPTION_API - BooleanDefineOnly - false - false - system_h_define - Enables API for registering handlers to service instruction-related exceptions. Enabling this setting increases the size of the exception entry code. - These exception types can be generated if various processor options are enabled, such as the MMU, MPU, or other advanced exception types. - false - - - - hal.linker.allow_code_at_reset - ALT_ALLOW_CODE_AT_RESET - Boolean - 0 - 0 - none - Indicates if initialization code is allowed at the reset address. If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h. - If true, defines the macro ALT_ALLOW_CODE_AT_RESET in linker.h. This setting is typically false if an external bootloader (e.g. flash bootloader) is present. - false - - - - hal.linker.enable_alt_load - NONE - Boolean - 0 - 0 - none - Enables the alt_load() facility. The alt_load() facility copies sections from the .text memory into RAM. If true, this setting sets up the VMA/LMA of sections in linker.x to allow them to be loaded into the .text memory. - This setting is typically false if an external bootloader (e.g. flash bootloader) is present. - false - - - - hal.linker.enable_alt_load_copy_rodata - NONE - Boolean - 0 - 0 - none - Causes the alt_load() facility to copy the .rodata section. If true, this setting defines the macro ALT_LOAD_COPY_RODATA in linker.h. - none - false - - - - hal.linker.enable_alt_load_copy_rwdata - NONE - Boolean - 0 - 0 - none - Causes the alt_load() facility to copy the .rwdata section. If true, this setting defines the macro ALT_LOAD_COPY_RWDATA in linker.h. - none - false - - - - hal.linker.enable_alt_load_copy_exceptions - NONE - Boolean - 0 - 0 - none - Causes the alt_load() facility to copy the .exceptions section. If true, this setting defines the macro ALT_LOAD_COPY_EXCEPTIONS in linker.h. - none - false - - - - hal.linker.enable_exception_stack - NONE - Boolean - 0 - 0 - none - Enables use of a separate exception stack. If true, defines the macro ALT_EXCEPTION_STACK in linker.h, adds a memory region called exception_stack to linker.x, and provides the symbols __alt_exception_stack_pointer and __alt_exception_stack_limit in linker.x. - The hal.linker.exception_stack_size and hal.linker.exception_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used. - false - common - - - hal.linker.exception_stack_size - NONE - DecimalNumber - 1024 - 1024 - none - Size of the exception stack in bytes. - Only used if hal.linker.enable_exception_stack is true. - false - common - - - hal.linker.exception_stack_memory_region_name - NONE - UnquotedString - sdram_0 - none - none - Name of the existing memory region that will be divided up to create the 'exception_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'exception_stack' memory region. - Only used if hal.linker.enable_exception_stack is true. - false - common - - - hal.linker.enable_interrupt_stack - NONE - Boolean - 0 - 0 - none - Enables use of a separate interrupt stack. If true, defines the macro ALT_INTERRUPT_STACK in linker.h, adds a memory region called interrupt_stack to linker.x, and provides the symbols __alt_interrupt_stack_pointer and __alt_interrupt_stack_limit in linker.x. - The hal.linker.interrupt_stack_size and hal.linker.interrupt_stack_memory_region_name settings must also be valid. This setting must be false for MicroC/OS-II BSPs. Only enable if the EIC is used exclusively. The exception stack can be used to improve interrupt and other exception performance if the EIC is *not* used. - false - common - - - hal.linker.interrupt_stack_size - NONE - DecimalNumber - 1024 - 1024 - none - Size of the interrupt stack in bytes. - Only used if hal.linker.enable_interrupt_stack is true. - false - common - - - hal.linker.interrupt_stack_memory_region_name - NONE - UnquotedString - sdram_0 - none - none - Name of the existing memory region that will be divided up to create the 'interrupt_stack' memory region. The selected region name will be adjusted automatically when the BSP is generated to create the 'interrupt_stack' memory region. - Only used if hal.linker.enable_interrupt_stack is true. - false - common - - - hal.stdin - NONE - UnquotedString - jtag_uart_0 - none - system_h_define - Slave descriptor of STDIN character-mode device. This setting is used by the ALT_STDIN family of defines in system.h. - none - false - common - - - hal.stdout - NONE - UnquotedString - jtag_uart_0 - none - system_h_define - Slave descriptor of STDOUT character-mode device. This setting is used by the ALT_STDOUT family of defines in system.h. - none - false - common - - - hal.stderr - NONE - UnquotedString - jtag_uart_0 - none - system_h_define - Slave descriptor of STDERR character-mode device. This setting is used by the ALT_STDERR family of defines in system.h. - none - false - common - - - hal.log_port - NONE - UnquotedString - none - none - public_mk_define - Slave descriptor of debug logging character-mode device. If defined, it enables extra debug messages in the HAL source. This setting is used by the ALT_LOG_PORT family of defines in system.h. - none - false - none - - - hal.make.build_pre_process - BUILD_PRE_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before BSP built. - none - false - none - - - hal.make.ar_pre_process - AR_PRE_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before archiver execution. - none - false - none - - - hal.make.bsp_cflags_defined_symbols - BSP_CFLAGS_DEFINED_SYMBOLS - UnquotedString - none - none - makefile_variable - Preprocessor macros to define. A macro definition in this setting has the same effect as a "#define" in source code. Adding "-DALT_DEBUG" to this setting has the same effect as "#define ALT_DEBUG" in a souce file. Adding "-DFOO=1" to this setting is equivalent to the macro "#define FOO 1" in a source file. Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_DEFINED_SYMBOLS in the BSP Makefile. - none - false - none - - - hal.make.ar_post_process - AR_POST_PROCESS - UnquotedString - none - none - makefile_variable - Command executed after archiver execution. - none - false - none - - - hal.make.as - AS - UnquotedString - nios2-elf-gcc - nios2-elf-gcc - makefile_variable - Assembler command. Note that CC is used for .S files. - none - false - none - - - hal.make.build_post_process - BUILD_POST_PROCESS - UnquotedString - none - none - makefile_variable - Command executed after BSP built. - none - false - none - - - hal.make.bsp_cflags_debug - BSP_CFLAGS_DEBUG - UnquotedString - -g - -g - makefile_variable - C/C++ compiler debug level. '-g' provides the default set of debug symbols typically required to debug a typical application. Omitting '-g' removes debug symbols from the ELF. This setting defines the value of BSP_CFLAGS_DEBUG in Makefile. - none - false - common - - - hal.make.ar - AR - UnquotedString - nios2-elf-ar - nios2-elf-ar - makefile_variable - Archiver command. Creates library files. - none - false - none - - - hal.make.rm - RM - UnquotedString - rm -f - rm -f - makefile_variable - Command used to remove files during 'clean' target. - none - false - none - - - hal.make.cxx_pre_process - CXX_PRE_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before each C++ file is compiled. - none - false - none - - - hal.make.bsp_cflags_warnings - BSP_CFLAGS_WARNINGS - UnquotedString - -Wall - -Wall - makefile_variable - C/C++ compiler warning level. "-Wall" is commonly used.This setting defines the value of BSP_CFLAGS_WARNINGS in Makefile. - none - false - none - - - hal.make.bsp_arflags - BSP_ARFLAGS - UnquotedString - -src - -src - makefile_variable - Custom flags only passed to the archiver. This content of this variable is directly passed to the archiver rather than the more standard "ARFLAGS". The reason for this is that GNU Make assumes some default content in ARFLAGS. This setting defines the value of BSP_ARFLAGS in Makefile. - none - false - none - - - hal.make.bsp_cflags_optimization - BSP_CFLAGS_OPTIMIZATION - UnquotedString - -O0 - -O0 - makefile_variable - C/C++ compiler optimization level. "-O0" = no optimization,"-O2" = "normal" optimization, etc. "-O0" is recommended for code that you want to debug since compiler optimization can remove variables and produce non-sequential execution of code while debugging. This setting defines the value of BSP_CFLAGS_OPTIMIZATION in Makefile. - none - false - common - - - hal.make.as_post_process - AS_POST_PROCESS - UnquotedString - none - none - makefile_variable - Command executed after each assembly file is compiled. - none - false - none - - - hal.make.cc_pre_process - CC_PRE_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before each .c/.S file is compiled. - none - false - none - - - hal.make.bsp_asflags - BSP_ASFLAGS - UnquotedString - -Wa,-gdwarf2 - -Wa,-gdwarf2 - makefile_variable - Custom flags only passed to the assembler. This setting defines the value of BSP_ASFLAGS in Makefile. - none - false - none - - - hal.make.as_pre_process - AS_PRE_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before each assembly file is compiled. - none - false - none - - - hal.make.bsp_cflags_undefined_symbols - BSP_CFLAGS_UNDEFINED_SYMBOLS - UnquotedString - none - none - makefile_variable - Preprocessor macros to undefine. Undefined macros are similar to defined macros, but replicate the "#undef" directive in source code. To undefine the macro FOO use the syntax "-u FOO" in this setting. This is equivalent to "#undef FOO" in a source file. Note: the syntax differs from macro definition (there is a space, i.e. "-u FOO" versus "-DFOO"). Macros defined with this setting are applied to all .S, .c, and C++ files in the BSP. This setting defines the value of BSP_CFLAGS_UNDEFINED_SYMBOLS in the BSP Makefile. - none - false - none - - - hal.make.cc_post_process - CC_POST_PROCESS - UnquotedString - none - none - makefile_variable - Command executed after each .c/.S file is compiled. - none - false - none - - - hal.make.cxx_post_process - CXX_POST_PROCESS - UnquotedString - none - none - makefile_variable - Command executed before each C++ file is compiled. - none - false - none - - - hal.make.cc - CC - UnquotedString - nios2-elf-gcc -xc - nios2-elf-gcc -xc - makefile_variable - C compiler command. - none - false - none - - - hal.make.bsp_cxx_flags - BSP_CXXFLAGS - UnquotedString - none - none - makefile_variable - Custom flags only passed to the C++ compiler. This setting defines the value of BSP_CXXFLAGS in Makefile. - none - false - none - - - hal.make.bsp_inc_dirs - BSP_INC_DIRS - UnquotedString - none - none - makefile_variable - Space separated list of extra include directories to scan for header files. Directories are relative to the top-level BSP directory. The -I prefix's added by the makefile so don't add it here. This setting defines the value of BSP_INC_DIRS in Makefile. - none - false - none - - - hal.make.cxx - CXX - UnquotedString - nios2-elf-gcc -xc++ - nios2-elf-gcc -xc++ - makefile_variable - C++ compiler command. - none - false - none - - - hal.make.bsp_cflags_user_flags - BSP_CFLAGS_USER_FLAGS - UnquotedString - none - none - makefile_variable - Custom flags passed to the compiler when compiling C, C++, and .S files. This setting defines the value of BSP_CFLAGS_USER_FLAGS in Makefile. - none - false - none - - - hal.make.ignore_system_derived.sopc_system_id - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query SOPC system for system ID. If true ignores export of 'SOPC_SYSID_FLAG += --id=<sysid>' and 'ELF_PATCH_FLAG += --id=<sysid>' to public.mk. - none - false - none - - - hal.make.ignore_system_derived.sopc_system_timestamp - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query SOPC system for system timestamp. If true ignores export of 'SOPC_SYSID_FLAG += --timestamp=<timestamp>' and 'ELF_PATCH_FLAG += --timestamp=<timestamp>' to public.mk. - none - false - none - - - hal.make.ignore_system_derived.sopc_system_base_address - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query SOPC system for system ID base address. If true ignores export of 'SOPC_SYSID_FLAG += --sidp=<address>' and 'ELF_PATCH_FLAG += --sidp=<address>' to public.mk. - none - false - none - - - hal.make.ignore_system_derived.sopc_simulation_enabled - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has simulation enabled. If true ignores export of 'ELF_PATCH_FLAG += --simulation_enabled' to public.mk. - none - false - none - - - hal.make.ignore_system_derived.fpu_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has FPU present. If true ignores export of 'ALT_CFLAGS += -mhard-float' to public.mk if FPU is found in the system. If true ignores export of 'ALT_CFLAGS += -mhard-soft' if FPU is not found in the system. - none - false - none - - - hal.make.ignore_system_derived.hardware_multiplier_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has multiplier present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mul' to public.mk if no multiplier is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mul' if multiplier is found in the system. - none - false - none - - - hal.make.ignore_system_derived.hardware_mulx_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has hardware mulx present. If true ignores export of 'ALT_CFLAGS += -mno-hw-mulx' to public.mk if no mulx is found in the system. If true ignores export of 'ALT_CFLAGS += -mhw-mulx' if mulx is found in the system. - none - false - none - - - hal.make.ignore_system_derived.hardware_divide_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has hardware divide present. If true ignores export of 'ALT_CFLAGS += -mno-hw-div' to public.mk if no division is found in system. If true ignores export of 'ALT_CFLAGS += -mhw-div' if division is found in the system. - none - false - none - - - hal.make.ignore_system_derived.debug_core_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system has a debug core present. If true ignores export of 'CPU_HAS_DEBUG_CORE = 1' to public.mk if a debug core is found in the system. If true ignores export of 'CPU_HAS_DEBUG_CORE = 0' if no debug core is found in the system. - none - false - none - - - hal.make.ignore_system_derived.big_endian - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system is big endian. If true ignores export of 'ALT_CFLAGS += -EB' to public.mk if big endian system. If true ignores export of 'ALT_CFLAGS += -EL' if little endian system. - none - false - none - - - hal.make.ignore_system_derived.hardware_fp_cust_inst_divider_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system floating point custom instruction with a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-2' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-2' to public.mk if the custom instruction is found in the system. - none - false - none - - - hal.make.ignore_system_derived.hardware_fp_cust_inst_no_divider_present - NONE - Boolean - 0 - 0 - public_mk_define - Enable BSP generation to query if SOPC system floating point custom instruction without a divider is present. If true ignores export of 'ALT_CFLAGS += -mcustom-fpu-cfg=60-1' and 'ALT_LDFLAGS += -mcustom-fpu-cfg=60-1' to public.mk if the custom instruction is found in the system. - none - false - none - - - hal.enable_exit - ALT_NO_EXIT - Boolean - 1 - 1 - public_mk_define - Add exit() support. This option increases code footprint if your "main()" routine does "return" or call "exit()". If false, adds -DALT_NO_EXIT to ALT_CPPFLAGS in public.mk, and reduces footprint - none - false - none - - - hal.enable_small_c_library - NONE - Boolean - 0 - 0 - public_mk_define - Causes the small newlib (C library) to be used. This reduces code and data footprint at the expense of reduced functionality. Several newlib features are removed such as floating-point support in printf(), stdin input routines, and buffered I/O. The small C library is not compatible with Micrium MicroC/OS-II. If true, adds -msmallc to ALT_LDFLAGS in public.mk. - none - false - common - - - hal.enable_clean_exit - ALT_NO_CLEAN_EXIT - Boolean - 1 - 1 - public_mk_define - When your application exits, close file descriptors, call C++ destructors, etc. Code footprint can be reduced by disabling clean exit. If disabled, adds -DALT_NO_CLEAN_EXIT to ALT_CPPFLAGS and -Wl,--defsym, exit=_exit to ALT_LDFLAGS in public.mk. - none - false - none - - - hal.enable_runtime_stack_checking - ALT_STACK_CHECK - Boolean - 0 - 0 - public_mk_define - Turns on HAL runtime stack checking feature. Enabling this setting causes additional code to be placed into each subroutine call to generate an exception if a stack collision occurs with the heap or statically allocated data. If true, adds -DALT_STACK_CHECK and -mstack-check to ALT_CPPFLAGS in public.mk. - none - false - none - - - hal.enable_gprof - ALT_PROVIDE_GMON - Boolean - 0 - 0 - public_mk_define - Causes code to be compiled with gprof profiling enabled and the application ELF to be linked with the GPROF library. If true, adds -DALT_PROVIDE_GMON to ALT_CPPFLAGS and -pg to ALT_CFLAGS in public.mk. - none - false - common - - - hal.enable_c_plus_plus - ALT_NO_C_PLUS_PLUS - Boolean - 1 - 1 - public_mk_define - Enable support for a subset of the C++ language. This option increases code footprint by adding support for C++ constructors. Certain features, such as multiple inheritance and exceptions are not supported. If false, adds -DALT_NO_C_PLUS_PLUS to ALT_CPPFLAGS in public.mk, and reduces code footprint. - none - false - none - - - hal.enable_reduced_device_drivers - ALT_USE_SMALL_DRIVERS - Boolean - 0 - 0 - public_mk_define - Certain drivers are compiled with reduced functionality to reduce code footprint. Not all drivers observe this setting. The altera_avalon_uart and altera_avalon_jtag_uart drivers switch from interrupt-driven to polled operation. CAUTION: Several device drivers are disabled entirely. These include the altera_avalon_cfi_flash, altera_avalon_epcs_flash_controller, and altera_avalon_lcd_16207 drivers. This can result in certain API (HAL flash access routines) to fail. You can define a symbol provided by each driver to prevent it from being removed. If true, adds -DALT_USE_SMALL_DRIVERS to ALT_CPPFLAGS in public.mk. - none - false - common - - - hal.enable_lightweight_device_driver_api - ALT_USE_DIRECT_DRIVERS - Boolean - 0 - 0 - public_mk_define - Enables lightweight device driver API. This reduces code and data footprint by removing the HAL layer that maps device names (e.g. /dev/uart0) to file descriptors. Instead, driver routines are called directly. The open(), close(), and lseek() routines will always fail if called. The read(), write(), fstat(), ioctl(), and isatty() routines only work for the stdio devices. If true, adds -DALT_USE_DIRECT_DRIVERS to ALT_CPPFLAGS in public.mk. - The Altera Host and read-only ZIP file systems can't be used if hal.enable_lightweight_device_driver_api is true. - false - none - - - hal.enable_mul_div_emulation - ALT_NO_INSTRUCTION_EMULATION - Boolean - 0 - 0 - public_mk_define - Adds code to emulate multiply and divide instructions in case they are executed but aren't present in the CPU. Normally this isn't required because the compiler won't use multiply and divide instructions that aren't present in the CPU. If false, adds -DALT_NO_INSTRUCTION_EMULATION to ALT_CPPFLAGS in public.mk. - none - false - none - - - hal.enable_sim_optimize - ALT_SIM_OPTIMIZE - Boolean - 0 - 0 - public_mk_define - The BSP is compiled with optimizations to speedup HDL simulation such as initializing the cache, clearing the .bss section, and skipping long delay loops. If true, adds -DALT_SIM_OPTIMIZE to ALT_CPPFLAGS in public.mk. - When this setting is true, the BSP shouldn't be used to build applications that are expected to run real hardware. - false - common - - - hal.enable_sopc_sysid_check - NONE - Boolean - 1 - 1 - public_mk_define - Enable SOPC Builder System ID. If a System ID SOPC Builder component is connected to the CPU associated with this BSP, it will be enabled in the creation of command-line arguments to download an ELF to the target. Otherwise, system ID and timestamp values are left out of public.mk for application Makefile "download-elf" target definition. With the system ID check disabled, the Nios II EDS tools will not automatically ensure that the application .elf file (and BSP it is linked against) corresponds to the hardware design on the target. If false, adds --accept-bad-sysid to SOPC_SYSID_FLAG in public.mk. - none - false - none - - - hal.custom_newlib_flags - CUSTOM_NEWLIB_FLAGS - UnquotedString - none - none - public_mk_define - Build a custom version of newlib with the specified space-separated compiler flags. - The custom newlib build will be placed in the &lt;bsp root>/newlib directory, and will be used only for applications that utilize this BSP. - false - none - - - hal.log_flags - ALT_LOG_FLAGS - DecimalNumber - 0 - 0 - public_mk_define - The value is assigned to ALT_LOG_FLAGS in the generated public.mk. See hal.log_port setting description. Values can be -1 through 3. - hal.log_port must be set for this to be used. - false - none - - - altera_avalon_jtag_uart_driver.enable_small_driver - ALTERA_AVALON_JTAG_UART_SMALL - BooleanDefineOnly - false - false - public_mk_define - Small-footprint (polled mode) driver - none - false - - - - altera_avalon_jtag_uart_driver.enable_jtag_uart_ignore_fifo_full_error - ALTERA_AVALON_JTAG_UART_IGNORE_FIFO_FULL_ERROR - BooleanDefineOnly - false - false - public_mk_define - Enable JTAG UART driver to recover when host is inactive causing buffer to full without returning error. Printf will not fail with this recovery. - none - false - - - - sdram_0 - 0x02000000 - 0x03FFFFFF - 33554432 - memory - - - onchip_memory2_0 - 0x04001000 - 0x04001FFF - 4096 - memory - - - epcs_flash_controller_0 - 0x04003000 - 0x040037FF - 2048 - flash, memory, non-volatile - - - gpu_0 - 0x04004200 - 0x040043FF - 512 - - - - timer_0 - 0x04004420 - 0x0400443F - 32 - timer - - - pio_0 - 0x04004450 - 0x0400445F - 16 - - - - dm9000a_0 - 0x04004468 - 0x0400446F - 8 - - - - jtag_uart_0 - 0x04004470 - 0x04004477 - 8 - printable - - - .text - sdram_0 - - - .rodata - sdram_0 - - - .rwdata - sdram_0 - - - .bss - sdram_0 - - - .heap - sdram_0 - - - .stack - sdram_0 - - \ No newline at end of file diff --git a/my_sys.qsys b/my_sys.qsys new file mode 100644 index 0000000..5431cf0 --- /dev/null +++ b/my_sys.qsys @@ -0,0 +1,745 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + epcs_flash_controller_0.epcs_control_port + + + nios2_qsys_0.jtag_debug_module + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ]]> + ]]> + + + + + ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + $${FILENAME}_onchip_memory2_0 + + ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0 + + + + + + + + + + + + + + + + + + + + + + + + + $${FILENAME}_sdram_0 + + + + + + + $${FILENAME}_epcs_flash_controller_0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + INTERACTIVE_ASCII_OUTPUT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/pll.v b/pll.v new file mode 100644 index 0000000..7dc9ba3 --- /dev/null +++ b/pll.v @@ -0,0 +1,326 @@ +// megafunction wizard: %ALTPLL% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altpll + +// ============================================================ +// File Name: pll.v +// Megafunction Name(s): +// altpll +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 12.0 Build 178 05/31/2012 SJ Web Edition +// ************************************************************ + + +//Copyright (C) 1991-2012 Altera Corporation +//Your use of Altera Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Altera Program License +//Subscription Agreement, Altera MegaCore Function License +//Agreement, or other applicable license agreement, including, +//without limitation, that your use is for the sole purpose of +//programming logic devices manufactured by Altera and sold by +//Altera or its authorized distributors. Please refer to the +//applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module pll ( + inclk0, + c0, + c1); + + input inclk0; + output c0; + output c1; + + wire [5:0] sub_wire0; + wire [0:0] sub_wire5 = 1'h0; + wire [1:1] sub_wire2 = sub_wire0[1:1]; + wire [0:0] sub_wire1 = sub_wire0[0:0]; + wire c0 = sub_wire1; + wire c1 = sub_wire2; + wire sub_wire3 = inclk0; + wire [1:0] sub_wire4 = {sub_wire5, sub_wire3}; + + altpll altpll_component ( + .inclk (sub_wire4), + .clk (sub_wire0), + .activeclock (), + .areset (1'b0), + .clkbad (), + .clkena ({6{1'b1}}), + .clkloss (), + .clkswitch (1'b0), + .configupdate (1'b0), + .enable0 (), + .enable1 (), + .extclk (), + .extclkena ({4{1'b1}}), + .fbin (1'b1), + .fbmimicbidir (), + .fbout (), + .fref (), + .icdrclk (), + .locked (), + .pfdena (1'b1), + .phasecounterselect ({4{1'b1}}), + .phasedone (), + .phasestep (1'b1), + .phaseupdown (1'b1), + .pllena (1'b1), + .scanaclr (1'b0), + .scanclk (1'b0), + .scanclkena (1'b1), + .scandata (1'b0), + .scandataout (), + .scandone (), + .scanread (1'b0), + .scanwrite (1'b0), + .sclkout0 (), + .sclkout1 (), + .vcooverrange (), + .vcounderrange ()); + defparam + altpll_component.clk0_divide_by = 5, + altpll_component.clk0_duty_cycle = 50, + altpll_component.clk0_multiply_by = 8, + altpll_component.clk0_phase_shift = "0", + altpll_component.clk1_divide_by = 5, + altpll_component.clk1_duty_cycle = 50, + altpll_component.clk1_multiply_by = 8, + altpll_component.clk1_phase_shift = "-3000", + altpll_component.compensate_clock = "CLK0", + altpll_component.inclk0_input_frequency = 20000, + altpll_component.intended_device_family = "Cyclone II", + altpll_component.lpm_hint = "CBX_MODULE_PREFIX=pll", + altpll_component.lpm_type = "altpll", + altpll_component.operation_mode = "NORMAL", + altpll_component.port_activeclock = "PORT_UNUSED", + altpll_component.port_areset = "PORT_UNUSED", + altpll_component.port_clkbad0 = "PORT_UNUSED", + altpll_component.port_clkbad1 = "PORT_UNUSED", + altpll_component.port_clkloss = "PORT_UNUSED", + altpll_component.port_clkswitch = "PORT_UNUSED", + altpll_component.port_configupdate = "PORT_UNUSED", + altpll_component.port_fbin = "PORT_UNUSED", + altpll_component.port_inclk0 = "PORT_USED", + altpll_component.port_inclk1 = "PORT_UNUSED", + altpll_component.port_locked = "PORT_UNUSED", + altpll_component.port_pfdena = "PORT_UNUSED", + altpll_component.port_phasecounterselect = "PORT_UNUSED", + altpll_component.port_phasedone = "PORT_UNUSED", + altpll_component.port_phasestep = "PORT_UNUSED", + altpll_component.port_phaseupdown = "PORT_UNUSED", + altpll_component.port_pllena = "PORT_UNUSED", + altpll_component.port_scanaclr = "PORT_UNUSED", + altpll_component.port_scanclk = "PORT_UNUSED", + altpll_component.port_scanclkena = "PORT_UNUSED", + altpll_component.port_scandata = "PORT_UNUSED", + altpll_component.port_scandataout = "PORT_UNUSED", + altpll_component.port_scandone = "PORT_UNUSED", + altpll_component.port_scanread = "PORT_UNUSED", + altpll_component.port_scanwrite = "PORT_UNUSED", + altpll_component.port_clk0 = "PORT_USED", + altpll_component.port_clk1 = "PORT_USED", + altpll_component.port_clk2 = "PORT_UNUSED", + altpll_component.port_clk3 = "PORT_UNUSED", + altpll_component.port_clk4 = "PORT_UNUSED", + altpll_component.port_clk5 = "PORT_UNUSED", + altpll_component.port_clkena0 = "PORT_UNUSED", + altpll_component.port_clkena1 = "PORT_UNUSED", + altpll_component.port_clkena2 = "PORT_UNUSED", + altpll_component.port_clkena3 = "PORT_UNUSED", + altpll_component.port_clkena4 = "PORT_UNUSED", + altpll_component.port_clkena5 = "PORT_UNUSED", + altpll_component.port_extclk0 = "PORT_UNUSED", + altpll_component.port_extclk1 = "PORT_UNUSED", + altpll_component.port_extclk2 = "PORT_UNUSED", + altpll_component.port_extclk3 = "PORT_UNUSED"; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH STRING "1.000" +// Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz" +// Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low" +// Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1" +// Retrieval info: PRIVATE: BANDWIDTH_USE_CUSTOM STRING "0" +// Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0" +// Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0" +// Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "1" +// Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0" +// Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0" +// Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0" +// Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0" +// Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" +// Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" +// Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "80.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "80.000000" +// Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" +// Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" +// Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0" +// Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575" +// Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1" +// Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "50.000" +// Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000" +// Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1" +// Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II" +// Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0" +// Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" +// Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg" +// Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" +// Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" +// Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1" +// Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "80.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "80.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" +// Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-3.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ns" +// Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" +// Retrieval info: PRIVATE: PLL_ENA_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0" +// Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0" +// Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0" +// Retrieval info: PRIVATE: RECONFIG_FILE STRING "pll.mif" +// Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0" +// Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0" +// Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0" +// Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0" +// Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000" +// Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz" +// Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500" +// Retrieval info: PRIVATE: SPREAD_USE STRING "0" +// Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" +// Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" +// Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" +// Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" +// Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" +// Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" +// Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "5" +// Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "8" +// Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "5" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "8" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-3000" +// Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" +// Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "20000" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altpll" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL" +// Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" +// Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED" +// Retrieval info: USED_PORT: @clk 0 0 6 0 OUTPUT_CLK_EXT VCC "@clk[5..0]" +// Retrieval info: USED_PORT: @extclk 0 0 4 0 OUTPUT_CLK_EXT VCC "@extclk[3..0]" +// Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" +// Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" +// Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 +// Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 +// Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL pll_bb.v FALSE +// Retrieval info: LIB_FILE: altera_mf +// Retrieval info: CBX_MODULE_PREFIX: ON diff --git a/pong3.pin b/pong3.pin new file mode 100644 index 0000000..06ed0ce --- /dev/null +++ b/pong3.pin @@ -0,0 +1,274 @@ + -- Copyright (C) 1991-2013 Altera Corporation + -- Your use of Altera Corporation's design tools, logic functions + -- and other software and tools, and its AMPP partner logic + -- functions, and any output files from any of the foregoing + -- (including device programming or simulation files), and any + -- associated documentation or information are expressly subject + -- to the terms and conditions of the Altera Program License + -- Subscription Agreement, Altera MegaCore Function License + -- Agreement, or other applicable license agreement, including, + -- without limitation, that your use is for the sole purpose of + -- programming logic devices manufactured by Altera and sold by + -- Altera or its authorized distributors. Please refer to the + -- applicable agreement for further details. + -- + -- This is a Quartus II output file. It is for reporting purposes only, and is + -- not intended for use as a Quartus II input file. This file cannot be used + -- to make Quartus II pin assignments - for instructions on how to make pin + -- assignments, please see Quartus II help. + --------------------------------------------------------------------------------- + + + + --------------------------------------------------------------------------------- + -- NC : No Connect. This pin has no internal connection to the device. + -- DNU : Do Not Use. This pin MUST NOT be connected. + -- VCCINT : Dedicated power pin, which MUST be connected to VCC (1.2V). + -- VCCIO : Dedicated power pin, which MUST be connected to VCC + -- of its bank. + -- Bank 1: 3.3V + -- Bank 2: 3.3V + -- Bank 3: 3.3V + -- Bank 4: 3.3V + -- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND. + -- It can also be used to report unused dedicated pins. The connection + -- on the board for unused dedicated pins depends on whether this will + -- be used in a future design. One example is device migration. When + -- using device migration, refer to the device pin-tables. If it is a + -- GND pin in the pin table or if it will not be used in a future design + -- for another purpose the it MUST be connected to GND. If it is an unused + -- dedicated pin, then it can be connected to a valid signal on the board + -- (low, high, or toggling) if that signal is required for a different + -- revision of the design. + -- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins. + -- This pin should be connected to GND. It may also be connected to a + -- valid signal on the board (low, high, or toggling) if that signal + -- is required for a different revision of the design. + -- GND* : Unused I/O pin. Connect each pin marked GND* directly to GND + -- or leave it unconnected. + -- RESERVED : Unused I/O pin, which MUST be left unconnected. + -- RESERVED_INPUT : Pin is tri-stated and should be connected to the board. + -- RESERVED_INPUT_WITH_WEAK_PULLUP : Pin is tri-stated with internal weak pull-up resistor. + -- RESERVED_INPUT_WITH_BUS_HOLD : Pin is tri-stated with bus-hold circuitry. + -- RESERVED_OUTPUT_DRIVEN_HIGH : Pin is output driven high. + --------------------------------------------------------------------------------- + + + + --------------------------------------------------------------------------------- + -- Pin directions (input, output or bidir) are based on device operating in user mode. + --------------------------------------------------------------------------------- + +Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition +CHIP "pong3" ASSIGNED TO AN: EP2C8Q208C8 + +Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment +------------------------------------------------------------------------------------------------------------- +~ASDO~ / RESERVED_INPUT : 1 : input : 3.3-V LVTTL : : 1 : N +~nCSO~ / RESERVED_INPUT : 2 : input : 3.3-V LVTTL : : 1 : N +GND* : 3 : : : : 1 : +GND* : 4 : : : : 1 : +GND* : 5 : : : : 1 : +GND* : 6 : : : : 1 : +VCCIO1 : 7 : power : : 3.3V : 1 : +GND* : 8 : : : : 1 : +GND : 9 : gnd : : : : +GND* : 10 : : : : 1 : +GND* : 11 : : : : 1 : +GND* : 12 : : : : 1 : +GND* : 13 : : : : 1 : +GND* : 14 : : : : 1 : +GND* : 15 : : : : 1 : +altera_reserved_tdo : 16 : output : 3.3-V LVTTL : : 1 : N +altera_reserved_tms : 17 : input : 3.3-V LVTTL : : 1 : N +altera_reserved_tck : 18 : input : 3.3-V LVTTL : : 1 : N +altera_reserved_tdi : 19 : input : 3.3-V LVTTL : : 1 : N +DATA0 : 20 : input : : : 1 : +DCLK : 21 : : : : 1 : +nCE : 22 : : : : 1 : +clk : 23 : input : 3.3-V LVTTL : : 1 : Y +GND+ : 24 : : : : 1 : +GND : 25 : gnd : : : : +nCONFIG : 26 : : : : 1 : +rst_n : 27 : input : 3.3-V LVTTL : : 1 : Y +GND+ : 28 : : : : 1 : +VCCIO1 : 29 : power : : 3.3V : 1 : +seven_seg[2] : 30 : output : 3.3-V LVTTL : : 1 : N +GND* : 31 : : : : 1 : +VCCINT : 32 : power : : 1.2V : : +GND* : 33 : : : : 1 : +GND* : 34 : : : : 1 : +GND* : 35 : : : : 1 : +GND : 36 : gnd : : : : +GND* : 37 : : : : 1 : +GND : 38 : gnd : : : : +GND* : 39 : : : : 1 : +GND* : 40 : : : : 1 : +GND* : 41 : : : : 1 : +VCCIO1 : 42 : power : : 3.3V : 1 : +seven_seg[0] : 43 : output : 3.3-V LVTTL : : 1 : N +GND* : 44 : : : : 1 : +sdram_cs_n : 45 : output : 3.3-V LVTTL : : 1 : Y +sdram_cke : 46 : output : 3.3-V LVTTL : : 1 : Y +sdram_clk : 47 : output : 3.3-V LVTTL : : 1 : Y +GND* : 48 : : : : 1 : +GND : 49 : gnd : : : : +GND_PLL1 : 50 : gnd : : : : +VCCD_PLL1 : 51 : power : : 1.2V : : +GND_PLL1 : 52 : gnd : : : : +VCCA_PLL1 : 53 : power : : 1.2V : : +GNDA_PLL1 : 54 : gnd : : : : +GND : 55 : gnd : : : : +sdram_dqm[0] : 56 : output : 3.3-V LVTTL : : 4 : Y +sdram_dq[7] : 57 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[6] : 58 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[5] : 59 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[4] : 60 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[3] : 61 : bidir : 3.3-V LVTTL : : 4 : Y +VCCIO4 : 62 : power : : 3.3V : 4 : +sdram_dq[2] : 63 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[1] : 64 : bidir : 3.3-V LVTTL : : 4 : Y +GND : 65 : gnd : : : : +VCCINT : 66 : power : : 1.2V : : +sdram_dq[0] : 67 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_we_n : 68 : output : 3.3-V LVTTL : : 4 : Y +sdram_cas_n : 69 : output : 3.3-V LVTTL : : 4 : Y +sdram_ras_n : 70 : output : 3.3-V LVTTL : : 4 : Y +VCCIO4 : 71 : power : : 3.3V : 4 : +sdram_ba[0] : 72 : output : 3.3-V LVTTL : : 4 : Y +GND : 73 : gnd : : : : +sdram_ba[1] : 74 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[10] : 75 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[0] : 76 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[1] : 77 : output : 3.3-V LVTTL : : 4 : Y +GND : 78 : gnd : : : : +VCCINT : 79 : power : : 1.2V : : +sdram_addr[2] : 80 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[3] : 81 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[4] : 82 : output : 3.3-V LVTTL : : 4 : Y +VCCIO4 : 83 : power : : 3.3V : 4 : +sdram_addr[5] : 84 : output : 3.3-V LVTTL : : 4 : Y +GND : 85 : gnd : : : : +sdram_addr[6] : 86 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[7] : 87 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[8] : 88 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[9] : 89 : output : 3.3-V LVTTL : : 4 : Y +sdram_addr[11] : 90 : output : 3.3-V LVTTL : : 4 : Y +VCCIO4 : 91 : power : : 3.3V : 4 : +sdram_addr[12] : 92 : output : 3.3-V LVTTL : : 4 : Y +GND : 93 : gnd : : : : +sdram_dq[15] : 94 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[14] : 95 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[13] : 96 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[12] : 97 : bidir : 3.3-V LVTTL : : 4 : Y +VCCIO4 : 98 : power : : 3.3V : 4 : +sdram_dq[11] : 99 : bidir : 3.3-V LVTTL : : 4 : Y +GND : 100 : gnd : : : : +sdram_dq[10] : 101 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[9] : 102 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dq[8] : 103 : bidir : 3.3-V LVTTL : : 4 : Y +sdram_dqm[1] : 104 : output : 3.3-V LVTTL : : 4 : Y +GND* : 105 : : : : 3 : +GND* : 106 : : : : 3 : +GND* : 107 : : : : 3 : +vga_red[0] : 108 : output : 3.3-V LVTTL : : 3 : Y +VCCIO3 : 109 : power : : 3.3V : 3 : +GND* : 110 : : : : 3 : +GND : 111 : gnd : : : : +vga_red[2] : 112 : output : 3.3-V LVTTL : : 3 : Y +vga_red[1] : 113 : output : 3.3-V LVTTL : : 3 : Y +vga_green[1] : 114 : output : 3.3-V LVTTL : : 3 : Y +vga_green[0] : 115 : output : 3.3-V LVTTL : : 3 : Y +vga_blue[0] : 116 : output : 3.3-V LVTTL : : 3 : Y +vga_green[2] : 117 : output : 3.3-V LVTTL : : 3 : Y +vga_blue[2] : 118 : output : 3.3-V LVTTL : : 3 : Y +GND : 119 : gnd : : : : +VCCINT : 120 : power : : 1.2V : : +nSTATUS : 121 : : : : 3 : +VCCIO3 : 122 : power : : 3.3V : 3 : +CONF_DONE : 123 : : : : 3 : +GND : 124 : gnd : : : : +MSEL1 : 125 : : : : 3 : +MSEL0 : 126 : : : : 3 : +vga_blue[1] : 127 : output : 3.3-V LVTTL : : 3 : Y +vga_hs : 128 : output : 3.3-V LVTTL : : 3 : Y +GND+ : 129 : : : : 3 : +GND+ : 130 : : : : 3 : +GND+ : 131 : : : : 3 : +GND+ : 132 : : : : 3 : +vga_vs : 133 : output : 3.3-V LVTTL : : 3 : Y +dm9000_data[6] : 134 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[7] : 135 : bidir : 3.3-V LVTTL : : 3 : Y +VCCIO3 : 136 : power : : 3.3V : 3 : +dm9000_data[4] : 137 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[5] : 138 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[2] : 139 : bidir : 3.3-V LVTTL : : 3 : Y +GND : 140 : gnd : : : : +dm9000_data[3] : 141 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[0] : 142 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[1] : 143 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[15] : 144 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[14] : 145 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[13] : 146 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[12] : 147 : bidir : 3.3-V LVTTL : : 3 : Y +VCCIO3 : 148 : power : : 3.3V : 3 : +dm9000_data[11] : 149 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[10] : 150 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[9] : 151 : bidir : 3.3-V LVTTL : : 3 : Y +dm9000_data[8] : 152 : bidir : 3.3-V LVTTL : : 3 : Y +GND : 153 : gnd : : : : +GND_PLL2 : 154 : gnd : : : : +VCCD_PLL2 : 155 : power : : 1.2V : : +GND_PLL2 : 156 : gnd : : : : +VCCA_PLL2 : 157 : power : : 1.2V : : +GNDA_PLL2 : 158 : gnd : : : : +GND : 159 : gnd : : : : +dm9000_cmd : 160 : output : 3.3-V LVTTL : : 2 : Y +dm9000_int : 161 : input : 3.3-V LVTTL : : 2 : Y +dm9000_rd_n : 162 : output : 3.3-V LVTTL : : 2 : Y +dm9000_wr_n : 163 : output : 3.3-V LVTTL : : 2 : Y +dm9000_rst_n : 164 : output : 3.3-V LVTTL : : 2 : Y +dm9000_cs_n : 165 : output : 3.3-V LVTTL : : 2 : Y +VCCIO2 : 166 : power : : 3.3V : 2 : +GND : 167 : gnd : : : : +GND* : 168 : : : : 2 : +GND* : 169 : : : : 2 : +GND* : 170 : : : : 2 : +GND* : 171 : : : : 2 : +VCCIO2 : 172 : power : : 3.3V : 2 : +GND* : 173 : : : : 2 : +GND : 174 : gnd : : : : +GND* : 175 : : : : 2 : +GND* : 176 : : : : 2 : +GND : 177 : gnd : : : : +VCCINT : 178 : power : : 1.2V : : +GND* : 179 : : : : 2 : +seven_seg[7] : 180 : output : 3.3-V LVTTL : : 2 : N +GND* : 181 : : : : 2 : +GND* : 182 : : : : 2 : +VCCIO2 : 183 : power : : 3.3V : 2 : +GND : 184 : gnd : : : : +seven_seg[3] : 185 : output : 3.3-V LVTTL : : 2 : N +GND : 186 : gnd : : : : +seven_seg[5] : 187 : output : 3.3-V LVTTL : : 2 : N +GND* : 188 : : : : 2 : +GND* : 189 : : : : 2 : +VCCINT : 190 : power : : 1.2V : : +GND* : 191 : : : : 2 : +GND* : 192 : : : : 2 : +seven_seg[1] : 193 : output : 3.3-V LVTTL : : 2 : N +VCCIO2 : 194 : power : : 3.3V : 2 : +seven_seg[4] : 195 : output : 3.3-V LVTTL : : 2 : N +GND : 196 : gnd : : : : +GND* : 197 : : : : 2 : +GND* : 198 : : : : 2 : +seven_seg[6] : 199 : output : 3.3-V LVTTL : : 2 : N +GND* : 200 : : : : 2 : +GND* : 201 : : : : 2 : +VCCIO2 : 202 : power : : 3.3V : 2 : +GND* : 203 : : : : 2 : +GND : 204 : gnd : : : : +GND* : 205 : : : : 2 : +GND* : 206 : : : : 2 : +GND* : 207 : : : : 2 : +GND* : 208 : : : : 2 : diff --git a/pong3.qpf b/pong3.qpf new file mode 100644 index 0000000..f9a4fa2 --- /dev/null +++ b/pong3.qpf @@ -0,0 +1,30 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2012 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 32-bit +# Version 12.0 Build 178 05/31/2012 SJ Web Edition +# Date created = 21:48:38 September 12, 2013 +# +# -------------------------------------------------------------------------- # + +QUARTUS_VERSION = "12.0" +DATE = "21:48:38 September 12, 2013" + +# Revisions + +PROJECT_REVISION = "pong3" diff --git a/pong3.qsf b/pong3.qsf new file mode 100644 index 0000000..0523c4d --- /dev/null +++ b/pong3.qsf @@ -0,0 +1,151 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2012 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II 32-bit +# Version 12.0 Build 178 05/31/2012 SJ Web Edition +# Date created = 21:48:38 September 12, 2013 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# pong3.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY "Cyclone II" +set_global_assignment -name DEVICE EP2C8Q208C8 +set_global_assignment -name TOP_LEVEL_ENTITY pong3 +set_global_assignment -name ORIGINAL_QUARTUS_VERSION 12.0 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:48:38 SEPTEMBER 12, 2013" +set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP" +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 208 +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1 +set_location_assignment PIN_40 -to seg[6] +set_location_assignment PIN_37 -to seg[5] +set_location_assignment PIN_43 -to seg[4] +set_location_assignment PIN_44 -to seg[3] +set_location_assignment PIN_39 -to seg[2] +set_location_assignment PIN_35 -to seg[1] +set_location_assignment PIN_34 -to seg[0] +set_location_assignment PIN_23 -to clk +set_location_assignment PIN_27 -to rst_n +set_location_assignment PIN_92 -to sdram_addr[12] +set_location_assignment PIN_90 -to sdram_addr[11] +set_location_assignment PIN_75 -to sdram_addr[10] +set_location_assignment PIN_89 -to sdram_addr[9] +set_location_assignment PIN_88 -to sdram_addr[8] +set_location_assignment PIN_87 -to sdram_addr[7] +set_location_assignment PIN_86 -to sdram_addr[6] +set_location_assignment PIN_84 -to sdram_addr[5] +set_location_assignment PIN_82 -to sdram_addr[4] +set_location_assignment PIN_81 -to sdram_addr[3] +set_location_assignment PIN_80 -to sdram_addr[2] +set_location_assignment PIN_77 -to sdram_addr[1] +set_location_assignment PIN_76 -to sdram_addr[0] +set_location_assignment PIN_74 -to sdram_ba[1] +set_location_assignment PIN_72 -to sdram_ba[0] +set_location_assignment PIN_69 -to sdram_cas_n +set_location_assignment PIN_46 -to sdram_cke +set_location_assignment PIN_47 -to sdram_clk +set_location_assignment PIN_45 -to sdram_cs_n +set_location_assignment PIN_94 -to sdram_dq[15] +set_location_assignment PIN_95 -to sdram_dq[14] +set_location_assignment PIN_96 -to sdram_dq[13] +set_location_assignment PIN_97 -to sdram_dq[12] +set_location_assignment PIN_99 -to sdram_dq[11] +set_location_assignment PIN_101 -to sdram_dq[10] +set_location_assignment PIN_102 -to sdram_dq[9] +set_location_assignment PIN_103 -to sdram_dq[8] +set_location_assignment PIN_57 -to sdram_dq[7] +set_location_assignment PIN_58 -to sdram_dq[6] +set_location_assignment PIN_59 -to sdram_dq[5] +set_location_assignment PIN_60 -to sdram_dq[4] +set_location_assignment PIN_61 -to sdram_dq[3] +set_location_assignment PIN_63 -to sdram_dq[2] +set_location_assignment PIN_64 -to sdram_dq[1] +set_location_assignment PIN_67 -to sdram_dq[0] +set_location_assignment PIN_104 -to sdram_dqm[1] +set_location_assignment PIN_56 -to sdram_dqm[0] +set_location_assignment PIN_70 -to sdram_ras_n +set_location_assignment PIN_68 -to sdram_we_n +set_location_assignment PIN_41 -to seg[7] +set_location_assignment PIN_160 -to dm9000_cmd +set_location_assignment PIN_165 -to dm9000_cs_n +set_location_assignment PIN_144 -to dm9000_data[15] +set_location_assignment PIN_145 -to dm9000_data[14] +set_location_assignment PIN_146 -to dm9000_data[13] +set_location_assignment PIN_147 -to dm9000_data[12] +set_location_assignment PIN_149 -to dm9000_data[11] +set_location_assignment PIN_150 -to dm9000_data[10] +set_location_assignment PIN_151 -to dm9000_data[9] +set_location_assignment PIN_152 -to dm9000_data[8] +set_location_assignment PIN_135 -to dm9000_data[7] +set_location_assignment PIN_134 -to dm9000_data[6] +set_location_assignment PIN_138 -to dm9000_data[5] +set_location_assignment PIN_137 -to dm9000_data[4] +set_location_assignment PIN_141 -to dm9000_data[3] +set_location_assignment PIN_139 -to dm9000_data[2] +set_location_assignment PIN_143 -to dm9000_data[1] +set_location_assignment PIN_142 -to dm9000_data[0] +set_location_assignment PIN_162 -to dm9000_rd_n +set_location_assignment PIN_163 -to dm9000_wr_n +set_location_assignment PIN_164 -to dm9000_rst_n +set_location_assignment PIN_161 -to dm9000_int +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name SEARCH_PATH db/ip/my_sys/ -tag from_archive +set_global_assignment -name SEARCH_PATH db/ip/my_sys/submodules/ -tag from_archive +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" +set_location_assignment PIN_108 -to vga_red[0] +set_location_assignment PIN_113 -to vga_red[1] +set_location_assignment PIN_112 -to vga_red[2] +set_location_assignment PIN_128 -to vga_hs +set_location_assignment PIN_115 -to vga_green[0] +set_location_assignment PIN_114 -to vga_green[1] +set_location_assignment PIN_117 -to vga_green[2] +set_location_assignment PIN_116 -to vga_blue[0] +set_location_assignment PIN_127 -to vga_blue[1] +set_location_assignment PIN_118 -to vga_blue[2] +set_location_assignment PIN_133 -to vga_vs + +set_global_assignment -name USE_CONFIGURATION_DEVICE ON +set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" +set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "USE AS REGULAR IO" + + +set_global_assignment -name VERILOG_FILE DM9000A/hdl/DM9000A_IF.v +set_global_assignment -name VERILOG_FILE GPU/hdl/GPU_IF.v +set_global_assignment -name PIN_FILE pong3.pin +set_global_assignment -name VERILOG_FILE pong3.v +set_global_assignment -name QSYS_FILE my_sys.qsys + +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/pong3.v b/pong3.v new file mode 100644 index 0000000..0328dcc --- /dev/null +++ b/pong3.v @@ -0,0 +1,112 @@ +module pong3( + clk, + rst_n, + + sdram_clk ,//connected to the CLK port of SDRAM + sdram_cke ,//connected to the CKE port of SDRAM + sdram_cs_n ,//connected to the CS_n port of SDRAM + sdram_ras_n ,//connected to the RAS_n port of SDRAM + sdram_cas_n ,//connected to the CAS_n port of SDRAM + sdram_we_n ,//connected to the WE_n port of SDRAM + sdram_ba ,//connected to the BA port of SDRAM + sdram_addr ,//connected to the ADDR port of SDRAM + sdram_dqm ,//connected to the DQM port of SDRAM + sdram_dq ,//connected to the DQ port of SDRAM + + dm9000_int , + dm9000_rst_n, + dm9000_cs_n , + dm9000_cmd , + dm9000_rd_n , + dm9000_wr_n , + dm9000_data , + + vga_hs, + vga_vs, + vga_red, + vga_green, + vga_blue, + + seven_seg + ); + + input clk; + input rst_n; + + output sdram_clk ; + output sdram_cke ; + output sdram_cs_n ; + output sdram_ras_n; + output sdram_cas_n; + output sdram_we_n ; + output [ 1 : 0] sdram_ba ; + output [12 : 0] sdram_addr ; + output [ 1 : 0] sdram_dqm ; + inout [15 : 0] sdram_dq ; + + input dm9000_int ; + output dm9000_rst_n; + output dm9000_cs_n ; + output dm9000_cmd ; + output dm9000_rd_n ; + output dm9000_wr_n ; + inout [15:0] dm9000_data ; + + output [ 7:0] seven_seg; + + + output vga_hs; + output vga_vs; + output [2:0] vga_red; + output [2:0] vga_green; + output [2:0] vga_blue; + + + wire sclk; + + + pll u_pll( + .inclk0(clk ), + .c0 (sclk ), + .c1 (sdram_clk) + ); + + + + my_sys u_my_sys( + .reset_reset_n (rst_n ), + .clk_clk (sclk ), + .sdram_0_wire_addr (sdram_addr ), + .sdram_0_wire_ba (sdram_ba ), + .sdram_0_wire_cas_n(sdram_cas_n), + .sdram_0_wire_cke (sdram_cke ), + .sdram_0_wire_cs_n (sdram_cs_n ), + .sdram_0_wire_dq (sdram_dq ), + .sdram_0_wire_dqm (sdram_dqm ), + .sdram_0_wire_ras_n(sdram_ras_n), + .sdram_0_wire_we_n (sdram_we_n ), + .pio_0_d_export (SEG ), + + + .gpu_0_vga_red(vga_red), + .gpu_0_vga_green(vga_green), + .gpu_0_vga_blue(vga_blue), + .gpu_0_vga_hs(vga_hs), + .gpu_0_vga_vs(vga_vs), + .gpu_0_vga_clk(clk), + + .dm9000a_0_conduit_end_iOSC_50 ( ), + .dm9000a_0_conduit_end_ENET_DATA (dm9000_data ), + .dm9000a_0_conduit_end_ENET_CMD (dm9000_cmd ), + .dm9000a_0_conduit_end_ENET_RD_N (dm9000_rd_n ), + .dm9000a_0_conduit_end_ENET_WR_N (dm9000_wr_n ), + .dm9000a_0_conduit_end_ENET_CS_N (dm9000_cs_n ), + .dm9000a_0_conduit_end_ENET_RST_N(dm9000_rst_n), + .dm9000a_0_conduit_end_ENET_INT (dm9000_int ), + .dm9000a_0_conduit_end_ENET_CLK ( ) + ); + + + + +endmodule diff --git a/software/pong3/.cproject b/software/pong3/.cproject index ff66346..ae6d1bc 100644 --- a/software/pong3/.cproject +++ b/software/pong3/.cproject @@ -3,19 +3,19 @@ - - + + - + - - - - - - - - - + @@ -313,11 +313,11 @@ - + - + @@ -330,7 +330,7 @@ - + @@ -372,7 +372,4 @@ - - - diff --git a/software/pong3/Makefile b/software/pong3/Makefile index 1f3722c..0aeadd9 100644 --- a/software/pong3/Makefile +++ b/software/pong3/Makefile @@ -142,7 +142,9 @@ ACDS_VERSION := 13.0sp1 ELF := pong3.elf # Paths to C, C++, and assembly source files. -C_SRCS := pong3.c hello_led.c DM9000A.C +C_SRCS += pong3.c +C_SRCS += hello_led.c +C_SRCS += DM9000A.C CXX_SRCS := ASM_SRCS := @@ -177,7 +179,7 @@ CRT0 := SYS_LIB := # Define path to the root of the BSP. -BSP_ROOT_DIR := /root/projects/pong3/software/pong3_bsp/ +BSP_ROOT_DIR := ../pong3_bsp/ # List of application specific include directories, library directories and library names APP_INCLUDE_DIRS := @@ -188,7 +190,7 @@ APP_LIBRARY_NAMES := BUILD_PRE_PROCESS := BUILD_POST_PROCESS := -QUARTUS_PROJECT_DIR := /root/projects/pong3/hardware/ +QUARTUS_PROJECT_DIR := ../../ #END GENERATED diff --git a/software/pong3/Nios II/makefile b/software/pong3/Nios II/makefile deleted file mode 100644 index 32daa76..0000000 --- a/software/pong3/Nios II/makefile +++ /dev/null @@ -1,58 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - --include ../makefile.init - -RM := rm - -# All of the sources participating in the build are defined here --include sources.mk --include subdir.mk --include objects.mk - -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(strip $(C++_DEPS)),) --include $(C++_DEPS) -endif -ifneq ($(strip $(C_DEPS)),) --include $(C_DEPS) -endif -ifneq ($(strip $(CC_DEPS)),) --include $(CC_DEPS) -endif -ifneq ($(strip $(CPP_DEPS)),) --include $(CPP_DEPS) -endif -ifneq ($(strip $(CXX_DEPS)),) --include $(CXX_DEPS) -endif -ifneq ($(strip $(C_UPPER_DEPS)),) --include $(C_UPPER_DEPS) -endif -endif - --include ../makefile.defs - -# Add inputs and outputs from these tool invocations to the build variables - -# All Target -all: - -# Tool invocations -: $(OBJS) $(USER_OBJS) - @echo 'Building target: $@' - @echo 'Invoking: GCC C++ Linker' - g++ -o $(OBJS) $(USER_OBJS) $(LIBS) - @echo 'Finished building target: $@' - @echo ' ' - -# Other Targets -clean: - -$(RM) $(OBJS)$(C++_DEPS)$(C_DEPS)$(CC_DEPS)$(CPP_DEPS)$(EXECUTABLES)$(CXX_DEPS)$(C_UPPER_DEPS) - -@echo ' ' - -.PHONY: all clean dependents -.SECONDARY: - --include ../makefile.targets diff --git a/software/pong3/Nios II/objects.mk b/software/pong3/Nios II/objects.mk deleted file mode 100644 index 742c2da..0000000 --- a/software/pong3/Nios II/objects.mk +++ /dev/null @@ -1,8 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -USER_OBJS := - -LIBS := - diff --git a/software/pong3/Nios II/sources.mk b/software/pong3/Nios II/sources.mk deleted file mode 100644 index 5b37ead..0000000 --- a/software/pong3/Nios II/sources.mk +++ /dev/null @@ -1,27 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -O_SRCS := -CPP_SRCS := -C_UPPER_SRCS := -C_SRCS := -S_UPPER_SRCS := -OBJ_SRCS := -ASM_SRCS := -CXX_SRCS := -C++_SRCS := -CC_SRCS := -OBJS := -C++_DEPS := -C_DEPS := -CC_DEPS := -CPP_DEPS := -EXECUTABLES := -CXX_DEPS := -C_UPPER_DEPS := - -# Every subdirectory with source files must be described here -SUBDIRS := \ -. \ - diff --git a/software/pong3/Nios II/subdir.mk b/software/pong3/Nios II/subdir.mk deleted file mode 100644 index 813f2c3..0000000 --- a/software/pong3/Nios II/subdir.mk +++ /dev/null @@ -1,41 +0,0 @@ -################################################################################ -# Automatically-generated file. Do not edit! -################################################################################ - -# Add inputs and outputs from these tool invocations to the build variables -C_UPPER_SRCS += \ -../DM9000A.C - -C_SRCS += \ -../hello_led.c \ -../pong3.c - -OBJS += \ -./DM9000A.o \ -./hello_led.o \ -./pong3.o - -C_DEPS += \ -./hello_led.d \ -./pong3.d - -C_UPPER_DEPS += \ -./DM9000A.d - - -# Each subdirectory must supply rules for building sources it contributes -%.o: ../%.C - @echo 'Building file: $<' - @echo 'Invoking: GCC C++ Compiler' - g++ -U__FLT_EVAL_METHOD__ -U__FLT_EPSILON__ -U__DEC64_MANT_DIG__ -U__FLT_MAX_EXP__ -U__DBL_MIN__ -U__LDBL_EPSILON__ -U__DEC64_MIN__ -U__SCHAR_MAX__ -U__DEC128_MANT_DIG__ -U__DBL_MIN_10_EXP__ -U__unix__ -U__DBL_DENORM_MIN__ -U__REGISTER_PREFIX__ -U__SHRT_MAX__ -U__DBL_HAS_DENORM__ -U__SIZEOF_WCHAR_T__ -U__SIZEOF_PTRDIFF_T__ -U__DEC32_MAX__ -U__linux__ -U__SIZEOF_DOUBLE__ -U__LDBL_HAS_QUIET_NAN__ -U__FLT_MIN_EXP__ -U__LDBL_MANT_DIG__ -U__DEC32_EPSILON__ -U__FLT_DENORM_MIN__ -U__CHAR32_TYPE__ -U__LDBL_DIG__ -U__ELF__ -U__DEC128_MAX__ -U__DEC32_MIN_EXP__ -U__LDBL_DENORM_MIN__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 -Ui386 -U_GNU_SOURCE -U__FLT_MIN_10_EXP__ -U__WCHAR_MAX__ -U__LDBL_HAS_DENORM__ -U__GNUC_PATCHLEVEL__ -U__DEC32_SUBNORMAL_MIN__ -U__GXX_ABI_VERSION -U__SIZEOF_POINTER__ -U__DBL_MIN_EXP__ -U__FLT_MAX_10_EXP__ -U__GNUC_RH_RELEASE__ -U__LDBL_HAS_INFINITY__ -U__DEC64_MIN_EXP__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 -U__SIZEOF_LONG_DOUBLE__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 -U__DEC32_MIN__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 -U__EXCEPTIONS -U__LDBL_MIN_10_EXP__ -U__i386 -U__SIZEOF_LONG_LONG__ -U__DEPRECATED -U__DEC64_MAX_EXP__ -U__FLT_MIN__ -U__DBL_EPSILON__ -U__GXX_RTTI -U__LDBL_MAX_EXP__ -U__DEC128_MAX_EXP__ -U__SIZEOF_SIZE_T__ -U__DBL_DIG__ -U__FLT_MANT_DIG__ -U__FLT_RADIX__ -U__GNUC_MINOR__ -U__DEC64_MAX__ -U__BIGGEST_ALIGNMENT__ -U__gnu_linux__ -U__INTMAX_TYPE__ -U__FLT_DIG__ -U__LDBL_MIN_EXP__ -U__DECIMAL_BID_FORMAT__ -U__pentiumpro__ -U__i686 -U__INT_MAX__ -U__DEC64_EPSILON__ -U__LONG_LONG_MAX__ -U__DBL_HAS_INFINITY__ -U__FLT_HAS_QUIET_NAN__ -U__DBL_MAX_10_EXP__ -U__FLT_HAS_DENORM__ -U__STDC__ -U__LDBL_MIN__ -U__NO_INLINE__ -U__DEC128_EPSILON__ -U__GNUC__ -U__SIZEOF_FLOAT__ -U__INTMAX_MAX__ -U__DEC32_MAX_EXP__ -U__unix -U__VERSION__ -U__DEC128_MIN_EXP__ -U__SIZEOF_WINT_T__ -U__SIZEOF_INT__ -U__USER_LABEL_PREFIX__ -U__LONG_MAX__ -U__pentiumpro -U__PTRDIFF_TYPE__ -U__CHAR_BIT__ -U__i386__ -U__DEC128_SUBNORMAL_MIN__ -U__DBL_HAS_QUIET_NAN__ -U__SIZEOF_SHORT__ -U__DBL_MAX_EXP__ -U__WINT_TYPE__ -U__DEC_EVAL_METHOD__ -U__DEC64_SUBNORMAL_MIN__ -U__DBL_MANT_DIG__ -U__FLT_MAX__ -U__linux -U__GNUC_GNU_INLINE__ -U__DEC128_MIN__ -U__SIZE_TYPE__ -U__FLT_HAS_INFINITY__ -U__DEC32_MANT_DIG__ -U__GCC_HAVE_DWARF2_CFI_ASM -U__STDC_HOSTED__ -Ulinux -U__DECIMAL_DIG__ -U__LDBL_MAX_10_EXP__ -U__GXX_WEAK__ -U__DBL_MAX__ -U__i686__ -U__SIZEOF_LONG__ -U__UINTMAX_TYPE__ -U__LDBL_MAX__ -U__FINITE_MATH_ONLY__ -U__WCHAR_TYPE__ -U__GNUG__ -Uunix -U__CHAR16_TYPE__ -U__cplusplus -O2 -g -Wall -c -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o "$@" "$<" - @echo 'Finished building: $<' - @echo ' ' - -%.o: ../%.c - @echo 'Building file: $<' - @echo 'Invoking: GCC C Compiler' - gcc -U__FLT_EVAL_METHOD__ -U__FLT_EPSILON__ -U__DEC64_MANT_DIG__ -U__FLT_MAX_EXP__ -U__DBL_MIN__ -U__LDBL_EPSILON__ -U__DEC64_MIN__ -U__SCHAR_MAX__ -U__DEC128_MANT_DIG__ -U__DBL_MIN_10_EXP__ -U__unix__ -U__DBL_DENORM_MIN__ -U__REGISTER_PREFIX__ -U__SHRT_MAX__ -U__DBL_HAS_DENORM__ -U__SIZEOF_WCHAR_T__ -U__SIZEOF_PTRDIFF_T__ -U__DEC32_MAX__ -U__linux__ -U__SIZEOF_DOUBLE__ -U__LDBL_HAS_QUIET_NAN__ -U__FLT_MIN_EXP__ -U__LDBL_MANT_DIG__ -U__DEC32_EPSILON__ -U__FLT_DENORM_MIN__ -U__CHAR32_TYPE__ -U__LDBL_DIG__ -U__ELF__ -U__DEC32_MIN_EXP__ -U__DEC128_MAX__ -U__LDBL_DENORM_MIN__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 -Ui386 -U__FLT_MIN_10_EXP__ -U__WCHAR_MAX__ -U__LDBL_HAS_DENORM__ -U__GNUC_PATCHLEVEL__ -U__DEC32_SUBNORMAL_MIN__ -U__GXX_ABI_VERSION -U__SIZEOF_POINTER__ -U__DBL_MIN_EXP__ -U__LDBL_HAS_INFINITY__ -U__GNUC_RH_RELEASE__ -U__FLT_MAX_10_EXP__ -U__DEC64_MIN_EXP__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 -U__SIZEOF_LONG_DOUBLE__ -U__DEC32_MIN__ -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 -U__LDBL_MIN_10_EXP__ -U__i386 -U__SIZEOF_LONG_LONG__ -U__DEC64_MAX_EXP__ -U__FLT_MIN__ -U__DBL_EPSILON__ -U__LDBL_MAX_EXP__ -U__DEC128_MAX_EXP__ -U__SIZEOF_SIZE_T__ -U__DBL_DIG__ -U__FLT_MANT_DIG__ -U__GNUC_MINOR__ -U__FLT_RADIX__ -U__DEC64_MAX__ -U__BIGGEST_ALIGNMENT__ -U__gnu_linux__ -U__INTMAX_TYPE__ -U__FLT_DIG__ -U__LDBL_MIN_EXP__ -U__DECIMAL_BID_FORMAT__ -U__pentiumpro__ -U__i686 -U__INT_MAX__ -U__DEC64_EPSILON__ -U__LONG_LONG_MAX__ -U__DBL_HAS_INFINITY__ -U__FLT_HAS_QUIET_NAN__ -U__DBL_MAX_10_EXP__ -U__STDC__ -U__FLT_HAS_DENORM__ -U__LDBL_MIN__ -U__NO_INLINE__ -U__DEC128_EPSILON__ -U__GNUC__ -U__SIZEOF_FLOAT__ -U__INTMAX_MAX__ -U__DEC32_MAX_EXP__ -U__unix -U__VERSION__ -U__DEC128_MIN_EXP__ -U__SIZEOF_WINT_T__ -U__USER_LABEL_PREFIX__ -U__SIZEOF_INT__ -U__LONG_MAX__ -U__pentiumpro -U__PTRDIFF_TYPE__ -U__i386__ -U__CHAR_BIT__ -U__DEC128_SUBNORMAL_MIN__ -U__DBL_HAS_QUIET_NAN__ -U__SIZEOF_SHORT__ -U__DBL_MAX_EXP__ -U__WINT_TYPE__ -U__DEC_EVAL_METHOD__ -U__DEC64_SUBNORMAL_MIN__ -U__DBL_MANT_DIG__ -U__FLT_MAX__ -U__linux -U__GNUC_GNU_INLINE__ -U__DEC128_MIN__ -U__SIZE_TYPE__ -U__FLT_HAS_INFINITY__ -U__DEC32_MANT_DIG__ -U__STDC_HOSTED__ -Ulinux -U__DECIMAL_DIG__ -U__LDBL_MAX_10_EXP__ -U__DBL_MAX__ -U__i686__ -U__SIZEOF_LONG__ -U__UINTMAX_TYPE__ -U__LDBL_MAX__ -U__FINITE_MATH_ONLY__ -U__WCHAR_TYPE__ -Uunix -U__CHAR16_TYPE__ -O2 -g -Wall -c -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)" -o "$@" "$<" - @echo 'Finished building: $<' - @echo ' ' - - diff --git a/software/pong3/create-this-app b/software/pong3/create-this-app index 99ab8a0..fe6b3f4 100755 --- a/software/pong3/create-this-app +++ b/software/pong3/create-this-app @@ -1,11 +1,11 @@ #!/bin/bash # -# This script creates the hello_world application in this directory. +# This script creates the blank_project application in this directory. -BSP_DIR=/root/projects/pong3/software/pong3_bsp/ -QUARTUS_PROJECT_DIR=/root/projects/pong3/hardware/ -NIOS2_APP_GEN_ARGS="--elf-name pong3.elf --set OBJDUMP_INCLUDE_SOURCE 1 --src-files hello_world.c" +BSP_DIR=../pong3_bsp +QUARTUS_PROJECT_DIR=../../ +NIOS2_APP_GEN_ARGS="--elf-name pong3.elf --no-src --set OBJDUMP_INCLUDE_SOURCE 1" # First, check to see if $SOPC_KIT_NIOS2 environmental variable is set. @@ -57,18 +57,18 @@ done # Now we also need to go copy the sources for this application to the # local directory. -find "${SOPC_KIT_NIOS2}/examples/software/hello_world/" -name '*.c' -or -name '*.h' -or -name 'hostfs*' | xargs -i cp -L {} ./ || { +find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name '*.c' -or -name '*.h' -or -name 'hostfs*' | xargs -i cp -L {} ./ || { echo "failed during copying example source files" exit 1 } -find "${SOPC_KIT_NIOS2}/examples/software/hello_world/" -name 'readme.txt' -or -name 'Readme.txt' | xargs -i cp -L {} ./ || { +find "${SOPC_KIT_NIOS2}/examples/software/blank_project/" -name 'readme.txt' -or -name 'Readme.txt' | xargs -i cp -L {} ./ || { echo "failed copying readme file" } -if [ -d "${SOPC_KIT_NIOS2}/examples/software/hello_world/system" ] +if [ -d "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" ] then - cp -RL "${SOPC_KIT_NIOS2}/examples/software/hello_world/system" . || { + cp -RL "${SOPC_KIT_NIOS2}/examples/software/blank_project/system" . || { echo "failed during copying project support files" exit 1 } diff --git a/software/pong3/readme.txt b/software/pong3/readme.txt index 7d0742f..57f6738 100644 --- a/software/pong3/readme.txt +++ b/software/pong3/readme.txt @@ -1,26 +1,11 @@ -Readme - Hello World Software Example - -DESCRIPTION: -Simple program that prints "Hello from Nios II" - -The memory footprint of this hosted application is intended to be small (under 100 kbytes) by default -using a standard reference deisgn. - -For an even smaller, reduced footprint version of this template, and an explanation of how -to reduce the memory footprint for a given application, see the -"small_hello_world" template. - - -PERIPHERALS USED: -This example exercises the following peripherals: -- STDOUT device (UART or JTAG UART) - -SOFTWARE SOURCE FILES: -This example includes the following software source files: -- hello_world.c: Everyone needs a Hello World program, right? - -BOARD/HOST REQUIREMENTS: -This example requires only a JTAG connection with a Nios Development board. If -the host communication settings are changed from JTAG UART (default) to use a -conventional UART, a serial cable between board DB-9 connector and the host is -required. +This template is starting point for creating a project based on your custom C code. +It will provide you a default project to which you can add your software files. To +add files to a project, manually copy the file into the application directory (e.g. +using Windows Explorer), then right click on your application project and select +refresh. + +You can also add files to the project using the Nios II Software Build Tools for Eclipse import function. +Select File -> Import. +Expand General and select File System in the Import Window and click Next. +Identify the appropriate source and destination directories. +Check the files you want to add and click Finish. diff --git a/software/pong3_bsp/.cproject b/software/pong3_bsp/.cproject index 7143698..e441cd1 100644 --- a/software/pong3_bsp/.cproject +++ b/software/pong3_bsp/.cproject @@ -3,19 +3,19 @@ - - + + - + - - - - - - - - - + @@ -313,12 +313,12 @@ - + - + @@ -331,7 +331,7 @@ - + diff --git a/software/pong3_bsp/Makefile b/software/pong3_bsp/Makefile index 55adf71..d40fcef 100644 --- a/software/pong3_bsp/Makefile +++ b/software/pong3_bsp/Makefile @@ -103,7 +103,7 @@ ACDS_VERSION := 13.0sp1 # BUILD_NUMBER: 232 SETTINGS_FILE := settings.bsp -SOPC_FILE := /root/projects/altera/pong3/hardware/my_sys.sopcinfo +SOPC_FILE := ../../my_sys.sopcinfo #------------------------------------------------------------------------------- # TOOL & COMMAND DEFINITIONS diff --git a/software/pong3_bsp/create-this-bsp b/software/pong3_bsp/create-this-bsp index 6359a3a..8574282 100755 --- a/software/pong3_bsp/create-this-bsp +++ b/software/pong3_bsp/create-this-bsp @@ -4,8 +4,8 @@ BSP_TYPE=hal BSP_DIR=. -SOPC_DIR=/root/projects/altera/pong3/hardware/ -SOPC_FILE=/root/projects/altera/pong3/hardware/my_sys.sopcinfo +SOPC_DIR=../../ +SOPC_FILE=../../my_sys.sopcinfo NIOS2_BSP_ARGS="" CPU_NAME= diff --git a/software/pong3_bsp/settings.bsp b/software/pong3_bsp/settings.bsp index 770099f..9f884af 100644 --- a/software/pong3_bsp/settings.bsp +++ b/software/pong3_bsp/settings.bsp @@ -2,11 +2,11 @@ hal default - Oct 10, 2013 11:01:44 AM - 1381399304153 - /root/projects/altera/pong3/software/pong3_bsp - settings.bsp - /root/projects/altera/pong3/hardware/my_sys.sopcinfo + Oct 10, 2013 11:34:52 AM + 1381401292694 + /home/root/projects/altera/pong3/hardware/software/pong3_bsp + ./settings.bsp + ../../my_sys.sopcinfo default nios2_qsys_0 1.9 @@ -934,4 +934,4 @@ .stack sdram_0 - + \ No newline at end of file -- cgit v1.2.3